1312fec14SDave Airlie /* 2312fec14SDave Airlie * Copyright 2012 Red Hat Inc. 3312fec14SDave Airlie * 4312fec14SDave Airlie * Permission is hereby granted, free of charge, to any person obtaining a 5312fec14SDave Airlie * copy of this software and associated documentation files (the 6312fec14SDave Airlie * "Software"), to deal in the Software without restriction, including 7312fec14SDave Airlie * without limitation the rights to use, copy, modify, merge, publish, 8312fec14SDave Airlie * distribute, sub license, and/or sell copies of the Software, and to 9312fec14SDave Airlie * permit persons to whom the Software is furnished to do so, subject to 10312fec14SDave Airlie * the following conditions: 11312fec14SDave Airlie * 12312fec14SDave Airlie * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 13312fec14SDave Airlie * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 14312fec14SDave Airlie * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL 15312fec14SDave Airlie * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, 16312fec14SDave Airlie * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR 17312fec14SDave Airlie * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE 18312fec14SDave Airlie * USE OR OTHER DEALINGS IN THE SOFTWARE. 19312fec14SDave Airlie * 20312fec14SDave Airlie * The above copyright notice and this permission notice (including the 21312fec14SDave Airlie * next paragraph) shall be included in all copies or substantial portions 22312fec14SDave Airlie * of the Software. 23312fec14SDave Airlie * 24312fec14SDave Airlie */ 25312fec14SDave Airlie /* 26312fec14SDave Airlie * Authors: Dave Airlie <airlied@redhat.com> 27312fec14SDave Airlie */ 28760285e7SDavid Howells #include <drm/drmP.h> 29312fec14SDave Airlie #include "ast_drv.h" 30312fec14SDave Airlie 31760285e7SDavid Howells #include <drm/drm_crtc_helper.h> 325ed7191dSThomas Zimmermann #include <drm/drm_fb_helper.h> 335ed7191dSThomas Zimmermann #include <drm/drm_gem_framebuffer_helper.h> 34312fec14SDave Airlie 35312fec14SDave Airlie void ast_set_index_reg_mask(struct ast_private *ast, 36312fec14SDave Airlie uint32_t base, uint8_t index, 37312fec14SDave Airlie uint8_t mask, uint8_t val) 38312fec14SDave Airlie { 39312fec14SDave Airlie u8 tmp; 40312fec14SDave Airlie ast_io_write8(ast, base, index); 41312fec14SDave Airlie tmp = (ast_io_read8(ast, base + 1) & mask) | val; 42312fec14SDave Airlie ast_set_index_reg(ast, base, index, tmp); 43312fec14SDave Airlie } 44312fec14SDave Airlie 45312fec14SDave Airlie uint8_t ast_get_index_reg(struct ast_private *ast, 46312fec14SDave Airlie uint32_t base, uint8_t index) 47312fec14SDave Airlie { 48312fec14SDave Airlie uint8_t ret; 49312fec14SDave Airlie ast_io_write8(ast, base, index); 50312fec14SDave Airlie ret = ast_io_read8(ast, base + 1); 51312fec14SDave Airlie return ret; 52312fec14SDave Airlie } 53312fec14SDave Airlie 54312fec14SDave Airlie uint8_t ast_get_index_reg_mask(struct ast_private *ast, 55312fec14SDave Airlie uint32_t base, uint8_t index, uint8_t mask) 56312fec14SDave Airlie { 57312fec14SDave Airlie uint8_t ret; 58312fec14SDave Airlie ast_io_write8(ast, base, index); 59312fec14SDave Airlie ret = ast_io_read8(ast, base + 1) & mask; 60312fec14SDave Airlie return ret; 61312fec14SDave Airlie } 62312fec14SDave Airlie 6371f677a9SRussell Currey static void ast_detect_config_mode(struct drm_device *dev, u32 *scu_rev) 6471f677a9SRussell Currey { 6571f677a9SRussell Currey struct device_node *np = dev->pdev->dev.of_node; 6671f677a9SRussell Currey struct ast_private *ast = dev->dev_private; 6771f677a9SRussell Currey uint32_t data, jregd0, jregd1; 6871f677a9SRussell Currey 6971f677a9SRussell Currey /* Defaults */ 7071f677a9SRussell Currey ast->config_mode = ast_use_defaults; 7171f677a9SRussell Currey *scu_rev = 0xffffffff; 7271f677a9SRussell Currey 7371f677a9SRussell Currey /* Check if we have device-tree properties */ 7471f677a9SRussell Currey if (np && !of_property_read_u32(np, "aspeed,scu-revision-id", 7571f677a9SRussell Currey scu_rev)) { 7671f677a9SRussell Currey /* We do, disable P2A access */ 7771f677a9SRussell Currey ast->config_mode = ast_use_dt; 7871f677a9SRussell Currey DRM_INFO("Using device-tree for configuration\n"); 7971f677a9SRussell Currey return; 8071f677a9SRussell Currey } 8171f677a9SRussell Currey 8271f677a9SRussell Currey /* Not all families have a P2A bridge */ 8371f677a9SRussell Currey if (dev->pdev->device != PCI_CHIP_AST2000) 8471f677a9SRussell Currey return; 8571f677a9SRussell Currey 8671f677a9SRussell Currey /* 8771f677a9SRussell Currey * The BMC will set SCU 0x40 D[12] to 1 if the P2 bridge 8871f677a9SRussell Currey * is disabled. We force using P2A if VGA only mode bit 8971f677a9SRussell Currey * is set D[7] 9071f677a9SRussell Currey */ 9171f677a9SRussell Currey jregd0 = ast_get_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xd0, 0xff); 9271f677a9SRussell Currey jregd1 = ast_get_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xd1, 0xff); 9371f677a9SRussell Currey if (!(jregd0 & 0x80) || !(jregd1 & 0x10)) { 9471f677a9SRussell Currey /* Double check it's actually working */ 9571f677a9SRussell Currey data = ast_read32(ast, 0xf004); 9671f677a9SRussell Currey if (data != 0xFFFFFFFF) { 9771f677a9SRussell Currey /* P2A works, grab silicon revision */ 9871f677a9SRussell Currey ast->config_mode = ast_use_p2a; 9971f677a9SRussell Currey 10071f677a9SRussell Currey DRM_INFO("Using P2A bridge for configuration\n"); 10171f677a9SRussell Currey 10271f677a9SRussell Currey /* Read SCU7c (silicon revision register) */ 10371f677a9SRussell Currey ast_write32(ast, 0xf004, 0x1e6e0000); 10471f677a9SRussell Currey ast_write32(ast, 0xf000, 0x1); 10571f677a9SRussell Currey *scu_rev = ast_read32(ast, 0x1207c); 10671f677a9SRussell Currey return; 10771f677a9SRussell Currey } 10871f677a9SRussell Currey } 10971f677a9SRussell Currey 11071f677a9SRussell Currey /* We have a P2A bridge but it's disabled */ 11171f677a9SRussell Currey DRM_INFO("P2A bridge disabled, using default configuration\n"); 11271f677a9SRussell Currey } 113312fec14SDave Airlie 114d1b98557SBenjamin Herrenschmidt static int ast_detect_chip(struct drm_device *dev, bool *need_post) 115312fec14SDave Airlie { 116312fec14SDave Airlie struct ast_private *ast = dev->dev_private; 11771f677a9SRussell Currey uint32_t jreg, scu_rev; 11871f677a9SRussell Currey 11971f677a9SRussell Currey /* 12071f677a9SRussell Currey * If VGA isn't enabled, we need to enable now or subsequent 12171f677a9SRussell Currey * access to the scratch registers will fail. We also inform 12271f677a9SRussell Currey * our caller that it needs to POST the chip 12371f677a9SRussell Currey * (Assumption: VGA not enabled -> need to POST) 12471f677a9SRussell Currey */ 12571f677a9SRussell Currey if (!ast_is_vga_enabled(dev)) { 12671f677a9SRussell Currey ast_enable_vga(dev); 12771f677a9SRussell Currey DRM_INFO("VGA not enabled on entry, requesting chip POST\n"); 12871f677a9SRussell Currey *need_post = true; 12971f677a9SRussell Currey } else 13071f677a9SRussell Currey *need_post = false; 13171f677a9SRussell Currey 13271f677a9SRussell Currey 13371f677a9SRussell Currey /* Enable extended register access */ 13471f677a9SRussell Currey ast_enable_mmio(dev); 1358f372e25SY.C. Chen ast_open_key(ast); 136312fec14SDave Airlie 13771f677a9SRussell Currey /* Find out whether P2A works or whether to use device-tree */ 13871f677a9SRussell Currey ast_detect_config_mode(dev, &scu_rev); 13971f677a9SRussell Currey 14071f677a9SRussell Currey /* Identify chipset */ 141312fec14SDave Airlie if (dev->pdev->device == PCI_CHIP_AST1180) { 142312fec14SDave Airlie ast->chip = AST1100; 143312fec14SDave Airlie DRM_INFO("AST 1180 detected\n"); 144312fec14SDave Airlie } else { 1459f93c8b3SY.C. Chen if (dev->pdev->revision >= 0x40) { 1469f93c8b3SY.C. Chen ast->chip = AST2500; 1479f93c8b3SY.C. Chen DRM_INFO("AST 2500 detected\n"); 1489f93c8b3SY.C. Chen } else if (dev->pdev->revision >= 0x30) { 1491453bf4cSDave Airlie ast->chip = AST2400; 1501453bf4cSDave Airlie DRM_INFO("AST 2400 detected\n"); 1511453bf4cSDave Airlie } else if (dev->pdev->revision >= 0x20) { 152312fec14SDave Airlie ast->chip = AST2300; 153312fec14SDave Airlie DRM_INFO("AST 2300 detected\n"); 154312fec14SDave Airlie } else if (dev->pdev->revision >= 0x10) { 15571f677a9SRussell Currey switch (scu_rev & 0x0300) { 156312fec14SDave Airlie case 0x0200: 157312fec14SDave Airlie ast->chip = AST1100; 158312fec14SDave Airlie DRM_INFO("AST 1100 detected\n"); 159312fec14SDave Airlie break; 160312fec14SDave Airlie case 0x0100: 161312fec14SDave Airlie ast->chip = AST2200; 162312fec14SDave Airlie DRM_INFO("AST 2200 detected\n"); 163312fec14SDave Airlie break; 164312fec14SDave Airlie case 0x0000: 165312fec14SDave Airlie ast->chip = AST2150; 166312fec14SDave Airlie DRM_INFO("AST 2150 detected\n"); 167312fec14SDave Airlie break; 168312fec14SDave Airlie default: 169312fec14SDave Airlie ast->chip = AST2100; 170312fec14SDave Airlie DRM_INFO("AST 2100 detected\n"); 171312fec14SDave Airlie break; 172312fec14SDave Airlie } 173312fec14SDave Airlie ast->vga2_clone = false; 174312fec14SDave Airlie } else { 17583502a5dSY.C. Chen ast->chip = AST2000; 176312fec14SDave Airlie DRM_INFO("AST 2000 detected\n"); 177312fec14SDave Airlie } 178312fec14SDave Airlie } 179f1f62f2cSDave Airlie 180d1b98557SBenjamin Herrenschmidt /* Check if we support wide screen */ 181f1f62f2cSDave Airlie switch (ast->chip) { 182f1f62f2cSDave Airlie case AST1180: 183f1f62f2cSDave Airlie ast->support_wide_screen = true; 184f1f62f2cSDave Airlie break; 185f1f62f2cSDave Airlie case AST2000: 186f1f62f2cSDave Airlie ast->support_wide_screen = false; 187f1f62f2cSDave Airlie break; 188f1f62f2cSDave Airlie default: 189f1f62f2cSDave Airlie jreg = ast_get_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xd0, 0xff); 190f1f62f2cSDave Airlie if (!(jreg & 0x80)) 191f1f62f2cSDave Airlie ast->support_wide_screen = true; 192f1f62f2cSDave Airlie else if (jreg & 0x01) 193f1f62f2cSDave Airlie ast->support_wide_screen = true; 194f1f62f2cSDave Airlie else { 195f1f62f2cSDave Airlie ast->support_wide_screen = false; 19671f677a9SRussell Currey if (ast->chip == AST2300 && 19771f677a9SRussell Currey (scu_rev & 0x300) == 0x0) /* ast1300 */ 198f1f62f2cSDave Airlie ast->support_wide_screen = true; 19971f677a9SRussell Currey if (ast->chip == AST2400 && 20071f677a9SRussell Currey (scu_rev & 0x300) == 0x100) /* ast1400 */ 2011453bf4cSDave Airlie ast->support_wide_screen = true; 2029f93c8b3SY.C. Chen if (ast->chip == AST2500 && 2039f93c8b3SY.C. Chen scu_rev == 0x100) /* ast2510 */ 2049f93c8b3SY.C. Chen ast->support_wide_screen = true; 205f1f62f2cSDave Airlie } 206f1f62f2cSDave Airlie break; 207f1f62f2cSDave Airlie } 208f1f62f2cSDave Airlie 209d1b98557SBenjamin Herrenschmidt /* Check 3rd Tx option (digital output afaik) */ 21083c6620bSDave Airlie ast->tx_chip_type = AST_TX_NONE; 211d1b98557SBenjamin Herrenschmidt 212d1b98557SBenjamin Herrenschmidt /* 213d1b98557SBenjamin Herrenschmidt * VGACRA3 Enhanced Color Mode Register, check if DVO is already 214d1b98557SBenjamin Herrenschmidt * enabled, in that case, assume we have a SIL164 TMDS transmitter 21542fb1427SBenjamin Herrenschmidt * 21642fb1427SBenjamin Herrenschmidt * Don't make that assumption if we the chip wasn't enabled and 21742fb1427SBenjamin Herrenschmidt * is at power-on reset, otherwise we'll incorrectly "detect" a 21842fb1427SBenjamin Herrenschmidt * SIL164 when there is none. 219d1b98557SBenjamin Herrenschmidt */ 22042fb1427SBenjamin Herrenschmidt if (!*need_post) { 22183c6620bSDave Airlie jreg = ast_get_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xa3, 0xff); 22283c6620bSDave Airlie if (jreg & 0x80) 22383c6620bSDave Airlie ast->tx_chip_type = AST_TX_SIL164; 22442fb1427SBenjamin Herrenschmidt } 225d1b98557SBenjamin Herrenschmidt 22683c6620bSDave Airlie if ((ast->chip == AST2300) || (ast->chip == AST2400)) { 227d1b98557SBenjamin Herrenschmidt /* 228d1b98557SBenjamin Herrenschmidt * On AST2300 and 2400, look the configuration set by the SoC in 229d1b98557SBenjamin Herrenschmidt * the SOC scratch register #1 bits 11:8 (interestingly marked 23042fb1427SBenjamin Herrenschmidt * as "reserved" in the spec) 231d1b98557SBenjamin Herrenschmidt */ 23283c6620bSDave Airlie jreg = ast_get_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xd1, 0xff); 23383c6620bSDave Airlie switch (jreg) { 23483c6620bSDave Airlie case 0x04: 23583c6620bSDave Airlie ast->tx_chip_type = AST_TX_SIL164; 23683c6620bSDave Airlie break; 23783c6620bSDave Airlie case 0x08: 23883c6620bSDave Airlie ast->dp501_fw_addr = kzalloc(32*1024, GFP_KERNEL); 23983c6620bSDave Airlie if (ast->dp501_fw_addr) { 24083c6620bSDave Airlie /* backup firmware */ 24183c6620bSDave Airlie if (ast_backup_fw(dev, ast->dp501_fw_addr, 32*1024)) { 24283c6620bSDave Airlie kfree(ast->dp501_fw_addr); 24383c6620bSDave Airlie ast->dp501_fw_addr = NULL; 24483c6620bSDave Airlie } 24583c6620bSDave Airlie } 24683c6620bSDave Airlie /* fallthrough */ 24783c6620bSDave Airlie case 0x0c: 24883c6620bSDave Airlie ast->tx_chip_type = AST_TX_DP501; 24983c6620bSDave Airlie } 25083c6620bSDave Airlie } 25183c6620bSDave Airlie 252d1b98557SBenjamin Herrenschmidt /* Print stuff for diagnostic purposes */ 253d1b98557SBenjamin Herrenschmidt switch(ast->tx_chip_type) { 254d1b98557SBenjamin Herrenschmidt case AST_TX_SIL164: 255d1b98557SBenjamin Herrenschmidt DRM_INFO("Using Sil164 TMDS transmitter\n"); 256d1b98557SBenjamin Herrenschmidt break; 257d1b98557SBenjamin Herrenschmidt case AST_TX_DP501: 258d1b98557SBenjamin Herrenschmidt DRM_INFO("Using DP501 DisplayPort transmitter\n"); 259d1b98557SBenjamin Herrenschmidt break; 260d1b98557SBenjamin Herrenschmidt default: 261d1b98557SBenjamin Herrenschmidt DRM_INFO("Analog VGA only\n"); 262d1b98557SBenjamin Herrenschmidt } 263312fec14SDave Airlie return 0; 264312fec14SDave Airlie } 265312fec14SDave Airlie 266312fec14SDave Airlie static int ast_get_dram_info(struct drm_device *dev) 267312fec14SDave Airlie { 26871f677a9SRussell Currey struct device_node *np = dev->pdev->dev.of_node; 269312fec14SDave Airlie struct ast_private *ast = dev->dev_private; 27071f677a9SRussell Currey uint32_t mcr_cfg, mcr_scu_mpll, mcr_scu_strap; 27171f677a9SRussell Currey uint32_t denum, num, div, ref_pll, dsel; 272312fec14SDave Airlie 27371f677a9SRussell Currey switch (ast->config_mode) { 27471f677a9SRussell Currey case ast_use_dt: 27571f677a9SRussell Currey /* 27671f677a9SRussell Currey * If some properties are missing, use reasonable 27771f677a9SRussell Currey * defaults for AST2400 27871f677a9SRussell Currey */ 27971f677a9SRussell Currey if (of_property_read_u32(np, "aspeed,mcr-configuration", 28071f677a9SRussell Currey &mcr_cfg)) 28171f677a9SRussell Currey mcr_cfg = 0x00000577; 28271f677a9SRussell Currey if (of_property_read_u32(np, "aspeed,mcr-scu-mpll", 28371f677a9SRussell Currey &mcr_scu_mpll)) 28471f677a9SRussell Currey mcr_scu_mpll = 0x000050C0; 28571f677a9SRussell Currey if (of_property_read_u32(np, "aspeed,mcr-scu-strap", 28671f677a9SRussell Currey &mcr_scu_strap)) 28771f677a9SRussell Currey mcr_scu_strap = 0; 28871f677a9SRussell Currey break; 28971f677a9SRussell Currey case ast_use_p2a: 29071f677a9SRussell Currey ast_write32(ast, 0xf004, 0x1e6e0000); 29171f677a9SRussell Currey ast_write32(ast, 0xf000, 0x1); 29271f677a9SRussell Currey mcr_cfg = ast_read32(ast, 0x10004); 29371f677a9SRussell Currey mcr_scu_mpll = ast_read32(ast, 0x10120); 29471f677a9SRussell Currey mcr_scu_strap = ast_read32(ast, 0x10170); 29571f677a9SRussell Currey break; 29671f677a9SRussell Currey case ast_use_defaults: 29771f677a9SRussell Currey default: 2986c971c09SY.C. Chen ast->dram_bus_width = 16; 2996c971c09SY.C. Chen ast->dram_type = AST_DRAM_1Gx16; 3009f93c8b3SY.C. Chen if (ast->chip == AST2500) 3019f93c8b3SY.C. Chen ast->mclk = 800; 3029f93c8b3SY.C. Chen else 3036c971c09SY.C. Chen ast->mclk = 396; 30471f677a9SRussell Currey return 0; 3056c971c09SY.C. Chen } 306312fec14SDave Airlie 30771f677a9SRussell Currey if (mcr_cfg & 0x40) 308312fec14SDave Airlie ast->dram_bus_width = 16; 309312fec14SDave Airlie else 310312fec14SDave Airlie ast->dram_bus_width = 32; 311312fec14SDave Airlie 3129f93c8b3SY.C. Chen if (ast->chip == AST2500) { 3139f93c8b3SY.C. Chen switch (mcr_cfg & 0x03) { 3149f93c8b3SY.C. Chen case 0: 3159f93c8b3SY.C. Chen ast->dram_type = AST_DRAM_1Gx16; 3169f93c8b3SY.C. Chen break; 3179f93c8b3SY.C. Chen default: 3189f93c8b3SY.C. Chen case 1: 3199f93c8b3SY.C. Chen ast->dram_type = AST_DRAM_2Gx16; 3209f93c8b3SY.C. Chen break; 3219f93c8b3SY.C. Chen case 2: 3229f93c8b3SY.C. Chen ast->dram_type = AST_DRAM_4Gx16; 3239f93c8b3SY.C. Chen break; 3249f93c8b3SY.C. Chen case 3: 3259f93c8b3SY.C. Chen ast->dram_type = AST_DRAM_8Gx16; 3269f93c8b3SY.C. Chen break; 3279f93c8b3SY.C. Chen } 3289f93c8b3SY.C. Chen } else if (ast->chip == AST2300 || ast->chip == AST2400) { 32971f677a9SRussell Currey switch (mcr_cfg & 0x03) { 330312fec14SDave Airlie case 0: 331312fec14SDave Airlie ast->dram_type = AST_DRAM_512Mx16; 332312fec14SDave Airlie break; 333312fec14SDave Airlie default: 334312fec14SDave Airlie case 1: 335312fec14SDave Airlie ast->dram_type = AST_DRAM_1Gx16; 336312fec14SDave Airlie break; 337312fec14SDave Airlie case 2: 338312fec14SDave Airlie ast->dram_type = AST_DRAM_2Gx16; 339312fec14SDave Airlie break; 340312fec14SDave Airlie case 3: 341312fec14SDave Airlie ast->dram_type = AST_DRAM_4Gx16; 342312fec14SDave Airlie break; 343312fec14SDave Airlie } 344312fec14SDave Airlie } else { 34571f677a9SRussell Currey switch (mcr_cfg & 0x0c) { 346312fec14SDave Airlie case 0: 347312fec14SDave Airlie case 4: 348312fec14SDave Airlie ast->dram_type = AST_DRAM_512Mx16; 349312fec14SDave Airlie break; 350312fec14SDave Airlie case 8: 35171f677a9SRussell Currey if (mcr_cfg & 0x40) 352312fec14SDave Airlie ast->dram_type = AST_DRAM_1Gx16; 353312fec14SDave Airlie else 354312fec14SDave Airlie ast->dram_type = AST_DRAM_512Mx32; 355312fec14SDave Airlie break; 356312fec14SDave Airlie case 0xc: 357312fec14SDave Airlie ast->dram_type = AST_DRAM_1Gx32; 358312fec14SDave Airlie break; 359312fec14SDave Airlie } 360312fec14SDave Airlie } 361312fec14SDave Airlie 36271f677a9SRussell Currey if (mcr_scu_strap & 0x2000) 363312fec14SDave Airlie ref_pll = 14318; 364312fec14SDave Airlie else 365312fec14SDave Airlie ref_pll = 12000; 366312fec14SDave Airlie 36771f677a9SRussell Currey denum = mcr_scu_mpll & 0x1f; 36871f677a9SRussell Currey num = (mcr_scu_mpll & 0x3fe0) >> 5; 36971f677a9SRussell Currey dsel = (mcr_scu_mpll & 0xc000) >> 14; 37071f677a9SRussell Currey switch (dsel) { 371312fec14SDave Airlie case 3: 372312fec14SDave Airlie div = 0x4; 373312fec14SDave Airlie break; 374312fec14SDave Airlie case 2: 375312fec14SDave Airlie case 1: 376312fec14SDave Airlie div = 0x2; 377312fec14SDave Airlie break; 378312fec14SDave Airlie default: 379312fec14SDave Airlie div = 0x1; 380312fec14SDave Airlie break; 381312fec14SDave Airlie } 3826475a7ccSBenjamin Herrenschmidt ast->mclk = ref_pll * (num + 2) / ((denum + 2) * (div * 1000)); 383312fec14SDave Airlie return 0; 384312fec14SDave Airlie } 385312fec14SDave Airlie 386312fec14SDave Airlie static const struct drm_mode_config_funcs ast_mode_funcs = { 3875ed7191dSThomas Zimmermann .fb_create = drm_gem_fb_create 388312fec14SDave Airlie }; 389312fec14SDave Airlie 390312fec14SDave Airlie static u32 ast_get_vram_info(struct drm_device *dev) 391312fec14SDave Airlie { 392312fec14SDave Airlie struct ast_private *ast = dev->dev_private; 393312fec14SDave Airlie u8 jreg; 39483c6620bSDave Airlie u32 vram_size; 395312fec14SDave Airlie ast_open_key(ast); 396312fec14SDave Airlie 39783c6620bSDave Airlie vram_size = AST_VIDMEM_DEFAULT_SIZE; 398312fec14SDave Airlie jreg = ast_get_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xaa, 0xff); 399312fec14SDave Airlie switch (jreg & 3) { 40083c6620bSDave Airlie case 0: vram_size = AST_VIDMEM_SIZE_8M; break; 40183c6620bSDave Airlie case 1: vram_size = AST_VIDMEM_SIZE_16M; break; 40283c6620bSDave Airlie case 2: vram_size = AST_VIDMEM_SIZE_32M; break; 40383c6620bSDave Airlie case 3: vram_size = AST_VIDMEM_SIZE_64M; break; 404312fec14SDave Airlie } 40583c6620bSDave Airlie 40683c6620bSDave Airlie jreg = ast_get_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x99, 0xff); 40783c6620bSDave Airlie switch (jreg & 0x03) { 40883c6620bSDave Airlie case 1: 40983c6620bSDave Airlie vram_size -= 0x100000; 41083c6620bSDave Airlie break; 41183c6620bSDave Airlie case 2: 41283c6620bSDave Airlie vram_size -= 0x200000; 41383c6620bSDave Airlie break; 41483c6620bSDave Airlie case 3: 41583c6620bSDave Airlie vram_size -= 0x400000; 41683c6620bSDave Airlie break; 41783c6620bSDave Airlie } 41883c6620bSDave Airlie 41983c6620bSDave Airlie return vram_size; 420312fec14SDave Airlie } 421312fec14SDave Airlie 422312fec14SDave Airlie int ast_driver_load(struct drm_device *dev, unsigned long flags) 423312fec14SDave Airlie { 424312fec14SDave Airlie struct ast_private *ast; 425d1b98557SBenjamin Herrenschmidt bool need_post; 426312fec14SDave Airlie int ret = 0; 427312fec14SDave Airlie 428312fec14SDave Airlie ast = kzalloc(sizeof(struct ast_private), GFP_KERNEL); 429312fec14SDave Airlie if (!ast) 430312fec14SDave Airlie return -ENOMEM; 431312fec14SDave Airlie 432312fec14SDave Airlie dev->dev_private = ast; 433312fec14SDave Airlie ast->dev = dev; 434312fec14SDave Airlie 435312fec14SDave Airlie ast->regs = pci_iomap(dev->pdev, 1, 0); 436312fec14SDave Airlie if (!ast->regs) { 437312fec14SDave Airlie ret = -EIO; 438312fec14SDave Airlie goto out_free; 439312fec14SDave Airlie } 4400dd68309SBenjamin Herrenschmidt 4410dd68309SBenjamin Herrenschmidt /* 4420dd68309SBenjamin Herrenschmidt * If we don't have IO space at all, use MMIO now and 4430dd68309SBenjamin Herrenschmidt * assume the chip has MMIO enabled by default (rev 0x20 4440dd68309SBenjamin Herrenschmidt * and higher). 4450dd68309SBenjamin Herrenschmidt */ 4460dd68309SBenjamin Herrenschmidt if (!(pci_resource_flags(dev->pdev, 2) & IORESOURCE_IO)) { 4470dd68309SBenjamin Herrenschmidt DRM_INFO("platform has no IO space, trying MMIO\n"); 4480dd68309SBenjamin Herrenschmidt ast->ioregs = ast->regs + AST_IO_MM_OFFSET; 4490dd68309SBenjamin Herrenschmidt } 4500dd68309SBenjamin Herrenschmidt 4510dd68309SBenjamin Herrenschmidt /* "map" IO regs if the above hasn't done so already */ 4520dd68309SBenjamin Herrenschmidt if (!ast->ioregs) { 453312fec14SDave Airlie ast->ioregs = pci_iomap(dev->pdev, 2, 0); 454312fec14SDave Airlie if (!ast->ioregs) { 455312fec14SDave Airlie ret = -EIO; 456312fec14SDave Airlie goto out_free; 457312fec14SDave Airlie } 4580dd68309SBenjamin Herrenschmidt } 459312fec14SDave Airlie 460d1b98557SBenjamin Herrenschmidt ast_detect_chip(dev, &need_post); 461312fec14SDave Airlie 462bad09da6SY.C. Chen if (need_post) 463bad09da6SY.C. Chen ast_post_gpu(dev); 464bad09da6SY.C. Chen 465312fec14SDave Airlie if (ast->chip != AST1180) { 466298360afSRussell Currey ret = ast_get_dram_info(dev); 467298360afSRussell Currey if (ret) 468298360afSRussell Currey goto out_free; 469312fec14SDave Airlie ast->vram_size = ast_get_vram_info(dev); 4706475a7ccSBenjamin Herrenschmidt DRM_INFO("dram MCLK=%u Mhz type=%d bus_width=%d size=%08x\n", 4716475a7ccSBenjamin Herrenschmidt ast->mclk, ast->dram_type, 4726475a7ccSBenjamin Herrenschmidt ast->dram_bus_width, ast->vram_size); 473312fec14SDave Airlie } 474312fec14SDave Airlie 475312fec14SDave Airlie ret = ast_mm_init(ast); 476312fec14SDave Airlie if (ret) 477312fec14SDave Airlie goto out_free; 478312fec14SDave Airlie 479312fec14SDave Airlie drm_mode_config_init(dev); 480312fec14SDave Airlie 481312fec14SDave Airlie dev->mode_config.funcs = (void *)&ast_mode_funcs; 482312fec14SDave Airlie dev->mode_config.min_width = 0; 483312fec14SDave Airlie dev->mode_config.min_height = 0; 484312fec14SDave Airlie dev->mode_config.preferred_depth = 24; 485312fec14SDave Airlie dev->mode_config.prefer_shadow = 1; 48628fb4cb7SEgbert Eich dev->mode_config.fb_base = pci_resource_start(ast->dev->pdev, 0); 487312fec14SDave Airlie 488312fec14SDave Airlie if (ast->chip == AST2100 || 489312fec14SDave Airlie ast->chip == AST2200 || 490312fec14SDave Airlie ast->chip == AST2300 || 4911453bf4cSDave Airlie ast->chip == AST2400 || 4929f93c8b3SY.C. Chen ast->chip == AST2500 || 493312fec14SDave Airlie ast->chip == AST1180) { 494312fec14SDave Airlie dev->mode_config.max_width = 1920; 495312fec14SDave Airlie dev->mode_config.max_height = 2048; 496312fec14SDave Airlie } else { 497312fec14SDave Airlie dev->mode_config.max_width = 1600; 498312fec14SDave Airlie dev->mode_config.max_height = 1200; 499312fec14SDave Airlie } 500312fec14SDave Airlie 501312fec14SDave Airlie ret = ast_mode_init(dev); 502312fec14SDave Airlie if (ret) 503312fec14SDave Airlie goto out_free; 504312fec14SDave Airlie 5058a99de3dSThomas Zimmermann ret = drm_fbdev_generic_setup(dev, 32); 506312fec14SDave Airlie if (ret) 507312fec14SDave Airlie goto out_free; 508312fec14SDave Airlie 509312fec14SDave Airlie return 0; 510312fec14SDave Airlie out_free: 511312fec14SDave Airlie kfree(ast); 512312fec14SDave Airlie dev->dev_private = NULL; 513312fec14SDave Airlie return ret; 514312fec14SDave Airlie } 515312fec14SDave Airlie 51611b3c20bSGabriel Krisman Bertazi void ast_driver_unload(struct drm_device *dev) 517312fec14SDave Airlie { 518312fec14SDave Airlie struct ast_private *ast = dev->dev_private; 519312fec14SDave Airlie 52012f8030eSEgbert Eich ast_release_firmware(dev); 52183c6620bSDave Airlie kfree(ast->dp501_fw_addr); 522312fec14SDave Airlie ast_mode_fini(dev); 523312fec14SDave Airlie drm_mode_config_cleanup(dev); 524312fec14SDave Airlie 525312fec14SDave Airlie ast_mm_fini(ast); 526dc25ab06SSam Bobroff if (ast->ioregs != ast->regs + AST_IO_MM_OFFSET) 527312fec14SDave Airlie pci_iounmap(dev->pdev, ast->ioregs); 528312fec14SDave Airlie pci_iounmap(dev->pdev, ast->regs); 529312fec14SDave Airlie kfree(ast); 530312fec14SDave Airlie } 531312fec14SDave Airlie 532312fec14SDave Airlie int ast_gem_create(struct drm_device *dev, 533312fec14SDave Airlie u32 size, bool iskernel, 534312fec14SDave Airlie struct drm_gem_object **obj) 535312fec14SDave Airlie { 5365b370979SThomas Zimmermann struct drm_gem_vram_object *gbo; 537312fec14SDave Airlie int ret; 538312fec14SDave Airlie 539312fec14SDave Airlie *obj = NULL; 540312fec14SDave Airlie 541312fec14SDave Airlie size = roundup(size, PAGE_SIZE); 542312fec14SDave Airlie if (size == 0) 543312fec14SDave Airlie return -EINVAL; 544312fec14SDave Airlie 545969562b2SThomas Zimmermann gbo = drm_gem_vram_create(dev, &dev->vram_mm->bdev, size, 0, false); 5465b370979SThomas Zimmermann if (IS_ERR(gbo)) { 5475b370979SThomas Zimmermann ret = PTR_ERR(gbo); 548312fec14SDave Airlie if (ret != -ERESTARTSYS) 549312fec14SDave Airlie DRM_ERROR("failed to allocate GEM object\n"); 550312fec14SDave Airlie return ret; 551312fec14SDave Airlie } 5525b370979SThomas Zimmermann *obj = &gbo->gem; 553312fec14SDave Airlie return 0; 554312fec14SDave Airlie } 555