1312fec14SDave Airlie /* 2312fec14SDave Airlie * Copyright 2012 Red Hat Inc. 3312fec14SDave Airlie * 4312fec14SDave Airlie * Permission is hereby granted, free of charge, to any person obtaining a 5312fec14SDave Airlie * copy of this software and associated documentation files (the 6312fec14SDave Airlie * "Software"), to deal in the Software without restriction, including 7312fec14SDave Airlie * without limitation the rights to use, copy, modify, merge, publish, 8312fec14SDave Airlie * distribute, sub license, and/or sell copies of the Software, and to 9312fec14SDave Airlie * permit persons to whom the Software is furnished to do so, subject to 10312fec14SDave Airlie * the following conditions: 11312fec14SDave Airlie * 12312fec14SDave Airlie * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 13312fec14SDave Airlie * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 14312fec14SDave Airlie * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL 15312fec14SDave Airlie * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, 16312fec14SDave Airlie * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR 17312fec14SDave Airlie * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE 18312fec14SDave Airlie * USE OR OTHER DEALINGS IN THE SOFTWARE. 19312fec14SDave Airlie * 20312fec14SDave Airlie * The above copyright notice and this permission notice (including the 21312fec14SDave Airlie * next paragraph) shall be included in all copies or substantial portions 22312fec14SDave Airlie * of the Software. 23312fec14SDave Airlie * 24312fec14SDave Airlie */ 25312fec14SDave Airlie /* 26312fec14SDave Airlie * Authors: Dave Airlie <airlied@redhat.com> 27312fec14SDave Airlie */ 28fbbbd160SSam Ravnborg 29fbbbd160SSam Ravnborg #include <linux/pci.h> 30312fec14SDave Airlie 314961eb60SThomas Zimmermann #include <drm/drm_atomic_helper.h> 32760285e7SDavid Howells #include <drm/drm_crtc_helper.h> 335ed7191dSThomas Zimmermann #include <drm/drm_fb_helper.h> 34fbbbd160SSam Ravnborg #include <drm/drm_gem.h> 355ed7191dSThomas Zimmermann #include <drm/drm_gem_framebuffer_helper.h> 36fbbbd160SSam Ravnborg #include <drm/drm_gem_vram_helper.h> 37fbbbd160SSam Ravnborg 38fbbbd160SSam Ravnborg #include "ast_drv.h" 39312fec14SDave Airlie 40312fec14SDave Airlie void ast_set_index_reg_mask(struct ast_private *ast, 41312fec14SDave Airlie uint32_t base, uint8_t index, 42312fec14SDave Airlie uint8_t mask, uint8_t val) 43312fec14SDave Airlie { 44312fec14SDave Airlie u8 tmp; 45312fec14SDave Airlie ast_io_write8(ast, base, index); 46312fec14SDave Airlie tmp = (ast_io_read8(ast, base + 1) & mask) | val; 47312fec14SDave Airlie ast_set_index_reg(ast, base, index, tmp); 48312fec14SDave Airlie } 49312fec14SDave Airlie 50312fec14SDave Airlie uint8_t ast_get_index_reg(struct ast_private *ast, 51312fec14SDave Airlie uint32_t base, uint8_t index) 52312fec14SDave Airlie { 53312fec14SDave Airlie uint8_t ret; 54312fec14SDave Airlie ast_io_write8(ast, base, index); 55312fec14SDave Airlie ret = ast_io_read8(ast, base + 1); 56312fec14SDave Airlie return ret; 57312fec14SDave Airlie } 58312fec14SDave Airlie 59312fec14SDave Airlie uint8_t ast_get_index_reg_mask(struct ast_private *ast, 60312fec14SDave Airlie uint32_t base, uint8_t index, uint8_t mask) 61312fec14SDave Airlie { 62312fec14SDave Airlie uint8_t ret; 63312fec14SDave Airlie ast_io_write8(ast, base, index); 64312fec14SDave Airlie ret = ast_io_read8(ast, base + 1) & mask; 65312fec14SDave Airlie return ret; 66312fec14SDave Airlie } 67312fec14SDave Airlie 6871f677a9SRussell Currey static void ast_detect_config_mode(struct drm_device *dev, u32 *scu_rev) 6971f677a9SRussell Currey { 7071f677a9SRussell Currey struct device_node *np = dev->pdev->dev.of_node; 7171f677a9SRussell Currey struct ast_private *ast = dev->dev_private; 7271f677a9SRussell Currey uint32_t data, jregd0, jregd1; 7371f677a9SRussell Currey 7471f677a9SRussell Currey /* Defaults */ 7571f677a9SRussell Currey ast->config_mode = ast_use_defaults; 7671f677a9SRussell Currey *scu_rev = 0xffffffff; 7771f677a9SRussell Currey 7871f677a9SRussell Currey /* Check if we have device-tree properties */ 7971f677a9SRussell Currey if (np && !of_property_read_u32(np, "aspeed,scu-revision-id", 8071f677a9SRussell Currey scu_rev)) { 8171f677a9SRussell Currey /* We do, disable P2A access */ 8271f677a9SRussell Currey ast->config_mode = ast_use_dt; 8371f677a9SRussell Currey DRM_INFO("Using device-tree for configuration\n"); 8471f677a9SRussell Currey return; 8571f677a9SRussell Currey } 8671f677a9SRussell Currey 8771f677a9SRussell Currey /* Not all families have a P2A bridge */ 8871f677a9SRussell Currey if (dev->pdev->device != PCI_CHIP_AST2000) 8971f677a9SRussell Currey return; 9071f677a9SRussell Currey 9171f677a9SRussell Currey /* 9271f677a9SRussell Currey * The BMC will set SCU 0x40 D[12] to 1 if the P2 bridge 9371f677a9SRussell Currey * is disabled. We force using P2A if VGA only mode bit 9471f677a9SRussell Currey * is set D[7] 9571f677a9SRussell Currey */ 9671f677a9SRussell Currey jregd0 = ast_get_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xd0, 0xff); 9771f677a9SRussell Currey jregd1 = ast_get_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xd1, 0xff); 9871f677a9SRussell Currey if (!(jregd0 & 0x80) || !(jregd1 & 0x10)) { 9971f677a9SRussell Currey /* Double check it's actually working */ 10071f677a9SRussell Currey data = ast_read32(ast, 0xf004); 10171f677a9SRussell Currey if (data != 0xFFFFFFFF) { 10271f677a9SRussell Currey /* P2A works, grab silicon revision */ 10371f677a9SRussell Currey ast->config_mode = ast_use_p2a; 10471f677a9SRussell Currey 10571f677a9SRussell Currey DRM_INFO("Using P2A bridge for configuration\n"); 10671f677a9SRussell Currey 10771f677a9SRussell Currey /* Read SCU7c (silicon revision register) */ 10871f677a9SRussell Currey ast_write32(ast, 0xf004, 0x1e6e0000); 10971f677a9SRussell Currey ast_write32(ast, 0xf000, 0x1); 11071f677a9SRussell Currey *scu_rev = ast_read32(ast, 0x1207c); 11171f677a9SRussell Currey return; 11271f677a9SRussell Currey } 11371f677a9SRussell Currey } 11471f677a9SRussell Currey 11571f677a9SRussell Currey /* We have a P2A bridge but it's disabled */ 11671f677a9SRussell Currey DRM_INFO("P2A bridge disabled, using default configuration\n"); 11771f677a9SRussell Currey } 118312fec14SDave Airlie 119d1b98557SBenjamin Herrenschmidt static int ast_detect_chip(struct drm_device *dev, bool *need_post) 120312fec14SDave Airlie { 121312fec14SDave Airlie struct ast_private *ast = dev->dev_private; 12271f677a9SRussell Currey uint32_t jreg, scu_rev; 12371f677a9SRussell Currey 12471f677a9SRussell Currey /* 12571f677a9SRussell Currey * If VGA isn't enabled, we need to enable now or subsequent 12671f677a9SRussell Currey * access to the scratch registers will fail. We also inform 12771f677a9SRussell Currey * our caller that it needs to POST the chip 12871f677a9SRussell Currey * (Assumption: VGA not enabled -> need to POST) 12971f677a9SRussell Currey */ 13071f677a9SRussell Currey if (!ast_is_vga_enabled(dev)) { 13171f677a9SRussell Currey ast_enable_vga(dev); 13271f677a9SRussell Currey DRM_INFO("VGA not enabled on entry, requesting chip POST\n"); 13371f677a9SRussell Currey *need_post = true; 13471f677a9SRussell Currey } else 13571f677a9SRussell Currey *need_post = false; 13671f677a9SRussell Currey 13771f677a9SRussell Currey 13871f677a9SRussell Currey /* Enable extended register access */ 1398f372e25SY.C. Chen ast_open_key(ast); 14005b43971SY.C. Chen ast_enable_mmio(dev); 141312fec14SDave Airlie 14271f677a9SRussell Currey /* Find out whether P2A works or whether to use device-tree */ 14371f677a9SRussell Currey ast_detect_config_mode(dev, &scu_rev); 14471f677a9SRussell Currey 14571f677a9SRussell Currey /* Identify chipset */ 146312fec14SDave Airlie if (dev->pdev->device == PCI_CHIP_AST1180) { 147312fec14SDave Airlie ast->chip = AST1100; 148312fec14SDave Airlie DRM_INFO("AST 1180 detected\n"); 149312fec14SDave Airlie } else { 1509f93c8b3SY.C. Chen if (dev->pdev->revision >= 0x40) { 1519f93c8b3SY.C. Chen ast->chip = AST2500; 1529f93c8b3SY.C. Chen DRM_INFO("AST 2500 detected\n"); 1539f93c8b3SY.C. Chen } else if (dev->pdev->revision >= 0x30) { 1541453bf4cSDave Airlie ast->chip = AST2400; 1551453bf4cSDave Airlie DRM_INFO("AST 2400 detected\n"); 1561453bf4cSDave Airlie } else if (dev->pdev->revision >= 0x20) { 157312fec14SDave Airlie ast->chip = AST2300; 158312fec14SDave Airlie DRM_INFO("AST 2300 detected\n"); 159312fec14SDave Airlie } else if (dev->pdev->revision >= 0x10) { 16071f677a9SRussell Currey switch (scu_rev & 0x0300) { 161312fec14SDave Airlie case 0x0200: 162312fec14SDave Airlie ast->chip = AST1100; 163312fec14SDave Airlie DRM_INFO("AST 1100 detected\n"); 164312fec14SDave Airlie break; 165312fec14SDave Airlie case 0x0100: 166312fec14SDave Airlie ast->chip = AST2200; 167312fec14SDave Airlie DRM_INFO("AST 2200 detected\n"); 168312fec14SDave Airlie break; 169312fec14SDave Airlie case 0x0000: 170312fec14SDave Airlie ast->chip = AST2150; 171312fec14SDave Airlie DRM_INFO("AST 2150 detected\n"); 172312fec14SDave Airlie break; 173312fec14SDave Airlie default: 174312fec14SDave Airlie ast->chip = AST2100; 175312fec14SDave Airlie DRM_INFO("AST 2100 detected\n"); 176312fec14SDave Airlie break; 177312fec14SDave Airlie } 178312fec14SDave Airlie ast->vga2_clone = false; 179312fec14SDave Airlie } else { 18083502a5dSY.C. Chen ast->chip = AST2000; 181312fec14SDave Airlie DRM_INFO("AST 2000 detected\n"); 182312fec14SDave Airlie } 183312fec14SDave Airlie } 184f1f62f2cSDave Airlie 185d1b98557SBenjamin Herrenschmidt /* Check if we support wide screen */ 186f1f62f2cSDave Airlie switch (ast->chip) { 187f1f62f2cSDave Airlie case AST1180: 188f1f62f2cSDave Airlie ast->support_wide_screen = true; 189f1f62f2cSDave Airlie break; 190f1f62f2cSDave Airlie case AST2000: 191f1f62f2cSDave Airlie ast->support_wide_screen = false; 192f1f62f2cSDave Airlie break; 193f1f62f2cSDave Airlie default: 194f1f62f2cSDave Airlie jreg = ast_get_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xd0, 0xff); 195f1f62f2cSDave Airlie if (!(jreg & 0x80)) 196f1f62f2cSDave Airlie ast->support_wide_screen = true; 197f1f62f2cSDave Airlie else if (jreg & 0x01) 198f1f62f2cSDave Airlie ast->support_wide_screen = true; 199f1f62f2cSDave Airlie else { 200f1f62f2cSDave Airlie ast->support_wide_screen = false; 20171f677a9SRussell Currey if (ast->chip == AST2300 && 20271f677a9SRussell Currey (scu_rev & 0x300) == 0x0) /* ast1300 */ 203f1f62f2cSDave Airlie ast->support_wide_screen = true; 20471f677a9SRussell Currey if (ast->chip == AST2400 && 20571f677a9SRussell Currey (scu_rev & 0x300) == 0x100) /* ast1400 */ 2061453bf4cSDave Airlie ast->support_wide_screen = true; 2079f93c8b3SY.C. Chen if (ast->chip == AST2500 && 2089f93c8b3SY.C. Chen scu_rev == 0x100) /* ast2510 */ 2099f93c8b3SY.C. Chen ast->support_wide_screen = true; 210f1f62f2cSDave Airlie } 211f1f62f2cSDave Airlie break; 212f1f62f2cSDave Airlie } 213f1f62f2cSDave Airlie 214d1b98557SBenjamin Herrenschmidt /* Check 3rd Tx option (digital output afaik) */ 21583c6620bSDave Airlie ast->tx_chip_type = AST_TX_NONE; 216d1b98557SBenjamin Herrenschmidt 217d1b98557SBenjamin Herrenschmidt /* 218d1b98557SBenjamin Herrenschmidt * VGACRA3 Enhanced Color Mode Register, check if DVO is already 219d1b98557SBenjamin Herrenschmidt * enabled, in that case, assume we have a SIL164 TMDS transmitter 22042fb1427SBenjamin Herrenschmidt * 22142fb1427SBenjamin Herrenschmidt * Don't make that assumption if we the chip wasn't enabled and 22242fb1427SBenjamin Herrenschmidt * is at power-on reset, otherwise we'll incorrectly "detect" a 22342fb1427SBenjamin Herrenschmidt * SIL164 when there is none. 224d1b98557SBenjamin Herrenschmidt */ 22542fb1427SBenjamin Herrenschmidt if (!*need_post) { 22683c6620bSDave Airlie jreg = ast_get_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xa3, 0xff); 22783c6620bSDave Airlie if (jreg & 0x80) 22883c6620bSDave Airlie ast->tx_chip_type = AST_TX_SIL164; 22942fb1427SBenjamin Herrenschmidt } 230d1b98557SBenjamin Herrenschmidt 23183c6620bSDave Airlie if ((ast->chip == AST2300) || (ast->chip == AST2400)) { 232d1b98557SBenjamin Herrenschmidt /* 233d1b98557SBenjamin Herrenschmidt * On AST2300 and 2400, look the configuration set by the SoC in 234d1b98557SBenjamin Herrenschmidt * the SOC scratch register #1 bits 11:8 (interestingly marked 23542fb1427SBenjamin Herrenschmidt * as "reserved" in the spec) 236d1b98557SBenjamin Herrenschmidt */ 23783c6620bSDave Airlie jreg = ast_get_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xd1, 0xff); 23883c6620bSDave Airlie switch (jreg) { 23983c6620bSDave Airlie case 0x04: 24083c6620bSDave Airlie ast->tx_chip_type = AST_TX_SIL164; 24183c6620bSDave Airlie break; 24283c6620bSDave Airlie case 0x08: 24383c6620bSDave Airlie ast->dp501_fw_addr = kzalloc(32*1024, GFP_KERNEL); 24483c6620bSDave Airlie if (ast->dp501_fw_addr) { 24583c6620bSDave Airlie /* backup firmware */ 24683c6620bSDave Airlie if (ast_backup_fw(dev, ast->dp501_fw_addr, 32*1024)) { 24783c6620bSDave Airlie kfree(ast->dp501_fw_addr); 24883c6620bSDave Airlie ast->dp501_fw_addr = NULL; 24983c6620bSDave Airlie } 25083c6620bSDave Airlie } 25183c6620bSDave Airlie /* fallthrough */ 25283c6620bSDave Airlie case 0x0c: 25383c6620bSDave Airlie ast->tx_chip_type = AST_TX_DP501; 25483c6620bSDave Airlie } 25583c6620bSDave Airlie } 25683c6620bSDave Airlie 257d1b98557SBenjamin Herrenschmidt /* Print stuff for diagnostic purposes */ 258d1b98557SBenjamin Herrenschmidt switch(ast->tx_chip_type) { 259d1b98557SBenjamin Herrenschmidt case AST_TX_SIL164: 260d1b98557SBenjamin Herrenschmidt DRM_INFO("Using Sil164 TMDS transmitter\n"); 261d1b98557SBenjamin Herrenschmidt break; 262d1b98557SBenjamin Herrenschmidt case AST_TX_DP501: 263d1b98557SBenjamin Herrenschmidt DRM_INFO("Using DP501 DisplayPort transmitter\n"); 264d1b98557SBenjamin Herrenschmidt break; 265d1b98557SBenjamin Herrenschmidt default: 266d1b98557SBenjamin Herrenschmidt DRM_INFO("Analog VGA only\n"); 267d1b98557SBenjamin Herrenschmidt } 268312fec14SDave Airlie return 0; 269312fec14SDave Airlie } 270312fec14SDave Airlie 271312fec14SDave Airlie static int ast_get_dram_info(struct drm_device *dev) 272312fec14SDave Airlie { 27371f677a9SRussell Currey struct device_node *np = dev->pdev->dev.of_node; 274312fec14SDave Airlie struct ast_private *ast = dev->dev_private; 27571f677a9SRussell Currey uint32_t mcr_cfg, mcr_scu_mpll, mcr_scu_strap; 27671f677a9SRussell Currey uint32_t denum, num, div, ref_pll, dsel; 277312fec14SDave Airlie 27871f677a9SRussell Currey switch (ast->config_mode) { 27971f677a9SRussell Currey case ast_use_dt: 28071f677a9SRussell Currey /* 28171f677a9SRussell Currey * If some properties are missing, use reasonable 28271f677a9SRussell Currey * defaults for AST2400 28371f677a9SRussell Currey */ 28471f677a9SRussell Currey if (of_property_read_u32(np, "aspeed,mcr-configuration", 28571f677a9SRussell Currey &mcr_cfg)) 28671f677a9SRussell Currey mcr_cfg = 0x00000577; 28771f677a9SRussell Currey if (of_property_read_u32(np, "aspeed,mcr-scu-mpll", 28871f677a9SRussell Currey &mcr_scu_mpll)) 28971f677a9SRussell Currey mcr_scu_mpll = 0x000050C0; 29071f677a9SRussell Currey if (of_property_read_u32(np, "aspeed,mcr-scu-strap", 29171f677a9SRussell Currey &mcr_scu_strap)) 29271f677a9SRussell Currey mcr_scu_strap = 0; 29371f677a9SRussell Currey break; 29471f677a9SRussell Currey case ast_use_p2a: 29571f677a9SRussell Currey ast_write32(ast, 0xf004, 0x1e6e0000); 29671f677a9SRussell Currey ast_write32(ast, 0xf000, 0x1); 29771f677a9SRussell Currey mcr_cfg = ast_read32(ast, 0x10004); 29871f677a9SRussell Currey mcr_scu_mpll = ast_read32(ast, 0x10120); 29971f677a9SRussell Currey mcr_scu_strap = ast_read32(ast, 0x10170); 30071f677a9SRussell Currey break; 30171f677a9SRussell Currey case ast_use_defaults: 30271f677a9SRussell Currey default: 3036c971c09SY.C. Chen ast->dram_bus_width = 16; 3046c971c09SY.C. Chen ast->dram_type = AST_DRAM_1Gx16; 3059f93c8b3SY.C. Chen if (ast->chip == AST2500) 3069f93c8b3SY.C. Chen ast->mclk = 800; 3079f93c8b3SY.C. Chen else 3086c971c09SY.C. Chen ast->mclk = 396; 30971f677a9SRussell Currey return 0; 3106c971c09SY.C. Chen } 311312fec14SDave Airlie 31271f677a9SRussell Currey if (mcr_cfg & 0x40) 313312fec14SDave Airlie ast->dram_bus_width = 16; 314312fec14SDave Airlie else 315312fec14SDave Airlie ast->dram_bus_width = 32; 316312fec14SDave Airlie 3179f93c8b3SY.C. Chen if (ast->chip == AST2500) { 3189f93c8b3SY.C. Chen switch (mcr_cfg & 0x03) { 3199f93c8b3SY.C. Chen case 0: 3209f93c8b3SY.C. Chen ast->dram_type = AST_DRAM_1Gx16; 3219f93c8b3SY.C. Chen break; 3229f93c8b3SY.C. Chen default: 3239f93c8b3SY.C. Chen case 1: 3249f93c8b3SY.C. Chen ast->dram_type = AST_DRAM_2Gx16; 3259f93c8b3SY.C. Chen break; 3269f93c8b3SY.C. Chen case 2: 3279f93c8b3SY.C. Chen ast->dram_type = AST_DRAM_4Gx16; 3289f93c8b3SY.C. Chen break; 3299f93c8b3SY.C. Chen case 3: 3309f93c8b3SY.C. Chen ast->dram_type = AST_DRAM_8Gx16; 3319f93c8b3SY.C. Chen break; 3329f93c8b3SY.C. Chen } 3339f93c8b3SY.C. Chen } else if (ast->chip == AST2300 || ast->chip == AST2400) { 33471f677a9SRussell Currey switch (mcr_cfg & 0x03) { 335312fec14SDave Airlie case 0: 336312fec14SDave Airlie ast->dram_type = AST_DRAM_512Mx16; 337312fec14SDave Airlie break; 338312fec14SDave Airlie default: 339312fec14SDave Airlie case 1: 340312fec14SDave Airlie ast->dram_type = AST_DRAM_1Gx16; 341312fec14SDave Airlie break; 342312fec14SDave Airlie case 2: 343312fec14SDave Airlie ast->dram_type = AST_DRAM_2Gx16; 344312fec14SDave Airlie break; 345312fec14SDave Airlie case 3: 346312fec14SDave Airlie ast->dram_type = AST_DRAM_4Gx16; 347312fec14SDave Airlie break; 348312fec14SDave Airlie } 349312fec14SDave Airlie } else { 35071f677a9SRussell Currey switch (mcr_cfg & 0x0c) { 351312fec14SDave Airlie case 0: 352312fec14SDave Airlie case 4: 353312fec14SDave Airlie ast->dram_type = AST_DRAM_512Mx16; 354312fec14SDave Airlie break; 355312fec14SDave Airlie case 8: 35671f677a9SRussell Currey if (mcr_cfg & 0x40) 357312fec14SDave Airlie ast->dram_type = AST_DRAM_1Gx16; 358312fec14SDave Airlie else 359312fec14SDave Airlie ast->dram_type = AST_DRAM_512Mx32; 360312fec14SDave Airlie break; 361312fec14SDave Airlie case 0xc: 362312fec14SDave Airlie ast->dram_type = AST_DRAM_1Gx32; 363312fec14SDave Airlie break; 364312fec14SDave Airlie } 365312fec14SDave Airlie } 366312fec14SDave Airlie 36771f677a9SRussell Currey if (mcr_scu_strap & 0x2000) 368312fec14SDave Airlie ref_pll = 14318; 369312fec14SDave Airlie else 370312fec14SDave Airlie ref_pll = 12000; 371312fec14SDave Airlie 37271f677a9SRussell Currey denum = mcr_scu_mpll & 0x1f; 37371f677a9SRussell Currey num = (mcr_scu_mpll & 0x3fe0) >> 5; 37471f677a9SRussell Currey dsel = (mcr_scu_mpll & 0xc000) >> 14; 37571f677a9SRussell Currey switch (dsel) { 376312fec14SDave Airlie case 3: 377312fec14SDave Airlie div = 0x4; 378312fec14SDave Airlie break; 379312fec14SDave Airlie case 2: 380312fec14SDave Airlie case 1: 381312fec14SDave Airlie div = 0x2; 382312fec14SDave Airlie break; 383312fec14SDave Airlie default: 384312fec14SDave Airlie div = 0x1; 385312fec14SDave Airlie break; 386312fec14SDave Airlie } 3876475a7ccSBenjamin Herrenschmidt ast->mclk = ref_pll * (num + 2) / ((denum + 2) * (div * 1000)); 388312fec14SDave Airlie return 0; 389312fec14SDave Airlie } 390312fec14SDave Airlie 391312fec14SDave Airlie static const struct drm_mode_config_funcs ast_mode_funcs = { 3929253f830SThomas Zimmermann .fb_create = drm_gem_fb_create, 39380f7c3f7SThomas Zimmermann .mode_valid = drm_vram_helper_mode_valid, 3944961eb60SThomas Zimmermann .atomic_check = drm_atomic_helper_check, 3954961eb60SThomas Zimmermann .atomic_commit = drm_atomic_helper_commit, 396312fec14SDave Airlie }; 397312fec14SDave Airlie 398312fec14SDave Airlie static u32 ast_get_vram_info(struct drm_device *dev) 399312fec14SDave Airlie { 400312fec14SDave Airlie struct ast_private *ast = dev->dev_private; 401312fec14SDave Airlie u8 jreg; 40283c6620bSDave Airlie u32 vram_size; 403312fec14SDave Airlie ast_open_key(ast); 404312fec14SDave Airlie 40583c6620bSDave Airlie vram_size = AST_VIDMEM_DEFAULT_SIZE; 406312fec14SDave Airlie jreg = ast_get_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xaa, 0xff); 407312fec14SDave Airlie switch (jreg & 3) { 40883c6620bSDave Airlie case 0: vram_size = AST_VIDMEM_SIZE_8M; break; 40983c6620bSDave Airlie case 1: vram_size = AST_VIDMEM_SIZE_16M; break; 41083c6620bSDave Airlie case 2: vram_size = AST_VIDMEM_SIZE_32M; break; 41183c6620bSDave Airlie case 3: vram_size = AST_VIDMEM_SIZE_64M; break; 412312fec14SDave Airlie } 41383c6620bSDave Airlie 41483c6620bSDave Airlie jreg = ast_get_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x99, 0xff); 41583c6620bSDave Airlie switch (jreg & 0x03) { 41683c6620bSDave Airlie case 1: 41783c6620bSDave Airlie vram_size -= 0x100000; 41883c6620bSDave Airlie break; 41983c6620bSDave Airlie case 2: 42083c6620bSDave Airlie vram_size -= 0x200000; 42183c6620bSDave Airlie break; 42283c6620bSDave Airlie case 3: 42383c6620bSDave Airlie vram_size -= 0x400000; 42483c6620bSDave Airlie break; 42583c6620bSDave Airlie } 42683c6620bSDave Airlie 42783c6620bSDave Airlie return vram_size; 428312fec14SDave Airlie } 429312fec14SDave Airlie 430312fec14SDave Airlie int ast_driver_load(struct drm_device *dev, unsigned long flags) 431312fec14SDave Airlie { 432312fec14SDave Airlie struct ast_private *ast; 433d1b98557SBenjamin Herrenschmidt bool need_post; 434312fec14SDave Airlie int ret = 0; 435312fec14SDave Airlie 436312fec14SDave Airlie ast = kzalloc(sizeof(struct ast_private), GFP_KERNEL); 437312fec14SDave Airlie if (!ast) 438312fec14SDave Airlie return -ENOMEM; 439312fec14SDave Airlie 440312fec14SDave Airlie dev->dev_private = ast; 441312fec14SDave Airlie ast->dev = dev; 442312fec14SDave Airlie 443312fec14SDave Airlie ast->regs = pci_iomap(dev->pdev, 1, 0); 444312fec14SDave Airlie if (!ast->regs) { 445312fec14SDave Airlie ret = -EIO; 446312fec14SDave Airlie goto out_free; 447312fec14SDave Airlie } 4480dd68309SBenjamin Herrenschmidt 4490dd68309SBenjamin Herrenschmidt /* 4500dd68309SBenjamin Herrenschmidt * If we don't have IO space at all, use MMIO now and 4510dd68309SBenjamin Herrenschmidt * assume the chip has MMIO enabled by default (rev 0x20 4520dd68309SBenjamin Herrenschmidt * and higher). 4530dd68309SBenjamin Herrenschmidt */ 4540dd68309SBenjamin Herrenschmidt if (!(pci_resource_flags(dev->pdev, 2) & IORESOURCE_IO)) { 4550dd68309SBenjamin Herrenschmidt DRM_INFO("platform has no IO space, trying MMIO\n"); 4560dd68309SBenjamin Herrenschmidt ast->ioregs = ast->regs + AST_IO_MM_OFFSET; 4570dd68309SBenjamin Herrenschmidt } 4580dd68309SBenjamin Herrenschmidt 4590dd68309SBenjamin Herrenschmidt /* "map" IO regs if the above hasn't done so already */ 4600dd68309SBenjamin Herrenschmidt if (!ast->ioregs) { 461312fec14SDave Airlie ast->ioregs = pci_iomap(dev->pdev, 2, 0); 462312fec14SDave Airlie if (!ast->ioregs) { 463312fec14SDave Airlie ret = -EIO; 464312fec14SDave Airlie goto out_free; 465312fec14SDave Airlie } 4660dd68309SBenjamin Herrenschmidt } 467312fec14SDave Airlie 468d1b98557SBenjamin Herrenschmidt ast_detect_chip(dev, &need_post); 469312fec14SDave Airlie 470bad09da6SY.C. Chen if (need_post) 471bad09da6SY.C. Chen ast_post_gpu(dev); 472bad09da6SY.C. Chen 473312fec14SDave Airlie if (ast->chip != AST1180) { 474298360afSRussell Currey ret = ast_get_dram_info(dev); 475298360afSRussell Currey if (ret) 476298360afSRussell Currey goto out_free; 477312fec14SDave Airlie ast->vram_size = ast_get_vram_info(dev); 4786475a7ccSBenjamin Herrenschmidt DRM_INFO("dram MCLK=%u Mhz type=%d bus_width=%d size=%08x\n", 4796475a7ccSBenjamin Herrenschmidt ast->mclk, ast->dram_type, 4806475a7ccSBenjamin Herrenschmidt ast->dram_bus_width, ast->vram_size); 481312fec14SDave Airlie } 482312fec14SDave Airlie 483312fec14SDave Airlie ret = ast_mm_init(ast); 484312fec14SDave Airlie if (ret) 485312fec14SDave Airlie goto out_free; 486312fec14SDave Airlie 487312fec14SDave Airlie drm_mode_config_init(dev); 488312fec14SDave Airlie 489312fec14SDave Airlie dev->mode_config.funcs = (void *)&ast_mode_funcs; 490312fec14SDave Airlie dev->mode_config.min_width = 0; 491312fec14SDave Airlie dev->mode_config.min_height = 0; 492312fec14SDave Airlie dev->mode_config.preferred_depth = 24; 493312fec14SDave Airlie dev->mode_config.prefer_shadow = 1; 49428fb4cb7SEgbert Eich dev->mode_config.fb_base = pci_resource_start(ast->dev->pdev, 0); 495312fec14SDave Airlie 496312fec14SDave Airlie if (ast->chip == AST2100 || 497312fec14SDave Airlie ast->chip == AST2200 || 498312fec14SDave Airlie ast->chip == AST2300 || 4991453bf4cSDave Airlie ast->chip == AST2400 || 5009f93c8b3SY.C. Chen ast->chip == AST2500 || 501312fec14SDave Airlie ast->chip == AST1180) { 502312fec14SDave Airlie dev->mode_config.max_width = 1920; 503312fec14SDave Airlie dev->mode_config.max_height = 2048; 504312fec14SDave Airlie } else { 505312fec14SDave Airlie dev->mode_config.max_width = 1600; 506312fec14SDave Airlie dev->mode_config.max_height = 1200; 507312fec14SDave Airlie } 508312fec14SDave Airlie 509312fec14SDave Airlie ret = ast_mode_init(dev); 510312fec14SDave Airlie if (ret) 511312fec14SDave Airlie goto out_free; 512312fec14SDave Airlie 5134961eb60SThomas Zimmermann drm_mode_config_reset(dev); 5144961eb60SThomas Zimmermann 5158a99de3dSThomas Zimmermann ret = drm_fbdev_generic_setup(dev, 32); 516312fec14SDave Airlie if (ret) 517312fec14SDave Airlie goto out_free; 518312fec14SDave Airlie 519312fec14SDave Airlie return 0; 520312fec14SDave Airlie out_free: 521312fec14SDave Airlie kfree(ast); 522312fec14SDave Airlie dev->dev_private = NULL; 523312fec14SDave Airlie return ret; 524312fec14SDave Airlie } 525312fec14SDave Airlie 52611b3c20bSGabriel Krisman Bertazi void ast_driver_unload(struct drm_device *dev) 527312fec14SDave Airlie { 528312fec14SDave Airlie struct ast_private *ast = dev->dev_private; 529312fec14SDave Airlie 53005b43971SY.C. Chen /* enable standard VGA decode */ 53105b43971SY.C. Chen ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xa1, 0x04); 53205b43971SY.C. Chen 53312f8030eSEgbert Eich ast_release_firmware(dev); 53483c6620bSDave Airlie kfree(ast->dp501_fw_addr); 535312fec14SDave Airlie ast_mode_fini(dev); 536312fec14SDave Airlie drm_mode_config_cleanup(dev); 537312fec14SDave Airlie 538312fec14SDave Airlie ast_mm_fini(ast); 539dc25ab06SSam Bobroff if (ast->ioregs != ast->regs + AST_IO_MM_OFFSET) 540312fec14SDave Airlie pci_iounmap(dev->pdev, ast->ioregs); 541312fec14SDave Airlie pci_iounmap(dev->pdev, ast->regs); 542312fec14SDave Airlie kfree(ast); 543312fec14SDave Airlie } 544