1312fec14SDave Airlie /* 2312fec14SDave Airlie * Copyright 2012 Red Hat Inc. 3312fec14SDave Airlie * 4312fec14SDave Airlie * Permission is hereby granted, free of charge, to any person obtaining a 5312fec14SDave Airlie * copy of this software and associated documentation files (the 6312fec14SDave Airlie * "Software"), to deal in the Software without restriction, including 7312fec14SDave Airlie * without limitation the rights to use, copy, modify, merge, publish, 8312fec14SDave Airlie * distribute, sub license, and/or sell copies of the Software, and to 9312fec14SDave Airlie * permit persons to whom the Software is furnished to do so, subject to 10312fec14SDave Airlie * the following conditions: 11312fec14SDave Airlie * 12312fec14SDave Airlie * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 13312fec14SDave Airlie * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 14312fec14SDave Airlie * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL 15312fec14SDave Airlie * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, 16312fec14SDave Airlie * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR 17312fec14SDave Airlie * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE 18312fec14SDave Airlie * USE OR OTHER DEALINGS IN THE SOFTWARE. 19312fec14SDave Airlie * 20312fec14SDave Airlie * The above copyright notice and this permission notice (including the 21312fec14SDave Airlie * next paragraph) shall be included in all copies or substantial portions 22312fec14SDave Airlie * of the Software. 23312fec14SDave Airlie * 24312fec14SDave Airlie */ 25312fec14SDave Airlie /* 26312fec14SDave Airlie * Authors: Dave Airlie <airlied@redhat.com> 27312fec14SDave Airlie */ 28fbbbd160SSam Ravnborg 29fbbbd160SSam Ravnborg #include <linux/pci.h> 30312fec14SDave Airlie 314961eb60SThomas Zimmermann #include <drm/drm_atomic_helper.h> 32fbe01716SThomas Zimmermann #include <drm/drm_drv.h> 33fbbbd160SSam Ravnborg #include <drm/drm_gem.h> 344bc85b82SThomas Zimmermann #include <drm/drm_managed.h> 35fbbbd160SSam Ravnborg 36fbbbd160SSam Ravnborg #include "ast_drv.h" 37312fec14SDave Airlie 3848b6701eSThomas Zimmermann static int ast_init_pci_config(struct pci_dev *pdev) 3948b6701eSThomas Zimmermann { 4048b6701eSThomas Zimmermann int err; 4148b6701eSThomas Zimmermann u16 pcis04; 4248b6701eSThomas Zimmermann 4348b6701eSThomas Zimmermann err = pci_read_config_word(pdev, PCI_COMMAND, &pcis04); 4448b6701eSThomas Zimmermann if (err) 4548b6701eSThomas Zimmermann goto out; 4648b6701eSThomas Zimmermann 4748b6701eSThomas Zimmermann pcis04 |= PCI_COMMAND_MEMORY | PCI_COMMAND_IO; 4848b6701eSThomas Zimmermann 4948b6701eSThomas Zimmermann err = pci_write_config_word(pdev, PCI_COMMAND, pcis04); 5048b6701eSThomas Zimmermann 5148b6701eSThomas Zimmermann out: 5248b6701eSThomas Zimmermann return pcibios_err_to_errno(err); 5348b6701eSThomas Zimmermann } 5448b6701eSThomas Zimmermann 555b71707dSThomas Zimmermann static bool ast_is_vga_enabled(struct drm_device *dev) 565b71707dSThomas Zimmermann { 575b71707dSThomas Zimmermann struct ast_device *ast = to_ast_device(dev); 585b71707dSThomas Zimmermann u8 ch; 595b71707dSThomas Zimmermann 605b71707dSThomas Zimmermann ch = ast_io_read8(ast, AST_IO_VGA_ENABLE_PORT); 615b71707dSThomas Zimmermann 625b71707dSThomas Zimmermann return !!(ch & 0x01); 635b71707dSThomas Zimmermann } 645b71707dSThomas Zimmermann 655b71707dSThomas Zimmermann static void ast_enable_vga(struct drm_device *dev) 665b71707dSThomas Zimmermann { 675b71707dSThomas Zimmermann struct ast_device *ast = to_ast_device(dev); 685b71707dSThomas Zimmermann 695b71707dSThomas Zimmermann ast_io_write8(ast, AST_IO_VGA_ENABLE_PORT, 0x01); 705b71707dSThomas Zimmermann ast_io_write8(ast, AST_IO_MISC_PORT_WRITE, 0x01); 715b71707dSThomas Zimmermann } 725b71707dSThomas Zimmermann 73a74ec2bcSThomas Zimmermann /* 74a74ec2bcSThomas Zimmermann * Run this function as part of the HW device cleanup; not 75a74ec2bcSThomas Zimmermann * when the DRM device gets released. 76a74ec2bcSThomas Zimmermann */ 77a74ec2bcSThomas Zimmermann static void ast_enable_mmio_release(void *data) 785b71707dSThomas Zimmermann { 79a74ec2bcSThomas Zimmermann struct ast_device *ast = data; 80a74ec2bcSThomas Zimmermann 81a74ec2bcSThomas Zimmermann /* enable standard VGA decode */ 82a74ec2bcSThomas Zimmermann ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xa1, 0x04); 83a74ec2bcSThomas Zimmermann } 84a74ec2bcSThomas Zimmermann 85a74ec2bcSThomas Zimmermann static int ast_enable_mmio(struct ast_device *ast) 86a74ec2bcSThomas Zimmermann { 87a74ec2bcSThomas Zimmermann struct drm_device *dev = &ast->base; 885b71707dSThomas Zimmermann 895b71707dSThomas Zimmermann ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xa1, 0x06); 90a74ec2bcSThomas Zimmermann 91a74ec2bcSThomas Zimmermann return devm_add_action_or_reset(dev->dev, ast_enable_mmio_release, ast); 925b71707dSThomas Zimmermann } 935b71707dSThomas Zimmermann 945b71707dSThomas Zimmermann static void ast_open_key(struct ast_device *ast) 955b71707dSThomas Zimmermann { 965b71707dSThomas Zimmermann ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0x80, 0xA8); 975b71707dSThomas Zimmermann } 985b71707dSThomas Zimmermann 9971f677a9SRussell Currey static void ast_detect_config_mode(struct drm_device *dev, u32 *scu_rev) 10071f677a9SRussell Currey { 10146fb883cSThomas Zimmermann struct device_node *np = dev->dev->of_node; 1025abaa683SThomas Zimmermann struct ast_device *ast = to_ast_device(dev); 10346fb883cSThomas Zimmermann struct pci_dev *pdev = to_pci_dev(dev->dev); 10471f677a9SRussell Currey uint32_t data, jregd0, jregd1; 10571f677a9SRussell Currey 10671f677a9SRussell Currey /* Defaults */ 10771f677a9SRussell Currey ast->config_mode = ast_use_defaults; 10871f677a9SRussell Currey 10971f677a9SRussell Currey /* Check if we have device-tree properties */ 11071f677a9SRussell Currey if (np && !of_property_read_u32(np, "aspeed,scu-revision-id", 11171f677a9SRussell Currey scu_rev)) { 11271f677a9SRussell Currey /* We do, disable P2A access */ 11371f677a9SRussell Currey ast->config_mode = ast_use_dt; 1141a19b4cbSThomas Zimmermann drm_info(dev, "Using device-tree for configuration\n"); 11571f677a9SRussell Currey return; 11671f677a9SRussell Currey } 11771f677a9SRussell Currey 11871f677a9SRussell Currey /* Not all families have a P2A bridge */ 11946fb883cSThomas Zimmermann if (pdev->device != PCI_CHIP_AST2000) 12071f677a9SRussell Currey return; 12171f677a9SRussell Currey 12271f677a9SRussell Currey /* 12371f677a9SRussell Currey * The BMC will set SCU 0x40 D[12] to 1 if the P2 bridge 12471f677a9SRussell Currey * is disabled. We force using P2A if VGA only mode bit 12571f677a9SRussell Currey * is set D[7] 12671f677a9SRussell Currey */ 12771f677a9SRussell Currey jregd0 = ast_get_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xd0, 0xff); 12871f677a9SRussell Currey jregd1 = ast_get_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xd1, 0xff); 12971f677a9SRussell Currey if (!(jregd0 & 0x80) || !(jregd1 & 0x10)) { 130ecf64579SThomas Zimmermann /* Patch GEN6 */ 131f34bf652SKuoHsiang Chou if (((pdev->revision & 0xF0) == 0x40) 132f34bf652SKuoHsiang Chou && ((jregd0 & AST_VRAM_INIT_STATUS_MASK) == 0)) 133f34bf652SKuoHsiang Chou ast_patch_ahb_2500(ast); 134f34bf652SKuoHsiang Chou 13571f677a9SRussell Currey /* Double check it's actually working */ 13671f677a9SRussell Currey data = ast_read32(ast, 0xf004); 137ba4e0339SKuoHsiang Chou if ((data != 0xFFFFFFFF) && (data != 0x00)) { 13871f677a9SRussell Currey /* P2A works, grab silicon revision */ 13971f677a9SRussell Currey ast->config_mode = ast_use_p2a; 14071f677a9SRussell Currey 1411a19b4cbSThomas Zimmermann drm_info(dev, "Using P2A bridge for configuration\n"); 14271f677a9SRussell Currey 14371f677a9SRussell Currey /* Read SCU7c (silicon revision register) */ 14471f677a9SRussell Currey ast_write32(ast, 0xf004, 0x1e6e0000); 14571f677a9SRussell Currey ast_write32(ast, 0xf000, 0x1); 14671f677a9SRussell Currey *scu_rev = ast_read32(ast, 0x1207c); 14771f677a9SRussell Currey return; 14871f677a9SRussell Currey } 14971f677a9SRussell Currey } 15071f677a9SRussell Currey 15171f677a9SRussell Currey /* We have a P2A bridge but it's disabled */ 1521a19b4cbSThomas Zimmermann drm_info(dev, "P2A bridge disabled, using default configuration\n"); 15371f677a9SRussell Currey } 154312fec14SDave Airlie 1553bfe25b5SThomas Zimmermann static int ast_detect_chip(struct drm_device *dev, bool need_post, u32 scu_rev) 156312fec14SDave Airlie { 1575abaa683SThomas Zimmermann struct ast_device *ast = to_ast_device(dev); 15846fb883cSThomas Zimmermann struct pci_dev *pdev = to_pci_dev(dev->dev); 1593bfe25b5SThomas Zimmermann uint32_t jreg; 16071f677a9SRussell Currey 16171f677a9SRussell Currey /* Identify chipset */ 16246fb883cSThomas Zimmermann if (pdev->revision >= 0x50) { 163f9bd00e0SKuoHsiang Chou ast->chip = AST2600; 164f9bd00e0SKuoHsiang Chou drm_info(dev, "AST 2600 detected\n"); 16546fb883cSThomas Zimmermann } else if (pdev->revision >= 0x40) { 1669f93c8b3SY.C. Chen ast->chip = AST2500; 1671a19b4cbSThomas Zimmermann drm_info(dev, "AST 2500 detected\n"); 16846fb883cSThomas Zimmermann } else if (pdev->revision >= 0x30) { 1691453bf4cSDave Airlie ast->chip = AST2400; 1701a19b4cbSThomas Zimmermann drm_info(dev, "AST 2400 detected\n"); 17146fb883cSThomas Zimmermann } else if (pdev->revision >= 0x20) { 172*6bd576daSThomas Zimmermann switch (scu_rev & 0x300) { 173*6bd576daSThomas Zimmermann case 0x0000: 174*6bd576daSThomas Zimmermann ast->chip = AST1300; 175*6bd576daSThomas Zimmermann drm_info(dev, "AST 1300 detected\n"); 176*6bd576daSThomas Zimmermann break; 177*6bd576daSThomas Zimmermann default: 178312fec14SDave Airlie ast->chip = AST2300; 1791a19b4cbSThomas Zimmermann drm_info(dev, "AST 2300 detected\n"); 180*6bd576daSThomas Zimmermann break; 181*6bd576daSThomas Zimmermann } 18246fb883cSThomas Zimmermann } else if (pdev->revision >= 0x10) { 18371f677a9SRussell Currey switch (scu_rev & 0x0300) { 184312fec14SDave Airlie case 0x0200: 185312fec14SDave Airlie ast->chip = AST1100; 1861a19b4cbSThomas Zimmermann drm_info(dev, "AST 1100 detected\n"); 187312fec14SDave Airlie break; 188312fec14SDave Airlie case 0x0100: 189312fec14SDave Airlie ast->chip = AST2200; 1901a19b4cbSThomas Zimmermann drm_info(dev, "AST 2200 detected\n"); 191312fec14SDave Airlie break; 192312fec14SDave Airlie case 0x0000: 193312fec14SDave Airlie ast->chip = AST2150; 1941a19b4cbSThomas Zimmermann drm_info(dev, "AST 2150 detected\n"); 195312fec14SDave Airlie break; 196312fec14SDave Airlie default: 197312fec14SDave Airlie ast->chip = AST2100; 1981a19b4cbSThomas Zimmermann drm_info(dev, "AST 2100 detected\n"); 199312fec14SDave Airlie break; 200312fec14SDave Airlie } 201312fec14SDave Airlie } else { 20283502a5dSY.C. Chen ast->chip = AST2000; 2031a19b4cbSThomas Zimmermann drm_info(dev, "AST 2000 detected\n"); 204312fec14SDave Airlie } 205f1f62f2cSDave Airlie 206d1b98557SBenjamin Herrenschmidt /* Check if we support wide screen */ 207ecf64579SThomas Zimmermann switch (AST_GEN(ast)) { 208ecf64579SThomas Zimmermann case 1: 209f1f62f2cSDave Airlie ast->support_wide_screen = false; 210f1f62f2cSDave Airlie break; 211f1f62f2cSDave Airlie default: 212f1f62f2cSDave Airlie jreg = ast_get_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xd0, 0xff); 213f1f62f2cSDave Airlie if (!(jreg & 0x80)) 214f1f62f2cSDave Airlie ast->support_wide_screen = true; 215f1f62f2cSDave Airlie else if (jreg & 0x01) 216f1f62f2cSDave Airlie ast->support_wide_screen = true; 217f1f62f2cSDave Airlie else { 218f1f62f2cSDave Airlie ast->support_wide_screen = false; 219*6bd576daSThomas Zimmermann if (ast->chip == AST1300) 220f1f62f2cSDave Airlie ast->support_wide_screen = true; 22171f677a9SRussell Currey if (ast->chip == AST2400 && 22271f677a9SRussell Currey (scu_rev & 0x300) == 0x100) /* ast1400 */ 2231453bf4cSDave Airlie ast->support_wide_screen = true; 2249f93c8b3SY.C. Chen if (ast->chip == AST2500 && 2259f93c8b3SY.C. Chen scu_rev == 0x100) /* ast2510 */ 2269f93c8b3SY.C. Chen ast->support_wide_screen = true; 227ecf64579SThomas Zimmermann if (IS_AST_GEN7(ast)) 22859a39fccSKuoHsiang Chou ast->support_wide_screen = true; 229f1f62f2cSDave Airlie } 230f1f62f2cSDave Airlie break; 231f1f62f2cSDave Airlie } 232f1f62f2cSDave Airlie 233d1b98557SBenjamin Herrenschmidt /* Check 3rd Tx option (digital output afaik) */ 2347f35680aSThomas Zimmermann ast->tx_chip_types |= AST_TX_NONE_BIT; 235d1b98557SBenjamin Herrenschmidt 236d1b98557SBenjamin Herrenschmidt /* 237d1b98557SBenjamin Herrenschmidt * VGACRA3 Enhanced Color Mode Register, check if DVO is already 238d1b98557SBenjamin Herrenschmidt * enabled, in that case, assume we have a SIL164 TMDS transmitter 23942fb1427SBenjamin Herrenschmidt * 24042fb1427SBenjamin Herrenschmidt * Don't make that assumption if we the chip wasn't enabled and 24142fb1427SBenjamin Herrenschmidt * is at power-on reset, otherwise we'll incorrectly "detect" a 24242fb1427SBenjamin Herrenschmidt * SIL164 when there is none. 243d1b98557SBenjamin Herrenschmidt */ 2443bfe25b5SThomas Zimmermann if (!need_post) { 24583c6620bSDave Airlie jreg = ast_get_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xa3, 0xff); 24683c6620bSDave Airlie if (jreg & 0x80) 2477f35680aSThomas Zimmermann ast->tx_chip_types = AST_TX_SIL164_BIT; 24842fb1427SBenjamin Herrenschmidt } 249d1b98557SBenjamin Herrenschmidt 250ecf64579SThomas Zimmermann if (IS_AST_GEN4(ast) || IS_AST_GEN5(ast) || IS_AST_GEN6(ast)) { 251d1b98557SBenjamin Herrenschmidt /* 252ecf64579SThomas Zimmermann * On AST GEN4+, look the configuration set by the SoC in 253d1b98557SBenjamin Herrenschmidt * the SOC scratch register #1 bits 11:8 (interestingly marked 25442fb1427SBenjamin Herrenschmidt * as "reserved" in the spec) 255d1b98557SBenjamin Herrenschmidt */ 25683c6620bSDave Airlie jreg = ast_get_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xd1, 0xff); 25783c6620bSDave Airlie switch (jreg) { 25883c6620bSDave Airlie case 0x04: 2597f35680aSThomas Zimmermann ast->tx_chip_types = AST_TX_SIL164_BIT; 26083c6620bSDave Airlie break; 26183c6620bSDave Airlie case 0x08: 2624bc85b82SThomas Zimmermann ast->dp501_fw_addr = drmm_kzalloc(dev, 32*1024, GFP_KERNEL); 26383c6620bSDave Airlie if (ast->dp501_fw_addr) { 26483c6620bSDave Airlie /* backup firmware */ 26583c6620bSDave Airlie if (ast_backup_fw(dev, ast->dp501_fw_addr, 32*1024)) { 2664bc85b82SThomas Zimmermann drmm_kfree(dev, ast->dp501_fw_addr); 26783c6620bSDave Airlie ast->dp501_fw_addr = NULL; 26883c6620bSDave Airlie } 26983c6620bSDave Airlie } 270df561f66SGustavo A. R. Silva fallthrough; 27183c6620bSDave Airlie case 0x0c: 2727f35680aSThomas Zimmermann ast->tx_chip_types = AST_TX_DP501_BIT; 27383c6620bSDave Airlie } 274ecf64579SThomas Zimmermann } else if (IS_AST_GEN7(ast)) { 275bed61c8fSJammy Huang if (ast_get_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xD1, TX_TYPE_MASK) == 276bed61c8fSJammy Huang ASTDP_DPMCU_TX) { 277bed61c8fSJammy Huang ast->tx_chip_types = AST_TX_ASTDP_BIT; 278bed61c8fSJammy Huang ast_dp_launch(&ast->base); 279bed61c8fSJammy Huang } 280bed61c8fSJammy Huang } 28183c6620bSDave Airlie 282d1b98557SBenjamin Herrenschmidt /* Print stuff for diagnostic purposes */ 2837f35680aSThomas Zimmermann if (ast->tx_chip_types & AST_TX_NONE_BIT) 2847f35680aSThomas Zimmermann drm_info(dev, "Using analog VGA\n"); 2857f35680aSThomas Zimmermann if (ast->tx_chip_types & AST_TX_SIL164_BIT) 2861a19b4cbSThomas Zimmermann drm_info(dev, "Using Sil164 TMDS transmitter\n"); 2877f35680aSThomas Zimmermann if (ast->tx_chip_types & AST_TX_DP501_BIT) 2881a19b4cbSThomas Zimmermann drm_info(dev, "Using DP501 DisplayPort transmitter\n"); 289bed61c8fSJammy Huang if (ast->tx_chip_types & AST_TX_ASTDP_BIT) 290bed61c8fSJammy Huang drm_info(dev, "Using ASPEED DisplayPort transmitter\n"); 2917f35680aSThomas Zimmermann 292312fec14SDave Airlie return 0; 293312fec14SDave Airlie } 294312fec14SDave Airlie 295312fec14SDave Airlie static int ast_get_dram_info(struct drm_device *dev) 296312fec14SDave Airlie { 29746fb883cSThomas Zimmermann struct device_node *np = dev->dev->of_node; 2985abaa683SThomas Zimmermann struct ast_device *ast = to_ast_device(dev); 29971f677a9SRussell Currey uint32_t mcr_cfg, mcr_scu_mpll, mcr_scu_strap; 30071f677a9SRussell Currey uint32_t denum, num, div, ref_pll, dsel; 301312fec14SDave Airlie 30271f677a9SRussell Currey switch (ast->config_mode) { 30371f677a9SRussell Currey case ast_use_dt: 30471f677a9SRussell Currey /* 30571f677a9SRussell Currey * If some properties are missing, use reasonable 306ecf64579SThomas Zimmermann * defaults for GEN5 30771f677a9SRussell Currey */ 30871f677a9SRussell Currey if (of_property_read_u32(np, "aspeed,mcr-configuration", 30971f677a9SRussell Currey &mcr_cfg)) 31071f677a9SRussell Currey mcr_cfg = 0x00000577; 31171f677a9SRussell Currey if (of_property_read_u32(np, "aspeed,mcr-scu-mpll", 31271f677a9SRussell Currey &mcr_scu_mpll)) 31371f677a9SRussell Currey mcr_scu_mpll = 0x000050C0; 31471f677a9SRussell Currey if (of_property_read_u32(np, "aspeed,mcr-scu-strap", 31571f677a9SRussell Currey &mcr_scu_strap)) 31671f677a9SRussell Currey mcr_scu_strap = 0; 31771f677a9SRussell Currey break; 31871f677a9SRussell Currey case ast_use_p2a: 31971f677a9SRussell Currey ast_write32(ast, 0xf004, 0x1e6e0000); 32071f677a9SRussell Currey ast_write32(ast, 0xf000, 0x1); 32171f677a9SRussell Currey mcr_cfg = ast_read32(ast, 0x10004); 32271f677a9SRussell Currey mcr_scu_mpll = ast_read32(ast, 0x10120); 32371f677a9SRussell Currey mcr_scu_strap = ast_read32(ast, 0x10170); 32471f677a9SRussell Currey break; 32571f677a9SRussell Currey case ast_use_defaults: 32671f677a9SRussell Currey default: 3276c971c09SY.C. Chen ast->dram_bus_width = 16; 3286c971c09SY.C. Chen ast->dram_type = AST_DRAM_1Gx16; 329ecf64579SThomas Zimmermann if (IS_AST_GEN6(ast)) 3309f93c8b3SY.C. Chen ast->mclk = 800; 3319f93c8b3SY.C. Chen else 3326c971c09SY.C. Chen ast->mclk = 396; 33371f677a9SRussell Currey return 0; 3346c971c09SY.C. Chen } 335312fec14SDave Airlie 33671f677a9SRussell Currey if (mcr_cfg & 0x40) 337312fec14SDave Airlie ast->dram_bus_width = 16; 338312fec14SDave Airlie else 339312fec14SDave Airlie ast->dram_bus_width = 32; 340312fec14SDave Airlie 341ecf64579SThomas Zimmermann if (IS_AST_GEN6(ast)) { 3429f93c8b3SY.C. Chen switch (mcr_cfg & 0x03) { 3439f93c8b3SY.C. Chen case 0: 3449f93c8b3SY.C. Chen ast->dram_type = AST_DRAM_1Gx16; 3459f93c8b3SY.C. Chen break; 3469f93c8b3SY.C. Chen default: 3479f93c8b3SY.C. Chen case 1: 3489f93c8b3SY.C. Chen ast->dram_type = AST_DRAM_2Gx16; 3499f93c8b3SY.C. Chen break; 3509f93c8b3SY.C. Chen case 2: 3519f93c8b3SY.C. Chen ast->dram_type = AST_DRAM_4Gx16; 3529f93c8b3SY.C. Chen break; 3539f93c8b3SY.C. Chen case 3: 3549f93c8b3SY.C. Chen ast->dram_type = AST_DRAM_8Gx16; 3559f93c8b3SY.C. Chen break; 3569f93c8b3SY.C. Chen } 357ecf64579SThomas Zimmermann } else if (IS_AST_GEN4(ast) || IS_AST_GEN5(ast)) { 35871f677a9SRussell Currey switch (mcr_cfg & 0x03) { 359312fec14SDave Airlie case 0: 360312fec14SDave Airlie ast->dram_type = AST_DRAM_512Mx16; 361312fec14SDave Airlie break; 362312fec14SDave Airlie default: 363312fec14SDave Airlie case 1: 364312fec14SDave Airlie ast->dram_type = AST_DRAM_1Gx16; 365312fec14SDave Airlie break; 366312fec14SDave Airlie case 2: 367312fec14SDave Airlie ast->dram_type = AST_DRAM_2Gx16; 368312fec14SDave Airlie break; 369312fec14SDave Airlie case 3: 370312fec14SDave Airlie ast->dram_type = AST_DRAM_4Gx16; 371312fec14SDave Airlie break; 372312fec14SDave Airlie } 373312fec14SDave Airlie } else { 37471f677a9SRussell Currey switch (mcr_cfg & 0x0c) { 375312fec14SDave Airlie case 0: 376312fec14SDave Airlie case 4: 377312fec14SDave Airlie ast->dram_type = AST_DRAM_512Mx16; 378312fec14SDave Airlie break; 379312fec14SDave Airlie case 8: 38071f677a9SRussell Currey if (mcr_cfg & 0x40) 381312fec14SDave Airlie ast->dram_type = AST_DRAM_1Gx16; 382312fec14SDave Airlie else 383312fec14SDave Airlie ast->dram_type = AST_DRAM_512Mx32; 384312fec14SDave Airlie break; 385312fec14SDave Airlie case 0xc: 386312fec14SDave Airlie ast->dram_type = AST_DRAM_1Gx32; 387312fec14SDave Airlie break; 388312fec14SDave Airlie } 389312fec14SDave Airlie } 390312fec14SDave Airlie 39171f677a9SRussell Currey if (mcr_scu_strap & 0x2000) 392312fec14SDave Airlie ref_pll = 14318; 393312fec14SDave Airlie else 394312fec14SDave Airlie ref_pll = 12000; 395312fec14SDave Airlie 39671f677a9SRussell Currey denum = mcr_scu_mpll & 0x1f; 39771f677a9SRussell Currey num = (mcr_scu_mpll & 0x3fe0) >> 5; 39871f677a9SRussell Currey dsel = (mcr_scu_mpll & 0xc000) >> 14; 39971f677a9SRussell Currey switch (dsel) { 400312fec14SDave Airlie case 3: 401312fec14SDave Airlie div = 0x4; 402312fec14SDave Airlie break; 403312fec14SDave Airlie case 2: 404312fec14SDave Airlie case 1: 405312fec14SDave Airlie div = 0x2; 406312fec14SDave Airlie break; 407312fec14SDave Airlie default: 408312fec14SDave Airlie div = 0x1; 409312fec14SDave Airlie break; 410312fec14SDave Airlie } 4116475a7ccSBenjamin Herrenschmidt ast->mclk = ref_pll * (num + 2) / ((denum + 2) * (div * 1000)); 412312fec14SDave Airlie return 0; 413312fec14SDave Airlie } 414312fec14SDave Airlie 41537b42cf9SThomas Zimmermann struct ast_device *ast_device_create(const struct drm_driver *drv, 416fbe01716SThomas Zimmermann struct pci_dev *pdev, 417fbe01716SThomas Zimmermann unsigned long flags) 418312fec14SDave Airlie { 419fbe01716SThomas Zimmermann struct drm_device *dev; 42037b42cf9SThomas Zimmermann struct ast_device *ast; 4213bfe25b5SThomas Zimmermann bool need_post = false; 422312fec14SDave Airlie int ret = 0; 4233bfe25b5SThomas Zimmermann u32 scu_rev = 0xffffffff; 424312fec14SDave Airlie 42537b42cf9SThomas Zimmermann ast = devm_drm_dev_alloc(&pdev->dev, drv, struct ast_device, base); 426e0f5a738SThomas Zimmermann if (IS_ERR(ast)) 427e0f5a738SThomas Zimmermann return ast; 428e0f5a738SThomas Zimmermann dev = &ast->base; 429fbe01716SThomas Zimmermann 430fbe01716SThomas Zimmermann pci_set_drvdata(pdev, dev); 431fbe01716SThomas Zimmermann 432f870231fSThomas Zimmermann ret = drmm_mutex_init(dev, &ast->ioregs_lock); 433f870231fSThomas Zimmermann if (ret) 434f870231fSThomas Zimmermann return ERR_PTR(ret); 435f870231fSThomas Zimmermann 4369ea172a9STakashi Iwai ast->regs = pcim_iomap(pdev, 1, 0); 437e0f5a738SThomas Zimmermann if (!ast->regs) 438e0f5a738SThomas Zimmermann return ERR_PTR(-EIO); 4390dd68309SBenjamin Herrenschmidt 4400dd68309SBenjamin Herrenschmidt /* 4414327a613SJammy Huang * After AST2500, MMIO is enabled by default, and it should be adopted 4424327a613SJammy Huang * to be compatible with Arm. 4430dd68309SBenjamin Herrenschmidt */ 4444327a613SJammy Huang if (pdev->revision >= 0x40) { 4454327a613SJammy Huang ast->ioregs = ast->regs + AST_IO_MM_OFFSET; 4464327a613SJammy Huang } else if (!(pci_resource_flags(pdev, 2) & IORESOURCE_IO)) { 4471a19b4cbSThomas Zimmermann drm_info(dev, "platform has no IO space, trying MMIO\n"); 4480dd68309SBenjamin Herrenschmidt ast->ioregs = ast->regs + AST_IO_MM_OFFSET; 4490dd68309SBenjamin Herrenschmidt } 4500dd68309SBenjamin Herrenschmidt 4510dd68309SBenjamin Herrenschmidt /* "map" IO regs if the above hasn't done so already */ 4520dd68309SBenjamin Herrenschmidt if (!ast->ioregs) { 4539ea172a9STakashi Iwai ast->ioregs = pcim_iomap(pdev, 2, 0); 454e0f5a738SThomas Zimmermann if (!ast->ioregs) 455e0f5a738SThomas Zimmermann return ERR_PTR(-EIO); 4560dd68309SBenjamin Herrenschmidt } 457312fec14SDave Airlie 45848b6701eSThomas Zimmermann ret = ast_init_pci_config(pdev); 45948b6701eSThomas Zimmermann if (ret) 46048b6701eSThomas Zimmermann return ERR_PTR(ret); 46148b6701eSThomas Zimmermann 4623bfe25b5SThomas Zimmermann if (!ast_is_vga_enabled(dev)) { 4633bfe25b5SThomas Zimmermann drm_info(dev, "VGA not enabled on entry, requesting chip POST\n"); 4643bfe25b5SThomas Zimmermann need_post = true; 4653bfe25b5SThomas Zimmermann } 4663bfe25b5SThomas Zimmermann 4673bfe25b5SThomas Zimmermann /* 4683bfe25b5SThomas Zimmermann * If VGA isn't enabled, we need to enable now or subsequent 4693bfe25b5SThomas Zimmermann * access to the scratch registers will fail. 4703bfe25b5SThomas Zimmermann */ 4713bfe25b5SThomas Zimmermann if (need_post) 4723bfe25b5SThomas Zimmermann ast_enable_vga(dev); 4733bfe25b5SThomas Zimmermann 4743bfe25b5SThomas Zimmermann /* Enable extended register access */ 4753bfe25b5SThomas Zimmermann ast_open_key(ast); 476a74ec2bcSThomas Zimmermann ret = ast_enable_mmio(ast); 477a74ec2bcSThomas Zimmermann if (ret) 478a74ec2bcSThomas Zimmermann return ERR_PTR(ret); 4793bfe25b5SThomas Zimmermann 4803bfe25b5SThomas Zimmermann /* Find out whether P2A works or whether to use device-tree */ 4813bfe25b5SThomas Zimmermann ast_detect_config_mode(dev, &scu_rev); 4823bfe25b5SThomas Zimmermann 4833bfe25b5SThomas Zimmermann ast_detect_chip(dev, need_post, scu_rev); 484312fec14SDave Airlie 485298360afSRussell Currey ret = ast_get_dram_info(dev); 486298360afSRussell Currey if (ret) 487e0f5a738SThomas Zimmermann return ERR_PTR(ret); 488e0f5a738SThomas Zimmermann 4890149e780SThomas Zimmermann drm_info(dev, "dram MCLK=%u Mhz type=%d bus_width=%d\n", 4900149e780SThomas Zimmermann ast->mclk, ast->dram_type, ast->dram_bus_width); 491312fec14SDave Airlie 492244d0128SThomas Zimmermann if (need_post) 493244d0128SThomas Zimmermann ast_post_gpu(dev); 494244d0128SThomas Zimmermann 495312fec14SDave Airlie ret = ast_mm_init(ast); 496312fec14SDave Airlie if (ret) 497e0f5a738SThomas Zimmermann return ERR_PTR(ret); 498312fec14SDave Airlie 499ba4e0339SKuoHsiang Chou /* map reserved buffer */ 500ba4e0339SKuoHsiang Chou ast->dp501_fw_buf = NULL; 501f2fa5a99SThomas Zimmermann if (ast->vram_size < pci_resource_len(pdev, 0)) { 502f2fa5a99SThomas Zimmermann ast->dp501_fw_buf = pci_iomap_range(pdev, 0, ast->vram_size, 0); 503ba4e0339SKuoHsiang Chou if (!ast->dp501_fw_buf) 504ba4e0339SKuoHsiang Chou drm_info(dev, "failed to map reserved buffer!\n"); 505ba4e0339SKuoHsiang Chou } 506ba4e0339SKuoHsiang Chou 507e6949ff3SThomas Zimmermann ret = ast_mode_config_init(ast); 5081728bf64SThomas Zimmermann if (ret) 509e0f5a738SThomas Zimmermann return ERR_PTR(ret); 510312fec14SDave Airlie 511cff0adcaSThomas Zimmermann return ast; 512312fec14SDave Airlie } 513