1312fec14SDave Airlie /* 2312fec14SDave Airlie * Copyright 2012 Red Hat Inc. 3312fec14SDave Airlie * 4312fec14SDave Airlie * Permission is hereby granted, free of charge, to any person obtaining a 5312fec14SDave Airlie * copy of this software and associated documentation files (the 6312fec14SDave Airlie * "Software"), to deal in the Software without restriction, including 7312fec14SDave Airlie * without limitation the rights to use, copy, modify, merge, publish, 8312fec14SDave Airlie * distribute, sub license, and/or sell copies of the Software, and to 9312fec14SDave Airlie * permit persons to whom the Software is furnished to do so, subject to 10312fec14SDave Airlie * the following conditions: 11312fec14SDave Airlie * 12312fec14SDave Airlie * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 13312fec14SDave Airlie * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 14312fec14SDave Airlie * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL 15312fec14SDave Airlie * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, 16312fec14SDave Airlie * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR 17312fec14SDave Airlie * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE 18312fec14SDave Airlie * USE OR OTHER DEALINGS IN THE SOFTWARE. 19312fec14SDave Airlie * 20312fec14SDave Airlie * The above copyright notice and this permission notice (including the 21312fec14SDave Airlie * next paragraph) shall be included in all copies or substantial portions 22312fec14SDave Airlie * of the Software. 23312fec14SDave Airlie * 24312fec14SDave Airlie */ 25312fec14SDave Airlie /* 26312fec14SDave Airlie * Authors: Dave Airlie <airlied@redhat.com> 27312fec14SDave Airlie */ 28fbbbd160SSam Ravnborg 29fbbbd160SSam Ravnborg #include <linux/pci.h> 30312fec14SDave Airlie 314961eb60SThomas Zimmermann #include <drm/drm_atomic_helper.h> 32760285e7SDavid Howells #include <drm/drm_crtc_helper.h> 33fbe01716SThomas Zimmermann #include <drm/drm_drv.h> 34fbbbd160SSam Ravnborg #include <drm/drm_gem.h> 35fbbbd160SSam Ravnborg #include <drm/drm_gem_vram_helper.h> 364bc85b82SThomas Zimmermann #include <drm/drm_managed.h> 37fbbbd160SSam Ravnborg 38fbbbd160SSam Ravnborg #include "ast_drv.h" 39312fec14SDave Airlie 40312fec14SDave Airlie void ast_set_index_reg_mask(struct ast_private *ast, 41312fec14SDave Airlie uint32_t base, uint8_t index, 42312fec14SDave Airlie uint8_t mask, uint8_t val) 43312fec14SDave Airlie { 44312fec14SDave Airlie u8 tmp; 45312fec14SDave Airlie ast_io_write8(ast, base, index); 46312fec14SDave Airlie tmp = (ast_io_read8(ast, base + 1) & mask) | val; 47312fec14SDave Airlie ast_set_index_reg(ast, base, index, tmp); 48312fec14SDave Airlie } 49312fec14SDave Airlie 50312fec14SDave Airlie uint8_t ast_get_index_reg(struct ast_private *ast, 51312fec14SDave Airlie uint32_t base, uint8_t index) 52312fec14SDave Airlie { 53312fec14SDave Airlie uint8_t ret; 54312fec14SDave Airlie ast_io_write8(ast, base, index); 55312fec14SDave Airlie ret = ast_io_read8(ast, base + 1); 56312fec14SDave Airlie return ret; 57312fec14SDave Airlie } 58312fec14SDave Airlie 59312fec14SDave Airlie uint8_t ast_get_index_reg_mask(struct ast_private *ast, 60312fec14SDave Airlie uint32_t base, uint8_t index, uint8_t mask) 61312fec14SDave Airlie { 62312fec14SDave Airlie uint8_t ret; 63312fec14SDave Airlie ast_io_write8(ast, base, index); 64312fec14SDave Airlie ret = ast_io_read8(ast, base + 1) & mask; 65312fec14SDave Airlie return ret; 66312fec14SDave Airlie } 67312fec14SDave Airlie 6871f677a9SRussell Currey static void ast_detect_config_mode(struct drm_device *dev, u32 *scu_rev) 6971f677a9SRussell Currey { 7046fb883cSThomas Zimmermann struct device_node *np = dev->dev->of_node; 71fa7dbd76SThomas Zimmermann struct ast_private *ast = to_ast_private(dev); 7246fb883cSThomas Zimmermann struct pci_dev *pdev = to_pci_dev(dev->dev); 7371f677a9SRussell Currey uint32_t data, jregd0, jregd1; 7471f677a9SRussell Currey 7571f677a9SRussell Currey /* Defaults */ 7671f677a9SRussell Currey ast->config_mode = ast_use_defaults; 7771f677a9SRussell Currey *scu_rev = 0xffffffff; 7871f677a9SRussell Currey 7971f677a9SRussell Currey /* Check if we have device-tree properties */ 8071f677a9SRussell Currey if (np && !of_property_read_u32(np, "aspeed,scu-revision-id", 8171f677a9SRussell Currey scu_rev)) { 8271f677a9SRussell Currey /* We do, disable P2A access */ 8371f677a9SRussell Currey ast->config_mode = ast_use_dt; 841a19b4cbSThomas Zimmermann drm_info(dev, "Using device-tree for configuration\n"); 8571f677a9SRussell Currey return; 8671f677a9SRussell Currey } 8771f677a9SRussell Currey 8871f677a9SRussell Currey /* Not all families have a P2A bridge */ 8946fb883cSThomas Zimmermann if (pdev->device != PCI_CHIP_AST2000) 9071f677a9SRussell Currey return; 9171f677a9SRussell Currey 9271f677a9SRussell Currey /* 9371f677a9SRussell Currey * The BMC will set SCU 0x40 D[12] to 1 if the P2 bridge 9471f677a9SRussell Currey * is disabled. We force using P2A if VGA only mode bit 9571f677a9SRussell Currey * is set D[7] 9671f677a9SRussell Currey */ 9771f677a9SRussell Currey jregd0 = ast_get_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xd0, 0xff); 9871f677a9SRussell Currey jregd1 = ast_get_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xd1, 0xff); 9971f677a9SRussell Currey if (!(jregd0 & 0x80) || !(jregd1 & 0x10)) { 100f34bf652SKuoHsiang Chou /* Patch AST2500 */ 101f34bf652SKuoHsiang Chou if (((pdev->revision & 0xF0) == 0x40) 102f34bf652SKuoHsiang Chou && ((jregd0 & AST_VRAM_INIT_STATUS_MASK) == 0)) 103f34bf652SKuoHsiang Chou ast_patch_ahb_2500(ast); 104f34bf652SKuoHsiang Chou 10571f677a9SRussell Currey /* Double check it's actually working */ 10671f677a9SRussell Currey data = ast_read32(ast, 0xf004); 107ba4e0339SKuoHsiang Chou if ((data != 0xFFFFFFFF) && (data != 0x00)) { 10871f677a9SRussell Currey /* P2A works, grab silicon revision */ 10971f677a9SRussell Currey ast->config_mode = ast_use_p2a; 11071f677a9SRussell Currey 1111a19b4cbSThomas Zimmermann drm_info(dev, "Using P2A bridge for configuration\n"); 11271f677a9SRussell Currey 11371f677a9SRussell Currey /* Read SCU7c (silicon revision register) */ 11471f677a9SRussell Currey ast_write32(ast, 0xf004, 0x1e6e0000); 11571f677a9SRussell Currey ast_write32(ast, 0xf000, 0x1); 11671f677a9SRussell Currey *scu_rev = ast_read32(ast, 0x1207c); 11771f677a9SRussell Currey return; 11871f677a9SRussell Currey } 11971f677a9SRussell Currey } 12071f677a9SRussell Currey 12171f677a9SRussell Currey /* We have a P2A bridge but it's disabled */ 1221a19b4cbSThomas Zimmermann drm_info(dev, "P2A bridge disabled, using default configuration\n"); 12371f677a9SRussell Currey } 124312fec14SDave Airlie 125d1b98557SBenjamin Herrenschmidt static int ast_detect_chip(struct drm_device *dev, bool *need_post) 126312fec14SDave Airlie { 127fa7dbd76SThomas Zimmermann struct ast_private *ast = to_ast_private(dev); 12846fb883cSThomas Zimmermann struct pci_dev *pdev = to_pci_dev(dev->dev); 12971f677a9SRussell Currey uint32_t jreg, scu_rev; 13071f677a9SRussell Currey 13171f677a9SRussell Currey /* 13271f677a9SRussell Currey * If VGA isn't enabled, we need to enable now or subsequent 13371f677a9SRussell Currey * access to the scratch registers will fail. We also inform 13471f677a9SRussell Currey * our caller that it needs to POST the chip 13571f677a9SRussell Currey * (Assumption: VGA not enabled -> need to POST) 13671f677a9SRussell Currey */ 13771f677a9SRussell Currey if (!ast_is_vga_enabled(dev)) { 13871f677a9SRussell Currey ast_enable_vga(dev); 1391a19b4cbSThomas Zimmermann drm_info(dev, "VGA not enabled on entry, requesting chip POST\n"); 14071f677a9SRussell Currey *need_post = true; 14171f677a9SRussell Currey } else 14271f677a9SRussell Currey *need_post = false; 14371f677a9SRussell Currey 14471f677a9SRussell Currey 14571f677a9SRussell Currey /* Enable extended register access */ 1468f372e25SY.C. Chen ast_open_key(ast); 14705b43971SY.C. Chen ast_enable_mmio(dev); 148312fec14SDave Airlie 14971f677a9SRussell Currey /* Find out whether P2A works or whether to use device-tree */ 15071f677a9SRussell Currey ast_detect_config_mode(dev, &scu_rev); 15171f677a9SRussell Currey 15271f677a9SRussell Currey /* Identify chipset */ 15346fb883cSThomas Zimmermann if (pdev->revision >= 0x50) { 154f9bd00e0SKuoHsiang Chou ast->chip = AST2600; 155f9bd00e0SKuoHsiang Chou drm_info(dev, "AST 2600 detected\n"); 15646fb883cSThomas Zimmermann } else if (pdev->revision >= 0x40) { 1579f93c8b3SY.C. Chen ast->chip = AST2500; 1581a19b4cbSThomas Zimmermann drm_info(dev, "AST 2500 detected\n"); 15946fb883cSThomas Zimmermann } else if (pdev->revision >= 0x30) { 1601453bf4cSDave Airlie ast->chip = AST2400; 1611a19b4cbSThomas Zimmermann drm_info(dev, "AST 2400 detected\n"); 16246fb883cSThomas Zimmermann } else if (pdev->revision >= 0x20) { 163312fec14SDave Airlie ast->chip = AST2300; 1641a19b4cbSThomas Zimmermann drm_info(dev, "AST 2300 detected\n"); 16546fb883cSThomas Zimmermann } else if (pdev->revision >= 0x10) { 16671f677a9SRussell Currey switch (scu_rev & 0x0300) { 167312fec14SDave Airlie case 0x0200: 168312fec14SDave Airlie ast->chip = AST1100; 1691a19b4cbSThomas Zimmermann drm_info(dev, "AST 1100 detected\n"); 170312fec14SDave Airlie break; 171312fec14SDave Airlie case 0x0100: 172312fec14SDave Airlie ast->chip = AST2200; 1731a19b4cbSThomas Zimmermann drm_info(dev, "AST 2200 detected\n"); 174312fec14SDave Airlie break; 175312fec14SDave Airlie case 0x0000: 176312fec14SDave Airlie ast->chip = AST2150; 1771a19b4cbSThomas Zimmermann drm_info(dev, "AST 2150 detected\n"); 178312fec14SDave Airlie break; 179312fec14SDave Airlie default: 180312fec14SDave Airlie ast->chip = AST2100; 1811a19b4cbSThomas Zimmermann drm_info(dev, "AST 2100 detected\n"); 182312fec14SDave Airlie break; 183312fec14SDave Airlie } 184312fec14SDave Airlie ast->vga2_clone = false; 185312fec14SDave Airlie } else { 18683502a5dSY.C. Chen ast->chip = AST2000; 1871a19b4cbSThomas Zimmermann drm_info(dev, "AST 2000 detected\n"); 188312fec14SDave Airlie } 189f1f62f2cSDave Airlie 190d1b98557SBenjamin Herrenschmidt /* Check if we support wide screen */ 191f1f62f2cSDave Airlie switch (ast->chip) { 192f1f62f2cSDave Airlie case AST2000: 193f1f62f2cSDave Airlie ast->support_wide_screen = false; 194f1f62f2cSDave Airlie break; 195f1f62f2cSDave Airlie default: 196f1f62f2cSDave Airlie jreg = ast_get_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xd0, 0xff); 197f1f62f2cSDave Airlie if (!(jreg & 0x80)) 198f1f62f2cSDave Airlie ast->support_wide_screen = true; 199f1f62f2cSDave Airlie else if (jreg & 0x01) 200f1f62f2cSDave Airlie ast->support_wide_screen = true; 201f1f62f2cSDave Airlie else { 202f1f62f2cSDave Airlie ast->support_wide_screen = false; 20371f677a9SRussell Currey if (ast->chip == AST2300 && 20471f677a9SRussell Currey (scu_rev & 0x300) == 0x0) /* ast1300 */ 205f1f62f2cSDave Airlie ast->support_wide_screen = true; 20671f677a9SRussell Currey if (ast->chip == AST2400 && 20771f677a9SRussell Currey (scu_rev & 0x300) == 0x100) /* ast1400 */ 2081453bf4cSDave Airlie ast->support_wide_screen = true; 2099f93c8b3SY.C. Chen if (ast->chip == AST2500 && 2109f93c8b3SY.C. Chen scu_rev == 0x100) /* ast2510 */ 2119f93c8b3SY.C. Chen ast->support_wide_screen = true; 212*59a39fccSKuoHsiang Chou if (ast->chip == AST2600) /* ast2600 */ 213*59a39fccSKuoHsiang Chou ast->support_wide_screen = true; 214f1f62f2cSDave Airlie } 215f1f62f2cSDave Airlie break; 216f1f62f2cSDave Airlie } 217f1f62f2cSDave Airlie 218d1b98557SBenjamin Herrenschmidt /* Check 3rd Tx option (digital output afaik) */ 21983c6620bSDave Airlie ast->tx_chip_type = AST_TX_NONE; 220d1b98557SBenjamin Herrenschmidt 221d1b98557SBenjamin Herrenschmidt /* 222d1b98557SBenjamin Herrenschmidt * VGACRA3 Enhanced Color Mode Register, check if DVO is already 223d1b98557SBenjamin Herrenschmidt * enabled, in that case, assume we have a SIL164 TMDS transmitter 22442fb1427SBenjamin Herrenschmidt * 22542fb1427SBenjamin Herrenschmidt * Don't make that assumption if we the chip wasn't enabled and 22642fb1427SBenjamin Herrenschmidt * is at power-on reset, otherwise we'll incorrectly "detect" a 22742fb1427SBenjamin Herrenschmidt * SIL164 when there is none. 228d1b98557SBenjamin Herrenschmidt */ 22942fb1427SBenjamin Herrenschmidt if (!*need_post) { 23083c6620bSDave Airlie jreg = ast_get_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xa3, 0xff); 23183c6620bSDave Airlie if (jreg & 0x80) 23283c6620bSDave Airlie ast->tx_chip_type = AST_TX_SIL164; 23342fb1427SBenjamin Herrenschmidt } 234d1b98557SBenjamin Herrenschmidt 23583c6620bSDave Airlie if ((ast->chip == AST2300) || (ast->chip == AST2400)) { 236d1b98557SBenjamin Herrenschmidt /* 237d1b98557SBenjamin Herrenschmidt * On AST2300 and 2400, look the configuration set by the SoC in 238d1b98557SBenjamin Herrenschmidt * the SOC scratch register #1 bits 11:8 (interestingly marked 23942fb1427SBenjamin Herrenschmidt * as "reserved" in the spec) 240d1b98557SBenjamin Herrenschmidt */ 24183c6620bSDave Airlie jreg = ast_get_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xd1, 0xff); 24283c6620bSDave Airlie switch (jreg) { 24383c6620bSDave Airlie case 0x04: 24483c6620bSDave Airlie ast->tx_chip_type = AST_TX_SIL164; 24583c6620bSDave Airlie break; 24683c6620bSDave Airlie case 0x08: 2474bc85b82SThomas Zimmermann ast->dp501_fw_addr = drmm_kzalloc(dev, 32*1024, GFP_KERNEL); 24883c6620bSDave Airlie if (ast->dp501_fw_addr) { 24983c6620bSDave Airlie /* backup firmware */ 25083c6620bSDave Airlie if (ast_backup_fw(dev, ast->dp501_fw_addr, 32*1024)) { 2514bc85b82SThomas Zimmermann drmm_kfree(dev, ast->dp501_fw_addr); 25283c6620bSDave Airlie ast->dp501_fw_addr = NULL; 25383c6620bSDave Airlie } 25483c6620bSDave Airlie } 255df561f66SGustavo A. R. Silva fallthrough; 25683c6620bSDave Airlie case 0x0c: 25783c6620bSDave Airlie ast->tx_chip_type = AST_TX_DP501; 25883c6620bSDave Airlie } 25983c6620bSDave Airlie } 26083c6620bSDave Airlie 261d1b98557SBenjamin Herrenschmidt /* Print stuff for diagnostic purposes */ 262d1b98557SBenjamin Herrenschmidt switch(ast->tx_chip_type) { 263d1b98557SBenjamin Herrenschmidt case AST_TX_SIL164: 2641a19b4cbSThomas Zimmermann drm_info(dev, "Using Sil164 TMDS transmitter\n"); 265d1b98557SBenjamin Herrenschmidt break; 266d1b98557SBenjamin Herrenschmidt case AST_TX_DP501: 2671a19b4cbSThomas Zimmermann drm_info(dev, "Using DP501 DisplayPort transmitter\n"); 268d1b98557SBenjamin Herrenschmidt break; 269d1b98557SBenjamin Herrenschmidt default: 2701a19b4cbSThomas Zimmermann drm_info(dev, "Analog VGA only\n"); 271d1b98557SBenjamin Herrenschmidt } 272312fec14SDave Airlie return 0; 273312fec14SDave Airlie } 274312fec14SDave Airlie 275312fec14SDave Airlie static int ast_get_dram_info(struct drm_device *dev) 276312fec14SDave Airlie { 27746fb883cSThomas Zimmermann struct device_node *np = dev->dev->of_node; 278fa7dbd76SThomas Zimmermann struct ast_private *ast = to_ast_private(dev); 27971f677a9SRussell Currey uint32_t mcr_cfg, mcr_scu_mpll, mcr_scu_strap; 28071f677a9SRussell Currey uint32_t denum, num, div, ref_pll, dsel; 281312fec14SDave Airlie 28271f677a9SRussell Currey switch (ast->config_mode) { 28371f677a9SRussell Currey case ast_use_dt: 28471f677a9SRussell Currey /* 28571f677a9SRussell Currey * If some properties are missing, use reasonable 28671f677a9SRussell Currey * defaults for AST2400 28771f677a9SRussell Currey */ 28871f677a9SRussell Currey if (of_property_read_u32(np, "aspeed,mcr-configuration", 28971f677a9SRussell Currey &mcr_cfg)) 29071f677a9SRussell Currey mcr_cfg = 0x00000577; 29171f677a9SRussell Currey if (of_property_read_u32(np, "aspeed,mcr-scu-mpll", 29271f677a9SRussell Currey &mcr_scu_mpll)) 29371f677a9SRussell Currey mcr_scu_mpll = 0x000050C0; 29471f677a9SRussell Currey if (of_property_read_u32(np, "aspeed,mcr-scu-strap", 29571f677a9SRussell Currey &mcr_scu_strap)) 29671f677a9SRussell Currey mcr_scu_strap = 0; 29771f677a9SRussell Currey break; 29871f677a9SRussell Currey case ast_use_p2a: 29971f677a9SRussell Currey ast_write32(ast, 0xf004, 0x1e6e0000); 30071f677a9SRussell Currey ast_write32(ast, 0xf000, 0x1); 30171f677a9SRussell Currey mcr_cfg = ast_read32(ast, 0x10004); 30271f677a9SRussell Currey mcr_scu_mpll = ast_read32(ast, 0x10120); 30371f677a9SRussell Currey mcr_scu_strap = ast_read32(ast, 0x10170); 30471f677a9SRussell Currey break; 30571f677a9SRussell Currey case ast_use_defaults: 30671f677a9SRussell Currey default: 3076c971c09SY.C. Chen ast->dram_bus_width = 16; 3086c971c09SY.C. Chen ast->dram_type = AST_DRAM_1Gx16; 3099f93c8b3SY.C. Chen if (ast->chip == AST2500) 3109f93c8b3SY.C. Chen ast->mclk = 800; 3119f93c8b3SY.C. Chen else 3126c971c09SY.C. Chen ast->mclk = 396; 31371f677a9SRussell Currey return 0; 3146c971c09SY.C. Chen } 315312fec14SDave Airlie 31671f677a9SRussell Currey if (mcr_cfg & 0x40) 317312fec14SDave Airlie ast->dram_bus_width = 16; 318312fec14SDave Airlie else 319312fec14SDave Airlie ast->dram_bus_width = 32; 320312fec14SDave Airlie 3219f93c8b3SY.C. Chen if (ast->chip == AST2500) { 3229f93c8b3SY.C. Chen switch (mcr_cfg & 0x03) { 3239f93c8b3SY.C. Chen case 0: 3249f93c8b3SY.C. Chen ast->dram_type = AST_DRAM_1Gx16; 3259f93c8b3SY.C. Chen break; 3269f93c8b3SY.C. Chen default: 3279f93c8b3SY.C. Chen case 1: 3289f93c8b3SY.C. Chen ast->dram_type = AST_DRAM_2Gx16; 3299f93c8b3SY.C. Chen break; 3309f93c8b3SY.C. Chen case 2: 3319f93c8b3SY.C. Chen ast->dram_type = AST_DRAM_4Gx16; 3329f93c8b3SY.C. Chen break; 3339f93c8b3SY.C. Chen case 3: 3349f93c8b3SY.C. Chen ast->dram_type = AST_DRAM_8Gx16; 3359f93c8b3SY.C. Chen break; 3369f93c8b3SY.C. Chen } 3379f93c8b3SY.C. Chen } else if (ast->chip == AST2300 || ast->chip == AST2400) { 33871f677a9SRussell Currey switch (mcr_cfg & 0x03) { 339312fec14SDave Airlie case 0: 340312fec14SDave Airlie ast->dram_type = AST_DRAM_512Mx16; 341312fec14SDave Airlie break; 342312fec14SDave Airlie default: 343312fec14SDave Airlie case 1: 344312fec14SDave Airlie ast->dram_type = AST_DRAM_1Gx16; 345312fec14SDave Airlie break; 346312fec14SDave Airlie case 2: 347312fec14SDave Airlie ast->dram_type = AST_DRAM_2Gx16; 348312fec14SDave Airlie break; 349312fec14SDave Airlie case 3: 350312fec14SDave Airlie ast->dram_type = AST_DRAM_4Gx16; 351312fec14SDave Airlie break; 352312fec14SDave Airlie } 353312fec14SDave Airlie } else { 35471f677a9SRussell Currey switch (mcr_cfg & 0x0c) { 355312fec14SDave Airlie case 0: 356312fec14SDave Airlie case 4: 357312fec14SDave Airlie ast->dram_type = AST_DRAM_512Mx16; 358312fec14SDave Airlie break; 359312fec14SDave Airlie case 8: 36071f677a9SRussell Currey if (mcr_cfg & 0x40) 361312fec14SDave Airlie ast->dram_type = AST_DRAM_1Gx16; 362312fec14SDave Airlie else 363312fec14SDave Airlie ast->dram_type = AST_DRAM_512Mx32; 364312fec14SDave Airlie break; 365312fec14SDave Airlie case 0xc: 366312fec14SDave Airlie ast->dram_type = AST_DRAM_1Gx32; 367312fec14SDave Airlie break; 368312fec14SDave Airlie } 369312fec14SDave Airlie } 370312fec14SDave Airlie 37171f677a9SRussell Currey if (mcr_scu_strap & 0x2000) 372312fec14SDave Airlie ref_pll = 14318; 373312fec14SDave Airlie else 374312fec14SDave Airlie ref_pll = 12000; 375312fec14SDave Airlie 37671f677a9SRussell Currey denum = mcr_scu_mpll & 0x1f; 37771f677a9SRussell Currey num = (mcr_scu_mpll & 0x3fe0) >> 5; 37871f677a9SRussell Currey dsel = (mcr_scu_mpll & 0xc000) >> 14; 37971f677a9SRussell Currey switch (dsel) { 380312fec14SDave Airlie case 3: 381312fec14SDave Airlie div = 0x4; 382312fec14SDave Airlie break; 383312fec14SDave Airlie case 2: 384312fec14SDave Airlie case 1: 385312fec14SDave Airlie div = 0x2; 386312fec14SDave Airlie break; 387312fec14SDave Airlie default: 388312fec14SDave Airlie div = 0x1; 389312fec14SDave Airlie break; 390312fec14SDave Airlie } 3916475a7ccSBenjamin Herrenschmidt ast->mclk = ref_pll * (num + 2) / ((denum + 2) * (div * 1000)); 392312fec14SDave Airlie return 0; 393312fec14SDave Airlie } 394312fec14SDave Airlie 395cff0adcaSThomas Zimmermann /* 396cff0adcaSThomas Zimmermann * Run this function as part of the HW device cleanup; not 397cff0adcaSThomas Zimmermann * when the DRM device gets released. 398cff0adcaSThomas Zimmermann */ 399cff0adcaSThomas Zimmermann static void ast_device_release(void *data) 400cff0adcaSThomas Zimmermann { 401cff0adcaSThomas Zimmermann struct ast_private *ast = data; 402cff0adcaSThomas Zimmermann 403cff0adcaSThomas Zimmermann /* enable standard VGA decode */ 404cff0adcaSThomas Zimmermann ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xa1, 0x04); 405cff0adcaSThomas Zimmermann } 406cff0adcaSThomas Zimmermann 40770a59dd8SDaniel Vetter struct ast_private *ast_device_create(const struct drm_driver *drv, 408fbe01716SThomas Zimmermann struct pci_dev *pdev, 409fbe01716SThomas Zimmermann unsigned long flags) 410312fec14SDave Airlie { 411fbe01716SThomas Zimmermann struct drm_device *dev; 412312fec14SDave Airlie struct ast_private *ast; 413d1b98557SBenjamin Herrenschmidt bool need_post; 414312fec14SDave Airlie int ret = 0; 415312fec14SDave Airlie 416e0f5a738SThomas Zimmermann ast = devm_drm_dev_alloc(&pdev->dev, drv, struct ast_private, base); 417e0f5a738SThomas Zimmermann if (IS_ERR(ast)) 418e0f5a738SThomas Zimmermann return ast; 419e0f5a738SThomas Zimmermann dev = &ast->base; 420fbe01716SThomas Zimmermann 421fbe01716SThomas Zimmermann pci_set_drvdata(pdev, dev); 422fbe01716SThomas Zimmermann 4239ea172a9STakashi Iwai ast->regs = pcim_iomap(pdev, 1, 0); 424e0f5a738SThomas Zimmermann if (!ast->regs) 425e0f5a738SThomas Zimmermann return ERR_PTR(-EIO); 4260dd68309SBenjamin Herrenschmidt 4270dd68309SBenjamin Herrenschmidt /* 4280dd68309SBenjamin Herrenschmidt * If we don't have IO space at all, use MMIO now and 4290dd68309SBenjamin Herrenschmidt * assume the chip has MMIO enabled by default (rev 0x20 4300dd68309SBenjamin Herrenschmidt * and higher). 4310dd68309SBenjamin Herrenschmidt */ 43246fb883cSThomas Zimmermann if (!(pci_resource_flags(pdev, 2) & IORESOURCE_IO)) { 4331a19b4cbSThomas Zimmermann drm_info(dev, "platform has no IO space, trying MMIO\n"); 4340dd68309SBenjamin Herrenschmidt ast->ioregs = ast->regs + AST_IO_MM_OFFSET; 4350dd68309SBenjamin Herrenschmidt } 4360dd68309SBenjamin Herrenschmidt 4370dd68309SBenjamin Herrenschmidt /* "map" IO regs if the above hasn't done so already */ 4380dd68309SBenjamin Herrenschmidt if (!ast->ioregs) { 4399ea172a9STakashi Iwai ast->ioregs = pcim_iomap(pdev, 2, 0); 440e0f5a738SThomas Zimmermann if (!ast->ioregs) 441e0f5a738SThomas Zimmermann return ERR_PTR(-EIO); 4420dd68309SBenjamin Herrenschmidt } 443312fec14SDave Airlie 444d1b98557SBenjamin Herrenschmidt ast_detect_chip(dev, &need_post); 445312fec14SDave Airlie 446298360afSRussell Currey ret = ast_get_dram_info(dev); 447298360afSRussell Currey if (ret) 448e0f5a738SThomas Zimmermann return ERR_PTR(ret); 449e0f5a738SThomas Zimmermann 4500149e780SThomas Zimmermann drm_info(dev, "dram MCLK=%u Mhz type=%d bus_width=%d\n", 4510149e780SThomas Zimmermann ast->mclk, ast->dram_type, ast->dram_bus_width); 452312fec14SDave Airlie 453244d0128SThomas Zimmermann if (need_post) 454244d0128SThomas Zimmermann ast_post_gpu(dev); 455244d0128SThomas Zimmermann 456312fec14SDave Airlie ret = ast_mm_init(ast); 457312fec14SDave Airlie if (ret) 458e0f5a738SThomas Zimmermann return ERR_PTR(ret); 459312fec14SDave Airlie 460ba4e0339SKuoHsiang Chou /* map reserved buffer */ 461ba4e0339SKuoHsiang Chou ast->dp501_fw_buf = NULL; 4620ecb5182SThomas Zimmermann if (dev->vram_mm->vram_size < pci_resource_len(pdev, 0)) { 4630ecb5182SThomas Zimmermann ast->dp501_fw_buf = pci_iomap_range(pdev, 0, dev->vram_mm->vram_size, 0); 464ba4e0339SKuoHsiang Chou if (!ast->dp501_fw_buf) 465ba4e0339SKuoHsiang Chou drm_info(dev, "failed to map reserved buffer!\n"); 466ba4e0339SKuoHsiang Chou } 467ba4e0339SKuoHsiang Chou 468e6949ff3SThomas Zimmermann ret = ast_mode_config_init(ast); 4691728bf64SThomas Zimmermann if (ret) 470e0f5a738SThomas Zimmermann return ERR_PTR(ret); 471312fec14SDave Airlie 472cff0adcaSThomas Zimmermann ret = devm_add_action_or_reset(dev->dev, ast_device_release, ast); 473cff0adcaSThomas Zimmermann if (ret) 474cff0adcaSThomas Zimmermann return ERR_PTR(ret); 475312fec14SDave Airlie 476cff0adcaSThomas Zimmermann return ast; 477312fec14SDave Airlie } 478