1312fec14SDave Airlie /* 2312fec14SDave Airlie * Copyright 2012 Red Hat Inc. 3312fec14SDave Airlie * 4312fec14SDave Airlie * Permission is hereby granted, free of charge, to any person obtaining a 5312fec14SDave Airlie * copy of this software and associated documentation files (the 6312fec14SDave Airlie * "Software"), to deal in the Software without restriction, including 7312fec14SDave Airlie * without limitation the rights to use, copy, modify, merge, publish, 8312fec14SDave Airlie * distribute, sub license, and/or sell copies of the Software, and to 9312fec14SDave Airlie * permit persons to whom the Software is furnished to do so, subject to 10312fec14SDave Airlie * the following conditions: 11312fec14SDave Airlie * 12312fec14SDave Airlie * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 13312fec14SDave Airlie * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 14312fec14SDave Airlie * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL 15312fec14SDave Airlie * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, 16312fec14SDave Airlie * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR 17312fec14SDave Airlie * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE 18312fec14SDave Airlie * USE OR OTHER DEALINGS IN THE SOFTWARE. 19312fec14SDave Airlie * 20312fec14SDave Airlie * The above copyright notice and this permission notice (including the 21312fec14SDave Airlie * next paragraph) shall be included in all copies or substantial portions 22312fec14SDave Airlie * of the Software. 23312fec14SDave Airlie * 24312fec14SDave Airlie */ 25312fec14SDave Airlie /* 26312fec14SDave Airlie * Authors: Dave Airlie <airlied@redhat.com> 27312fec14SDave Airlie */ 28fbbbd160SSam Ravnborg 29fbbbd160SSam Ravnborg #include <linux/pci.h> 30312fec14SDave Airlie 314961eb60SThomas Zimmermann #include <drm/drm_atomic_helper.h> 32760285e7SDavid Howells #include <drm/drm_crtc_helper.h> 33fbe01716SThomas Zimmermann #include <drm/drm_drv.h> 34fbbbd160SSam Ravnborg #include <drm/drm_gem.h> 35fbbbd160SSam Ravnborg #include <drm/drm_gem_vram_helper.h> 364bc85b82SThomas Zimmermann #include <drm/drm_managed.h> 37fbbbd160SSam Ravnborg 38fbbbd160SSam Ravnborg #include "ast_drv.h" 39312fec14SDave Airlie 40312fec14SDave Airlie void ast_set_index_reg_mask(struct ast_private *ast, 41312fec14SDave Airlie uint32_t base, uint8_t index, 42312fec14SDave Airlie uint8_t mask, uint8_t val) 43312fec14SDave Airlie { 44312fec14SDave Airlie u8 tmp; 45312fec14SDave Airlie ast_io_write8(ast, base, index); 46312fec14SDave Airlie tmp = (ast_io_read8(ast, base + 1) & mask) | val; 47312fec14SDave Airlie ast_set_index_reg(ast, base, index, tmp); 48312fec14SDave Airlie } 49312fec14SDave Airlie 50312fec14SDave Airlie uint8_t ast_get_index_reg(struct ast_private *ast, 51312fec14SDave Airlie uint32_t base, uint8_t index) 52312fec14SDave Airlie { 53312fec14SDave Airlie uint8_t ret; 54312fec14SDave Airlie ast_io_write8(ast, base, index); 55312fec14SDave Airlie ret = ast_io_read8(ast, base + 1); 56312fec14SDave Airlie return ret; 57312fec14SDave Airlie } 58312fec14SDave Airlie 59312fec14SDave Airlie uint8_t ast_get_index_reg_mask(struct ast_private *ast, 60312fec14SDave Airlie uint32_t base, uint8_t index, uint8_t mask) 61312fec14SDave Airlie { 62312fec14SDave Airlie uint8_t ret; 63312fec14SDave Airlie ast_io_write8(ast, base, index); 64312fec14SDave Airlie ret = ast_io_read8(ast, base + 1) & mask; 65312fec14SDave Airlie return ret; 66312fec14SDave Airlie } 67312fec14SDave Airlie 6871f677a9SRussell Currey static void ast_detect_config_mode(struct drm_device *dev, u32 *scu_rev) 6971f677a9SRussell Currey { 70*46fb883cSThomas Zimmermann struct device_node *np = dev->dev->of_node; 71fa7dbd76SThomas Zimmermann struct ast_private *ast = to_ast_private(dev); 72*46fb883cSThomas Zimmermann struct pci_dev *pdev = to_pci_dev(dev->dev); 7371f677a9SRussell Currey uint32_t data, jregd0, jregd1; 7471f677a9SRussell Currey 7571f677a9SRussell Currey /* Defaults */ 7671f677a9SRussell Currey ast->config_mode = ast_use_defaults; 7771f677a9SRussell Currey *scu_rev = 0xffffffff; 7871f677a9SRussell Currey 7971f677a9SRussell Currey /* Check if we have device-tree properties */ 8071f677a9SRussell Currey if (np && !of_property_read_u32(np, "aspeed,scu-revision-id", 8171f677a9SRussell Currey scu_rev)) { 8271f677a9SRussell Currey /* We do, disable P2A access */ 8371f677a9SRussell Currey ast->config_mode = ast_use_dt; 841a19b4cbSThomas Zimmermann drm_info(dev, "Using device-tree for configuration\n"); 8571f677a9SRussell Currey return; 8671f677a9SRussell Currey } 8771f677a9SRussell Currey 8871f677a9SRussell Currey /* Not all families have a P2A bridge */ 89*46fb883cSThomas Zimmermann if (pdev->device != PCI_CHIP_AST2000) 9071f677a9SRussell Currey return; 9171f677a9SRussell Currey 9271f677a9SRussell Currey /* 9371f677a9SRussell Currey * The BMC will set SCU 0x40 D[12] to 1 if the P2 bridge 9471f677a9SRussell Currey * is disabled. We force using P2A if VGA only mode bit 9571f677a9SRussell Currey * is set D[7] 9671f677a9SRussell Currey */ 9771f677a9SRussell Currey jregd0 = ast_get_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xd0, 0xff); 9871f677a9SRussell Currey jregd1 = ast_get_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xd1, 0xff); 9971f677a9SRussell Currey if (!(jregd0 & 0x80) || !(jregd1 & 0x10)) { 10071f677a9SRussell Currey /* Double check it's actually working */ 10171f677a9SRussell Currey data = ast_read32(ast, 0xf004); 10271f677a9SRussell Currey if (data != 0xFFFFFFFF) { 10371f677a9SRussell Currey /* P2A works, grab silicon revision */ 10471f677a9SRussell Currey ast->config_mode = ast_use_p2a; 10571f677a9SRussell Currey 1061a19b4cbSThomas Zimmermann drm_info(dev, "Using P2A bridge for configuration\n"); 10771f677a9SRussell Currey 10871f677a9SRussell Currey /* Read SCU7c (silicon revision register) */ 10971f677a9SRussell Currey ast_write32(ast, 0xf004, 0x1e6e0000); 11071f677a9SRussell Currey ast_write32(ast, 0xf000, 0x1); 11171f677a9SRussell Currey *scu_rev = ast_read32(ast, 0x1207c); 11271f677a9SRussell Currey return; 11371f677a9SRussell Currey } 11471f677a9SRussell Currey } 11571f677a9SRussell Currey 11671f677a9SRussell Currey /* We have a P2A bridge but it's disabled */ 1171a19b4cbSThomas Zimmermann drm_info(dev, "P2A bridge disabled, using default configuration\n"); 11871f677a9SRussell Currey } 119312fec14SDave Airlie 120d1b98557SBenjamin Herrenschmidt static int ast_detect_chip(struct drm_device *dev, bool *need_post) 121312fec14SDave Airlie { 122fa7dbd76SThomas Zimmermann struct ast_private *ast = to_ast_private(dev); 123*46fb883cSThomas Zimmermann struct pci_dev *pdev = to_pci_dev(dev->dev); 12471f677a9SRussell Currey uint32_t jreg, scu_rev; 12571f677a9SRussell Currey 12671f677a9SRussell Currey /* 12771f677a9SRussell Currey * If VGA isn't enabled, we need to enable now or subsequent 12871f677a9SRussell Currey * access to the scratch registers will fail. We also inform 12971f677a9SRussell Currey * our caller that it needs to POST the chip 13071f677a9SRussell Currey * (Assumption: VGA not enabled -> need to POST) 13171f677a9SRussell Currey */ 13271f677a9SRussell Currey if (!ast_is_vga_enabled(dev)) { 13371f677a9SRussell Currey ast_enable_vga(dev); 1341a19b4cbSThomas Zimmermann drm_info(dev, "VGA not enabled on entry, requesting chip POST\n"); 13571f677a9SRussell Currey *need_post = true; 13671f677a9SRussell Currey } else 13771f677a9SRussell Currey *need_post = false; 13871f677a9SRussell Currey 13971f677a9SRussell Currey 14071f677a9SRussell Currey /* Enable extended register access */ 1418f372e25SY.C. Chen ast_open_key(ast); 14205b43971SY.C. Chen ast_enable_mmio(dev); 143312fec14SDave Airlie 14471f677a9SRussell Currey /* Find out whether P2A works or whether to use device-tree */ 14571f677a9SRussell Currey ast_detect_config_mode(dev, &scu_rev); 14671f677a9SRussell Currey 14771f677a9SRussell Currey /* Identify chipset */ 148*46fb883cSThomas Zimmermann if (pdev->revision >= 0x50) { 149f9bd00e0SKuoHsiang Chou ast->chip = AST2600; 150f9bd00e0SKuoHsiang Chou drm_info(dev, "AST 2600 detected\n"); 151*46fb883cSThomas Zimmermann } else if (pdev->revision >= 0x40) { 1529f93c8b3SY.C. Chen ast->chip = AST2500; 1531a19b4cbSThomas Zimmermann drm_info(dev, "AST 2500 detected\n"); 154*46fb883cSThomas Zimmermann } else if (pdev->revision >= 0x30) { 1551453bf4cSDave Airlie ast->chip = AST2400; 1561a19b4cbSThomas Zimmermann drm_info(dev, "AST 2400 detected\n"); 157*46fb883cSThomas Zimmermann } else if (pdev->revision >= 0x20) { 158312fec14SDave Airlie ast->chip = AST2300; 1591a19b4cbSThomas Zimmermann drm_info(dev, "AST 2300 detected\n"); 160*46fb883cSThomas Zimmermann } else if (pdev->revision >= 0x10) { 16171f677a9SRussell Currey switch (scu_rev & 0x0300) { 162312fec14SDave Airlie case 0x0200: 163312fec14SDave Airlie ast->chip = AST1100; 1641a19b4cbSThomas Zimmermann drm_info(dev, "AST 1100 detected\n"); 165312fec14SDave Airlie break; 166312fec14SDave Airlie case 0x0100: 167312fec14SDave Airlie ast->chip = AST2200; 1681a19b4cbSThomas Zimmermann drm_info(dev, "AST 2200 detected\n"); 169312fec14SDave Airlie break; 170312fec14SDave Airlie case 0x0000: 171312fec14SDave Airlie ast->chip = AST2150; 1721a19b4cbSThomas Zimmermann drm_info(dev, "AST 2150 detected\n"); 173312fec14SDave Airlie break; 174312fec14SDave Airlie default: 175312fec14SDave Airlie ast->chip = AST2100; 1761a19b4cbSThomas Zimmermann drm_info(dev, "AST 2100 detected\n"); 177312fec14SDave Airlie break; 178312fec14SDave Airlie } 179312fec14SDave Airlie ast->vga2_clone = false; 180312fec14SDave Airlie } else { 18183502a5dSY.C. Chen ast->chip = AST2000; 1821a19b4cbSThomas Zimmermann drm_info(dev, "AST 2000 detected\n"); 183312fec14SDave Airlie } 184f1f62f2cSDave Airlie 185d1b98557SBenjamin Herrenschmidt /* Check if we support wide screen */ 186f1f62f2cSDave Airlie switch (ast->chip) { 187f1f62f2cSDave Airlie case AST2000: 188f1f62f2cSDave Airlie ast->support_wide_screen = false; 189f1f62f2cSDave Airlie break; 190f1f62f2cSDave Airlie default: 191f1f62f2cSDave Airlie jreg = ast_get_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xd0, 0xff); 192f1f62f2cSDave Airlie if (!(jreg & 0x80)) 193f1f62f2cSDave Airlie ast->support_wide_screen = true; 194f1f62f2cSDave Airlie else if (jreg & 0x01) 195f1f62f2cSDave Airlie ast->support_wide_screen = true; 196f1f62f2cSDave Airlie else { 197f1f62f2cSDave Airlie ast->support_wide_screen = false; 19871f677a9SRussell Currey if (ast->chip == AST2300 && 19971f677a9SRussell Currey (scu_rev & 0x300) == 0x0) /* ast1300 */ 200f1f62f2cSDave Airlie ast->support_wide_screen = true; 20171f677a9SRussell Currey if (ast->chip == AST2400 && 20271f677a9SRussell Currey (scu_rev & 0x300) == 0x100) /* ast1400 */ 2031453bf4cSDave Airlie ast->support_wide_screen = true; 2049f93c8b3SY.C. Chen if (ast->chip == AST2500 && 2059f93c8b3SY.C. Chen scu_rev == 0x100) /* ast2510 */ 2069f93c8b3SY.C. Chen ast->support_wide_screen = true; 207f1f62f2cSDave Airlie } 208f1f62f2cSDave Airlie break; 209f1f62f2cSDave Airlie } 210f1f62f2cSDave Airlie 211d1b98557SBenjamin Herrenschmidt /* Check 3rd Tx option (digital output afaik) */ 21283c6620bSDave Airlie ast->tx_chip_type = AST_TX_NONE; 213d1b98557SBenjamin Herrenschmidt 214d1b98557SBenjamin Herrenschmidt /* 215d1b98557SBenjamin Herrenschmidt * VGACRA3 Enhanced Color Mode Register, check if DVO is already 216d1b98557SBenjamin Herrenschmidt * enabled, in that case, assume we have a SIL164 TMDS transmitter 21742fb1427SBenjamin Herrenschmidt * 21842fb1427SBenjamin Herrenschmidt * Don't make that assumption if we the chip wasn't enabled and 21942fb1427SBenjamin Herrenschmidt * is at power-on reset, otherwise we'll incorrectly "detect" a 22042fb1427SBenjamin Herrenschmidt * SIL164 when there is none. 221d1b98557SBenjamin Herrenschmidt */ 22242fb1427SBenjamin Herrenschmidt if (!*need_post) { 22383c6620bSDave Airlie jreg = ast_get_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xa3, 0xff); 22483c6620bSDave Airlie if (jreg & 0x80) 22583c6620bSDave Airlie ast->tx_chip_type = AST_TX_SIL164; 22642fb1427SBenjamin Herrenschmidt } 227d1b98557SBenjamin Herrenschmidt 22883c6620bSDave Airlie if ((ast->chip == AST2300) || (ast->chip == AST2400)) { 229d1b98557SBenjamin Herrenschmidt /* 230d1b98557SBenjamin Herrenschmidt * On AST2300 and 2400, look the configuration set by the SoC in 231d1b98557SBenjamin Herrenschmidt * the SOC scratch register #1 bits 11:8 (interestingly marked 23242fb1427SBenjamin Herrenschmidt * as "reserved" in the spec) 233d1b98557SBenjamin Herrenschmidt */ 23483c6620bSDave Airlie jreg = ast_get_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xd1, 0xff); 23583c6620bSDave Airlie switch (jreg) { 23683c6620bSDave Airlie case 0x04: 23783c6620bSDave Airlie ast->tx_chip_type = AST_TX_SIL164; 23883c6620bSDave Airlie break; 23983c6620bSDave Airlie case 0x08: 2404bc85b82SThomas Zimmermann ast->dp501_fw_addr = drmm_kzalloc(dev, 32*1024, GFP_KERNEL); 24183c6620bSDave Airlie if (ast->dp501_fw_addr) { 24283c6620bSDave Airlie /* backup firmware */ 24383c6620bSDave Airlie if (ast_backup_fw(dev, ast->dp501_fw_addr, 32*1024)) { 2444bc85b82SThomas Zimmermann drmm_kfree(dev, ast->dp501_fw_addr); 24583c6620bSDave Airlie ast->dp501_fw_addr = NULL; 24683c6620bSDave Airlie } 24783c6620bSDave Airlie } 248df561f66SGustavo A. R. Silva fallthrough; 24983c6620bSDave Airlie case 0x0c: 25083c6620bSDave Airlie ast->tx_chip_type = AST_TX_DP501; 25183c6620bSDave Airlie } 25283c6620bSDave Airlie } 25383c6620bSDave Airlie 254d1b98557SBenjamin Herrenschmidt /* Print stuff for diagnostic purposes */ 255d1b98557SBenjamin Herrenschmidt switch(ast->tx_chip_type) { 256d1b98557SBenjamin Herrenschmidt case AST_TX_SIL164: 2571a19b4cbSThomas Zimmermann drm_info(dev, "Using Sil164 TMDS transmitter\n"); 258d1b98557SBenjamin Herrenschmidt break; 259d1b98557SBenjamin Herrenschmidt case AST_TX_DP501: 2601a19b4cbSThomas Zimmermann drm_info(dev, "Using DP501 DisplayPort transmitter\n"); 261d1b98557SBenjamin Herrenschmidt break; 262d1b98557SBenjamin Herrenschmidt default: 2631a19b4cbSThomas Zimmermann drm_info(dev, "Analog VGA only\n"); 264d1b98557SBenjamin Herrenschmidt } 265312fec14SDave Airlie return 0; 266312fec14SDave Airlie } 267312fec14SDave Airlie 268312fec14SDave Airlie static int ast_get_dram_info(struct drm_device *dev) 269312fec14SDave Airlie { 270*46fb883cSThomas Zimmermann struct device_node *np = dev->dev->of_node; 271fa7dbd76SThomas Zimmermann struct ast_private *ast = to_ast_private(dev); 27271f677a9SRussell Currey uint32_t mcr_cfg, mcr_scu_mpll, mcr_scu_strap; 27371f677a9SRussell Currey uint32_t denum, num, div, ref_pll, dsel; 274312fec14SDave Airlie 27571f677a9SRussell Currey switch (ast->config_mode) { 27671f677a9SRussell Currey case ast_use_dt: 27771f677a9SRussell Currey /* 27871f677a9SRussell Currey * If some properties are missing, use reasonable 27971f677a9SRussell Currey * defaults for AST2400 28071f677a9SRussell Currey */ 28171f677a9SRussell Currey if (of_property_read_u32(np, "aspeed,mcr-configuration", 28271f677a9SRussell Currey &mcr_cfg)) 28371f677a9SRussell Currey mcr_cfg = 0x00000577; 28471f677a9SRussell Currey if (of_property_read_u32(np, "aspeed,mcr-scu-mpll", 28571f677a9SRussell Currey &mcr_scu_mpll)) 28671f677a9SRussell Currey mcr_scu_mpll = 0x000050C0; 28771f677a9SRussell Currey if (of_property_read_u32(np, "aspeed,mcr-scu-strap", 28871f677a9SRussell Currey &mcr_scu_strap)) 28971f677a9SRussell Currey mcr_scu_strap = 0; 29071f677a9SRussell Currey break; 29171f677a9SRussell Currey case ast_use_p2a: 29271f677a9SRussell Currey ast_write32(ast, 0xf004, 0x1e6e0000); 29371f677a9SRussell Currey ast_write32(ast, 0xf000, 0x1); 29471f677a9SRussell Currey mcr_cfg = ast_read32(ast, 0x10004); 29571f677a9SRussell Currey mcr_scu_mpll = ast_read32(ast, 0x10120); 29671f677a9SRussell Currey mcr_scu_strap = ast_read32(ast, 0x10170); 29771f677a9SRussell Currey break; 29871f677a9SRussell Currey case ast_use_defaults: 29971f677a9SRussell Currey default: 3006c971c09SY.C. Chen ast->dram_bus_width = 16; 3016c971c09SY.C. Chen ast->dram_type = AST_DRAM_1Gx16; 3029f93c8b3SY.C. Chen if (ast->chip == AST2500) 3039f93c8b3SY.C. Chen ast->mclk = 800; 3049f93c8b3SY.C. Chen else 3056c971c09SY.C. Chen ast->mclk = 396; 30671f677a9SRussell Currey return 0; 3076c971c09SY.C. Chen } 308312fec14SDave Airlie 30971f677a9SRussell Currey if (mcr_cfg & 0x40) 310312fec14SDave Airlie ast->dram_bus_width = 16; 311312fec14SDave Airlie else 312312fec14SDave Airlie ast->dram_bus_width = 32; 313312fec14SDave Airlie 3149f93c8b3SY.C. Chen if (ast->chip == AST2500) { 3159f93c8b3SY.C. Chen switch (mcr_cfg & 0x03) { 3169f93c8b3SY.C. Chen case 0: 3179f93c8b3SY.C. Chen ast->dram_type = AST_DRAM_1Gx16; 3189f93c8b3SY.C. Chen break; 3199f93c8b3SY.C. Chen default: 3209f93c8b3SY.C. Chen case 1: 3219f93c8b3SY.C. Chen ast->dram_type = AST_DRAM_2Gx16; 3229f93c8b3SY.C. Chen break; 3239f93c8b3SY.C. Chen case 2: 3249f93c8b3SY.C. Chen ast->dram_type = AST_DRAM_4Gx16; 3259f93c8b3SY.C. Chen break; 3269f93c8b3SY.C. Chen case 3: 3279f93c8b3SY.C. Chen ast->dram_type = AST_DRAM_8Gx16; 3289f93c8b3SY.C. Chen break; 3299f93c8b3SY.C. Chen } 3309f93c8b3SY.C. Chen } else if (ast->chip == AST2300 || ast->chip == AST2400) { 33171f677a9SRussell Currey switch (mcr_cfg & 0x03) { 332312fec14SDave Airlie case 0: 333312fec14SDave Airlie ast->dram_type = AST_DRAM_512Mx16; 334312fec14SDave Airlie break; 335312fec14SDave Airlie default: 336312fec14SDave Airlie case 1: 337312fec14SDave Airlie ast->dram_type = AST_DRAM_1Gx16; 338312fec14SDave Airlie break; 339312fec14SDave Airlie case 2: 340312fec14SDave Airlie ast->dram_type = AST_DRAM_2Gx16; 341312fec14SDave Airlie break; 342312fec14SDave Airlie case 3: 343312fec14SDave Airlie ast->dram_type = AST_DRAM_4Gx16; 344312fec14SDave Airlie break; 345312fec14SDave Airlie } 346312fec14SDave Airlie } else { 34771f677a9SRussell Currey switch (mcr_cfg & 0x0c) { 348312fec14SDave Airlie case 0: 349312fec14SDave Airlie case 4: 350312fec14SDave Airlie ast->dram_type = AST_DRAM_512Mx16; 351312fec14SDave Airlie break; 352312fec14SDave Airlie case 8: 35371f677a9SRussell Currey if (mcr_cfg & 0x40) 354312fec14SDave Airlie ast->dram_type = AST_DRAM_1Gx16; 355312fec14SDave Airlie else 356312fec14SDave Airlie ast->dram_type = AST_DRAM_512Mx32; 357312fec14SDave Airlie break; 358312fec14SDave Airlie case 0xc: 359312fec14SDave Airlie ast->dram_type = AST_DRAM_1Gx32; 360312fec14SDave Airlie break; 361312fec14SDave Airlie } 362312fec14SDave Airlie } 363312fec14SDave Airlie 36471f677a9SRussell Currey if (mcr_scu_strap & 0x2000) 365312fec14SDave Airlie ref_pll = 14318; 366312fec14SDave Airlie else 367312fec14SDave Airlie ref_pll = 12000; 368312fec14SDave Airlie 36971f677a9SRussell Currey denum = mcr_scu_mpll & 0x1f; 37071f677a9SRussell Currey num = (mcr_scu_mpll & 0x3fe0) >> 5; 37171f677a9SRussell Currey dsel = (mcr_scu_mpll & 0xc000) >> 14; 37271f677a9SRussell Currey switch (dsel) { 373312fec14SDave Airlie case 3: 374312fec14SDave Airlie div = 0x4; 375312fec14SDave Airlie break; 376312fec14SDave Airlie case 2: 377312fec14SDave Airlie case 1: 378312fec14SDave Airlie div = 0x2; 379312fec14SDave Airlie break; 380312fec14SDave Airlie default: 381312fec14SDave Airlie div = 0x1; 382312fec14SDave Airlie break; 383312fec14SDave Airlie } 3846475a7ccSBenjamin Herrenschmidt ast->mclk = ref_pll * (num + 2) / ((denum + 2) * (div * 1000)); 385312fec14SDave Airlie return 0; 386312fec14SDave Airlie } 387312fec14SDave Airlie 388cff0adcaSThomas Zimmermann /* 389cff0adcaSThomas Zimmermann * Run this function as part of the HW device cleanup; not 390cff0adcaSThomas Zimmermann * when the DRM device gets released. 391cff0adcaSThomas Zimmermann */ 392cff0adcaSThomas Zimmermann static void ast_device_release(void *data) 393cff0adcaSThomas Zimmermann { 394cff0adcaSThomas Zimmermann struct ast_private *ast = data; 395cff0adcaSThomas Zimmermann 396cff0adcaSThomas Zimmermann /* enable standard VGA decode */ 397cff0adcaSThomas Zimmermann ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xa1, 0x04); 398cff0adcaSThomas Zimmermann } 399cff0adcaSThomas Zimmermann 40070a59dd8SDaniel Vetter struct ast_private *ast_device_create(const struct drm_driver *drv, 401fbe01716SThomas Zimmermann struct pci_dev *pdev, 402fbe01716SThomas Zimmermann unsigned long flags) 403312fec14SDave Airlie { 404fbe01716SThomas Zimmermann struct drm_device *dev; 405312fec14SDave Airlie struct ast_private *ast; 406d1b98557SBenjamin Herrenschmidt bool need_post; 407312fec14SDave Airlie int ret = 0; 408312fec14SDave Airlie 409e0f5a738SThomas Zimmermann ast = devm_drm_dev_alloc(&pdev->dev, drv, struct ast_private, base); 410e0f5a738SThomas Zimmermann if (IS_ERR(ast)) 411e0f5a738SThomas Zimmermann return ast; 412e0f5a738SThomas Zimmermann dev = &ast->base; 413fbe01716SThomas Zimmermann 414fbe01716SThomas Zimmermann pci_set_drvdata(pdev, dev); 415fbe01716SThomas Zimmermann 416*46fb883cSThomas Zimmermann ast->regs = pci_iomap(pdev, 1, 0); 417e0f5a738SThomas Zimmermann if (!ast->regs) 418e0f5a738SThomas Zimmermann return ERR_PTR(-EIO); 4190dd68309SBenjamin Herrenschmidt 4200dd68309SBenjamin Herrenschmidt /* 4210dd68309SBenjamin Herrenschmidt * If we don't have IO space at all, use MMIO now and 4220dd68309SBenjamin Herrenschmidt * assume the chip has MMIO enabled by default (rev 0x20 4230dd68309SBenjamin Herrenschmidt * and higher). 4240dd68309SBenjamin Herrenschmidt */ 425*46fb883cSThomas Zimmermann if (!(pci_resource_flags(pdev, 2) & IORESOURCE_IO)) { 4261a19b4cbSThomas Zimmermann drm_info(dev, "platform has no IO space, trying MMIO\n"); 4270dd68309SBenjamin Herrenschmidt ast->ioregs = ast->regs + AST_IO_MM_OFFSET; 4280dd68309SBenjamin Herrenschmidt } 4290dd68309SBenjamin Herrenschmidt 4300dd68309SBenjamin Herrenschmidt /* "map" IO regs if the above hasn't done so already */ 4310dd68309SBenjamin Herrenschmidt if (!ast->ioregs) { 432*46fb883cSThomas Zimmermann ast->ioregs = pci_iomap(pdev, 2, 0); 433e0f5a738SThomas Zimmermann if (!ast->ioregs) 434e0f5a738SThomas Zimmermann return ERR_PTR(-EIO); 4350dd68309SBenjamin Herrenschmidt } 436312fec14SDave Airlie 437d1b98557SBenjamin Herrenschmidt ast_detect_chip(dev, &need_post); 438312fec14SDave Airlie 439298360afSRussell Currey ret = ast_get_dram_info(dev); 440298360afSRussell Currey if (ret) 441e0f5a738SThomas Zimmermann return ERR_PTR(ret); 442e0f5a738SThomas Zimmermann 4430149e780SThomas Zimmermann drm_info(dev, "dram MCLK=%u Mhz type=%d bus_width=%d\n", 4440149e780SThomas Zimmermann ast->mclk, ast->dram_type, ast->dram_bus_width); 445312fec14SDave Airlie 446244d0128SThomas Zimmermann if (need_post) 447244d0128SThomas Zimmermann ast_post_gpu(dev); 448244d0128SThomas Zimmermann 449312fec14SDave Airlie ret = ast_mm_init(ast); 450312fec14SDave Airlie if (ret) 451e0f5a738SThomas Zimmermann return ERR_PTR(ret); 452312fec14SDave Airlie 453e6949ff3SThomas Zimmermann ret = ast_mode_config_init(ast); 4541728bf64SThomas Zimmermann if (ret) 455e0f5a738SThomas Zimmermann return ERR_PTR(ret); 456312fec14SDave Airlie 457cff0adcaSThomas Zimmermann ret = devm_add_action_or_reset(dev->dev, ast_device_release, ast); 458cff0adcaSThomas Zimmermann if (ret) 459cff0adcaSThomas Zimmermann return ERR_PTR(ret); 460312fec14SDave Airlie 461cff0adcaSThomas Zimmermann return ast; 462312fec14SDave Airlie } 463