1312fec14SDave Airlie /* 2312fec14SDave Airlie * Copyright 2012 Red Hat Inc. 3312fec14SDave Airlie * 4312fec14SDave Airlie * Permission is hereby granted, free of charge, to any person obtaining a 5312fec14SDave Airlie * copy of this software and associated documentation files (the 6312fec14SDave Airlie * "Software"), to deal in the Software without restriction, including 7312fec14SDave Airlie * without limitation the rights to use, copy, modify, merge, publish, 8312fec14SDave Airlie * distribute, sub license, and/or sell copies of the Software, and to 9312fec14SDave Airlie * permit persons to whom the Software is furnished to do so, subject to 10312fec14SDave Airlie * the following conditions: 11312fec14SDave Airlie * 12312fec14SDave Airlie * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 13312fec14SDave Airlie * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 14312fec14SDave Airlie * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL 15312fec14SDave Airlie * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, 16312fec14SDave Airlie * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR 17312fec14SDave Airlie * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE 18312fec14SDave Airlie * USE OR OTHER DEALINGS IN THE SOFTWARE. 19312fec14SDave Airlie * 20312fec14SDave Airlie * The above copyright notice and this permission notice (including the 21312fec14SDave Airlie * next paragraph) shall be included in all copies or substantial portions 22312fec14SDave Airlie * of the Software. 23312fec14SDave Airlie * 24312fec14SDave Airlie */ 25312fec14SDave Airlie /* 26312fec14SDave Airlie * Authors: Dave Airlie <airlied@redhat.com> 27312fec14SDave Airlie */ 28fbbbd160SSam Ravnborg 29fbbbd160SSam Ravnborg #include <linux/pci.h> 30312fec14SDave Airlie 314961eb60SThomas Zimmermann #include <drm/drm_atomic_helper.h> 32760285e7SDavid Howells #include <drm/drm_crtc_helper.h> 33fbbbd160SSam Ravnborg #include <drm/drm_gem.h> 345ed7191dSThomas Zimmermann #include <drm/drm_gem_framebuffer_helper.h> 35fbbbd160SSam Ravnborg #include <drm/drm_gem_vram_helper.h> 36fbbbd160SSam Ravnborg 37fbbbd160SSam Ravnborg #include "ast_drv.h" 38312fec14SDave Airlie 39312fec14SDave Airlie void ast_set_index_reg_mask(struct ast_private *ast, 40312fec14SDave Airlie uint32_t base, uint8_t index, 41312fec14SDave Airlie uint8_t mask, uint8_t val) 42312fec14SDave Airlie { 43312fec14SDave Airlie u8 tmp; 44312fec14SDave Airlie ast_io_write8(ast, base, index); 45312fec14SDave Airlie tmp = (ast_io_read8(ast, base + 1) & mask) | val; 46312fec14SDave Airlie ast_set_index_reg(ast, base, index, tmp); 47312fec14SDave Airlie } 48312fec14SDave Airlie 49312fec14SDave Airlie uint8_t ast_get_index_reg(struct ast_private *ast, 50312fec14SDave Airlie uint32_t base, uint8_t index) 51312fec14SDave Airlie { 52312fec14SDave Airlie uint8_t ret; 53312fec14SDave Airlie ast_io_write8(ast, base, index); 54312fec14SDave Airlie ret = ast_io_read8(ast, base + 1); 55312fec14SDave Airlie return ret; 56312fec14SDave Airlie } 57312fec14SDave Airlie 58312fec14SDave Airlie uint8_t ast_get_index_reg_mask(struct ast_private *ast, 59312fec14SDave Airlie uint32_t base, uint8_t index, uint8_t mask) 60312fec14SDave Airlie { 61312fec14SDave Airlie uint8_t ret; 62312fec14SDave Airlie ast_io_write8(ast, base, index); 63312fec14SDave Airlie ret = ast_io_read8(ast, base + 1) & mask; 64312fec14SDave Airlie return ret; 65312fec14SDave Airlie } 66312fec14SDave Airlie 6771f677a9SRussell Currey static void ast_detect_config_mode(struct drm_device *dev, u32 *scu_rev) 6871f677a9SRussell Currey { 6971f677a9SRussell Currey struct device_node *np = dev->pdev->dev.of_node; 70fa7dbd76SThomas Zimmermann struct ast_private *ast = to_ast_private(dev); 7171f677a9SRussell Currey uint32_t data, jregd0, jregd1; 7271f677a9SRussell Currey 7371f677a9SRussell Currey /* Defaults */ 7471f677a9SRussell Currey ast->config_mode = ast_use_defaults; 7571f677a9SRussell Currey *scu_rev = 0xffffffff; 7671f677a9SRussell Currey 7771f677a9SRussell Currey /* Check if we have device-tree properties */ 7871f677a9SRussell Currey if (np && !of_property_read_u32(np, "aspeed,scu-revision-id", 7971f677a9SRussell Currey scu_rev)) { 8071f677a9SRussell Currey /* We do, disable P2A access */ 8171f677a9SRussell Currey ast->config_mode = ast_use_dt; 821a19b4cbSThomas Zimmermann drm_info(dev, "Using device-tree for configuration\n"); 8371f677a9SRussell Currey return; 8471f677a9SRussell Currey } 8571f677a9SRussell Currey 8671f677a9SRussell Currey /* Not all families have a P2A bridge */ 8771f677a9SRussell Currey if (dev->pdev->device != PCI_CHIP_AST2000) 8871f677a9SRussell Currey return; 8971f677a9SRussell Currey 9071f677a9SRussell Currey /* 9171f677a9SRussell Currey * The BMC will set SCU 0x40 D[12] to 1 if the P2 bridge 9271f677a9SRussell Currey * is disabled. We force using P2A if VGA only mode bit 9371f677a9SRussell Currey * is set D[7] 9471f677a9SRussell Currey */ 9571f677a9SRussell Currey jregd0 = ast_get_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xd0, 0xff); 9671f677a9SRussell Currey jregd1 = ast_get_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xd1, 0xff); 9771f677a9SRussell Currey if (!(jregd0 & 0x80) || !(jregd1 & 0x10)) { 9871f677a9SRussell Currey /* Double check it's actually working */ 9971f677a9SRussell Currey data = ast_read32(ast, 0xf004); 10071f677a9SRussell Currey if (data != 0xFFFFFFFF) { 10171f677a9SRussell Currey /* P2A works, grab silicon revision */ 10271f677a9SRussell Currey ast->config_mode = ast_use_p2a; 10371f677a9SRussell Currey 1041a19b4cbSThomas Zimmermann drm_info(dev, "Using P2A bridge for configuration\n"); 10571f677a9SRussell Currey 10671f677a9SRussell Currey /* Read SCU7c (silicon revision register) */ 10771f677a9SRussell Currey ast_write32(ast, 0xf004, 0x1e6e0000); 10871f677a9SRussell Currey ast_write32(ast, 0xf000, 0x1); 10971f677a9SRussell Currey *scu_rev = ast_read32(ast, 0x1207c); 11071f677a9SRussell Currey return; 11171f677a9SRussell Currey } 11271f677a9SRussell Currey } 11371f677a9SRussell Currey 11471f677a9SRussell Currey /* We have a P2A bridge but it's disabled */ 1151a19b4cbSThomas Zimmermann drm_info(dev, "P2A bridge disabled, using default configuration\n"); 11671f677a9SRussell Currey } 117312fec14SDave Airlie 118d1b98557SBenjamin Herrenschmidt static int ast_detect_chip(struct drm_device *dev, bool *need_post) 119312fec14SDave Airlie { 120fa7dbd76SThomas Zimmermann struct ast_private *ast = to_ast_private(dev); 12171f677a9SRussell Currey uint32_t jreg, scu_rev; 12271f677a9SRussell Currey 12371f677a9SRussell Currey /* 12471f677a9SRussell Currey * If VGA isn't enabled, we need to enable now or subsequent 12571f677a9SRussell Currey * access to the scratch registers will fail. We also inform 12671f677a9SRussell Currey * our caller that it needs to POST the chip 12771f677a9SRussell Currey * (Assumption: VGA not enabled -> need to POST) 12871f677a9SRussell Currey */ 12971f677a9SRussell Currey if (!ast_is_vga_enabled(dev)) { 13071f677a9SRussell Currey ast_enable_vga(dev); 1311a19b4cbSThomas Zimmermann drm_info(dev, "VGA not enabled on entry, requesting chip POST\n"); 13271f677a9SRussell Currey *need_post = true; 13371f677a9SRussell Currey } else 13471f677a9SRussell Currey *need_post = false; 13571f677a9SRussell Currey 13671f677a9SRussell Currey 13771f677a9SRussell Currey /* Enable extended register access */ 1388f372e25SY.C. Chen ast_open_key(ast); 13905b43971SY.C. Chen ast_enable_mmio(dev); 140312fec14SDave Airlie 14171f677a9SRussell Currey /* Find out whether P2A works or whether to use device-tree */ 14271f677a9SRussell Currey ast_detect_config_mode(dev, &scu_rev); 14371f677a9SRussell Currey 14471f677a9SRussell Currey /* Identify chipset */ 1459f93c8b3SY.C. Chen if (dev->pdev->revision >= 0x40) { 1469f93c8b3SY.C. Chen ast->chip = AST2500; 1471a19b4cbSThomas Zimmermann drm_info(dev, "AST 2500 detected\n"); 1489f93c8b3SY.C. Chen } else if (dev->pdev->revision >= 0x30) { 1491453bf4cSDave Airlie ast->chip = AST2400; 1501a19b4cbSThomas Zimmermann drm_info(dev, "AST 2400 detected\n"); 1511453bf4cSDave Airlie } else if (dev->pdev->revision >= 0x20) { 152312fec14SDave Airlie ast->chip = AST2300; 1531a19b4cbSThomas Zimmermann drm_info(dev, "AST 2300 detected\n"); 154312fec14SDave Airlie } else if (dev->pdev->revision >= 0x10) { 15571f677a9SRussell Currey switch (scu_rev & 0x0300) { 156312fec14SDave Airlie case 0x0200: 157312fec14SDave Airlie ast->chip = AST1100; 1581a19b4cbSThomas Zimmermann drm_info(dev, "AST 1100 detected\n"); 159312fec14SDave Airlie break; 160312fec14SDave Airlie case 0x0100: 161312fec14SDave Airlie ast->chip = AST2200; 1621a19b4cbSThomas Zimmermann drm_info(dev, "AST 2200 detected\n"); 163312fec14SDave Airlie break; 164312fec14SDave Airlie case 0x0000: 165312fec14SDave Airlie ast->chip = AST2150; 1661a19b4cbSThomas Zimmermann drm_info(dev, "AST 2150 detected\n"); 167312fec14SDave Airlie break; 168312fec14SDave Airlie default: 169312fec14SDave Airlie ast->chip = AST2100; 1701a19b4cbSThomas Zimmermann drm_info(dev, "AST 2100 detected\n"); 171312fec14SDave Airlie break; 172312fec14SDave Airlie } 173312fec14SDave Airlie ast->vga2_clone = false; 174312fec14SDave Airlie } else { 17583502a5dSY.C. Chen ast->chip = AST2000; 1761a19b4cbSThomas Zimmermann drm_info(dev, "AST 2000 detected\n"); 177312fec14SDave Airlie } 178f1f62f2cSDave Airlie 179d1b98557SBenjamin Herrenschmidt /* Check if we support wide screen */ 180f1f62f2cSDave Airlie switch (ast->chip) { 181f1f62f2cSDave Airlie case AST2000: 182f1f62f2cSDave Airlie ast->support_wide_screen = false; 183f1f62f2cSDave Airlie break; 184f1f62f2cSDave Airlie default: 185f1f62f2cSDave Airlie jreg = ast_get_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xd0, 0xff); 186f1f62f2cSDave Airlie if (!(jreg & 0x80)) 187f1f62f2cSDave Airlie ast->support_wide_screen = true; 188f1f62f2cSDave Airlie else if (jreg & 0x01) 189f1f62f2cSDave Airlie ast->support_wide_screen = true; 190f1f62f2cSDave Airlie else { 191f1f62f2cSDave Airlie ast->support_wide_screen = false; 19271f677a9SRussell Currey if (ast->chip == AST2300 && 19371f677a9SRussell Currey (scu_rev & 0x300) == 0x0) /* ast1300 */ 194f1f62f2cSDave Airlie ast->support_wide_screen = true; 19571f677a9SRussell Currey if (ast->chip == AST2400 && 19671f677a9SRussell Currey (scu_rev & 0x300) == 0x100) /* ast1400 */ 1971453bf4cSDave Airlie ast->support_wide_screen = true; 1989f93c8b3SY.C. Chen if (ast->chip == AST2500 && 1999f93c8b3SY.C. Chen scu_rev == 0x100) /* ast2510 */ 2009f93c8b3SY.C. Chen ast->support_wide_screen = true; 201f1f62f2cSDave Airlie } 202f1f62f2cSDave Airlie break; 203f1f62f2cSDave Airlie } 204f1f62f2cSDave Airlie 205d1b98557SBenjamin Herrenschmidt /* Check 3rd Tx option (digital output afaik) */ 20683c6620bSDave Airlie ast->tx_chip_type = AST_TX_NONE; 207d1b98557SBenjamin Herrenschmidt 208d1b98557SBenjamin Herrenschmidt /* 209d1b98557SBenjamin Herrenschmidt * VGACRA3 Enhanced Color Mode Register, check if DVO is already 210d1b98557SBenjamin Herrenschmidt * enabled, in that case, assume we have a SIL164 TMDS transmitter 21142fb1427SBenjamin Herrenschmidt * 21242fb1427SBenjamin Herrenschmidt * Don't make that assumption if we the chip wasn't enabled and 21342fb1427SBenjamin Herrenschmidt * is at power-on reset, otherwise we'll incorrectly "detect" a 21442fb1427SBenjamin Herrenschmidt * SIL164 when there is none. 215d1b98557SBenjamin Herrenschmidt */ 21642fb1427SBenjamin Herrenschmidt if (!*need_post) { 21783c6620bSDave Airlie jreg = ast_get_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xa3, 0xff); 21883c6620bSDave Airlie if (jreg & 0x80) 21983c6620bSDave Airlie ast->tx_chip_type = AST_TX_SIL164; 22042fb1427SBenjamin Herrenschmidt } 221d1b98557SBenjamin Herrenschmidt 22283c6620bSDave Airlie if ((ast->chip == AST2300) || (ast->chip == AST2400)) { 223d1b98557SBenjamin Herrenschmidt /* 224d1b98557SBenjamin Herrenschmidt * On AST2300 and 2400, look the configuration set by the SoC in 225d1b98557SBenjamin Herrenschmidt * the SOC scratch register #1 bits 11:8 (interestingly marked 22642fb1427SBenjamin Herrenschmidt * as "reserved" in the spec) 227d1b98557SBenjamin Herrenschmidt */ 22883c6620bSDave Airlie jreg = ast_get_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xd1, 0xff); 22983c6620bSDave Airlie switch (jreg) { 23083c6620bSDave Airlie case 0x04: 23183c6620bSDave Airlie ast->tx_chip_type = AST_TX_SIL164; 23283c6620bSDave Airlie break; 23383c6620bSDave Airlie case 0x08: 23483c6620bSDave Airlie ast->dp501_fw_addr = kzalloc(32*1024, GFP_KERNEL); 23583c6620bSDave Airlie if (ast->dp501_fw_addr) { 23683c6620bSDave Airlie /* backup firmware */ 23783c6620bSDave Airlie if (ast_backup_fw(dev, ast->dp501_fw_addr, 32*1024)) { 23883c6620bSDave Airlie kfree(ast->dp501_fw_addr); 23983c6620bSDave Airlie ast->dp501_fw_addr = NULL; 24083c6620bSDave Airlie } 24183c6620bSDave Airlie } 24283c6620bSDave Airlie /* fallthrough */ 24383c6620bSDave Airlie case 0x0c: 24483c6620bSDave Airlie ast->tx_chip_type = AST_TX_DP501; 24583c6620bSDave Airlie } 24683c6620bSDave Airlie } 24783c6620bSDave Airlie 248d1b98557SBenjamin Herrenschmidt /* Print stuff for diagnostic purposes */ 249d1b98557SBenjamin Herrenschmidt switch(ast->tx_chip_type) { 250d1b98557SBenjamin Herrenschmidt case AST_TX_SIL164: 2511a19b4cbSThomas Zimmermann drm_info(dev, "Using Sil164 TMDS transmitter\n"); 252d1b98557SBenjamin Herrenschmidt break; 253d1b98557SBenjamin Herrenschmidt case AST_TX_DP501: 2541a19b4cbSThomas Zimmermann drm_info(dev, "Using DP501 DisplayPort transmitter\n"); 255d1b98557SBenjamin Herrenschmidt break; 256d1b98557SBenjamin Herrenschmidt default: 2571a19b4cbSThomas Zimmermann drm_info(dev, "Analog VGA only\n"); 258d1b98557SBenjamin Herrenschmidt } 259312fec14SDave Airlie return 0; 260312fec14SDave Airlie } 261312fec14SDave Airlie 262312fec14SDave Airlie static int ast_get_dram_info(struct drm_device *dev) 263312fec14SDave Airlie { 26471f677a9SRussell Currey struct device_node *np = dev->pdev->dev.of_node; 265fa7dbd76SThomas Zimmermann struct ast_private *ast = to_ast_private(dev); 26671f677a9SRussell Currey uint32_t mcr_cfg, mcr_scu_mpll, mcr_scu_strap; 26771f677a9SRussell Currey uint32_t denum, num, div, ref_pll, dsel; 268312fec14SDave Airlie 26971f677a9SRussell Currey switch (ast->config_mode) { 27071f677a9SRussell Currey case ast_use_dt: 27171f677a9SRussell Currey /* 27271f677a9SRussell Currey * If some properties are missing, use reasonable 27371f677a9SRussell Currey * defaults for AST2400 27471f677a9SRussell Currey */ 27571f677a9SRussell Currey if (of_property_read_u32(np, "aspeed,mcr-configuration", 27671f677a9SRussell Currey &mcr_cfg)) 27771f677a9SRussell Currey mcr_cfg = 0x00000577; 27871f677a9SRussell Currey if (of_property_read_u32(np, "aspeed,mcr-scu-mpll", 27971f677a9SRussell Currey &mcr_scu_mpll)) 28071f677a9SRussell Currey mcr_scu_mpll = 0x000050C0; 28171f677a9SRussell Currey if (of_property_read_u32(np, "aspeed,mcr-scu-strap", 28271f677a9SRussell Currey &mcr_scu_strap)) 28371f677a9SRussell Currey mcr_scu_strap = 0; 28471f677a9SRussell Currey break; 28571f677a9SRussell Currey case ast_use_p2a: 28671f677a9SRussell Currey ast_write32(ast, 0xf004, 0x1e6e0000); 28771f677a9SRussell Currey ast_write32(ast, 0xf000, 0x1); 28871f677a9SRussell Currey mcr_cfg = ast_read32(ast, 0x10004); 28971f677a9SRussell Currey mcr_scu_mpll = ast_read32(ast, 0x10120); 29071f677a9SRussell Currey mcr_scu_strap = ast_read32(ast, 0x10170); 29171f677a9SRussell Currey break; 29271f677a9SRussell Currey case ast_use_defaults: 29371f677a9SRussell Currey default: 2946c971c09SY.C. Chen ast->dram_bus_width = 16; 2956c971c09SY.C. Chen ast->dram_type = AST_DRAM_1Gx16; 2969f93c8b3SY.C. Chen if (ast->chip == AST2500) 2979f93c8b3SY.C. Chen ast->mclk = 800; 2989f93c8b3SY.C. Chen else 2996c971c09SY.C. Chen ast->mclk = 396; 30071f677a9SRussell Currey return 0; 3016c971c09SY.C. Chen } 302312fec14SDave Airlie 30371f677a9SRussell Currey if (mcr_cfg & 0x40) 304312fec14SDave Airlie ast->dram_bus_width = 16; 305312fec14SDave Airlie else 306312fec14SDave Airlie ast->dram_bus_width = 32; 307312fec14SDave Airlie 3089f93c8b3SY.C. Chen if (ast->chip == AST2500) { 3099f93c8b3SY.C. Chen switch (mcr_cfg & 0x03) { 3109f93c8b3SY.C. Chen case 0: 3119f93c8b3SY.C. Chen ast->dram_type = AST_DRAM_1Gx16; 3129f93c8b3SY.C. Chen break; 3139f93c8b3SY.C. Chen default: 3149f93c8b3SY.C. Chen case 1: 3159f93c8b3SY.C. Chen ast->dram_type = AST_DRAM_2Gx16; 3169f93c8b3SY.C. Chen break; 3179f93c8b3SY.C. Chen case 2: 3189f93c8b3SY.C. Chen ast->dram_type = AST_DRAM_4Gx16; 3199f93c8b3SY.C. Chen break; 3209f93c8b3SY.C. Chen case 3: 3219f93c8b3SY.C. Chen ast->dram_type = AST_DRAM_8Gx16; 3229f93c8b3SY.C. Chen break; 3239f93c8b3SY.C. Chen } 3249f93c8b3SY.C. Chen } else if (ast->chip == AST2300 || ast->chip == AST2400) { 32571f677a9SRussell Currey switch (mcr_cfg & 0x03) { 326312fec14SDave Airlie case 0: 327312fec14SDave Airlie ast->dram_type = AST_DRAM_512Mx16; 328312fec14SDave Airlie break; 329312fec14SDave Airlie default: 330312fec14SDave Airlie case 1: 331312fec14SDave Airlie ast->dram_type = AST_DRAM_1Gx16; 332312fec14SDave Airlie break; 333312fec14SDave Airlie case 2: 334312fec14SDave Airlie ast->dram_type = AST_DRAM_2Gx16; 335312fec14SDave Airlie break; 336312fec14SDave Airlie case 3: 337312fec14SDave Airlie ast->dram_type = AST_DRAM_4Gx16; 338312fec14SDave Airlie break; 339312fec14SDave Airlie } 340312fec14SDave Airlie } else { 34171f677a9SRussell Currey switch (mcr_cfg & 0x0c) { 342312fec14SDave Airlie case 0: 343312fec14SDave Airlie case 4: 344312fec14SDave Airlie ast->dram_type = AST_DRAM_512Mx16; 345312fec14SDave Airlie break; 346312fec14SDave Airlie case 8: 34771f677a9SRussell Currey if (mcr_cfg & 0x40) 348312fec14SDave Airlie ast->dram_type = AST_DRAM_1Gx16; 349312fec14SDave Airlie else 350312fec14SDave Airlie ast->dram_type = AST_DRAM_512Mx32; 351312fec14SDave Airlie break; 352312fec14SDave Airlie case 0xc: 353312fec14SDave Airlie ast->dram_type = AST_DRAM_1Gx32; 354312fec14SDave Airlie break; 355312fec14SDave Airlie } 356312fec14SDave Airlie } 357312fec14SDave Airlie 35871f677a9SRussell Currey if (mcr_scu_strap & 0x2000) 359312fec14SDave Airlie ref_pll = 14318; 360312fec14SDave Airlie else 361312fec14SDave Airlie ref_pll = 12000; 362312fec14SDave Airlie 36371f677a9SRussell Currey denum = mcr_scu_mpll & 0x1f; 36471f677a9SRussell Currey num = (mcr_scu_mpll & 0x3fe0) >> 5; 36571f677a9SRussell Currey dsel = (mcr_scu_mpll & 0xc000) >> 14; 36671f677a9SRussell Currey switch (dsel) { 367312fec14SDave Airlie case 3: 368312fec14SDave Airlie div = 0x4; 369312fec14SDave Airlie break; 370312fec14SDave Airlie case 2: 371312fec14SDave Airlie case 1: 372312fec14SDave Airlie div = 0x2; 373312fec14SDave Airlie break; 374312fec14SDave Airlie default: 375312fec14SDave Airlie div = 0x1; 376312fec14SDave Airlie break; 377312fec14SDave Airlie } 3786475a7ccSBenjamin Herrenschmidt ast->mclk = ref_pll * (num + 2) / ((denum + 2) * (div * 1000)); 379312fec14SDave Airlie return 0; 380312fec14SDave Airlie } 381312fec14SDave Airlie 382312fec14SDave Airlie static const struct drm_mode_config_funcs ast_mode_funcs = { 3839253f830SThomas Zimmermann .fb_create = drm_gem_fb_create, 38480f7c3f7SThomas Zimmermann .mode_valid = drm_vram_helper_mode_valid, 3854961eb60SThomas Zimmermann .atomic_check = drm_atomic_helper_check, 3864961eb60SThomas Zimmermann .atomic_commit = drm_atomic_helper_commit, 387312fec14SDave Airlie }; 388312fec14SDave Airlie 389312fec14SDave Airlie static u32 ast_get_vram_info(struct drm_device *dev) 390312fec14SDave Airlie { 391fa7dbd76SThomas Zimmermann struct ast_private *ast = to_ast_private(dev); 392312fec14SDave Airlie u8 jreg; 39383c6620bSDave Airlie u32 vram_size; 394312fec14SDave Airlie ast_open_key(ast); 395312fec14SDave Airlie 39683c6620bSDave Airlie vram_size = AST_VIDMEM_DEFAULT_SIZE; 397312fec14SDave Airlie jreg = ast_get_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xaa, 0xff); 398312fec14SDave Airlie switch (jreg & 3) { 39983c6620bSDave Airlie case 0: vram_size = AST_VIDMEM_SIZE_8M; break; 40083c6620bSDave Airlie case 1: vram_size = AST_VIDMEM_SIZE_16M; break; 40183c6620bSDave Airlie case 2: vram_size = AST_VIDMEM_SIZE_32M; break; 40283c6620bSDave Airlie case 3: vram_size = AST_VIDMEM_SIZE_64M; break; 403312fec14SDave Airlie } 40483c6620bSDave Airlie 40583c6620bSDave Airlie jreg = ast_get_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x99, 0xff); 40683c6620bSDave Airlie switch (jreg & 0x03) { 40783c6620bSDave Airlie case 1: 40883c6620bSDave Airlie vram_size -= 0x100000; 40983c6620bSDave Airlie break; 41083c6620bSDave Airlie case 2: 41183c6620bSDave Airlie vram_size -= 0x200000; 41283c6620bSDave Airlie break; 41383c6620bSDave Airlie case 3: 41483c6620bSDave Airlie vram_size -= 0x400000; 41583c6620bSDave Airlie break; 41683c6620bSDave Airlie } 41783c6620bSDave Airlie 41883c6620bSDave Airlie return vram_size; 419312fec14SDave Airlie } 420312fec14SDave Airlie 421312fec14SDave Airlie int ast_driver_load(struct drm_device *dev, unsigned long flags) 422312fec14SDave Airlie { 423312fec14SDave Airlie struct ast_private *ast; 424d1b98557SBenjamin Herrenschmidt bool need_post; 425312fec14SDave Airlie int ret = 0; 426312fec14SDave Airlie 427312fec14SDave Airlie ast = kzalloc(sizeof(struct ast_private), GFP_KERNEL); 428312fec14SDave Airlie if (!ast) 429312fec14SDave Airlie return -ENOMEM; 430312fec14SDave Airlie 431312fec14SDave Airlie dev->dev_private = ast; 432312fec14SDave Airlie ast->dev = dev; 433312fec14SDave Airlie 434312fec14SDave Airlie ast->regs = pci_iomap(dev->pdev, 1, 0); 435312fec14SDave Airlie if (!ast->regs) { 436312fec14SDave Airlie ret = -EIO; 437312fec14SDave Airlie goto out_free; 438312fec14SDave Airlie } 4390dd68309SBenjamin Herrenschmidt 4400dd68309SBenjamin Herrenschmidt /* 4410dd68309SBenjamin Herrenschmidt * If we don't have IO space at all, use MMIO now and 4420dd68309SBenjamin Herrenschmidt * assume the chip has MMIO enabled by default (rev 0x20 4430dd68309SBenjamin Herrenschmidt * and higher). 4440dd68309SBenjamin Herrenschmidt */ 4450dd68309SBenjamin Herrenschmidt if (!(pci_resource_flags(dev->pdev, 2) & IORESOURCE_IO)) { 4461a19b4cbSThomas Zimmermann drm_info(dev, "platform has no IO space, trying MMIO\n"); 4470dd68309SBenjamin Herrenschmidt ast->ioregs = ast->regs + AST_IO_MM_OFFSET; 4480dd68309SBenjamin Herrenschmidt } 4490dd68309SBenjamin Herrenschmidt 4500dd68309SBenjamin Herrenschmidt /* "map" IO regs if the above hasn't done so already */ 4510dd68309SBenjamin Herrenschmidt if (!ast->ioregs) { 452312fec14SDave Airlie ast->ioregs = pci_iomap(dev->pdev, 2, 0); 453312fec14SDave Airlie if (!ast->ioregs) { 454312fec14SDave Airlie ret = -EIO; 455312fec14SDave Airlie goto out_free; 456312fec14SDave Airlie } 4570dd68309SBenjamin Herrenschmidt } 458312fec14SDave Airlie 459d1b98557SBenjamin Herrenschmidt ast_detect_chip(dev, &need_post); 460312fec14SDave Airlie 461bad09da6SY.C. Chen if (need_post) 462bad09da6SY.C. Chen ast_post_gpu(dev); 463bad09da6SY.C. Chen 464298360afSRussell Currey ret = ast_get_dram_info(dev); 465298360afSRussell Currey if (ret) 466298360afSRussell Currey goto out_free; 467312fec14SDave Airlie ast->vram_size = ast_get_vram_info(dev); 4681a19b4cbSThomas Zimmermann drm_info(dev, "dram MCLK=%u Mhz type=%d bus_width=%d size=%08x\n", 4696475a7ccSBenjamin Herrenschmidt ast->mclk, ast->dram_type, 4706475a7ccSBenjamin Herrenschmidt ast->dram_bus_width, ast->vram_size); 471312fec14SDave Airlie 472312fec14SDave Airlie ret = ast_mm_init(ast); 473312fec14SDave Airlie if (ret) 474312fec14SDave Airlie goto out_free; 475312fec14SDave Airlie 4761728bf64SThomas Zimmermann ret = drmm_mode_config_init(dev); 4771728bf64SThomas Zimmermann if (ret) 4781728bf64SThomas Zimmermann goto out_free; 479312fec14SDave Airlie 480312fec14SDave Airlie dev->mode_config.funcs = (void *)&ast_mode_funcs; 481312fec14SDave Airlie dev->mode_config.min_width = 0; 482312fec14SDave Airlie dev->mode_config.min_height = 0; 483312fec14SDave Airlie dev->mode_config.preferred_depth = 24; 484312fec14SDave Airlie dev->mode_config.prefer_shadow = 1; 48528fb4cb7SEgbert Eich dev->mode_config.fb_base = pci_resource_start(ast->dev->pdev, 0); 486312fec14SDave Airlie 487312fec14SDave Airlie if (ast->chip == AST2100 || 488312fec14SDave Airlie ast->chip == AST2200 || 489312fec14SDave Airlie ast->chip == AST2300 || 4901453bf4cSDave Airlie ast->chip == AST2400 || 49105f13f5bSThomas Zimmermann ast->chip == AST2500) { 492312fec14SDave Airlie dev->mode_config.max_width = 1920; 493312fec14SDave Airlie dev->mode_config.max_height = 2048; 494312fec14SDave Airlie } else { 495312fec14SDave Airlie dev->mode_config.max_width = 1600; 496312fec14SDave Airlie dev->mode_config.max_height = 1200; 497312fec14SDave Airlie } 498312fec14SDave Airlie 499312fec14SDave Airlie ret = ast_mode_init(dev); 500312fec14SDave Airlie if (ret) 501312fec14SDave Airlie goto out_free; 502312fec14SDave Airlie 5034961eb60SThomas Zimmermann drm_mode_config_reset(dev); 5044961eb60SThomas Zimmermann 505312fec14SDave Airlie return 0; 506312fec14SDave Airlie out_free: 507312fec14SDave Airlie kfree(ast); 508312fec14SDave Airlie dev->dev_private = NULL; 509312fec14SDave Airlie return ret; 510312fec14SDave Airlie } 511312fec14SDave Airlie 51211b3c20bSGabriel Krisman Bertazi void ast_driver_unload(struct drm_device *dev) 513312fec14SDave Airlie { 514fa7dbd76SThomas Zimmermann struct ast_private *ast = to_ast_private(dev); 515312fec14SDave Airlie 51605b43971SY.C. Chen /* enable standard VGA decode */ 51705b43971SY.C. Chen ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xa1, 0x04); 51805b43971SY.C. Chen 51912f8030eSEgbert Eich ast_release_firmware(dev); 52083c6620bSDave Airlie kfree(ast->dp501_fw_addr); 521312fec14SDave Airlie 522312fec14SDave Airlie ast_mm_fini(ast); 523312fec14SDave Airlie kfree(ast); 524312fec14SDave Airlie } 525