xref: /openbmc/linux/drivers/gpu/drm/ast/ast_drv.h (revision d2999e1b)
1 /*
2  * Copyright 2012 Red Hat Inc.
3  *
4  * Permission is hereby granted, free of charge, to any person obtaining a
5  * copy of this software and associated documentation files (the
6  * "Software"), to deal in the Software without restriction, including
7  * without limitation the rights to use, copy, modify, merge, publish,
8  * distribute, sub license, and/or sell copies of the Software, and to
9  * permit persons to whom the Software is furnished to do so, subject to
10  * the following conditions:
11  *
12  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
13  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
14  * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
15  * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
16  * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
17  * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
18  * USE OR OTHER DEALINGS IN THE SOFTWARE.
19  *
20  * The above copyright notice and this permission notice (including the
21  * next paragraph) shall be included in all copies or substantial portions
22  * of the Software.
23  *
24  */
25 /*
26  * Authors: Dave Airlie <airlied@redhat.com>
27  */
28 #ifndef __AST_DRV_H__
29 #define __AST_DRV_H__
30 
31 #include <drm/drm_fb_helper.h>
32 
33 #include <drm/ttm/ttm_bo_api.h>
34 #include <drm/ttm/ttm_bo_driver.h>
35 #include <drm/ttm/ttm_placement.h>
36 #include <drm/ttm/ttm_memory.h>
37 #include <drm/ttm/ttm_module.h>
38 
39 #include <linux/i2c.h>
40 #include <linux/i2c-algo-bit.h>
41 
42 #define DRIVER_AUTHOR		"Dave Airlie"
43 
44 #define DRIVER_NAME		"ast"
45 #define DRIVER_DESC		"AST"
46 #define DRIVER_DATE		"20120228"
47 
48 #define DRIVER_MAJOR		0
49 #define DRIVER_MINOR		1
50 #define DRIVER_PATCHLEVEL	0
51 
52 #define PCI_CHIP_AST2000 0x2000
53 #define PCI_CHIP_AST2100 0x2010
54 #define PCI_CHIP_AST1180 0x1180
55 
56 
57 enum ast_chip {
58 	AST2000,
59 	AST2100,
60 	AST1100,
61 	AST2200,
62 	AST2150,
63 	AST2300,
64 	AST2400,
65 	AST1180,
66 };
67 
68 enum ast_tx_chip {
69 	AST_TX_NONE,
70 	AST_TX_SIL164,
71 	AST_TX_ITE66121,
72 	AST_TX_DP501,
73 };
74 
75 #define AST_DRAM_512Mx16 0
76 #define AST_DRAM_1Gx16   1
77 #define AST_DRAM_512Mx32 2
78 #define AST_DRAM_1Gx32   3
79 #define AST_DRAM_2Gx16   6
80 #define AST_DRAM_4Gx16   7
81 
82 struct ast_fbdev;
83 
84 struct ast_private {
85 	struct drm_device *dev;
86 
87 	void __iomem *regs;
88 	void __iomem *ioregs;
89 
90 	enum ast_chip chip;
91 	bool vga2_clone;
92 	uint32_t dram_bus_width;
93 	uint32_t dram_type;
94 	uint32_t mclk;
95 	uint32_t vram_size;
96 
97 	struct ast_fbdev *fbdev;
98 
99 	int fb_mtrr;
100 
101 	struct {
102 		struct drm_global_reference mem_global_ref;
103 		struct ttm_bo_global_ref bo_global_ref;
104 		struct ttm_bo_device bdev;
105 	} ttm;
106 
107 	struct drm_gem_object *cursor_cache;
108 	uint64_t cursor_cache_gpu_addr;
109 	/* Acces to this cache is protected by the crtc->mutex of the only crtc
110 	 * we have. */
111 	struct ttm_bo_kmap_obj cache_kmap;
112 	int next_cursor;
113 	bool support_wide_screen;
114 
115 	enum ast_tx_chip tx_chip_type;
116 	u8 dp501_maxclk;
117 	u8 *dp501_fw_addr;
118 	const struct firmware *dp501_fw;	/* dp501 fw */
119 };
120 
121 int ast_driver_load(struct drm_device *dev, unsigned long flags);
122 int ast_driver_unload(struct drm_device *dev);
123 
124 struct ast_gem_object;
125 
126 #define AST_IO_AR_PORT_WRITE		(0x40)
127 #define AST_IO_MISC_PORT_WRITE		(0x42)
128 #define AST_IO_SEQ_PORT			(0x44)
129 #define AST_DAC_INDEX_READ		(0x3c7)
130 #define AST_IO_DAC_INDEX_WRITE		(0x48)
131 #define AST_IO_DAC_DATA		        (0x49)
132 #define AST_IO_GR_PORT			(0x4E)
133 #define AST_IO_CRTC_PORT		(0x54)
134 #define AST_IO_INPUT_STATUS1_READ	(0x5A)
135 #define AST_IO_MISC_PORT_READ		(0x4C)
136 
137 #define __ast_read(x) \
138 static inline u##x ast_read##x(struct ast_private *ast, u32 reg) { \
139 u##x val = 0;\
140 val = ioread##x(ast->regs + reg); \
141 return val;\
142 }
143 
144 __ast_read(8);
145 __ast_read(16);
146 __ast_read(32)
147 
148 #define __ast_io_read(x) \
149 static inline u##x ast_io_read##x(struct ast_private *ast, u32 reg) { \
150 u##x val = 0;\
151 val = ioread##x(ast->ioregs + reg); \
152 return val;\
153 }
154 
155 __ast_io_read(8);
156 __ast_io_read(16);
157 __ast_io_read(32);
158 
159 #define __ast_write(x) \
160 static inline void ast_write##x(struct ast_private *ast, u32 reg, u##x val) {\
161 	iowrite##x(val, ast->regs + reg);\
162 	}
163 
164 __ast_write(8);
165 __ast_write(16);
166 __ast_write(32);
167 
168 #define __ast_io_write(x) \
169 static inline void ast_io_write##x(struct ast_private *ast, u32 reg, u##x val) {\
170 	iowrite##x(val, ast->ioregs + reg);\
171 	}
172 
173 __ast_io_write(8);
174 __ast_io_write(16);
175 #undef __ast_io_write
176 
177 static inline void ast_set_index_reg(struct ast_private *ast,
178 				     uint32_t base, uint8_t index,
179 				     uint8_t val)
180 {
181 	ast_io_write16(ast, base, ((u16)val << 8) | index);
182 }
183 
184 void ast_set_index_reg_mask(struct ast_private *ast,
185 			    uint32_t base, uint8_t index,
186 			    uint8_t mask, uint8_t val);
187 uint8_t ast_get_index_reg(struct ast_private *ast,
188 			  uint32_t base, uint8_t index);
189 uint8_t ast_get_index_reg_mask(struct ast_private *ast,
190 			       uint32_t base, uint8_t index, uint8_t mask);
191 
192 static inline void ast_open_key(struct ast_private *ast)
193 {
194 	ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0x80, 0xA8);
195 }
196 
197 #define AST_VIDMEM_SIZE_8M    0x00800000
198 #define AST_VIDMEM_SIZE_16M   0x01000000
199 #define AST_VIDMEM_SIZE_32M   0x02000000
200 #define AST_VIDMEM_SIZE_64M   0x04000000
201 #define AST_VIDMEM_SIZE_128M  0x08000000
202 
203 #define AST_VIDMEM_DEFAULT_SIZE AST_VIDMEM_SIZE_8M
204 
205 #define AST_MAX_HWC_WIDTH 64
206 #define AST_MAX_HWC_HEIGHT 64
207 
208 #define AST_HWC_SIZE                (AST_MAX_HWC_WIDTH*AST_MAX_HWC_HEIGHT*2)
209 #define AST_HWC_SIGNATURE_SIZE      32
210 
211 #define AST_DEFAULT_HWC_NUM 2
212 /* define for signature structure */
213 #define AST_HWC_SIGNATURE_CHECKSUM  0x00
214 #define AST_HWC_SIGNATURE_SizeX     0x04
215 #define AST_HWC_SIGNATURE_SizeY     0x08
216 #define AST_HWC_SIGNATURE_X         0x0C
217 #define AST_HWC_SIGNATURE_Y         0x10
218 #define AST_HWC_SIGNATURE_HOTSPOTX  0x14
219 #define AST_HWC_SIGNATURE_HOTSPOTY  0x18
220 
221 
222 struct ast_i2c_chan {
223 	struct i2c_adapter adapter;
224 	struct drm_device *dev;
225 	struct i2c_algo_bit_data bit;
226 };
227 
228 struct ast_connector {
229 	struct drm_connector base;
230 	struct ast_i2c_chan *i2c;
231 };
232 
233 struct ast_crtc {
234 	struct drm_crtc base;
235 	u8 lut_r[256], lut_g[256], lut_b[256];
236 	struct drm_gem_object *cursor_bo;
237 	uint64_t cursor_addr;
238 	int cursor_width, cursor_height;
239 	u8 offset_x, offset_y;
240 };
241 
242 struct ast_encoder {
243 	struct drm_encoder base;
244 };
245 
246 struct ast_framebuffer {
247 	struct drm_framebuffer base;
248 	struct drm_gem_object *obj;
249 };
250 
251 struct ast_fbdev {
252 	struct drm_fb_helper helper;
253 	struct ast_framebuffer afb;
254 	struct list_head fbdev_list;
255 	void *sysram;
256 	int size;
257 	struct ttm_bo_kmap_obj mapping;
258 	int x1, y1, x2, y2; /* dirty rect */
259 	spinlock_t dirty_lock;
260 };
261 
262 #define to_ast_crtc(x) container_of(x, struct ast_crtc, base)
263 #define to_ast_connector(x) container_of(x, struct ast_connector, base)
264 #define to_ast_encoder(x) container_of(x, struct ast_encoder, base)
265 #define to_ast_framebuffer(x) container_of(x, struct ast_framebuffer, base)
266 
267 struct ast_vbios_stdtable {
268 	u8 misc;
269 	u8 seq[4];
270 	u8 crtc[25];
271 	u8 ar[20];
272 	u8 gr[9];
273 };
274 
275 struct ast_vbios_enhtable {
276 	u32 ht;
277 	u32 hde;
278 	u32 hfp;
279 	u32 hsync;
280 	u32 vt;
281 	u32 vde;
282 	u32 vfp;
283 	u32 vsync;
284 	u32 dclk_index;
285 	u32 flags;
286 	u32 refresh_rate;
287 	u32 refresh_rate_index;
288 	u32 mode_id;
289 };
290 
291 struct ast_vbios_dclk_info {
292 	u8 param1;
293 	u8 param2;
294 	u8 param3;
295 };
296 
297 struct ast_vbios_mode_info {
298 	struct ast_vbios_stdtable *std_table;
299 	struct ast_vbios_enhtable *enh_table;
300 };
301 
302 extern int ast_mode_init(struct drm_device *dev);
303 extern void ast_mode_fini(struct drm_device *dev);
304 
305 int ast_framebuffer_init(struct drm_device *dev,
306 			 struct ast_framebuffer *ast_fb,
307 			 struct drm_mode_fb_cmd2 *mode_cmd,
308 			 struct drm_gem_object *obj);
309 
310 int ast_fbdev_init(struct drm_device *dev);
311 void ast_fbdev_fini(struct drm_device *dev);
312 void ast_fbdev_set_suspend(struct drm_device *dev, int state);
313 
314 struct ast_bo {
315 	struct ttm_buffer_object bo;
316 	struct ttm_placement placement;
317 	struct ttm_bo_kmap_obj kmap;
318 	struct drm_gem_object gem;
319 	u32 placements[3];
320 	int pin_count;
321 };
322 #define gem_to_ast_bo(gobj) container_of((gobj), struct ast_bo, gem)
323 
324 static inline struct ast_bo *
325 ast_bo(struct ttm_buffer_object *bo)
326 {
327 	return container_of(bo, struct ast_bo, bo);
328 }
329 
330 
331 #define to_ast_obj(x) container_of(x, struct ast_gem_object, base)
332 
333 #define AST_MM_ALIGN_SHIFT 4
334 #define AST_MM_ALIGN_MASK ((1 << AST_MM_ALIGN_SHIFT) - 1)
335 
336 extern int ast_dumb_create(struct drm_file *file,
337 			   struct drm_device *dev,
338 			   struct drm_mode_create_dumb *args);
339 
340 extern void ast_gem_free_object(struct drm_gem_object *obj);
341 extern int ast_dumb_mmap_offset(struct drm_file *file,
342 				struct drm_device *dev,
343 				uint32_t handle,
344 				uint64_t *offset);
345 
346 #define DRM_FILE_PAGE_OFFSET (0x100000000ULL >> PAGE_SHIFT)
347 
348 int ast_mm_init(struct ast_private *ast);
349 void ast_mm_fini(struct ast_private *ast);
350 
351 int ast_bo_create(struct drm_device *dev, int size, int align,
352 		  uint32_t flags, struct ast_bo **pastbo);
353 
354 int ast_gem_create(struct drm_device *dev,
355 		   u32 size, bool iskernel,
356 		   struct drm_gem_object **obj);
357 
358 int ast_bo_pin(struct ast_bo *bo, u32 pl_flag, u64 *gpu_addr);
359 int ast_bo_unpin(struct ast_bo *bo);
360 
361 static inline int ast_bo_reserve(struct ast_bo *bo, bool no_wait)
362 {
363 	int ret;
364 
365 	ret = ttm_bo_reserve(&bo->bo, true, no_wait, false, 0);
366 	if (ret) {
367 		if (ret != -ERESTARTSYS && ret != -EBUSY)
368 			DRM_ERROR("reserve failed %p\n", bo);
369 		return ret;
370 	}
371 	return 0;
372 }
373 
374 static inline void ast_bo_unreserve(struct ast_bo *bo)
375 {
376 	ttm_bo_unreserve(&bo->bo);
377 }
378 
379 void ast_ttm_placement(struct ast_bo *bo, int domain);
380 int ast_bo_push_sysram(struct ast_bo *bo);
381 int ast_mmap(struct file *filp, struct vm_area_struct *vma);
382 
383 /* ast post */
384 void ast_post_gpu(struct drm_device *dev);
385 u32 ast_mindwm(struct ast_private *ast, u32 r);
386 void ast_moutdwm(struct ast_private *ast, u32 r, u32 v);
387 /* ast dp501 */
388 int ast_load_dp501_microcode(struct drm_device *dev);
389 void ast_set_dp501_video_output(struct drm_device *dev, u8 mode);
390 bool ast_launch_m68k(struct drm_device *dev);
391 bool ast_backup_fw(struct drm_device *dev, u8 *addr, u32 size);
392 bool ast_dp501_read_edid(struct drm_device *dev, u8 *ediddata);
393 u8 ast_get_dp501_max_clk(struct drm_device *dev);
394 void ast_init_3rdtx(struct drm_device *dev);
395 #endif
396