1 /* 2 * Copyright 2012 Red Hat Inc. 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the 6 * "Software"), to deal in the Software without restriction, including 7 * without limitation the rights to use, copy, modify, merge, publish, 8 * distribute, sub license, and/or sell copies of the Software, and to 9 * permit persons to whom the Software is furnished to do so, subject to 10 * the following conditions: 11 * 12 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 13 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 14 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL 15 * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, 16 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR 17 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE 18 * USE OR OTHER DEALINGS IN THE SOFTWARE. 19 * 20 * The above copyright notice and this permission notice (including the 21 * next paragraph) shall be included in all copies or substantial portions 22 * of the Software. 23 * 24 */ 25 /* 26 * Authors: Dave Airlie <airlied@redhat.com> 27 */ 28 #ifndef __AST_DRV_H__ 29 #define __AST_DRV_H__ 30 31 #include <drm/drm_encoder.h> 32 #include <drm/drm_fb_helper.h> 33 34 #include <drm/ttm/ttm_bo_api.h> 35 #include <drm/ttm/ttm_bo_driver.h> 36 #include <drm/ttm/ttm_placement.h> 37 #include <drm/ttm/ttm_memory.h> 38 #include <drm/ttm/ttm_module.h> 39 40 #include <drm/drm_gem.h> 41 42 #include <linux/i2c.h> 43 #include <linux/i2c-algo-bit.h> 44 45 #define DRIVER_AUTHOR "Dave Airlie" 46 47 #define DRIVER_NAME "ast" 48 #define DRIVER_DESC "AST" 49 #define DRIVER_DATE "20120228" 50 51 #define DRIVER_MAJOR 0 52 #define DRIVER_MINOR 1 53 #define DRIVER_PATCHLEVEL 0 54 55 #define PCI_CHIP_AST2000 0x2000 56 #define PCI_CHIP_AST2100 0x2010 57 #define PCI_CHIP_AST1180 0x1180 58 59 60 enum ast_chip { 61 AST2000, 62 AST2100, 63 AST1100, 64 AST2200, 65 AST2150, 66 AST2300, 67 AST2400, 68 AST2500, 69 AST1180, 70 }; 71 72 enum ast_tx_chip { 73 AST_TX_NONE, 74 AST_TX_SIL164, 75 AST_TX_ITE66121, 76 AST_TX_DP501, 77 }; 78 79 #define AST_DRAM_512Mx16 0 80 #define AST_DRAM_1Gx16 1 81 #define AST_DRAM_512Mx32 2 82 #define AST_DRAM_1Gx32 3 83 #define AST_DRAM_2Gx16 6 84 #define AST_DRAM_4Gx16 7 85 #define AST_DRAM_8Gx16 8 86 87 struct ast_fbdev; 88 89 struct ast_private { 90 struct drm_device *dev; 91 92 void __iomem *regs; 93 void __iomem *ioregs; 94 95 enum ast_chip chip; 96 bool vga2_clone; 97 uint32_t dram_bus_width; 98 uint32_t dram_type; 99 uint32_t mclk; 100 uint32_t vram_size; 101 102 struct ast_fbdev *fbdev; 103 104 int fb_mtrr; 105 106 struct { 107 struct drm_global_reference mem_global_ref; 108 struct ttm_bo_global_ref bo_global_ref; 109 struct ttm_bo_device bdev; 110 } ttm; 111 112 struct drm_gem_object *cursor_cache; 113 uint64_t cursor_cache_gpu_addr; 114 /* Acces to this cache is protected by the crtc->mutex of the only crtc 115 * we have. */ 116 struct ttm_bo_kmap_obj cache_kmap; 117 int next_cursor; 118 bool support_wide_screen; 119 enum { 120 ast_use_p2a, 121 ast_use_dt, 122 ast_use_defaults 123 } config_mode; 124 125 enum ast_tx_chip tx_chip_type; 126 u8 dp501_maxclk; 127 u8 *dp501_fw_addr; 128 const struct firmware *dp501_fw; /* dp501 fw */ 129 }; 130 131 int ast_driver_load(struct drm_device *dev, unsigned long flags); 132 void ast_driver_unload(struct drm_device *dev); 133 134 struct ast_gem_object; 135 136 #define AST_IO_AR_PORT_WRITE (0x40) 137 #define AST_IO_MISC_PORT_WRITE (0x42) 138 #define AST_IO_VGA_ENABLE_PORT (0x43) 139 #define AST_IO_SEQ_PORT (0x44) 140 #define AST_IO_DAC_INDEX_READ (0x47) 141 #define AST_IO_DAC_INDEX_WRITE (0x48) 142 #define AST_IO_DAC_DATA (0x49) 143 #define AST_IO_GR_PORT (0x4E) 144 #define AST_IO_CRTC_PORT (0x54) 145 #define AST_IO_INPUT_STATUS1_READ (0x5A) 146 #define AST_IO_MISC_PORT_READ (0x4C) 147 148 #define AST_IO_MM_OFFSET (0x380) 149 150 #define __ast_read(x) \ 151 static inline u##x ast_read##x(struct ast_private *ast, u32 reg) { \ 152 u##x val = 0;\ 153 val = ioread##x(ast->regs + reg); \ 154 return val;\ 155 } 156 157 __ast_read(8); 158 __ast_read(16); 159 __ast_read(32) 160 161 #define __ast_io_read(x) \ 162 static inline u##x ast_io_read##x(struct ast_private *ast, u32 reg) { \ 163 u##x val = 0;\ 164 val = ioread##x(ast->ioregs + reg); \ 165 return val;\ 166 } 167 168 __ast_io_read(8); 169 __ast_io_read(16); 170 __ast_io_read(32); 171 172 #define __ast_write(x) \ 173 static inline void ast_write##x(struct ast_private *ast, u32 reg, u##x val) {\ 174 iowrite##x(val, ast->regs + reg);\ 175 } 176 177 __ast_write(8); 178 __ast_write(16); 179 __ast_write(32); 180 181 #define __ast_io_write(x) \ 182 static inline void ast_io_write##x(struct ast_private *ast, u32 reg, u##x val) {\ 183 iowrite##x(val, ast->ioregs + reg);\ 184 } 185 186 __ast_io_write(8); 187 __ast_io_write(16); 188 #undef __ast_io_write 189 190 static inline void ast_set_index_reg(struct ast_private *ast, 191 uint32_t base, uint8_t index, 192 uint8_t val) 193 { 194 ast_io_write16(ast, base, ((u16)val << 8) | index); 195 } 196 197 void ast_set_index_reg_mask(struct ast_private *ast, 198 uint32_t base, uint8_t index, 199 uint8_t mask, uint8_t val); 200 uint8_t ast_get_index_reg(struct ast_private *ast, 201 uint32_t base, uint8_t index); 202 uint8_t ast_get_index_reg_mask(struct ast_private *ast, 203 uint32_t base, uint8_t index, uint8_t mask); 204 205 static inline void ast_open_key(struct ast_private *ast) 206 { 207 ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0x80, 0xA8); 208 } 209 210 #define AST_VIDMEM_SIZE_8M 0x00800000 211 #define AST_VIDMEM_SIZE_16M 0x01000000 212 #define AST_VIDMEM_SIZE_32M 0x02000000 213 #define AST_VIDMEM_SIZE_64M 0x04000000 214 #define AST_VIDMEM_SIZE_128M 0x08000000 215 216 #define AST_VIDMEM_DEFAULT_SIZE AST_VIDMEM_SIZE_8M 217 218 #define AST_MAX_HWC_WIDTH 64 219 #define AST_MAX_HWC_HEIGHT 64 220 221 #define AST_HWC_SIZE (AST_MAX_HWC_WIDTH*AST_MAX_HWC_HEIGHT*2) 222 #define AST_HWC_SIGNATURE_SIZE 32 223 224 #define AST_DEFAULT_HWC_NUM 2 225 /* define for signature structure */ 226 #define AST_HWC_SIGNATURE_CHECKSUM 0x00 227 #define AST_HWC_SIGNATURE_SizeX 0x04 228 #define AST_HWC_SIGNATURE_SizeY 0x08 229 #define AST_HWC_SIGNATURE_X 0x0C 230 #define AST_HWC_SIGNATURE_Y 0x10 231 #define AST_HWC_SIGNATURE_HOTSPOTX 0x14 232 #define AST_HWC_SIGNATURE_HOTSPOTY 0x18 233 234 235 struct ast_i2c_chan { 236 struct i2c_adapter adapter; 237 struct drm_device *dev; 238 struct i2c_algo_bit_data bit; 239 }; 240 241 struct ast_connector { 242 struct drm_connector base; 243 struct ast_i2c_chan *i2c; 244 }; 245 246 struct ast_crtc { 247 struct drm_crtc base; 248 struct drm_gem_object *cursor_bo; 249 uint64_t cursor_addr; 250 int cursor_width, cursor_height; 251 u8 offset_x, offset_y; 252 }; 253 254 struct ast_encoder { 255 struct drm_encoder base; 256 }; 257 258 struct ast_framebuffer { 259 struct drm_framebuffer base; 260 struct drm_gem_object *obj; 261 }; 262 263 struct ast_fbdev { 264 struct drm_fb_helper helper; 265 struct ast_framebuffer afb; 266 void *sysram; 267 int size; 268 struct ttm_bo_kmap_obj mapping; 269 int x1, y1, x2, y2; /* dirty rect */ 270 spinlock_t dirty_lock; 271 }; 272 273 #define to_ast_crtc(x) container_of(x, struct ast_crtc, base) 274 #define to_ast_connector(x) container_of(x, struct ast_connector, base) 275 #define to_ast_encoder(x) container_of(x, struct ast_encoder, base) 276 #define to_ast_framebuffer(x) container_of(x, struct ast_framebuffer, base) 277 278 struct ast_vbios_stdtable { 279 u8 misc; 280 u8 seq[4]; 281 u8 crtc[25]; 282 u8 ar[20]; 283 u8 gr[9]; 284 }; 285 286 struct ast_vbios_enhtable { 287 u32 ht; 288 u32 hde; 289 u32 hfp; 290 u32 hsync; 291 u32 vt; 292 u32 vde; 293 u32 vfp; 294 u32 vsync; 295 u32 dclk_index; 296 u32 flags; 297 u32 refresh_rate; 298 u32 refresh_rate_index; 299 u32 mode_id; 300 }; 301 302 struct ast_vbios_dclk_info { 303 u8 param1; 304 u8 param2; 305 u8 param3; 306 }; 307 308 struct ast_vbios_mode_info { 309 const struct ast_vbios_stdtable *std_table; 310 const struct ast_vbios_enhtable *enh_table; 311 }; 312 313 extern int ast_mode_init(struct drm_device *dev); 314 extern void ast_mode_fini(struct drm_device *dev); 315 316 int ast_framebuffer_init(struct drm_device *dev, 317 struct ast_framebuffer *ast_fb, 318 const struct drm_mode_fb_cmd2 *mode_cmd, 319 struct drm_gem_object *obj); 320 321 int ast_fbdev_init(struct drm_device *dev); 322 void ast_fbdev_fini(struct drm_device *dev); 323 void ast_fbdev_set_suspend(struct drm_device *dev, int state); 324 void ast_fbdev_set_base(struct ast_private *ast, unsigned long gpu_addr); 325 326 struct ast_bo { 327 struct ttm_buffer_object bo; 328 struct ttm_placement placement; 329 struct ttm_bo_kmap_obj kmap; 330 struct drm_gem_object gem; 331 struct ttm_place placements[3]; 332 int pin_count; 333 }; 334 #define gem_to_ast_bo(gobj) container_of((gobj), struct ast_bo, gem) 335 336 static inline struct ast_bo * 337 ast_bo(struct ttm_buffer_object *bo) 338 { 339 return container_of(bo, struct ast_bo, bo); 340 } 341 342 343 #define to_ast_obj(x) container_of(x, struct ast_gem_object, base) 344 345 #define AST_MM_ALIGN_SHIFT 4 346 #define AST_MM_ALIGN_MASK ((1 << AST_MM_ALIGN_SHIFT) - 1) 347 348 extern int ast_dumb_create(struct drm_file *file, 349 struct drm_device *dev, 350 struct drm_mode_create_dumb *args); 351 352 extern void ast_gem_free_object(struct drm_gem_object *obj); 353 extern int ast_dumb_mmap_offset(struct drm_file *file, 354 struct drm_device *dev, 355 uint32_t handle, 356 uint64_t *offset); 357 358 #define DRM_FILE_PAGE_OFFSET (0x100000000ULL >> PAGE_SHIFT) 359 360 int ast_mm_init(struct ast_private *ast); 361 void ast_mm_fini(struct ast_private *ast); 362 363 int ast_bo_create(struct drm_device *dev, int size, int align, 364 uint32_t flags, struct ast_bo **pastbo); 365 366 int ast_gem_create(struct drm_device *dev, 367 u32 size, bool iskernel, 368 struct drm_gem_object **obj); 369 370 int ast_bo_pin(struct ast_bo *bo, u32 pl_flag, u64 *gpu_addr); 371 int ast_bo_unpin(struct ast_bo *bo); 372 373 static inline int ast_bo_reserve(struct ast_bo *bo, bool no_wait) 374 { 375 int ret; 376 377 ret = ttm_bo_reserve(&bo->bo, true, no_wait, NULL); 378 if (ret) { 379 if (ret != -ERESTARTSYS && ret != -EBUSY) 380 DRM_ERROR("reserve failed %p\n", bo); 381 return ret; 382 } 383 return 0; 384 } 385 386 static inline void ast_bo_unreserve(struct ast_bo *bo) 387 { 388 ttm_bo_unreserve(&bo->bo); 389 } 390 391 void ast_ttm_placement(struct ast_bo *bo, int domain); 392 int ast_bo_push_sysram(struct ast_bo *bo); 393 int ast_mmap(struct file *filp, struct vm_area_struct *vma); 394 395 /* ast post */ 396 void ast_enable_vga(struct drm_device *dev); 397 void ast_enable_mmio(struct drm_device *dev); 398 bool ast_is_vga_enabled(struct drm_device *dev); 399 void ast_post_gpu(struct drm_device *dev); 400 u32 ast_mindwm(struct ast_private *ast, u32 r); 401 void ast_moutdwm(struct ast_private *ast, u32 r, u32 v); 402 /* ast dp501 */ 403 void ast_set_dp501_video_output(struct drm_device *dev, u8 mode); 404 bool ast_backup_fw(struct drm_device *dev, u8 *addr, u32 size); 405 bool ast_dp501_read_edid(struct drm_device *dev, u8 *ediddata); 406 u8 ast_get_dp501_max_clk(struct drm_device *dev); 407 void ast_init_3rdtx(struct drm_device *dev); 408 void ast_release_firmware(struct drm_device *dev); 409 #endif 410