1 /* 2 * Copyright 2012 Red Hat Inc. 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the 6 * "Software"), to deal in the Software without restriction, including 7 * without limitation the rights to use, copy, modify, merge, publish, 8 * distribute, sub license, and/or sell copies of the Software, and to 9 * permit persons to whom the Software is furnished to do so, subject to 10 * the following conditions: 11 * 12 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 13 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 14 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL 15 * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, 16 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR 17 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE 18 * USE OR OTHER DEALINGS IN THE SOFTWARE. 19 * 20 * The above copyright notice and this permission notice (including the 21 * next paragraph) shall be included in all copies or substantial portions 22 * of the Software. 23 * 24 */ 25 /* 26 * Authors: Dave Airlie <airlied@redhat.com> 27 */ 28 #ifndef __AST_DRV_H__ 29 #define __AST_DRV_H__ 30 31 #include <drm/drm_encoder.h> 32 #include <drm/drm_fb_helper.h> 33 34 #include <drm/ttm/ttm_bo_api.h> 35 #include <drm/ttm/ttm_bo_driver.h> 36 #include <drm/ttm/ttm_placement.h> 37 #include <drm/ttm/ttm_memory.h> 38 #include <drm/ttm/ttm_module.h> 39 40 #include <drm/drm_gem.h> 41 42 #include <linux/i2c.h> 43 #include <linux/i2c-algo-bit.h> 44 45 #define DRIVER_AUTHOR "Dave Airlie" 46 47 #define DRIVER_NAME "ast" 48 #define DRIVER_DESC "AST" 49 #define DRIVER_DATE "20120228" 50 51 #define DRIVER_MAJOR 0 52 #define DRIVER_MINOR 1 53 #define DRIVER_PATCHLEVEL 0 54 55 #define PCI_CHIP_AST2000 0x2000 56 #define PCI_CHIP_AST2100 0x2010 57 #define PCI_CHIP_AST1180 0x1180 58 59 60 enum ast_chip { 61 AST2000, 62 AST2100, 63 AST1100, 64 AST2200, 65 AST2150, 66 AST2300, 67 AST2400, 68 AST2500, 69 AST1180, 70 }; 71 72 enum ast_tx_chip { 73 AST_TX_NONE, 74 AST_TX_SIL164, 75 AST_TX_ITE66121, 76 AST_TX_DP501, 77 }; 78 79 #define AST_DRAM_512Mx16 0 80 #define AST_DRAM_1Gx16 1 81 #define AST_DRAM_512Mx32 2 82 #define AST_DRAM_1Gx32 3 83 #define AST_DRAM_2Gx16 6 84 #define AST_DRAM_4Gx16 7 85 #define AST_DRAM_8Gx16 8 86 87 struct ast_fbdev; 88 89 struct ast_private { 90 struct drm_device *dev; 91 92 void __iomem *regs; 93 void __iomem *ioregs; 94 95 enum ast_chip chip; 96 bool vga2_clone; 97 uint32_t dram_bus_width; 98 uint32_t dram_type; 99 uint32_t mclk; 100 uint32_t vram_size; 101 102 struct ast_fbdev *fbdev; 103 104 int fb_mtrr; 105 106 struct { 107 struct ttm_bo_device bdev; 108 } ttm; 109 110 struct drm_gem_object *cursor_cache; 111 uint64_t cursor_cache_gpu_addr; 112 /* Acces to this cache is protected by the crtc->mutex of the only crtc 113 * we have. */ 114 struct ttm_bo_kmap_obj cache_kmap; 115 int next_cursor; 116 bool support_wide_screen; 117 enum { 118 ast_use_p2a, 119 ast_use_dt, 120 ast_use_defaults 121 } config_mode; 122 123 enum ast_tx_chip tx_chip_type; 124 u8 dp501_maxclk; 125 u8 *dp501_fw_addr; 126 const struct firmware *dp501_fw; /* dp501 fw */ 127 }; 128 129 int ast_driver_load(struct drm_device *dev, unsigned long flags); 130 void ast_driver_unload(struct drm_device *dev); 131 132 struct ast_gem_object; 133 134 #define AST_IO_AR_PORT_WRITE (0x40) 135 #define AST_IO_MISC_PORT_WRITE (0x42) 136 #define AST_IO_VGA_ENABLE_PORT (0x43) 137 #define AST_IO_SEQ_PORT (0x44) 138 #define AST_IO_DAC_INDEX_READ (0x47) 139 #define AST_IO_DAC_INDEX_WRITE (0x48) 140 #define AST_IO_DAC_DATA (0x49) 141 #define AST_IO_GR_PORT (0x4E) 142 #define AST_IO_CRTC_PORT (0x54) 143 #define AST_IO_INPUT_STATUS1_READ (0x5A) 144 #define AST_IO_MISC_PORT_READ (0x4C) 145 146 #define AST_IO_MM_OFFSET (0x380) 147 148 #define __ast_read(x) \ 149 static inline u##x ast_read##x(struct ast_private *ast, u32 reg) { \ 150 u##x val = 0;\ 151 val = ioread##x(ast->regs + reg); \ 152 return val;\ 153 } 154 155 __ast_read(8); 156 __ast_read(16); 157 __ast_read(32) 158 159 #define __ast_io_read(x) \ 160 static inline u##x ast_io_read##x(struct ast_private *ast, u32 reg) { \ 161 u##x val = 0;\ 162 val = ioread##x(ast->ioregs + reg); \ 163 return val;\ 164 } 165 166 __ast_io_read(8); 167 __ast_io_read(16); 168 __ast_io_read(32); 169 170 #define __ast_write(x) \ 171 static inline void ast_write##x(struct ast_private *ast, u32 reg, u##x val) {\ 172 iowrite##x(val, ast->regs + reg);\ 173 } 174 175 __ast_write(8); 176 __ast_write(16); 177 __ast_write(32); 178 179 #define __ast_io_write(x) \ 180 static inline void ast_io_write##x(struct ast_private *ast, u32 reg, u##x val) {\ 181 iowrite##x(val, ast->ioregs + reg);\ 182 } 183 184 __ast_io_write(8); 185 __ast_io_write(16); 186 #undef __ast_io_write 187 188 static inline void ast_set_index_reg(struct ast_private *ast, 189 uint32_t base, uint8_t index, 190 uint8_t val) 191 { 192 ast_io_write16(ast, base, ((u16)val << 8) | index); 193 } 194 195 void ast_set_index_reg_mask(struct ast_private *ast, 196 uint32_t base, uint8_t index, 197 uint8_t mask, uint8_t val); 198 uint8_t ast_get_index_reg(struct ast_private *ast, 199 uint32_t base, uint8_t index); 200 uint8_t ast_get_index_reg_mask(struct ast_private *ast, 201 uint32_t base, uint8_t index, uint8_t mask); 202 203 static inline void ast_open_key(struct ast_private *ast) 204 { 205 ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0x80, 0xA8); 206 } 207 208 #define AST_VIDMEM_SIZE_8M 0x00800000 209 #define AST_VIDMEM_SIZE_16M 0x01000000 210 #define AST_VIDMEM_SIZE_32M 0x02000000 211 #define AST_VIDMEM_SIZE_64M 0x04000000 212 #define AST_VIDMEM_SIZE_128M 0x08000000 213 214 #define AST_VIDMEM_DEFAULT_SIZE AST_VIDMEM_SIZE_8M 215 216 #define AST_MAX_HWC_WIDTH 64 217 #define AST_MAX_HWC_HEIGHT 64 218 219 #define AST_HWC_SIZE (AST_MAX_HWC_WIDTH*AST_MAX_HWC_HEIGHT*2) 220 #define AST_HWC_SIGNATURE_SIZE 32 221 222 #define AST_DEFAULT_HWC_NUM 2 223 /* define for signature structure */ 224 #define AST_HWC_SIGNATURE_CHECKSUM 0x00 225 #define AST_HWC_SIGNATURE_SizeX 0x04 226 #define AST_HWC_SIGNATURE_SizeY 0x08 227 #define AST_HWC_SIGNATURE_X 0x0C 228 #define AST_HWC_SIGNATURE_Y 0x10 229 #define AST_HWC_SIGNATURE_HOTSPOTX 0x14 230 #define AST_HWC_SIGNATURE_HOTSPOTY 0x18 231 232 233 struct ast_i2c_chan { 234 struct i2c_adapter adapter; 235 struct drm_device *dev; 236 struct i2c_algo_bit_data bit; 237 }; 238 239 struct ast_connector { 240 struct drm_connector base; 241 struct ast_i2c_chan *i2c; 242 }; 243 244 struct ast_crtc { 245 struct drm_crtc base; 246 struct drm_gem_object *cursor_bo; 247 uint64_t cursor_addr; 248 int cursor_width, cursor_height; 249 u8 offset_x, offset_y; 250 }; 251 252 struct ast_encoder { 253 struct drm_encoder base; 254 }; 255 256 struct ast_framebuffer { 257 struct drm_framebuffer base; 258 struct drm_gem_object *obj; 259 }; 260 261 struct ast_fbdev { 262 struct drm_fb_helper helper; 263 struct ast_framebuffer afb; 264 void *sysram; 265 int size; 266 struct ttm_bo_kmap_obj mapping; 267 int x1, y1, x2, y2; /* dirty rect */ 268 spinlock_t dirty_lock; 269 }; 270 271 #define to_ast_crtc(x) container_of(x, struct ast_crtc, base) 272 #define to_ast_connector(x) container_of(x, struct ast_connector, base) 273 #define to_ast_encoder(x) container_of(x, struct ast_encoder, base) 274 #define to_ast_framebuffer(x) container_of(x, struct ast_framebuffer, base) 275 276 struct ast_vbios_stdtable { 277 u8 misc; 278 u8 seq[4]; 279 u8 crtc[25]; 280 u8 ar[20]; 281 u8 gr[9]; 282 }; 283 284 struct ast_vbios_enhtable { 285 u32 ht; 286 u32 hde; 287 u32 hfp; 288 u32 hsync; 289 u32 vt; 290 u32 vde; 291 u32 vfp; 292 u32 vsync; 293 u32 dclk_index; 294 u32 flags; 295 u32 refresh_rate; 296 u32 refresh_rate_index; 297 u32 mode_id; 298 }; 299 300 struct ast_vbios_dclk_info { 301 u8 param1; 302 u8 param2; 303 u8 param3; 304 }; 305 306 struct ast_vbios_mode_info { 307 const struct ast_vbios_stdtable *std_table; 308 const struct ast_vbios_enhtable *enh_table; 309 }; 310 311 extern int ast_mode_init(struct drm_device *dev); 312 extern void ast_mode_fini(struct drm_device *dev); 313 314 int ast_framebuffer_init(struct drm_device *dev, 315 struct ast_framebuffer *ast_fb, 316 const struct drm_mode_fb_cmd2 *mode_cmd, 317 struct drm_gem_object *obj); 318 319 int ast_fbdev_init(struct drm_device *dev); 320 void ast_fbdev_fini(struct drm_device *dev); 321 void ast_fbdev_set_suspend(struct drm_device *dev, int state); 322 void ast_fbdev_set_base(struct ast_private *ast, unsigned long gpu_addr); 323 324 struct ast_bo { 325 struct ttm_buffer_object bo; 326 struct ttm_placement placement; 327 struct ttm_bo_kmap_obj kmap; 328 struct drm_gem_object gem; 329 struct ttm_place placements[3]; 330 int pin_count; 331 }; 332 #define gem_to_ast_bo(gobj) container_of((gobj), struct ast_bo, gem) 333 334 static inline struct ast_bo * 335 ast_bo(struct ttm_buffer_object *bo) 336 { 337 return container_of(bo, struct ast_bo, bo); 338 } 339 340 341 #define to_ast_obj(x) container_of(x, struct ast_gem_object, base) 342 343 #define AST_MM_ALIGN_SHIFT 4 344 #define AST_MM_ALIGN_MASK ((1 << AST_MM_ALIGN_SHIFT) - 1) 345 346 extern int ast_dumb_create(struct drm_file *file, 347 struct drm_device *dev, 348 struct drm_mode_create_dumb *args); 349 350 extern void ast_gem_free_object(struct drm_gem_object *obj); 351 extern int ast_dumb_mmap_offset(struct drm_file *file, 352 struct drm_device *dev, 353 uint32_t handle, 354 uint64_t *offset); 355 356 #define DRM_FILE_PAGE_OFFSET (0x100000000ULL >> PAGE_SHIFT) 357 358 int ast_mm_init(struct ast_private *ast); 359 void ast_mm_fini(struct ast_private *ast); 360 361 int ast_bo_create(struct drm_device *dev, int size, int align, 362 uint32_t flags, struct ast_bo **pastbo); 363 364 int ast_gem_create(struct drm_device *dev, 365 u32 size, bool iskernel, 366 struct drm_gem_object **obj); 367 368 int ast_bo_pin(struct ast_bo *bo, u32 pl_flag, u64 *gpu_addr); 369 int ast_bo_unpin(struct ast_bo *bo); 370 371 static inline int ast_bo_reserve(struct ast_bo *bo, bool no_wait) 372 { 373 int ret; 374 375 ret = ttm_bo_reserve(&bo->bo, true, no_wait, NULL); 376 if (ret) { 377 if (ret != -ERESTARTSYS && ret != -EBUSY) 378 DRM_ERROR("reserve failed %p\n", bo); 379 return ret; 380 } 381 return 0; 382 } 383 384 static inline void ast_bo_unreserve(struct ast_bo *bo) 385 { 386 ttm_bo_unreserve(&bo->bo); 387 } 388 389 void ast_ttm_placement(struct ast_bo *bo, int domain); 390 int ast_bo_push_sysram(struct ast_bo *bo); 391 int ast_mmap(struct file *filp, struct vm_area_struct *vma); 392 393 /* ast post */ 394 void ast_enable_vga(struct drm_device *dev); 395 void ast_enable_mmio(struct drm_device *dev); 396 bool ast_is_vga_enabled(struct drm_device *dev); 397 void ast_post_gpu(struct drm_device *dev); 398 u32 ast_mindwm(struct ast_private *ast, u32 r); 399 void ast_moutdwm(struct ast_private *ast, u32 r, u32 v); 400 /* ast dp501 */ 401 void ast_set_dp501_video_output(struct drm_device *dev, u8 mode); 402 bool ast_backup_fw(struct drm_device *dev, u8 *addr, u32 size); 403 bool ast_dp501_read_edid(struct drm_device *dev, u8 *ediddata); 404 u8 ast_get_dp501_max_clk(struct drm_device *dev); 405 void ast_init_3rdtx(struct drm_device *dev); 406 void ast_release_firmware(struct drm_device *dev); 407 #endif 408