1 /* 2 * Copyright 2012 Red Hat Inc. 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the 6 * "Software"), to deal in the Software without restriction, including 7 * without limitation the rights to use, copy, modify, merge, publish, 8 * distribute, sub license, and/or sell copies of the Software, and to 9 * permit persons to whom the Software is furnished to do so, subject to 10 * the following conditions: 11 * 12 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 13 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 14 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL 15 * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, 16 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR 17 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE 18 * USE OR OTHER DEALINGS IN THE SOFTWARE. 19 * 20 * The above copyright notice and this permission notice (including the 21 * next paragraph) shall be included in all copies or substantial portions 22 * of the Software. 23 * 24 */ 25 /* 26 * Authors: Dave Airlie <airlied@redhat.com> 27 */ 28 #ifndef __AST_DRV_H__ 29 #define __AST_DRV_H__ 30 31 #include <drm/drm_encoder.h> 32 #include <drm/drm_fb_helper.h> 33 34 #include <drm/ttm/ttm_bo_api.h> 35 #include <drm/ttm/ttm_bo_driver.h> 36 #include <drm/ttm/ttm_placement.h> 37 #include <drm/ttm/ttm_memory.h> 38 #include <drm/ttm/ttm_module.h> 39 40 #include <drm/drm_gem.h> 41 42 #include <linux/i2c.h> 43 #include <linux/i2c-algo-bit.h> 44 45 #define DRIVER_AUTHOR "Dave Airlie" 46 47 #define DRIVER_NAME "ast" 48 #define DRIVER_DESC "AST" 49 #define DRIVER_DATE "20120228" 50 51 #define DRIVER_MAJOR 0 52 #define DRIVER_MINOR 1 53 #define DRIVER_PATCHLEVEL 0 54 55 #define PCI_CHIP_AST2000 0x2000 56 #define PCI_CHIP_AST2100 0x2010 57 #define PCI_CHIP_AST1180 0x1180 58 59 60 enum ast_chip { 61 AST2000, 62 AST2100, 63 AST1100, 64 AST2200, 65 AST2150, 66 AST2300, 67 AST2400, 68 AST1180, 69 }; 70 71 enum ast_tx_chip { 72 AST_TX_NONE, 73 AST_TX_SIL164, 74 AST_TX_ITE66121, 75 AST_TX_DP501, 76 }; 77 78 #define AST_DRAM_512Mx16 0 79 #define AST_DRAM_1Gx16 1 80 #define AST_DRAM_512Mx32 2 81 #define AST_DRAM_1Gx32 3 82 #define AST_DRAM_2Gx16 6 83 #define AST_DRAM_4Gx16 7 84 85 struct ast_fbdev; 86 87 struct ast_private { 88 struct drm_device *dev; 89 90 void __iomem *regs; 91 void __iomem *ioregs; 92 93 enum ast_chip chip; 94 bool vga2_clone; 95 uint32_t dram_bus_width; 96 uint32_t dram_type; 97 uint32_t mclk; 98 uint32_t vram_size; 99 100 struct ast_fbdev *fbdev; 101 102 int fb_mtrr; 103 104 struct { 105 struct drm_global_reference mem_global_ref; 106 struct ttm_bo_global_ref bo_global_ref; 107 struct ttm_bo_device bdev; 108 } ttm; 109 110 struct drm_gem_object *cursor_cache; 111 uint64_t cursor_cache_gpu_addr; 112 /* Acces to this cache is protected by the crtc->mutex of the only crtc 113 * we have. */ 114 struct ttm_bo_kmap_obj cache_kmap; 115 int next_cursor; 116 bool support_wide_screen; 117 bool DisableP2A; 118 119 enum ast_tx_chip tx_chip_type; 120 u8 dp501_maxclk; 121 u8 *dp501_fw_addr; 122 const struct firmware *dp501_fw; /* dp501 fw */ 123 }; 124 125 int ast_driver_load(struct drm_device *dev, unsigned long flags); 126 void ast_driver_unload(struct drm_device *dev); 127 128 struct ast_gem_object; 129 130 #define AST_IO_AR_PORT_WRITE (0x40) 131 #define AST_IO_MISC_PORT_WRITE (0x42) 132 #define AST_IO_VGA_ENABLE_PORT (0x43) 133 #define AST_IO_SEQ_PORT (0x44) 134 #define AST_IO_DAC_INDEX_READ (0x47) 135 #define AST_IO_DAC_INDEX_WRITE (0x48) 136 #define AST_IO_DAC_DATA (0x49) 137 #define AST_IO_GR_PORT (0x4E) 138 #define AST_IO_CRTC_PORT (0x54) 139 #define AST_IO_INPUT_STATUS1_READ (0x5A) 140 #define AST_IO_MISC_PORT_READ (0x4C) 141 142 #define AST_IO_MM_OFFSET (0x380) 143 144 #define __ast_read(x) \ 145 static inline u##x ast_read##x(struct ast_private *ast, u32 reg) { \ 146 u##x val = 0;\ 147 val = ioread##x(ast->regs + reg); \ 148 return val;\ 149 } 150 151 __ast_read(8); 152 __ast_read(16); 153 __ast_read(32) 154 155 #define __ast_io_read(x) \ 156 static inline u##x ast_io_read##x(struct ast_private *ast, u32 reg) { \ 157 u##x val = 0;\ 158 val = ioread##x(ast->ioregs + reg); \ 159 return val;\ 160 } 161 162 __ast_io_read(8); 163 __ast_io_read(16); 164 __ast_io_read(32); 165 166 #define __ast_write(x) \ 167 static inline void ast_write##x(struct ast_private *ast, u32 reg, u##x val) {\ 168 iowrite##x(val, ast->regs + reg);\ 169 } 170 171 __ast_write(8); 172 __ast_write(16); 173 __ast_write(32); 174 175 #define __ast_io_write(x) \ 176 static inline void ast_io_write##x(struct ast_private *ast, u32 reg, u##x val) {\ 177 iowrite##x(val, ast->ioregs + reg);\ 178 } 179 180 __ast_io_write(8); 181 __ast_io_write(16); 182 #undef __ast_io_write 183 184 static inline void ast_set_index_reg(struct ast_private *ast, 185 uint32_t base, uint8_t index, 186 uint8_t val) 187 { 188 ast_io_write16(ast, base, ((u16)val << 8) | index); 189 } 190 191 void ast_set_index_reg_mask(struct ast_private *ast, 192 uint32_t base, uint8_t index, 193 uint8_t mask, uint8_t val); 194 uint8_t ast_get_index_reg(struct ast_private *ast, 195 uint32_t base, uint8_t index); 196 uint8_t ast_get_index_reg_mask(struct ast_private *ast, 197 uint32_t base, uint8_t index, uint8_t mask); 198 199 static inline void ast_open_key(struct ast_private *ast) 200 { 201 ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0x80, 0xA8); 202 } 203 204 #define AST_VIDMEM_SIZE_8M 0x00800000 205 #define AST_VIDMEM_SIZE_16M 0x01000000 206 #define AST_VIDMEM_SIZE_32M 0x02000000 207 #define AST_VIDMEM_SIZE_64M 0x04000000 208 #define AST_VIDMEM_SIZE_128M 0x08000000 209 210 #define AST_VIDMEM_DEFAULT_SIZE AST_VIDMEM_SIZE_8M 211 212 #define AST_MAX_HWC_WIDTH 64 213 #define AST_MAX_HWC_HEIGHT 64 214 215 #define AST_HWC_SIZE (AST_MAX_HWC_WIDTH*AST_MAX_HWC_HEIGHT*2) 216 #define AST_HWC_SIGNATURE_SIZE 32 217 218 #define AST_DEFAULT_HWC_NUM 2 219 /* define for signature structure */ 220 #define AST_HWC_SIGNATURE_CHECKSUM 0x00 221 #define AST_HWC_SIGNATURE_SizeX 0x04 222 #define AST_HWC_SIGNATURE_SizeY 0x08 223 #define AST_HWC_SIGNATURE_X 0x0C 224 #define AST_HWC_SIGNATURE_Y 0x10 225 #define AST_HWC_SIGNATURE_HOTSPOTX 0x14 226 #define AST_HWC_SIGNATURE_HOTSPOTY 0x18 227 228 229 struct ast_i2c_chan { 230 struct i2c_adapter adapter; 231 struct drm_device *dev; 232 struct i2c_algo_bit_data bit; 233 }; 234 235 struct ast_connector { 236 struct drm_connector base; 237 struct ast_i2c_chan *i2c; 238 }; 239 240 struct ast_crtc { 241 struct drm_crtc base; 242 u8 lut_r[256], lut_g[256], lut_b[256]; 243 struct drm_gem_object *cursor_bo; 244 uint64_t cursor_addr; 245 int cursor_width, cursor_height; 246 u8 offset_x, offset_y; 247 }; 248 249 struct ast_encoder { 250 struct drm_encoder base; 251 }; 252 253 struct ast_framebuffer { 254 struct drm_framebuffer base; 255 struct drm_gem_object *obj; 256 }; 257 258 struct ast_fbdev { 259 struct drm_fb_helper helper; 260 struct ast_framebuffer afb; 261 void *sysram; 262 int size; 263 struct ttm_bo_kmap_obj mapping; 264 int x1, y1, x2, y2; /* dirty rect */ 265 spinlock_t dirty_lock; 266 }; 267 268 #define to_ast_crtc(x) container_of(x, struct ast_crtc, base) 269 #define to_ast_connector(x) container_of(x, struct ast_connector, base) 270 #define to_ast_encoder(x) container_of(x, struct ast_encoder, base) 271 #define to_ast_framebuffer(x) container_of(x, struct ast_framebuffer, base) 272 273 struct ast_vbios_stdtable { 274 u8 misc; 275 u8 seq[4]; 276 u8 crtc[25]; 277 u8 ar[20]; 278 u8 gr[9]; 279 }; 280 281 struct ast_vbios_enhtable { 282 u32 ht; 283 u32 hde; 284 u32 hfp; 285 u32 hsync; 286 u32 vt; 287 u32 vde; 288 u32 vfp; 289 u32 vsync; 290 u32 dclk_index; 291 u32 flags; 292 u32 refresh_rate; 293 u32 refresh_rate_index; 294 u32 mode_id; 295 }; 296 297 struct ast_vbios_dclk_info { 298 u8 param1; 299 u8 param2; 300 u8 param3; 301 }; 302 303 struct ast_vbios_mode_info { 304 struct ast_vbios_stdtable *std_table; 305 struct ast_vbios_enhtable *enh_table; 306 }; 307 308 extern int ast_mode_init(struct drm_device *dev); 309 extern void ast_mode_fini(struct drm_device *dev); 310 311 int ast_framebuffer_init(struct drm_device *dev, 312 struct ast_framebuffer *ast_fb, 313 const struct drm_mode_fb_cmd2 *mode_cmd, 314 struct drm_gem_object *obj); 315 316 int ast_fbdev_init(struct drm_device *dev); 317 void ast_fbdev_fini(struct drm_device *dev); 318 void ast_fbdev_set_suspend(struct drm_device *dev, int state); 319 void ast_fbdev_set_base(struct ast_private *ast, unsigned long gpu_addr); 320 321 struct ast_bo { 322 struct ttm_buffer_object bo; 323 struct ttm_placement placement; 324 struct ttm_bo_kmap_obj kmap; 325 struct drm_gem_object gem; 326 struct ttm_place placements[3]; 327 int pin_count; 328 }; 329 #define gem_to_ast_bo(gobj) container_of((gobj), struct ast_bo, gem) 330 331 static inline struct ast_bo * 332 ast_bo(struct ttm_buffer_object *bo) 333 { 334 return container_of(bo, struct ast_bo, bo); 335 } 336 337 338 #define to_ast_obj(x) container_of(x, struct ast_gem_object, base) 339 340 #define AST_MM_ALIGN_SHIFT 4 341 #define AST_MM_ALIGN_MASK ((1 << AST_MM_ALIGN_SHIFT) - 1) 342 343 extern int ast_dumb_create(struct drm_file *file, 344 struct drm_device *dev, 345 struct drm_mode_create_dumb *args); 346 347 extern void ast_gem_free_object(struct drm_gem_object *obj); 348 extern int ast_dumb_mmap_offset(struct drm_file *file, 349 struct drm_device *dev, 350 uint32_t handle, 351 uint64_t *offset); 352 353 #define DRM_FILE_PAGE_OFFSET (0x100000000ULL >> PAGE_SHIFT) 354 355 int ast_mm_init(struct ast_private *ast); 356 void ast_mm_fini(struct ast_private *ast); 357 358 int ast_bo_create(struct drm_device *dev, int size, int align, 359 uint32_t flags, struct ast_bo **pastbo); 360 361 int ast_gem_create(struct drm_device *dev, 362 u32 size, bool iskernel, 363 struct drm_gem_object **obj); 364 365 int ast_bo_pin(struct ast_bo *bo, u32 pl_flag, u64 *gpu_addr); 366 int ast_bo_unpin(struct ast_bo *bo); 367 368 static inline int ast_bo_reserve(struct ast_bo *bo, bool no_wait) 369 { 370 int ret; 371 372 ret = ttm_bo_reserve(&bo->bo, true, no_wait, NULL); 373 if (ret) { 374 if (ret != -ERESTARTSYS && ret != -EBUSY) 375 DRM_ERROR("reserve failed %p\n", bo); 376 return ret; 377 } 378 return 0; 379 } 380 381 static inline void ast_bo_unreserve(struct ast_bo *bo) 382 { 383 ttm_bo_unreserve(&bo->bo); 384 } 385 386 void ast_ttm_placement(struct ast_bo *bo, int domain); 387 int ast_bo_push_sysram(struct ast_bo *bo); 388 int ast_mmap(struct file *filp, struct vm_area_struct *vma); 389 390 /* ast post */ 391 void ast_enable_vga(struct drm_device *dev); 392 void ast_enable_mmio(struct drm_device *dev); 393 bool ast_is_vga_enabled(struct drm_device *dev); 394 void ast_post_gpu(struct drm_device *dev); 395 u32 ast_mindwm(struct ast_private *ast, u32 r); 396 void ast_moutdwm(struct ast_private *ast, u32 r, u32 v); 397 /* ast dp501 */ 398 int ast_load_dp501_microcode(struct drm_device *dev); 399 void ast_set_dp501_video_output(struct drm_device *dev, u8 mode); 400 bool ast_launch_m68k(struct drm_device *dev); 401 bool ast_backup_fw(struct drm_device *dev, u8 *addr, u32 size); 402 bool ast_dp501_read_edid(struct drm_device *dev, u8 *ediddata); 403 u8 ast_get_dp501_max_clk(struct drm_device *dev); 404 void ast_init_3rdtx(struct drm_device *dev); 405 #endif 406