1 /*
2 * Copyright 2012 Red Hat Inc.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the
6 * "Software"), to deal in the Software without restriction, including
7 * without limitation the rights to use, copy, modify, merge, publish,
8 * distribute, sub license, and/or sell copies of the Software, and to
9 * permit persons to whom the Software is furnished to do so, subject to
10 * the following conditions:
11 *
12 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
13 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
14 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
15 * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
16 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
17 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
18 * USE OR OTHER DEALINGS IN THE SOFTWARE.
19 *
20 * The above copyright notice and this permission notice (including the
21 * next paragraph) shall be included in all copies or substantial portions
22 * of the Software.
23 *
24 */
25 /*
26 * Authors: Dave Airlie <airlied@redhat.com>
27 */
28 #ifndef __AST_DRV_H__
29 #define __AST_DRV_H__
30
31 #include <linux/i2c.h>
32 #include <linux/i2c-algo-bit.h>
33 #include <linux/io.h>
34 #include <linux/types.h>
35
36 #include <drm/drm_connector.h>
37 #include <drm/drm_crtc.h>
38 #include <drm/drm_encoder.h>
39 #include <drm/drm_mode.h>
40 #include <drm/drm_framebuffer.h>
41
42 #define DRIVER_AUTHOR "Dave Airlie"
43
44 #define DRIVER_NAME "ast"
45 #define DRIVER_DESC "AST"
46 #define DRIVER_DATE "20120228"
47
48 #define DRIVER_MAJOR 0
49 #define DRIVER_MINOR 1
50 #define DRIVER_PATCHLEVEL 0
51
52 #define PCI_CHIP_AST2000 0x2000
53 #define PCI_CHIP_AST2100 0x2010
54
55 #define __AST_CHIP(__gen, __index) ((__gen) << 16 | (__index))
56
57 enum ast_chip {
58 /* 1st gen */
59 AST1000 = __AST_CHIP(1, 0), // unused
60 AST2000 = __AST_CHIP(1, 1),
61 /* 2nd gen */
62 AST1100 = __AST_CHIP(2, 0),
63 AST2100 = __AST_CHIP(2, 1),
64 AST2050 = __AST_CHIP(2, 2), // unused
65 /* 3rd gen */
66 AST2200 = __AST_CHIP(3, 0),
67 AST2150 = __AST_CHIP(3, 1),
68 /* 4th gen */
69 AST2300 = __AST_CHIP(4, 0),
70 AST1300 = __AST_CHIP(4, 1),
71 AST1050 = __AST_CHIP(4, 2), // unused
72 /* 5th gen */
73 AST2400 = __AST_CHIP(5, 0),
74 AST1400 = __AST_CHIP(5, 1),
75 AST1250 = __AST_CHIP(5, 2), // unused
76 /* 6th gen */
77 AST2500 = __AST_CHIP(6, 0),
78 AST2510 = __AST_CHIP(6, 1),
79 AST2520 = __AST_CHIP(6, 2), // unused
80 /* 7th gen */
81 AST2600 = __AST_CHIP(7, 0),
82 AST2620 = __AST_CHIP(7, 1), // unused
83 };
84
85 #define __AST_CHIP_GEN(__chip) (((unsigned long)(__chip)) >> 16)
86
87 enum ast_tx_chip {
88 AST_TX_NONE,
89 AST_TX_SIL164,
90 AST_TX_DP501,
91 AST_TX_ASTDP,
92 };
93
94 #define AST_TX_NONE_BIT BIT(AST_TX_NONE)
95 #define AST_TX_SIL164_BIT BIT(AST_TX_SIL164)
96 #define AST_TX_DP501_BIT BIT(AST_TX_DP501)
97 #define AST_TX_ASTDP_BIT BIT(AST_TX_ASTDP)
98
99 #define AST_DRAM_512Mx16 0
100 #define AST_DRAM_1Gx16 1
101 #define AST_DRAM_512Mx32 2
102 #define AST_DRAM_1Gx32 3
103 #define AST_DRAM_2Gx16 6
104 #define AST_DRAM_4Gx16 7
105 #define AST_DRAM_8Gx16 8
106
107 /*
108 * Hardware cursor
109 */
110
111 #define AST_MAX_HWC_WIDTH 64
112 #define AST_MAX_HWC_HEIGHT 64
113
114 #define AST_HWC_SIZE (AST_MAX_HWC_WIDTH * AST_MAX_HWC_HEIGHT * 2)
115 #define AST_HWC_SIGNATURE_SIZE 32
116
117 /* define for signature structure */
118 #define AST_HWC_SIGNATURE_CHECKSUM 0x00
119 #define AST_HWC_SIGNATURE_SizeX 0x04
120 #define AST_HWC_SIGNATURE_SizeY 0x08
121 #define AST_HWC_SIGNATURE_X 0x0C
122 #define AST_HWC_SIGNATURE_Y 0x10
123 #define AST_HWC_SIGNATURE_HOTSPOTX 0x14
124 #define AST_HWC_SIGNATURE_HOTSPOTY 0x18
125
126 /*
127 * Planes
128 */
129
130 struct ast_plane {
131 struct drm_plane base;
132
133 void __iomem *vaddr;
134 u64 offset;
135 unsigned long size;
136 };
137
to_ast_plane(struct drm_plane * plane)138 static inline struct ast_plane *to_ast_plane(struct drm_plane *plane)
139 {
140 return container_of(plane, struct ast_plane, base);
141 }
142
143 /*
144 * Connector with i2c channel
145 */
146
147 struct ast_i2c_chan {
148 struct i2c_adapter adapter;
149 struct drm_device *dev;
150 struct i2c_algo_bit_data bit;
151 };
152
153 struct ast_vga_connector {
154 struct drm_connector base;
155 struct ast_i2c_chan *i2c;
156 };
157
158 static inline struct ast_vga_connector *
to_ast_vga_connector(struct drm_connector * connector)159 to_ast_vga_connector(struct drm_connector *connector)
160 {
161 return container_of(connector, struct ast_vga_connector, base);
162 }
163
164 struct ast_sil164_connector {
165 struct drm_connector base;
166 struct ast_i2c_chan *i2c;
167 };
168
169 static inline struct ast_sil164_connector *
to_ast_sil164_connector(struct drm_connector * connector)170 to_ast_sil164_connector(struct drm_connector *connector)
171 {
172 return container_of(connector, struct ast_sil164_connector, base);
173 }
174
175 struct ast_bmc_connector {
176 struct drm_connector base;
177 struct drm_connector *physical_connector;
178 };
179
180 static inline struct ast_bmc_connector *
to_ast_bmc_connector(struct drm_connector * connector)181 to_ast_bmc_connector(struct drm_connector *connector)
182 {
183 return container_of(connector, struct ast_bmc_connector, base);
184 }
185
186 /*
187 * Device
188 */
189
190 struct ast_device {
191 struct drm_device base;
192
193 struct mutex ioregs_lock; /* Protects access to I/O registers in ioregs */
194 void __iomem *regs;
195 void __iomem *ioregs;
196 void __iomem *dp501_fw_buf;
197
198 enum ast_chip chip;
199 uint32_t dram_bus_width;
200 uint32_t dram_type;
201 uint32_t mclk;
202
203 void __iomem *vram;
204 unsigned long vram_base;
205 unsigned long vram_size;
206 unsigned long vram_fb_available;
207
208 struct ast_plane primary_plane;
209 struct ast_plane cursor_plane;
210 struct drm_crtc crtc;
211 struct {
212 struct {
213 struct drm_encoder encoder;
214 struct ast_vga_connector vga_connector;
215 } vga;
216 struct {
217 struct drm_encoder encoder;
218 struct ast_sil164_connector sil164_connector;
219 } sil164;
220 struct {
221 struct drm_encoder encoder;
222 struct drm_connector connector;
223 } dp501;
224 struct {
225 struct drm_encoder encoder;
226 struct drm_connector connector;
227 } astdp;
228 struct {
229 struct drm_encoder encoder;
230 struct ast_bmc_connector bmc_connector;
231 } bmc;
232 } output;
233
234 bool support_wide_screen;
235 enum {
236 ast_use_p2a,
237 ast_use_dt,
238 ast_use_defaults
239 } config_mode;
240
241 unsigned long tx_chip_types; /* bitfield of enum ast_chip_type */
242 u8 *dp501_fw_addr;
243 const struct firmware *dp501_fw; /* dp501 fw */
244 };
245
to_ast_device(struct drm_device * dev)246 static inline struct ast_device *to_ast_device(struct drm_device *dev)
247 {
248 return container_of(dev, struct ast_device, base);
249 }
250
251 struct ast_device *ast_device_create(const struct drm_driver *drv,
252 struct pci_dev *pdev,
253 unsigned long flags);
254
__ast_gen(struct ast_device * ast)255 static inline unsigned long __ast_gen(struct ast_device *ast)
256 {
257 return __AST_CHIP_GEN(ast->chip);
258 }
259 #define AST_GEN(__ast) __ast_gen(__ast)
260
__ast_gen_is_eq(struct ast_device * ast,unsigned long gen)261 static inline bool __ast_gen_is_eq(struct ast_device *ast, unsigned long gen)
262 {
263 return __ast_gen(ast) == gen;
264 }
265 #define IS_AST_GEN1(__ast) __ast_gen_is_eq(__ast, 1)
266 #define IS_AST_GEN2(__ast) __ast_gen_is_eq(__ast, 2)
267 #define IS_AST_GEN3(__ast) __ast_gen_is_eq(__ast, 3)
268 #define IS_AST_GEN4(__ast) __ast_gen_is_eq(__ast, 4)
269 #define IS_AST_GEN5(__ast) __ast_gen_is_eq(__ast, 5)
270 #define IS_AST_GEN6(__ast) __ast_gen_is_eq(__ast, 6)
271 #define IS_AST_GEN7(__ast) __ast_gen_is_eq(__ast, 7)
272
273 #define AST_IO_AR_PORT_WRITE (0x40)
274 #define AST_IO_MISC_PORT_WRITE (0x42)
275 #define AST_IO_VGA_ENABLE_PORT (0x43)
276 #define AST_IO_SEQ_PORT (0x44)
277 #define AST_IO_DAC_INDEX_READ (0x47)
278 #define AST_IO_DAC_INDEX_WRITE (0x48)
279 #define AST_IO_DAC_DATA (0x49)
280 #define AST_IO_GR_PORT (0x4E)
281 #define AST_IO_CRTC_PORT (0x54)
282 #define AST_IO_INPUT_STATUS1_READ (0x5A)
283 #define AST_IO_MISC_PORT_READ (0x4C)
284
285 #define AST_IO_MM_OFFSET (0x380)
286
287 #define AST_IO_VGAIR1_VREFRESH BIT(3)
288
289 #define AST_IO_VGACRCB_HWC_ENABLED BIT(1)
290 #define AST_IO_VGACRCB_HWC_16BPP BIT(0) /* set: ARGB4444, cleared: 2bpp palette */
291
ast_read32(struct ast_device * ast,u32 reg)292 static inline u32 ast_read32(struct ast_device *ast, u32 reg)
293 {
294 return ioread32(ast->regs + reg);
295 }
296
ast_write32(struct ast_device * ast,u32 reg,u32 val)297 static inline void ast_write32(struct ast_device *ast, u32 reg, u32 val)
298 {
299 iowrite32(val, ast->regs + reg);
300 }
301
ast_io_read8(struct ast_device * ast,u32 reg)302 static inline u8 ast_io_read8(struct ast_device *ast, u32 reg)
303 {
304 return ioread8(ast->ioregs + reg);
305 }
306
ast_io_write8(struct ast_device * ast,u32 reg,u8 val)307 static inline void ast_io_write8(struct ast_device *ast, u32 reg, u8 val)
308 {
309 iowrite8(val, ast->ioregs + reg);
310 }
311
ast_get_index_reg(struct ast_device * ast,u32 base,u8 index)312 static inline u8 ast_get_index_reg(struct ast_device *ast, u32 base, u8 index)
313 {
314 ast_io_write8(ast, base, index);
315 ++base;
316 return ast_io_read8(ast, base);
317 }
318
ast_get_index_reg_mask(struct ast_device * ast,u32 base,u8 index,u8 preserve_mask)319 static inline u8 ast_get_index_reg_mask(struct ast_device *ast, u32 base, u8 index,
320 u8 preserve_mask)
321 {
322 u8 val = ast_get_index_reg(ast, base, index);
323
324 return val & preserve_mask;
325 }
326
ast_set_index_reg(struct ast_device * ast,u32 base,u8 index,u8 val)327 static inline void ast_set_index_reg(struct ast_device *ast, u32 base, u8 index, u8 val)
328 {
329 ast_io_write8(ast, base, index);
330 ++base;
331 ast_io_write8(ast, base, val);
332 }
333
ast_set_index_reg_mask(struct ast_device * ast,u32 base,u8 index,u8 preserve_mask,u8 val)334 static inline void ast_set_index_reg_mask(struct ast_device *ast, u32 base, u8 index,
335 u8 preserve_mask, u8 val)
336 {
337 u8 tmp = ast_get_index_reg_mask(ast, base, index, preserve_mask);
338
339 tmp |= val;
340 ast_set_index_reg(ast, base, index, tmp);
341 }
342
343 #define AST_VIDMEM_SIZE_8M 0x00800000
344 #define AST_VIDMEM_SIZE_16M 0x01000000
345 #define AST_VIDMEM_SIZE_32M 0x02000000
346 #define AST_VIDMEM_SIZE_64M 0x04000000
347 #define AST_VIDMEM_SIZE_128M 0x08000000
348
349 #define AST_VIDMEM_DEFAULT_SIZE AST_VIDMEM_SIZE_8M
350
351 struct ast_vbios_stdtable {
352 u8 misc;
353 u8 seq[4];
354 u8 crtc[25];
355 u8 ar[20];
356 u8 gr[9];
357 };
358
359 struct ast_vbios_enhtable {
360 u32 ht;
361 u32 hde;
362 u32 hfp;
363 u32 hsync;
364 u32 vt;
365 u32 vde;
366 u32 vfp;
367 u32 vsync;
368 u32 dclk_index;
369 u32 flags;
370 u32 refresh_rate;
371 u32 refresh_rate_index;
372 u32 mode_id;
373 };
374
375 struct ast_vbios_dclk_info {
376 u8 param1;
377 u8 param2;
378 u8 param3;
379 };
380
381 struct ast_vbios_mode_info {
382 const struct ast_vbios_stdtable *std_table;
383 const struct ast_vbios_enhtable *enh_table;
384 };
385
386 struct ast_crtc_state {
387 struct drm_crtc_state base;
388
389 /* Last known format of primary plane */
390 const struct drm_format_info *format;
391
392 struct ast_vbios_mode_info vbios_mode_info;
393 };
394
395 #define to_ast_crtc_state(state) container_of(state, struct ast_crtc_state, base)
396
397 int ast_mode_config_init(struct ast_device *ast);
398
399 #define AST_MM_ALIGN_SHIFT 4
400 #define AST_MM_ALIGN_MASK ((1 << AST_MM_ALIGN_SHIFT) - 1)
401
402 #define AST_DP501_FW_VERSION_MASK GENMASK(7, 4)
403 #define AST_DP501_FW_VERSION_1 BIT(4)
404 #define AST_DP501_PNP_CONNECTED BIT(1)
405
406 #define AST_DP501_DEFAULT_DCLK 65
407
408 #define AST_DP501_GBL_VERSION 0xf000
409 #define AST_DP501_PNPMONITOR 0xf010
410 #define AST_DP501_LINKRATE 0xf014
411 #define AST_DP501_EDID_DATA 0xf020
412
413 /*
414 * Display Transmitter Type:
415 */
416 #define TX_TYPE_MASK GENMASK(3, 1)
417 #define NO_TX (0 << 1)
418 #define ITE66121_VBIOS_TX (1 << 1)
419 #define SI164_VBIOS_TX (2 << 1)
420 #define CH7003_VBIOS_TX (3 << 1)
421 #define DP501_VBIOS_TX (4 << 1)
422 #define ANX9807_VBIOS_TX (5 << 1)
423 #define TX_FW_EMBEDDED_FW_TX (6 << 1)
424 #define ASTDP_DPMCU_TX (7 << 1)
425
426 #define AST_VRAM_INIT_STATUS_MASK GENMASK(7, 6)
427 //#define AST_VRAM_INIT_BY_BMC BIT(7)
428 //#define AST_VRAM_INIT_READY BIT(6)
429
430 /* Define for Soc scratched reg used on ASTDP */
431 #define AST_DP_PHY_SLEEP BIT(4)
432 #define AST_DP_VIDEO_ENABLE BIT(0)
433
434 #define AST_DP_POWER_ON true
435 #define AST_DP_POWER_OFF false
436
437 /*
438 * CRD1[b5]: DP MCU FW is executing
439 * CRDC[b0]: DP link success
440 * CRDF[b0]: DP HPD
441 * CRE5[b0]: Host reading EDID process is done
442 */
443 #define ASTDP_MCU_FW_EXECUTING BIT(5)
444 #define ASTDP_LINK_SUCCESS BIT(0)
445 #define ASTDP_HPD BIT(0)
446 #define ASTDP_HOST_EDID_READ_DONE BIT(0)
447 #define ASTDP_HOST_EDID_READ_DONE_MASK GENMASK(0, 0)
448
449 /*
450 * CRB8[b1]: Enable VSYNC off
451 * CRB8[b0]: Enable HSYNC off
452 */
453 #define AST_DPMS_VSYNC_OFF BIT(1)
454 #define AST_DPMS_HSYNC_OFF BIT(0)
455
456 /*
457 * CRDF[b4]: Mirror of AST_DP_VIDEO_ENABLE
458 * Precondition: A. ~AST_DP_PHY_SLEEP &&
459 * B. DP_HPD &&
460 * C. DP_LINK_SUCCESS
461 */
462 #define ASTDP_MIRROR_VIDEO_ENABLE BIT(4)
463
464 #define ASTDP_EDID_READ_POINTER_MASK GENMASK(7, 0)
465 #define ASTDP_EDID_VALID_FLAG_MASK GENMASK(0, 0)
466 #define ASTDP_EDID_READ_DATA_MASK GENMASK(7, 0)
467
468 /*
469 * ASTDP setmode registers:
470 * CRE0[7:0]: MISC0 ((0x00: 18-bpp) or (0x20: 24-bpp)
471 * CRE1[7:0]: MISC1 (default: 0x00)
472 * CRE2[7:0]: video format index (0x00 ~ 0x20 or 0x40 ~ 0x50)
473 */
474 #define ASTDP_MISC0_24bpp BIT(5)
475 #define ASTDP_MISC1 0
476 #define ASTDP_AND_CLEAR_MASK 0x00
477
478 /*
479 * ASTDP resoultion table:
480 * EX: ASTDP_A_B_C:
481 * A: Resolution
482 * B: Refresh Rate
483 * C: Misc information, such as CVT, Reduce Blanked
484 */
485 #define ASTDP_640x480_60 0x00
486 #define ASTDP_640x480_72 0x01
487 #define ASTDP_640x480_75 0x02
488 #define ASTDP_640x480_85 0x03
489 #define ASTDP_800x600_56 0x04
490 #define ASTDP_800x600_60 0x05
491 #define ASTDP_800x600_72 0x06
492 #define ASTDP_800x600_75 0x07
493 #define ASTDP_800x600_85 0x08
494 #define ASTDP_1024x768_60 0x09
495 #define ASTDP_1024x768_70 0x0A
496 #define ASTDP_1024x768_75 0x0B
497 #define ASTDP_1024x768_85 0x0C
498 #define ASTDP_1280x1024_60 0x0D
499 #define ASTDP_1280x1024_75 0x0E
500 #define ASTDP_1280x1024_85 0x0F
501 #define ASTDP_1600x1200_60 0x10
502 #define ASTDP_320x240_60 0x11
503 #define ASTDP_400x300_60 0x12
504 #define ASTDP_512x384_60 0x13
505 #define ASTDP_1920x1200_60 0x14
506 #define ASTDP_1920x1080_60 0x15
507 #define ASTDP_1280x800_60 0x16
508 #define ASTDP_1280x800_60_RB 0x17
509 #define ASTDP_1440x900_60 0x18
510 #define ASTDP_1440x900_60_RB 0x19
511 #define ASTDP_1680x1050_60 0x1A
512 #define ASTDP_1680x1050_60_RB 0x1B
513 #define ASTDP_1600x900_60 0x1C
514 #define ASTDP_1600x900_60_RB 0x1D
515 #define ASTDP_1366x768_60 0x1E
516 #define ASTDP_1152x864_75 0x1F
517
518 int ast_mm_init(struct ast_device *ast);
519
520 /* ast post */
521 void ast_post_gpu(struct drm_device *dev);
522 u32 ast_mindwm(struct ast_device *ast, u32 r);
523 void ast_moutdwm(struct ast_device *ast, u32 r, u32 v);
524 void ast_patch_ahb_2500(struct ast_device *ast);
525 /* ast dp501 */
526 void ast_set_dp501_video_output(struct drm_device *dev, u8 mode);
527 bool ast_backup_fw(struct drm_device *dev, u8 *addr, u32 size);
528 bool ast_dp501_is_connected(struct ast_device *ast);
529 bool ast_dp501_read_edid(struct drm_device *dev, u8 *ediddata);
530 u8 ast_get_dp501_max_clk(struct drm_device *dev);
531 void ast_init_3rdtx(struct drm_device *dev);
532
533 /* ast_i2c.c */
534 struct ast_i2c_chan *ast_i2c_create(struct drm_device *dev);
535
536 /* aspeed DP */
537 bool ast_astdp_is_connected(struct ast_device *ast);
538 int ast_astdp_read_edid(struct drm_device *dev, u8 *ediddata);
539 void ast_dp_launch(struct drm_device *dev);
540 void ast_dp_power_on_off(struct drm_device *dev, bool no);
541 void ast_dp_set_on_off(struct drm_device *dev, bool no);
542 void ast_dp_set_mode(struct drm_crtc *crtc, struct ast_vbios_mode_info *vbios_mode);
543
544 #endif
545