1 /*
2  * (C) COPYRIGHT 2016 ARM Limited. All rights reserved.
3  * Author: Liviu Dudau <Liviu.Dudau@arm.com>
4  *
5  * This program is free software and is provided to you under the terms of the
6  * GNU General Public License version 2 as published by the Free Software
7  * Foundation, and any use by you of this program is subject to the terms
8  * of such GNU licence.
9  *
10  * ARM Mali DP plane manipulation routines.
11  */
12 
13 #include <drm/drmP.h>
14 #include <drm/drm_atomic.h>
15 #include <drm/drm_atomic_helper.h>
16 #include <drm/drm_fb_cma_helper.h>
17 #include <drm/drm_gem_cma_helper.h>
18 #include <drm/drm_plane_helper.h>
19 #include <drm/drm_print.h>
20 
21 #include "malidp_hw.h"
22 #include "malidp_drv.h"
23 
24 /* Layer specific register offsets */
25 #define MALIDP_LAYER_FORMAT		0x000
26 #define MALIDP_LAYER_CONTROL		0x004
27 #define   LAYER_ENABLE			(1 << 0)
28 #define   LAYER_FLOWCFG_MASK		7
29 #define   LAYER_FLOWCFG(x)		(((x) & LAYER_FLOWCFG_MASK) << 1)
30 #define     LAYER_FLOWCFG_SCALE_SE	3
31 #define   LAYER_ROT_OFFSET		8
32 #define   LAYER_H_FLIP			(1 << 10)
33 #define   LAYER_V_FLIP			(1 << 11)
34 #define   LAYER_ROT_MASK		(0xf << 8)
35 #define   LAYER_COMP_MASK		(0x3 << 12)
36 #define   LAYER_COMP_PIXEL		(0x3 << 12)
37 #define   LAYER_COMP_PLANE		(0x2 << 12)
38 #define MALIDP_LAYER_COMPOSE		0x008
39 #define MALIDP_LAYER_SIZE		0x00c
40 #define   LAYER_H_VAL(x)		(((x) & 0x1fff) << 0)
41 #define   LAYER_V_VAL(x)		(((x) & 0x1fff) << 16)
42 #define MALIDP_LAYER_COMP_SIZE		0x010
43 #define MALIDP_LAYER_OFFSET		0x014
44 #define MALIDP550_LS_ENABLE		0x01c
45 #define MALIDP550_LS_R1_IN_SIZE		0x020
46 
47 /*
48  * This 4-entry look-up-table is used to determine the full 8-bit alpha value
49  * for formats with 1- or 2-bit alpha channels.
50  * We set it to give 100%/0% opacity for 1-bit formats and 100%/66%/33%/0%
51  * opacity for 2-bit formats.
52  */
53 #define MALIDP_ALPHA_LUT 0xffaa5500
54 
55 static void malidp_de_plane_destroy(struct drm_plane *plane)
56 {
57 	struct malidp_plane *mp = to_malidp_plane(plane);
58 
59 	if (mp->base.fb)
60 		drm_framebuffer_unreference(mp->base.fb);
61 
62 	drm_plane_helper_disable(plane);
63 	drm_plane_cleanup(plane);
64 	devm_kfree(plane->dev->dev, mp);
65 }
66 
67 /*
68  * Replicate what the default ->reset hook does: free the state pointer and
69  * allocate a new empty object. We just need enough space to store
70  * a malidp_plane_state instead of a drm_plane_state.
71  */
72 static void malidp_plane_reset(struct drm_plane *plane)
73 {
74 	struct malidp_plane_state *state = to_malidp_plane_state(plane->state);
75 
76 	if (state)
77 		__drm_atomic_helper_plane_destroy_state(&state->base);
78 	kfree(state);
79 	plane->state = NULL;
80 	state = kzalloc(sizeof(*state), GFP_KERNEL);
81 	if (state) {
82 		state->base.plane = plane;
83 		state->base.rotation = DRM_MODE_ROTATE_0;
84 		plane->state = &state->base;
85 	}
86 }
87 
88 static struct
89 drm_plane_state *malidp_duplicate_plane_state(struct drm_plane *plane)
90 {
91 	struct malidp_plane_state *state, *m_state;
92 
93 	if (!plane->state)
94 		return NULL;
95 
96 	state = kmalloc(sizeof(*state), GFP_KERNEL);
97 	if (!state)
98 		return NULL;
99 
100 	m_state = to_malidp_plane_state(plane->state);
101 	__drm_atomic_helper_plane_duplicate_state(plane, &state->base);
102 	state->rotmem_size = m_state->rotmem_size;
103 	state->format = m_state->format;
104 	state->n_planes = m_state->n_planes;
105 
106 	return &state->base;
107 }
108 
109 static void malidp_destroy_plane_state(struct drm_plane *plane,
110 				       struct drm_plane_state *state)
111 {
112 	struct malidp_plane_state *m_state = to_malidp_plane_state(state);
113 
114 	__drm_atomic_helper_plane_destroy_state(state);
115 	kfree(m_state);
116 }
117 
118 static void malidp_plane_atomic_print_state(struct drm_printer *p,
119 					    const struct drm_plane_state *state)
120 {
121 	struct malidp_plane_state *ms = to_malidp_plane_state(state);
122 
123 	drm_printf(p, "\trotmem_size=%u\n", ms->rotmem_size);
124 	drm_printf(p, "\tformat_id=%u\n", ms->format);
125 	drm_printf(p, "\tn_planes=%u\n", ms->n_planes);
126 }
127 
128 static const struct drm_plane_funcs malidp_de_plane_funcs = {
129 	.update_plane = drm_atomic_helper_update_plane,
130 	.disable_plane = drm_atomic_helper_disable_plane,
131 	.destroy = malidp_de_plane_destroy,
132 	.reset = malidp_plane_reset,
133 	.atomic_duplicate_state = malidp_duplicate_plane_state,
134 	.atomic_destroy_state = malidp_destroy_plane_state,
135 	.atomic_print_state = malidp_plane_atomic_print_state,
136 };
137 
138 static int malidp_se_check_scaling(struct malidp_plane *mp,
139 				   struct drm_plane_state *state)
140 {
141 	struct drm_crtc_state *crtc_state =
142 		drm_atomic_get_existing_crtc_state(state->state, state->crtc);
143 	struct malidp_crtc_state *mc;
144 	struct drm_rect clip = { 0 };
145 	u32 src_w, src_h;
146 	int ret;
147 
148 	if (!crtc_state)
149 		return -EINVAL;
150 
151 	clip.x2 = crtc_state->adjusted_mode.hdisplay;
152 	clip.y2 = crtc_state->adjusted_mode.vdisplay;
153 	ret = drm_plane_helper_check_state(state, &clip, 0, INT_MAX, true, true);
154 	if (ret)
155 		return ret;
156 
157 	src_w = state->src_w >> 16;
158 	src_h = state->src_h >> 16;
159 	if ((state->crtc_w == src_w) && (state->crtc_h == src_h)) {
160 		/* Scaling not necessary for this plane. */
161 		mc->scaled_planes_mask &= ~(mp->layer->id);
162 		return 0;
163 	}
164 
165 	if (mp->layer->id & (DE_SMART | DE_GRAPHICS2))
166 		return -EINVAL;
167 
168 	mc = to_malidp_crtc_state(crtc_state);
169 
170 	mc->scaled_planes_mask |= mp->layer->id;
171 	/* Defer scaling requirements calculation to the crtc check. */
172 	return 0;
173 }
174 
175 static int malidp_de_plane_check(struct drm_plane *plane,
176 				 struct drm_plane_state *state)
177 {
178 	struct malidp_plane *mp = to_malidp_plane(plane);
179 	struct malidp_plane_state *ms = to_malidp_plane_state(state);
180 	struct drm_framebuffer *fb;
181 	int i, ret;
182 
183 	if (!state->crtc || !state->fb)
184 		return 0;
185 
186 	fb = state->fb;
187 
188 	ms->format = malidp_hw_get_format_id(&mp->hwdev->map, mp->layer->id,
189 					    fb->format->format);
190 	if (ms->format == MALIDP_INVALID_FORMAT_ID)
191 		return -EINVAL;
192 
193 	ms->n_planes = fb->format->num_planes;
194 	for (i = 0; i < ms->n_planes; i++) {
195 		if (!malidp_hw_pitch_valid(mp->hwdev, fb->pitches[i])) {
196 			DRM_DEBUG_KMS("Invalid pitch %u for plane %d\n",
197 				      fb->pitches[i], i);
198 			return -EINVAL;
199 		}
200 	}
201 
202 	if ((state->crtc_w > mp->hwdev->max_line_size) ||
203 	    (state->crtc_h > mp->hwdev->max_line_size) ||
204 	    (state->crtc_w < mp->hwdev->min_line_size) ||
205 	    (state->crtc_h < mp->hwdev->min_line_size))
206 		return -EINVAL;
207 
208 	/*
209 	 * DP550/650 video layers can accept 3 plane formats only if
210 	 * fb->pitches[1] == fb->pitches[2] since they don't have a
211 	 * third plane stride register.
212 	 */
213 	if (ms->n_planes == 3 &&
214 	    !(mp->hwdev->features & MALIDP_DEVICE_LV_HAS_3_STRIDES) &&
215 	    (state->fb->pitches[1] != state->fb->pitches[2]))
216 		return -EINVAL;
217 
218 	ret = malidp_se_check_scaling(mp, state);
219 	if (ret)
220 		return ret;
221 
222 	/* packed RGB888 / BGR888 can't be rotated or flipped */
223 	if (state->rotation != DRM_MODE_ROTATE_0 &&
224 	    (fb->format->format == DRM_FORMAT_RGB888 ||
225 	     fb->format->format == DRM_FORMAT_BGR888))
226 		return -EINVAL;
227 
228 	ms->rotmem_size = 0;
229 	if (state->rotation & MALIDP_ROTATED_MASK) {
230 		int val;
231 
232 		val = mp->hwdev->rotmem_required(mp->hwdev, state->crtc_h,
233 						 state->crtc_w,
234 						 fb->format->format);
235 		if (val < 0)
236 			return val;
237 
238 		ms->rotmem_size = val;
239 	}
240 
241 	return 0;
242 }
243 
244 static void malidp_de_set_plane_pitches(struct malidp_plane *mp,
245 					int num_planes, unsigned int pitches[3])
246 {
247 	int i;
248 	int num_strides = num_planes;
249 
250 	if (!mp->layer->stride_offset)
251 		return;
252 
253 	if (num_planes == 3)
254 		num_strides = (mp->hwdev->features &
255 			       MALIDP_DEVICE_LV_HAS_3_STRIDES) ? 3 : 2;
256 
257 	for (i = 0; i < num_strides; ++i)
258 		malidp_hw_write(mp->hwdev, pitches[i],
259 				mp->layer->base +
260 				mp->layer->stride_offset + i * 4);
261 }
262 
263 static void malidp_de_plane_update(struct drm_plane *plane,
264 				   struct drm_plane_state *old_state)
265 {
266 	struct malidp_plane *mp;
267 	const struct malidp_hw_regmap *map;
268 	struct malidp_plane_state *ms = to_malidp_plane_state(plane->state);
269 	u32 src_w, src_h, dest_w, dest_h, val;
270 	int i;
271 
272 	mp = to_malidp_plane(plane);
273 	map = &mp->hwdev->map;
274 
275 	/* convert src values from Q16 fixed point to integer */
276 	src_w = plane->state->src_w >> 16;
277 	src_h = plane->state->src_h >> 16;
278 	dest_w = plane->state->crtc_w;
279 	dest_h = plane->state->crtc_h;
280 
281 	malidp_hw_write(mp->hwdev, ms->format, mp->layer->base);
282 
283 	for (i = 0; i < ms->n_planes; i++) {
284 		/* calculate the offset for the layer's plane registers */
285 		u16 ptr = mp->layer->ptr + (i << 4);
286 		dma_addr_t fb_addr = drm_fb_cma_get_gem_addr(plane->state->fb,
287 							     plane->state, i);
288 
289 		malidp_hw_write(mp->hwdev, lower_32_bits(fb_addr), ptr);
290 		malidp_hw_write(mp->hwdev, upper_32_bits(fb_addr), ptr + 4);
291 	}
292 	malidp_de_set_plane_pitches(mp, ms->n_planes,
293 				    plane->state->fb->pitches);
294 
295 	malidp_hw_write(mp->hwdev, LAYER_H_VAL(src_w) | LAYER_V_VAL(src_h),
296 			mp->layer->base + MALIDP_LAYER_SIZE);
297 
298 	malidp_hw_write(mp->hwdev, LAYER_H_VAL(dest_w) | LAYER_V_VAL(dest_h),
299 			mp->layer->base + MALIDP_LAYER_COMP_SIZE);
300 
301 	malidp_hw_write(mp->hwdev, LAYER_H_VAL(plane->state->crtc_x) |
302 			LAYER_V_VAL(plane->state->crtc_y),
303 			mp->layer->base + MALIDP_LAYER_OFFSET);
304 
305 	if (mp->layer->id == DE_SMART)
306 		malidp_hw_write(mp->hwdev,
307 				LAYER_H_VAL(src_w) | LAYER_V_VAL(src_h),
308 				mp->layer->base + MALIDP550_LS_R1_IN_SIZE);
309 
310 	/* first clear the rotation bits */
311 	val = malidp_hw_read(mp->hwdev, mp->layer->base + MALIDP_LAYER_CONTROL);
312 	val &= ~LAYER_ROT_MASK;
313 
314 	/* setup the rotation and axis flip bits */
315 	if (plane->state->rotation & DRM_MODE_ROTATE_MASK)
316 		val |= ilog2(plane->state->rotation & DRM_MODE_ROTATE_MASK) <<
317 		       LAYER_ROT_OFFSET;
318 	if (plane->state->rotation & DRM_MODE_REFLECT_X)
319 		val |= LAYER_H_FLIP;
320 	if (plane->state->rotation & DRM_MODE_REFLECT_Y)
321 		val |= LAYER_V_FLIP;
322 
323 	/*
324 	 * always enable pixel alpha blending until we have a way to change
325 	 * blend modes
326 	 */
327 	val &= ~LAYER_COMP_MASK;
328 	val |= LAYER_COMP_PIXEL;
329 
330 	val &= ~LAYER_FLOWCFG(LAYER_FLOWCFG_MASK);
331 	if (plane->state->crtc) {
332 		struct malidp_crtc_state *m =
333 			to_malidp_crtc_state(plane->state->crtc->state);
334 
335 		if (m->scaler_config.scale_enable &&
336 		    m->scaler_config.plane_src_id == mp->layer->id)
337 			val |= LAYER_FLOWCFG(LAYER_FLOWCFG_SCALE_SE);
338 	}
339 
340 	/* set the 'enable layer' bit */
341 	val |= LAYER_ENABLE;
342 
343 	malidp_hw_write(mp->hwdev, val,
344 			mp->layer->base + MALIDP_LAYER_CONTROL);
345 }
346 
347 static void malidp_de_plane_disable(struct drm_plane *plane,
348 				    struct drm_plane_state *state)
349 {
350 	struct malidp_plane *mp = to_malidp_plane(plane);
351 
352 	malidp_hw_clearbits(mp->hwdev,
353 			    LAYER_ENABLE | LAYER_FLOWCFG(LAYER_FLOWCFG_MASK),
354 			    mp->layer->base + MALIDP_LAYER_CONTROL);
355 }
356 
357 static const struct drm_plane_helper_funcs malidp_de_plane_helper_funcs = {
358 	.atomic_check = malidp_de_plane_check,
359 	.atomic_update = malidp_de_plane_update,
360 	.atomic_disable = malidp_de_plane_disable,
361 };
362 
363 int malidp_de_planes_init(struct drm_device *drm)
364 {
365 	struct malidp_drm *malidp = drm->dev_private;
366 	const struct malidp_hw_regmap *map = &malidp->dev->map;
367 	struct malidp_plane *plane = NULL;
368 	enum drm_plane_type plane_type;
369 	unsigned long crtcs = 1 << drm->mode_config.num_crtc;
370 	unsigned long flags = DRM_MODE_ROTATE_0 | DRM_MODE_ROTATE_90 | DRM_MODE_ROTATE_180 |
371 			      DRM_MODE_ROTATE_270 | DRM_MODE_REFLECT_X | DRM_MODE_REFLECT_Y;
372 	u32 *formats;
373 	int ret, i, j, n;
374 
375 	formats = kcalloc(map->n_pixel_formats, sizeof(*formats), GFP_KERNEL);
376 	if (!formats) {
377 		ret = -ENOMEM;
378 		goto cleanup;
379 	}
380 
381 	for (i = 0; i < map->n_layers; i++) {
382 		u8 id = map->layers[i].id;
383 
384 		plane = kzalloc(sizeof(*plane), GFP_KERNEL);
385 		if (!plane) {
386 			ret = -ENOMEM;
387 			goto cleanup;
388 		}
389 
390 		/* build the list of DRM supported formats based on the map */
391 		for (n = 0, j = 0;  j < map->n_pixel_formats; j++) {
392 			if ((map->pixel_formats[j].layer & id) == id)
393 				formats[n++] = map->pixel_formats[j].format;
394 		}
395 
396 		plane_type = (i == 0) ? DRM_PLANE_TYPE_PRIMARY :
397 					DRM_PLANE_TYPE_OVERLAY;
398 		ret = drm_universal_plane_init(drm, &plane->base, crtcs,
399 					       &malidp_de_plane_funcs, formats,
400 					       n, NULL, plane_type, NULL);
401 		if (ret < 0)
402 			goto cleanup;
403 
404 		drm_plane_helper_add(&plane->base,
405 				     &malidp_de_plane_helper_funcs);
406 		plane->hwdev = malidp->dev;
407 		plane->layer = &map->layers[i];
408 
409 		if (id == DE_SMART) {
410 			/*
411 			 * Enable the first rectangle in the SMART layer to be
412 			 * able to use it as a drm plane.
413 			 */
414 			malidp_hw_write(malidp->dev, 1,
415 					plane->layer->base + MALIDP550_LS_ENABLE);
416 			/* Skip the features which the SMART layer doesn't have. */
417 			continue;
418 		}
419 
420 		drm_plane_create_rotation_property(&plane->base, DRM_MODE_ROTATE_0, flags);
421 		malidp_hw_write(malidp->dev, MALIDP_ALPHA_LUT,
422 				plane->layer->base + MALIDP_LAYER_COMPOSE);
423 	}
424 
425 	kfree(formats);
426 
427 	return 0;
428 
429 cleanup:
430 	malidp_de_planes_destroy(drm);
431 	kfree(formats);
432 
433 	return ret;
434 }
435 
436 void malidp_de_planes_destroy(struct drm_device *drm)
437 {
438 	struct drm_plane *p, *pt;
439 
440 	list_for_each_entry_safe(p, pt, &drm->mode_config.plane_list, head) {
441 		drm_plane_cleanup(p);
442 		kfree(p);
443 	}
444 }
445