1 /* 2 * (C) COPYRIGHT 2016 ARM Limited. All rights reserved. 3 * Author: Liviu Dudau <Liviu.Dudau@arm.com> 4 * 5 * This program is free software and is provided to you under the terms of the 6 * GNU General Public License version 2 as published by the Free Software 7 * Foundation, and any use by you of this program is subject to the terms 8 * of such GNU licence. 9 * 10 * ARM Mali DP500/DP550/DP650 KMS/DRM driver 11 */ 12 13 #include <linux/module.h> 14 #include <linux/clk.h> 15 #include <linux/component.h> 16 #include <linux/of_device.h> 17 #include <linux/of_graph.h> 18 #include <linux/of_reserved_mem.h> 19 20 #include <drm/drmP.h> 21 #include <drm/drm_atomic.h> 22 #include <drm/drm_atomic_helper.h> 23 #include <drm/drm_crtc.h> 24 #include <drm/drm_crtc_helper.h> 25 #include <drm/drm_fb_cma_helper.h> 26 #include <drm/drm_gem_cma_helper.h> 27 #include <drm/drm_of.h> 28 29 #include "malidp_drv.h" 30 #include "malidp_regs.h" 31 #include "malidp_hw.h" 32 33 #define MALIDP_CONF_VALID_TIMEOUT 250 34 35 /* 36 * set the "config valid" bit and wait until the hardware acts on it 37 */ 38 static int malidp_set_and_wait_config_valid(struct drm_device *drm) 39 { 40 struct malidp_drm *malidp = drm->dev_private; 41 struct malidp_hw_device *hwdev = malidp->dev; 42 int ret; 43 44 atomic_set(&malidp->config_valid, 0); 45 hwdev->set_config_valid(hwdev); 46 /* don't wait for config_valid flag if we are in config mode */ 47 if (hwdev->in_config_mode(hwdev)) 48 return 0; 49 50 ret = wait_event_interruptible_timeout(malidp->wq, 51 atomic_read(&malidp->config_valid) == 1, 52 msecs_to_jiffies(MALIDP_CONF_VALID_TIMEOUT)); 53 54 return (ret > 0) ? 0 : -ETIMEDOUT; 55 } 56 57 static void malidp_output_poll_changed(struct drm_device *drm) 58 { 59 struct malidp_drm *malidp = drm->dev_private; 60 61 drm_fbdev_cma_hotplug_event(malidp->fbdev); 62 } 63 64 static void malidp_atomic_commit_hw_done(struct drm_atomic_state *state) 65 { 66 struct drm_pending_vblank_event *event; 67 struct drm_device *drm = state->dev; 68 struct malidp_drm *malidp = drm->dev_private; 69 int ret = malidp_set_and_wait_config_valid(drm); 70 71 if (ret) 72 DRM_DEBUG_DRIVER("timed out waiting for updated configuration\n"); 73 74 event = malidp->crtc.state->event; 75 if (event) { 76 malidp->crtc.state->event = NULL; 77 78 spin_lock_irq(&drm->event_lock); 79 if (drm_crtc_vblank_get(&malidp->crtc) == 0) 80 drm_crtc_arm_vblank_event(&malidp->crtc, event); 81 else 82 drm_crtc_send_vblank_event(&malidp->crtc, event); 83 spin_unlock_irq(&drm->event_lock); 84 } 85 drm_atomic_helper_commit_hw_done(state); 86 } 87 88 static void malidp_atomic_commit_tail(struct drm_atomic_state *state) 89 { 90 struct drm_device *drm = state->dev; 91 92 drm_atomic_helper_commit_modeset_disables(drm, state); 93 drm_atomic_helper_commit_modeset_enables(drm, state); 94 drm_atomic_helper_commit_planes(drm, state, 0); 95 96 malidp_atomic_commit_hw_done(state); 97 98 drm_atomic_helper_wait_for_vblanks(drm, state); 99 100 drm_atomic_helper_cleanup_planes(drm, state); 101 } 102 103 static const struct drm_mode_config_helper_funcs malidp_mode_config_helpers = { 104 .atomic_commit_tail = malidp_atomic_commit_tail, 105 }; 106 107 static const struct drm_mode_config_funcs malidp_mode_config_funcs = { 108 .fb_create = drm_fb_cma_create, 109 .output_poll_changed = malidp_output_poll_changed, 110 .atomic_check = drm_atomic_helper_check, 111 .atomic_commit = drm_atomic_helper_commit, 112 }; 113 114 static int malidp_init(struct drm_device *drm) 115 { 116 int ret; 117 struct malidp_drm *malidp = drm->dev_private; 118 struct malidp_hw_device *hwdev = malidp->dev; 119 120 drm_mode_config_init(drm); 121 122 drm->mode_config.min_width = hwdev->min_line_size; 123 drm->mode_config.min_height = hwdev->min_line_size; 124 drm->mode_config.max_width = hwdev->max_line_size; 125 drm->mode_config.max_height = hwdev->max_line_size; 126 drm->mode_config.funcs = &malidp_mode_config_funcs; 127 drm->mode_config.helper_private = &malidp_mode_config_helpers; 128 129 ret = malidp_crtc_init(drm); 130 if (ret) { 131 drm_mode_config_cleanup(drm); 132 return ret; 133 } 134 135 return 0; 136 } 137 138 static void malidp_fini(struct drm_device *drm) 139 { 140 malidp_de_planes_destroy(drm); 141 drm_mode_config_cleanup(drm); 142 } 143 144 static int malidp_irq_init(struct platform_device *pdev) 145 { 146 int irq_de, irq_se, ret = 0; 147 struct drm_device *drm = dev_get_drvdata(&pdev->dev); 148 149 /* fetch the interrupts from DT */ 150 irq_de = platform_get_irq_byname(pdev, "DE"); 151 if (irq_de < 0) { 152 DRM_ERROR("no 'DE' IRQ specified!\n"); 153 return irq_de; 154 } 155 irq_se = platform_get_irq_byname(pdev, "SE"); 156 if (irq_se < 0) { 157 DRM_ERROR("no 'SE' IRQ specified!\n"); 158 return irq_se; 159 } 160 161 ret = malidp_de_irq_init(drm, irq_de); 162 if (ret) 163 return ret; 164 165 ret = malidp_se_irq_init(drm, irq_se); 166 if (ret) { 167 malidp_de_irq_fini(drm); 168 return ret; 169 } 170 171 return 0; 172 } 173 174 static void malidp_lastclose(struct drm_device *drm) 175 { 176 struct malidp_drm *malidp = drm->dev_private; 177 178 drm_fbdev_cma_restore_mode(malidp->fbdev); 179 } 180 181 DEFINE_DRM_GEM_CMA_FOPS(fops); 182 183 static struct drm_driver malidp_driver = { 184 .driver_features = DRIVER_GEM | DRIVER_MODESET | DRIVER_ATOMIC | 185 DRIVER_PRIME, 186 .lastclose = malidp_lastclose, 187 .gem_free_object_unlocked = drm_gem_cma_free_object, 188 .gem_vm_ops = &drm_gem_cma_vm_ops, 189 .dumb_create = drm_gem_cma_dumb_create, 190 .dumb_map_offset = drm_gem_cma_dumb_map_offset, 191 .dumb_destroy = drm_gem_dumb_destroy, 192 .prime_handle_to_fd = drm_gem_prime_handle_to_fd, 193 .prime_fd_to_handle = drm_gem_prime_fd_to_handle, 194 .gem_prime_export = drm_gem_prime_export, 195 .gem_prime_import = drm_gem_prime_import, 196 .gem_prime_get_sg_table = drm_gem_cma_prime_get_sg_table, 197 .gem_prime_import_sg_table = drm_gem_cma_prime_import_sg_table, 198 .gem_prime_vmap = drm_gem_cma_prime_vmap, 199 .gem_prime_vunmap = drm_gem_cma_prime_vunmap, 200 .gem_prime_mmap = drm_gem_cma_prime_mmap, 201 .fops = &fops, 202 .name = "mali-dp", 203 .desc = "ARM Mali Display Processor driver", 204 .date = "20160106", 205 .major = 1, 206 .minor = 0, 207 }; 208 209 static const struct of_device_id malidp_drm_of_match[] = { 210 { 211 .compatible = "arm,mali-dp500", 212 .data = &malidp_device[MALIDP_500] 213 }, 214 { 215 .compatible = "arm,mali-dp550", 216 .data = &malidp_device[MALIDP_550] 217 }, 218 { 219 .compatible = "arm,mali-dp650", 220 .data = &malidp_device[MALIDP_650] 221 }, 222 {}, 223 }; 224 MODULE_DEVICE_TABLE(of, malidp_drm_of_match); 225 226 static bool malidp_is_compatible_hw_id(struct malidp_hw_device *hwdev, 227 const struct of_device_id *dev_id) 228 { 229 u32 core_id; 230 const char *compatstr_dp500 = "arm,mali-dp500"; 231 bool is_dp500; 232 bool dt_is_dp500; 233 234 /* 235 * The DP500 CORE_ID register is in a different location, so check it 236 * first. If the product id field matches, then this is DP500, otherwise 237 * check the DP550/650 CORE_ID register. 238 */ 239 core_id = malidp_hw_read(hwdev, MALIDP500_DC_BASE + MALIDP_DE_CORE_ID); 240 /* Offset 0x18 will never read 0x500 on products other than DP500. */ 241 is_dp500 = (MALIDP_PRODUCT_ID(core_id) == 0x500); 242 dt_is_dp500 = strnstr(dev_id->compatible, compatstr_dp500, 243 sizeof(dev_id->compatible)) != NULL; 244 if (is_dp500 != dt_is_dp500) { 245 DRM_ERROR("Device-tree expects %s, but hardware %s DP500.\n", 246 dev_id->compatible, is_dp500 ? "is" : "is not"); 247 return false; 248 } else if (!dt_is_dp500) { 249 u16 product_id; 250 char buf[32]; 251 252 core_id = malidp_hw_read(hwdev, 253 MALIDP550_DC_BASE + MALIDP_DE_CORE_ID); 254 product_id = MALIDP_PRODUCT_ID(core_id); 255 snprintf(buf, sizeof(buf), "arm,mali-dp%X", product_id); 256 if (!strnstr(dev_id->compatible, buf, 257 sizeof(dev_id->compatible))) { 258 DRM_ERROR("Device-tree expects %s, but hardware is DP%03X.\n", 259 dev_id->compatible, product_id); 260 return false; 261 } 262 } 263 return true; 264 } 265 266 static bool malidp_has_sufficient_address_space(const struct resource *res, 267 const struct of_device_id *dev_id) 268 { 269 resource_size_t res_size = resource_size(res); 270 const char *compatstr_dp500 = "arm,mali-dp500"; 271 272 if (!strnstr(dev_id->compatible, compatstr_dp500, 273 sizeof(dev_id->compatible))) 274 return res_size >= MALIDP550_ADDR_SPACE_SIZE; 275 else if (res_size < MALIDP500_ADDR_SPACE_SIZE) 276 return false; 277 return true; 278 } 279 280 #define MAX_OUTPUT_CHANNELS 3 281 282 static int malidp_bind(struct device *dev) 283 { 284 struct resource *res; 285 struct drm_device *drm; 286 struct device_node *ep; 287 struct malidp_drm *malidp; 288 struct malidp_hw_device *hwdev; 289 struct platform_device *pdev = to_platform_device(dev); 290 struct of_device_id const *dev_id; 291 /* number of lines for the R, G and B output */ 292 u8 output_width[MAX_OUTPUT_CHANNELS]; 293 int ret = 0, i; 294 u32 version, out_depth = 0; 295 296 malidp = devm_kzalloc(dev, sizeof(*malidp), GFP_KERNEL); 297 if (!malidp) 298 return -ENOMEM; 299 300 hwdev = devm_kzalloc(dev, sizeof(*hwdev), GFP_KERNEL); 301 if (!hwdev) 302 return -ENOMEM; 303 304 /* 305 * copy the associated data from malidp_drm_of_match to avoid 306 * having to keep a reference to the OF node after binding 307 */ 308 memcpy(hwdev, of_device_get_match_data(dev), sizeof(*hwdev)); 309 malidp->dev = hwdev; 310 311 312 res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 313 hwdev->regs = devm_ioremap_resource(dev, res); 314 if (IS_ERR(hwdev->regs)) 315 return PTR_ERR(hwdev->regs); 316 317 hwdev->pclk = devm_clk_get(dev, "pclk"); 318 if (IS_ERR(hwdev->pclk)) 319 return PTR_ERR(hwdev->pclk); 320 321 hwdev->aclk = devm_clk_get(dev, "aclk"); 322 if (IS_ERR(hwdev->aclk)) 323 return PTR_ERR(hwdev->aclk); 324 325 hwdev->mclk = devm_clk_get(dev, "mclk"); 326 if (IS_ERR(hwdev->mclk)) 327 return PTR_ERR(hwdev->mclk); 328 329 hwdev->pxlclk = devm_clk_get(dev, "pxlclk"); 330 if (IS_ERR(hwdev->pxlclk)) 331 return PTR_ERR(hwdev->pxlclk); 332 333 /* Get the optional framebuffer memory resource */ 334 ret = of_reserved_mem_device_init(dev); 335 if (ret && ret != -ENODEV) 336 return ret; 337 338 drm = drm_dev_alloc(&malidp_driver, dev); 339 if (IS_ERR(drm)) { 340 ret = PTR_ERR(drm); 341 goto alloc_fail; 342 } 343 344 /* Enable APB clock in order to get access to the registers */ 345 clk_prepare_enable(hwdev->pclk); 346 /* 347 * Enable AXI clock and main clock so that prefetch can start once 348 * the registers are set 349 */ 350 clk_prepare_enable(hwdev->aclk); 351 clk_prepare_enable(hwdev->mclk); 352 353 dev_id = of_match_device(malidp_drm_of_match, dev); 354 if (!dev_id) { 355 ret = -EINVAL; 356 goto query_hw_fail; 357 } 358 359 if (!malidp_has_sufficient_address_space(res, dev_id)) { 360 DRM_ERROR("Insufficient address space in device-tree.\n"); 361 ret = -EINVAL; 362 goto query_hw_fail; 363 } 364 365 if (!malidp_is_compatible_hw_id(hwdev, dev_id)) { 366 ret = -EINVAL; 367 goto query_hw_fail; 368 } 369 370 ret = hwdev->query_hw(hwdev); 371 if (ret) { 372 DRM_ERROR("Invalid HW configuration\n"); 373 goto query_hw_fail; 374 } 375 376 version = malidp_hw_read(hwdev, hwdev->map.dc_base + MALIDP_DE_CORE_ID); 377 DRM_INFO("found ARM Mali-DP%3x version r%dp%d\n", version >> 16, 378 (version >> 12) & 0xf, (version >> 8) & 0xf); 379 380 /* set the number of lines used for output of RGB data */ 381 ret = of_property_read_u8_array(dev->of_node, 382 "arm,malidp-output-port-lines", 383 output_width, MAX_OUTPUT_CHANNELS); 384 if (ret) 385 goto query_hw_fail; 386 387 for (i = 0; i < MAX_OUTPUT_CHANNELS; i++) 388 out_depth = (out_depth << 8) | (output_width[i] & 0xf); 389 malidp_hw_write(hwdev, out_depth, hwdev->map.out_depth_base); 390 391 drm->dev_private = malidp; 392 dev_set_drvdata(dev, drm); 393 atomic_set(&malidp->config_valid, 0); 394 init_waitqueue_head(&malidp->wq); 395 396 ret = malidp_init(drm); 397 if (ret < 0) 398 goto init_fail; 399 400 /* Set the CRTC's port so that the encoder component can find it */ 401 ep = of_graph_get_next_endpoint(dev->of_node, NULL); 402 if (!ep) { 403 ret = -EINVAL; 404 goto port_fail; 405 } 406 malidp->crtc.port = of_get_next_parent(ep); 407 408 ret = component_bind_all(dev, drm); 409 if (ret) { 410 DRM_ERROR("Failed to bind all components\n"); 411 goto bind_fail; 412 } 413 414 ret = malidp_irq_init(pdev); 415 if (ret < 0) 416 goto irq_init_fail; 417 418 drm->irq_enabled = true; 419 420 ret = drm_vblank_init(drm, drm->mode_config.num_crtc); 421 if (ret < 0) { 422 DRM_ERROR("failed to initialise vblank\n"); 423 goto vblank_fail; 424 } 425 426 drm_mode_config_reset(drm); 427 428 malidp->fbdev = drm_fbdev_cma_init(drm, 32, 429 drm->mode_config.num_connector); 430 431 if (IS_ERR(malidp->fbdev)) { 432 ret = PTR_ERR(malidp->fbdev); 433 malidp->fbdev = NULL; 434 goto fbdev_fail; 435 } 436 437 drm_kms_helper_poll_init(drm); 438 439 ret = drm_dev_register(drm, 0); 440 if (ret) 441 goto register_fail; 442 443 return 0; 444 445 register_fail: 446 if (malidp->fbdev) { 447 drm_fbdev_cma_fini(malidp->fbdev); 448 malidp->fbdev = NULL; 449 } 450 fbdev_fail: 451 drm_vblank_cleanup(drm); 452 vblank_fail: 453 malidp_se_irq_fini(drm); 454 malidp_de_irq_fini(drm); 455 drm->irq_enabled = false; 456 irq_init_fail: 457 component_unbind_all(dev, drm); 458 bind_fail: 459 of_node_put(malidp->crtc.port); 460 malidp->crtc.port = NULL; 461 port_fail: 462 malidp_fini(drm); 463 init_fail: 464 drm->dev_private = NULL; 465 dev_set_drvdata(dev, NULL); 466 query_hw_fail: 467 clk_disable_unprepare(hwdev->mclk); 468 clk_disable_unprepare(hwdev->aclk); 469 clk_disable_unprepare(hwdev->pclk); 470 drm_dev_unref(drm); 471 alloc_fail: 472 of_reserved_mem_device_release(dev); 473 474 return ret; 475 } 476 477 static void malidp_unbind(struct device *dev) 478 { 479 struct drm_device *drm = dev_get_drvdata(dev); 480 struct malidp_drm *malidp = drm->dev_private; 481 struct malidp_hw_device *hwdev = malidp->dev; 482 483 drm_dev_unregister(drm); 484 if (malidp->fbdev) { 485 drm_fbdev_cma_fini(malidp->fbdev); 486 malidp->fbdev = NULL; 487 } 488 drm_kms_helper_poll_fini(drm); 489 malidp_se_irq_fini(drm); 490 malidp_de_irq_fini(drm); 491 drm_vblank_cleanup(drm); 492 component_unbind_all(dev, drm); 493 of_node_put(malidp->crtc.port); 494 malidp->crtc.port = NULL; 495 malidp_fini(drm); 496 drm->dev_private = NULL; 497 dev_set_drvdata(dev, NULL); 498 clk_disable_unprepare(hwdev->mclk); 499 clk_disable_unprepare(hwdev->aclk); 500 clk_disable_unprepare(hwdev->pclk); 501 drm_dev_unref(drm); 502 of_reserved_mem_device_release(dev); 503 } 504 505 static const struct component_master_ops malidp_master_ops = { 506 .bind = malidp_bind, 507 .unbind = malidp_unbind, 508 }; 509 510 static int malidp_compare_dev(struct device *dev, void *data) 511 { 512 struct device_node *np = data; 513 514 return dev->of_node == np; 515 } 516 517 static int malidp_platform_probe(struct platform_device *pdev) 518 { 519 struct device_node *port, *ep; 520 struct component_match *match = NULL; 521 522 if (!pdev->dev.of_node) 523 return -ENODEV; 524 525 /* there is only one output port inside each device, find it */ 526 ep = of_graph_get_next_endpoint(pdev->dev.of_node, NULL); 527 if (!ep) 528 return -ENODEV; 529 530 if (!of_device_is_available(ep)) { 531 of_node_put(ep); 532 return -ENODEV; 533 } 534 535 /* add the remote encoder port as component */ 536 port = of_graph_get_remote_port_parent(ep); 537 of_node_put(ep); 538 if (!port || !of_device_is_available(port)) { 539 of_node_put(port); 540 return -EAGAIN; 541 } 542 543 drm_of_component_match_add(&pdev->dev, &match, malidp_compare_dev, 544 port); 545 of_node_put(port); 546 return component_master_add_with_match(&pdev->dev, &malidp_master_ops, 547 match); 548 } 549 550 static int malidp_platform_remove(struct platform_device *pdev) 551 { 552 component_master_del(&pdev->dev, &malidp_master_ops); 553 return 0; 554 } 555 556 static struct platform_driver malidp_platform_driver = { 557 .probe = malidp_platform_probe, 558 .remove = malidp_platform_remove, 559 .driver = { 560 .name = "mali-dp", 561 .of_match_table = malidp_drm_of_match, 562 }, 563 }; 564 565 module_platform_driver(malidp_platform_driver); 566 567 MODULE_AUTHOR("Liviu Dudau <Liviu.Dudau@arm.com>"); 568 MODULE_DESCRIPTION("ARM Mali DP DRM driver"); 569 MODULE_LICENSE("GPL v2"); 570