xref: /openbmc/linux/drivers/gpu/drm/arm/malidp_drv.c (revision 2891f2d5)
1 /*
2  * (C) COPYRIGHT 2016 ARM Limited. All rights reserved.
3  * Author: Liviu Dudau <Liviu.Dudau@arm.com>
4  *
5  * This program is free software and is provided to you under the terms of the
6  * GNU General Public License version 2 as published by the Free Software
7  * Foundation, and any use by you of this program is subject to the terms
8  * of such GNU licence.
9  *
10  * ARM Mali DP500/DP550/DP650 KMS/DRM driver
11  */
12 
13 #include <linux/module.h>
14 #include <linux/clk.h>
15 #include <linux/component.h>
16 #include <linux/of_device.h>
17 #include <linux/of_graph.h>
18 #include <linux/of_reserved_mem.h>
19 
20 #include <drm/drmP.h>
21 #include <drm/drm_atomic.h>
22 #include <drm/drm_atomic_helper.h>
23 #include <drm/drm_crtc.h>
24 #include <drm/drm_crtc_helper.h>
25 #include <drm/drm_fb_cma_helper.h>
26 #include <drm/drm_gem_cma_helper.h>
27 #include <drm/drm_of.h>
28 
29 #include "malidp_drv.h"
30 #include "malidp_regs.h"
31 #include "malidp_hw.h"
32 
33 #define MALIDP_CONF_VALID_TIMEOUT	250
34 
35 /*
36  * set the "config valid" bit and wait until the hardware acts on it
37  */
38 static int malidp_set_and_wait_config_valid(struct drm_device *drm)
39 {
40 	struct malidp_drm *malidp = drm->dev_private;
41 	struct malidp_hw_device *hwdev = malidp->dev;
42 	int ret;
43 
44 	atomic_set(&malidp->config_valid, 0);
45 	hwdev->set_config_valid(hwdev);
46 	/* don't wait for config_valid flag if we are in config mode */
47 	if (hwdev->in_config_mode(hwdev))
48 		return 0;
49 
50 	ret = wait_event_interruptible_timeout(malidp->wq,
51 			atomic_read(&malidp->config_valid) == 1,
52 			msecs_to_jiffies(MALIDP_CONF_VALID_TIMEOUT));
53 
54 	return (ret > 0) ? 0 : -ETIMEDOUT;
55 }
56 
57 static void malidp_output_poll_changed(struct drm_device *drm)
58 {
59 	struct malidp_drm *malidp = drm->dev_private;
60 
61 	drm_fbdev_cma_hotplug_event(malidp->fbdev);
62 }
63 
64 static void malidp_atomic_commit_hw_done(struct drm_atomic_state *state)
65 {
66 	struct drm_pending_vblank_event *event;
67 	struct drm_device *drm = state->dev;
68 	struct malidp_drm *malidp = drm->dev_private;
69 	int ret = malidp_set_and_wait_config_valid(drm);
70 
71 	if (ret)
72 		DRM_DEBUG_DRIVER("timed out waiting for updated configuration\n");
73 
74 	event = malidp->crtc.state->event;
75 	if (event) {
76 		malidp->crtc.state->event = NULL;
77 
78 		spin_lock_irq(&drm->event_lock);
79 		if (drm_crtc_vblank_get(&malidp->crtc) == 0)
80 			drm_crtc_arm_vblank_event(&malidp->crtc, event);
81 		else
82 			drm_crtc_send_vblank_event(&malidp->crtc, event);
83 		spin_unlock_irq(&drm->event_lock);
84 	}
85 	drm_atomic_helper_commit_hw_done(state);
86 }
87 
88 static void malidp_atomic_commit_tail(struct drm_atomic_state *state)
89 {
90 	struct drm_device *drm = state->dev;
91 
92 	drm_atomic_helper_commit_modeset_disables(drm, state);
93 	drm_atomic_helper_commit_modeset_enables(drm, state);
94 	drm_atomic_helper_commit_planes(drm, state, 0);
95 
96 	malidp_atomic_commit_hw_done(state);
97 
98 	drm_atomic_helper_wait_for_vblanks(drm, state);
99 
100 	drm_atomic_helper_cleanup_planes(drm, state);
101 }
102 
103 static struct drm_mode_config_helper_funcs malidp_mode_config_helpers = {
104 	.atomic_commit_tail = malidp_atomic_commit_tail,
105 };
106 
107 static const struct drm_mode_config_funcs malidp_mode_config_funcs = {
108 	.fb_create = drm_fb_cma_create,
109 	.output_poll_changed = malidp_output_poll_changed,
110 	.atomic_check = drm_atomic_helper_check,
111 	.atomic_commit = drm_atomic_helper_commit,
112 };
113 
114 static int malidp_enable_vblank(struct drm_device *drm, unsigned int crtc)
115 {
116 	struct malidp_drm *malidp = drm->dev_private;
117 	struct malidp_hw_device *hwdev = malidp->dev;
118 
119 	malidp_hw_enable_irq(hwdev, MALIDP_DE_BLOCK,
120 			     hwdev->map.de_irq_map.vsync_irq);
121 	return 0;
122 }
123 
124 static void malidp_disable_vblank(struct drm_device *drm, unsigned int pipe)
125 {
126 	struct malidp_drm *malidp = drm->dev_private;
127 	struct malidp_hw_device *hwdev = malidp->dev;
128 
129 	malidp_hw_disable_irq(hwdev, MALIDP_DE_BLOCK,
130 			      hwdev->map.de_irq_map.vsync_irq);
131 }
132 
133 static int malidp_init(struct drm_device *drm)
134 {
135 	int ret;
136 	struct malidp_drm *malidp = drm->dev_private;
137 	struct malidp_hw_device *hwdev = malidp->dev;
138 
139 	drm_mode_config_init(drm);
140 
141 	drm->mode_config.min_width = hwdev->min_line_size;
142 	drm->mode_config.min_height = hwdev->min_line_size;
143 	drm->mode_config.max_width = hwdev->max_line_size;
144 	drm->mode_config.max_height = hwdev->max_line_size;
145 	drm->mode_config.funcs = &malidp_mode_config_funcs;
146 	drm->mode_config.helper_private = &malidp_mode_config_helpers;
147 
148 	ret = malidp_crtc_init(drm);
149 	if (ret) {
150 		drm_mode_config_cleanup(drm);
151 		return ret;
152 	}
153 
154 	return 0;
155 }
156 
157 static void malidp_fini(struct drm_device *drm)
158 {
159 	malidp_de_planes_destroy(drm);
160 	drm_mode_config_cleanup(drm);
161 }
162 
163 static int malidp_irq_init(struct platform_device *pdev)
164 {
165 	int irq_de, irq_se, ret = 0;
166 	struct drm_device *drm = dev_get_drvdata(&pdev->dev);
167 
168 	/* fetch the interrupts from DT */
169 	irq_de = platform_get_irq_byname(pdev, "DE");
170 	if (irq_de < 0) {
171 		DRM_ERROR("no 'DE' IRQ specified!\n");
172 		return irq_de;
173 	}
174 	irq_se = platform_get_irq_byname(pdev, "SE");
175 	if (irq_se < 0) {
176 		DRM_ERROR("no 'SE' IRQ specified!\n");
177 		return irq_se;
178 	}
179 
180 	ret = malidp_de_irq_init(drm, irq_de);
181 	if (ret)
182 		return ret;
183 
184 	ret = malidp_se_irq_init(drm, irq_se);
185 	if (ret) {
186 		malidp_de_irq_fini(drm);
187 		return ret;
188 	}
189 
190 	return 0;
191 }
192 
193 static void malidp_lastclose(struct drm_device *drm)
194 {
195 	struct malidp_drm *malidp = drm->dev_private;
196 
197 	drm_fbdev_cma_restore_mode(malidp->fbdev);
198 }
199 
200 static const struct file_operations fops = {
201 	.owner = THIS_MODULE,
202 	.open = drm_open,
203 	.release = drm_release,
204 	.unlocked_ioctl = drm_ioctl,
205 	.compat_ioctl = drm_compat_ioctl,
206 	.poll = drm_poll,
207 	.read = drm_read,
208 	.llseek = noop_llseek,
209 	.mmap = drm_gem_cma_mmap,
210 };
211 
212 static struct drm_driver malidp_driver = {
213 	.driver_features = DRIVER_GEM | DRIVER_MODESET | DRIVER_ATOMIC |
214 			   DRIVER_PRIME,
215 	.lastclose = malidp_lastclose,
216 	.get_vblank_counter = drm_vblank_no_hw_counter,
217 	.enable_vblank = malidp_enable_vblank,
218 	.disable_vblank = malidp_disable_vblank,
219 	.gem_free_object_unlocked = drm_gem_cma_free_object,
220 	.gem_vm_ops = &drm_gem_cma_vm_ops,
221 	.dumb_create = drm_gem_cma_dumb_create,
222 	.dumb_map_offset = drm_gem_cma_dumb_map_offset,
223 	.dumb_destroy = drm_gem_dumb_destroy,
224 	.prime_handle_to_fd = drm_gem_prime_handle_to_fd,
225 	.prime_fd_to_handle = drm_gem_prime_fd_to_handle,
226 	.gem_prime_export = drm_gem_prime_export,
227 	.gem_prime_import = drm_gem_prime_import,
228 	.gem_prime_get_sg_table = drm_gem_cma_prime_get_sg_table,
229 	.gem_prime_import_sg_table = drm_gem_cma_prime_import_sg_table,
230 	.gem_prime_vmap = drm_gem_cma_prime_vmap,
231 	.gem_prime_vunmap = drm_gem_cma_prime_vunmap,
232 	.gem_prime_mmap = drm_gem_cma_prime_mmap,
233 	.fops = &fops,
234 	.name = "mali-dp",
235 	.desc = "ARM Mali Display Processor driver",
236 	.date = "20160106",
237 	.major = 1,
238 	.minor = 0,
239 };
240 
241 static const struct of_device_id  malidp_drm_of_match[] = {
242 	{
243 		.compatible = "arm,mali-dp500",
244 		.data = &malidp_device[MALIDP_500]
245 	},
246 	{
247 		.compatible = "arm,mali-dp550",
248 		.data = &malidp_device[MALIDP_550]
249 	},
250 	{
251 		.compatible = "arm,mali-dp650",
252 		.data = &malidp_device[MALIDP_650]
253 	},
254 	{},
255 };
256 MODULE_DEVICE_TABLE(of, malidp_drm_of_match);
257 
258 static bool malidp_is_compatible_hw_id(struct malidp_hw_device *hwdev,
259 				       const struct of_device_id *dev_id)
260 {
261 	u32 core_id;
262 	const char *compatstr_dp500 = "arm,mali-dp500";
263 	bool is_dp500;
264 	bool dt_is_dp500;
265 
266 	/*
267 	 * The DP500 CORE_ID register is in a different location, so check it
268 	 * first. If the product id field matches, then this is DP500, otherwise
269 	 * check the DP550/650 CORE_ID register.
270 	 */
271 	core_id = malidp_hw_read(hwdev, MALIDP500_DC_BASE + MALIDP_DE_CORE_ID);
272 	/* Offset 0x18 will never read 0x500 on products other than DP500. */
273 	is_dp500 = (MALIDP_PRODUCT_ID(core_id) == 0x500);
274 	dt_is_dp500 = strnstr(dev_id->compatible, compatstr_dp500,
275 			      sizeof(dev_id->compatible)) != NULL;
276 	if (is_dp500 != dt_is_dp500) {
277 		DRM_ERROR("Device-tree expects %s, but hardware %s DP500.\n",
278 			  dev_id->compatible, is_dp500 ? "is" : "is not");
279 		return false;
280 	} else if (!dt_is_dp500) {
281 		u16 product_id;
282 		char buf[32];
283 
284 		core_id = malidp_hw_read(hwdev,
285 					 MALIDP550_DC_BASE + MALIDP_DE_CORE_ID);
286 		product_id = MALIDP_PRODUCT_ID(core_id);
287 		snprintf(buf, sizeof(buf), "arm,mali-dp%X", product_id);
288 		if (!strnstr(dev_id->compatible, buf,
289 			     sizeof(dev_id->compatible))) {
290 			DRM_ERROR("Device-tree expects %s, but hardware is DP%03X.\n",
291 				  dev_id->compatible, product_id);
292 			return false;
293 		}
294 	}
295 	return true;
296 }
297 
298 static bool malidp_has_sufficient_address_space(const struct resource *res,
299 						const struct of_device_id *dev_id)
300 {
301 	resource_size_t res_size = resource_size(res);
302 	const char *compatstr_dp500 = "arm,mali-dp500";
303 
304 	if (!strnstr(dev_id->compatible, compatstr_dp500,
305 		     sizeof(dev_id->compatible)))
306 		return res_size >= MALIDP550_ADDR_SPACE_SIZE;
307 	else if (res_size < MALIDP500_ADDR_SPACE_SIZE)
308 		return false;
309 	return true;
310 }
311 
312 #define MAX_OUTPUT_CHANNELS	3
313 
314 static int malidp_bind(struct device *dev)
315 {
316 	struct resource *res;
317 	struct drm_device *drm;
318 	struct device_node *ep;
319 	struct malidp_drm *malidp;
320 	struct malidp_hw_device *hwdev;
321 	struct platform_device *pdev = to_platform_device(dev);
322 	struct of_device_id const *dev_id;
323 	/* number of lines for the R, G and B output */
324 	u8 output_width[MAX_OUTPUT_CHANNELS];
325 	int ret = 0, i;
326 	u32 version, out_depth = 0;
327 
328 	malidp = devm_kzalloc(dev, sizeof(*malidp), GFP_KERNEL);
329 	if (!malidp)
330 		return -ENOMEM;
331 
332 	hwdev = devm_kzalloc(dev, sizeof(*hwdev), GFP_KERNEL);
333 	if (!hwdev)
334 		return -ENOMEM;
335 
336 	/*
337 	 * copy the associated data from malidp_drm_of_match to avoid
338 	 * having to keep a reference to the OF node after binding
339 	 */
340 	memcpy(hwdev, of_device_get_match_data(dev), sizeof(*hwdev));
341 	malidp->dev = hwdev;
342 
343 
344 	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
345 	hwdev->regs = devm_ioremap_resource(dev, res);
346 	if (IS_ERR(hwdev->regs))
347 		return PTR_ERR(hwdev->regs);
348 
349 	hwdev->pclk = devm_clk_get(dev, "pclk");
350 	if (IS_ERR(hwdev->pclk))
351 		return PTR_ERR(hwdev->pclk);
352 
353 	hwdev->aclk = devm_clk_get(dev, "aclk");
354 	if (IS_ERR(hwdev->aclk))
355 		return PTR_ERR(hwdev->aclk);
356 
357 	hwdev->mclk = devm_clk_get(dev, "mclk");
358 	if (IS_ERR(hwdev->mclk))
359 		return PTR_ERR(hwdev->mclk);
360 
361 	hwdev->pxlclk = devm_clk_get(dev, "pxlclk");
362 	if (IS_ERR(hwdev->pxlclk))
363 		return PTR_ERR(hwdev->pxlclk);
364 
365 	/* Get the optional framebuffer memory resource */
366 	ret = of_reserved_mem_device_init(dev);
367 	if (ret && ret != -ENODEV)
368 		return ret;
369 
370 	drm = drm_dev_alloc(&malidp_driver, dev);
371 	if (IS_ERR(drm)) {
372 		ret = PTR_ERR(drm);
373 		goto alloc_fail;
374 	}
375 
376 	/* Enable APB clock in order to get access to the registers */
377 	clk_prepare_enable(hwdev->pclk);
378 	/*
379 	 * Enable AXI clock and main clock so that prefetch can start once
380 	 * the registers are set
381 	 */
382 	clk_prepare_enable(hwdev->aclk);
383 	clk_prepare_enable(hwdev->mclk);
384 
385 	dev_id = of_match_device(malidp_drm_of_match, dev);
386 	if (!dev_id) {
387 		ret = -EINVAL;
388 		goto query_hw_fail;
389 	}
390 
391 	if (!malidp_has_sufficient_address_space(res, dev_id)) {
392 		DRM_ERROR("Insufficient address space in device-tree.\n");
393 		ret = -EINVAL;
394 		goto query_hw_fail;
395 	}
396 
397 	if (!malidp_is_compatible_hw_id(hwdev, dev_id)) {
398 		ret = -EINVAL;
399 		goto query_hw_fail;
400 	}
401 
402 	ret = hwdev->query_hw(hwdev);
403 	if (ret) {
404 		DRM_ERROR("Invalid HW configuration\n");
405 		goto query_hw_fail;
406 	}
407 
408 	version = malidp_hw_read(hwdev, hwdev->map.dc_base + MALIDP_DE_CORE_ID);
409 	DRM_INFO("found ARM Mali-DP%3x version r%dp%d\n", version >> 16,
410 		 (version >> 12) & 0xf, (version >> 8) & 0xf);
411 
412 	/* set the number of lines used for output of RGB data */
413 	ret = of_property_read_u8_array(dev->of_node,
414 					"arm,malidp-output-port-lines",
415 					output_width, MAX_OUTPUT_CHANNELS);
416 	if (ret)
417 		goto query_hw_fail;
418 
419 	for (i = 0; i < MAX_OUTPUT_CHANNELS; i++)
420 		out_depth = (out_depth << 8) | (output_width[i] & 0xf);
421 	malidp_hw_write(hwdev, out_depth, hwdev->map.out_depth_base);
422 
423 	drm->dev_private = malidp;
424 	dev_set_drvdata(dev, drm);
425 	atomic_set(&malidp->config_valid, 0);
426 	init_waitqueue_head(&malidp->wq);
427 
428 	ret = malidp_init(drm);
429 	if (ret < 0)
430 		goto init_fail;
431 
432 	/* Set the CRTC's port so that the encoder component can find it */
433 	ep = of_graph_get_next_endpoint(dev->of_node, NULL);
434 	if (!ep) {
435 		ret = -EINVAL;
436 		goto port_fail;
437 	}
438 	malidp->crtc.port = of_get_next_parent(ep);
439 
440 	ret = component_bind_all(dev, drm);
441 	if (ret) {
442 		DRM_ERROR("Failed to bind all components\n");
443 		goto bind_fail;
444 	}
445 
446 	ret = malidp_irq_init(pdev);
447 	if (ret < 0)
448 		goto irq_init_fail;
449 
450 	drm->irq_enabled = true;
451 
452 	ret = drm_vblank_init(drm, drm->mode_config.num_crtc);
453 	if (ret < 0) {
454 		DRM_ERROR("failed to initialise vblank\n");
455 		goto vblank_fail;
456 	}
457 
458 	drm_mode_config_reset(drm);
459 
460 	malidp->fbdev = drm_fbdev_cma_init(drm, 32,
461 					   drm->mode_config.num_connector);
462 
463 	if (IS_ERR(malidp->fbdev)) {
464 		ret = PTR_ERR(malidp->fbdev);
465 		malidp->fbdev = NULL;
466 		goto fbdev_fail;
467 	}
468 
469 	drm_kms_helper_poll_init(drm);
470 
471 	ret = drm_dev_register(drm, 0);
472 	if (ret)
473 		goto register_fail;
474 
475 	return 0;
476 
477 register_fail:
478 	if (malidp->fbdev) {
479 		drm_fbdev_cma_fini(malidp->fbdev);
480 		malidp->fbdev = NULL;
481 	}
482 fbdev_fail:
483 	drm_vblank_cleanup(drm);
484 vblank_fail:
485 	malidp_se_irq_fini(drm);
486 	malidp_de_irq_fini(drm);
487 	drm->irq_enabled = false;
488 irq_init_fail:
489 	component_unbind_all(dev, drm);
490 bind_fail:
491 	of_node_put(malidp->crtc.port);
492 	malidp->crtc.port = NULL;
493 port_fail:
494 	malidp_fini(drm);
495 init_fail:
496 	drm->dev_private = NULL;
497 	dev_set_drvdata(dev, NULL);
498 query_hw_fail:
499 	clk_disable_unprepare(hwdev->mclk);
500 	clk_disable_unprepare(hwdev->aclk);
501 	clk_disable_unprepare(hwdev->pclk);
502 	drm_dev_unref(drm);
503 alloc_fail:
504 	of_reserved_mem_device_release(dev);
505 
506 	return ret;
507 }
508 
509 static void malidp_unbind(struct device *dev)
510 {
511 	struct drm_device *drm = dev_get_drvdata(dev);
512 	struct malidp_drm *malidp = drm->dev_private;
513 	struct malidp_hw_device *hwdev = malidp->dev;
514 
515 	drm_dev_unregister(drm);
516 	if (malidp->fbdev) {
517 		drm_fbdev_cma_fini(malidp->fbdev);
518 		malidp->fbdev = NULL;
519 	}
520 	drm_kms_helper_poll_fini(drm);
521 	malidp_se_irq_fini(drm);
522 	malidp_de_irq_fini(drm);
523 	drm_vblank_cleanup(drm);
524 	component_unbind_all(dev, drm);
525 	of_node_put(malidp->crtc.port);
526 	malidp->crtc.port = NULL;
527 	malidp_fini(drm);
528 	drm->dev_private = NULL;
529 	dev_set_drvdata(dev, NULL);
530 	clk_disable_unprepare(hwdev->mclk);
531 	clk_disable_unprepare(hwdev->aclk);
532 	clk_disable_unprepare(hwdev->pclk);
533 	drm_dev_unref(drm);
534 	of_reserved_mem_device_release(dev);
535 }
536 
537 static const struct component_master_ops malidp_master_ops = {
538 	.bind = malidp_bind,
539 	.unbind = malidp_unbind,
540 };
541 
542 static int malidp_compare_dev(struct device *dev, void *data)
543 {
544 	struct device_node *np = data;
545 
546 	return dev->of_node == np;
547 }
548 
549 static int malidp_platform_probe(struct platform_device *pdev)
550 {
551 	struct device_node *port, *ep;
552 	struct component_match *match = NULL;
553 
554 	if (!pdev->dev.of_node)
555 		return -ENODEV;
556 
557 	/* there is only one output port inside each device, find it */
558 	ep = of_graph_get_next_endpoint(pdev->dev.of_node, NULL);
559 	if (!ep)
560 		return -ENODEV;
561 
562 	if (!of_device_is_available(ep)) {
563 		of_node_put(ep);
564 		return -ENODEV;
565 	}
566 
567 	/* add the remote encoder port as component */
568 	port = of_graph_get_remote_port_parent(ep);
569 	of_node_put(ep);
570 	if (!port || !of_device_is_available(port)) {
571 		of_node_put(port);
572 		return -EAGAIN;
573 	}
574 
575 	drm_of_component_match_add(&pdev->dev, &match, malidp_compare_dev,
576 				   port);
577 	of_node_put(port);
578 	return component_master_add_with_match(&pdev->dev, &malidp_master_ops,
579 					       match);
580 }
581 
582 static int malidp_platform_remove(struct platform_device *pdev)
583 {
584 	component_master_del(&pdev->dev, &malidp_master_ops);
585 	return 0;
586 }
587 
588 static struct platform_driver malidp_platform_driver = {
589 	.probe		= malidp_platform_probe,
590 	.remove		= malidp_platform_remove,
591 	.driver	= {
592 		.name = "mali-dp",
593 		.of_match_table	= malidp_drm_of_match,
594 	},
595 };
596 
597 module_platform_driver(malidp_platform_driver);
598 
599 MODULE_AUTHOR("Liviu Dudau <Liviu.Dudau@arm.com>");
600 MODULE_DESCRIPTION("ARM Mali DP DRM driver");
601 MODULE_LICENSE("GPL v2");
602