1ad49f860SLiviu Dudau /* 2ad49f860SLiviu Dudau * (C) COPYRIGHT 2016 ARM Limited. All rights reserved. 3ad49f860SLiviu Dudau * Author: Liviu Dudau <Liviu.Dudau@arm.com> 4ad49f860SLiviu Dudau * 5ad49f860SLiviu Dudau * This program is free software and is provided to you under the terms of the 6ad49f860SLiviu Dudau * GNU General Public License version 2 as published by the Free Software 7ad49f860SLiviu Dudau * Foundation, and any use by you of this program is subject to the terms 8ad49f860SLiviu Dudau * of such GNU licence. 9ad49f860SLiviu Dudau * 10ad49f860SLiviu Dudau * ARM Mali DP500/DP550/DP650 KMS/DRM driver 11ad49f860SLiviu Dudau */ 12ad49f860SLiviu Dudau 13ad49f860SLiviu Dudau #include <linux/module.h> 14ad49f860SLiviu Dudau #include <linux/clk.h> 15ad49f860SLiviu Dudau #include <linux/component.h> 16ad49f860SLiviu Dudau #include <linux/of_device.h> 17ad49f860SLiviu Dudau #include <linux/of_graph.h> 18ad49f860SLiviu Dudau #include <linux/of_reserved_mem.h> 19ad49f860SLiviu Dudau 20ad49f860SLiviu Dudau #include <drm/drmP.h> 21ad49f860SLiviu Dudau #include <drm/drm_atomic.h> 22ad49f860SLiviu Dudau #include <drm/drm_atomic_helper.h> 23ad49f860SLiviu Dudau #include <drm/drm_crtc.h> 24ad49f860SLiviu Dudau #include <drm/drm_crtc_helper.h> 25ad49f860SLiviu Dudau #include <drm/drm_fb_helper.h> 26ad49f860SLiviu Dudau #include <drm/drm_fb_cma_helper.h> 27ad49f860SLiviu Dudau #include <drm/drm_gem_cma_helper.h> 28ad49f860SLiviu Dudau #include <drm/drm_of.h> 29ad49f860SLiviu Dudau 30ad49f860SLiviu Dudau #include "malidp_drv.h" 31ad49f860SLiviu Dudau #include "malidp_regs.h" 32ad49f860SLiviu Dudau #include "malidp_hw.h" 33ad49f860SLiviu Dudau 34ad49f860SLiviu Dudau #define MALIDP_CONF_VALID_TIMEOUT 250 35ad49f860SLiviu Dudau 36ad49f860SLiviu Dudau /* 37ad49f860SLiviu Dudau * set the "config valid" bit and wait until the hardware acts on it 38ad49f860SLiviu Dudau */ 39ad49f860SLiviu Dudau static int malidp_set_and_wait_config_valid(struct drm_device *drm) 40ad49f860SLiviu Dudau { 41ad49f860SLiviu Dudau struct malidp_drm *malidp = drm->dev_private; 42ad49f860SLiviu Dudau struct malidp_hw_device *hwdev = malidp->dev; 43ad49f860SLiviu Dudau int ret; 44ad49f860SLiviu Dudau 45aad38963SLiviu Dudau atomic_set(&malidp->config_valid, 0); 46ad49f860SLiviu Dudau hwdev->set_config_valid(hwdev); 47ad49f860SLiviu Dudau /* don't wait for config_valid flag if we are in config mode */ 48ad49f860SLiviu Dudau if (hwdev->in_config_mode(hwdev)) 49ad49f860SLiviu Dudau return 0; 50ad49f860SLiviu Dudau 51ad49f860SLiviu Dudau ret = wait_event_interruptible_timeout(malidp->wq, 52ad49f860SLiviu Dudau atomic_read(&malidp->config_valid) == 1, 53ad49f860SLiviu Dudau msecs_to_jiffies(MALIDP_CONF_VALID_TIMEOUT)); 54ad49f860SLiviu Dudau 55ad49f860SLiviu Dudau return (ret > 0) ? 0 : -ETIMEDOUT; 56ad49f860SLiviu Dudau } 57ad49f860SLiviu Dudau 58ad49f860SLiviu Dudau static void malidp_output_poll_changed(struct drm_device *drm) 59ad49f860SLiviu Dudau { 60ad49f860SLiviu Dudau struct malidp_drm *malidp = drm->dev_private; 61ad49f860SLiviu Dudau 62ad49f860SLiviu Dudau drm_fbdev_cma_hotplug_event(malidp->fbdev); 63ad49f860SLiviu Dudau } 64ad49f860SLiviu Dudau 65ad49f860SLiviu Dudau static void malidp_atomic_commit_hw_done(struct drm_atomic_state *state) 66ad49f860SLiviu Dudau { 67ad49f860SLiviu Dudau struct drm_pending_vblank_event *event; 68ad49f860SLiviu Dudau struct drm_device *drm = state->dev; 69ad49f860SLiviu Dudau struct malidp_drm *malidp = drm->dev_private; 70ad49f860SLiviu Dudau int ret = malidp_set_and_wait_config_valid(drm); 71ad49f860SLiviu Dudau 72ad49f860SLiviu Dudau if (ret) 73ad49f860SLiviu Dudau DRM_DEBUG_DRIVER("timed out waiting for updated configuration\n"); 74ad49f860SLiviu Dudau 75ad49f860SLiviu Dudau event = malidp->crtc.state->event; 76ad49f860SLiviu Dudau if (event) { 77ad49f860SLiviu Dudau malidp->crtc.state->event = NULL; 78ad49f860SLiviu Dudau 79ad49f860SLiviu Dudau spin_lock_irq(&drm->event_lock); 80ad49f860SLiviu Dudau if (drm_crtc_vblank_get(&malidp->crtc) == 0) 81ad49f860SLiviu Dudau drm_crtc_arm_vblank_event(&malidp->crtc, event); 82ad49f860SLiviu Dudau else 83ad49f860SLiviu Dudau drm_crtc_send_vblank_event(&malidp->crtc, event); 84ad49f860SLiviu Dudau spin_unlock_irq(&drm->event_lock); 85ad49f860SLiviu Dudau } 86ad49f860SLiviu Dudau drm_atomic_helper_commit_hw_done(state); 87ad49f860SLiviu Dudau } 88ad49f860SLiviu Dudau 89ad49f860SLiviu Dudau static void malidp_atomic_commit_tail(struct drm_atomic_state *state) 90ad49f860SLiviu Dudau { 91ad49f860SLiviu Dudau struct drm_device *drm = state->dev; 92ad49f860SLiviu Dudau 93ad49f860SLiviu Dudau drm_atomic_helper_commit_modeset_disables(drm, state); 94ad49f860SLiviu Dudau drm_atomic_helper_commit_modeset_enables(drm, state); 952b58e98dSLiu Ying drm_atomic_helper_commit_planes(drm, state, 962b58e98dSLiu Ying DRM_PLANE_COMMIT_ACTIVE_ONLY); 97ad49f860SLiviu Dudau 98ad49f860SLiviu Dudau malidp_atomic_commit_hw_done(state); 99ad49f860SLiviu Dudau 100ad49f860SLiviu Dudau drm_atomic_helper_wait_for_vblanks(drm, state); 101ad49f860SLiviu Dudau 102ad49f860SLiviu Dudau drm_atomic_helper_cleanup_planes(drm, state); 103ad49f860SLiviu Dudau } 104ad49f860SLiviu Dudau 105ad49f860SLiviu Dudau static struct drm_mode_config_helper_funcs malidp_mode_config_helpers = { 106ad49f860SLiviu Dudau .atomic_commit_tail = malidp_atomic_commit_tail, 107ad49f860SLiviu Dudau }; 108ad49f860SLiviu Dudau 109ad49f860SLiviu Dudau static const struct drm_mode_config_funcs malidp_mode_config_funcs = { 110ad49f860SLiviu Dudau .fb_create = drm_fb_cma_create, 111ad49f860SLiviu Dudau .output_poll_changed = malidp_output_poll_changed, 112ad49f860SLiviu Dudau .atomic_check = drm_atomic_helper_check, 113ad49f860SLiviu Dudau .atomic_commit = drm_atomic_helper_commit, 114ad49f860SLiviu Dudau }; 115ad49f860SLiviu Dudau 116ad49f860SLiviu Dudau static int malidp_enable_vblank(struct drm_device *drm, unsigned int crtc) 117ad49f860SLiviu Dudau { 118ad49f860SLiviu Dudau struct malidp_drm *malidp = drm->dev_private; 119ad49f860SLiviu Dudau struct malidp_hw_device *hwdev = malidp->dev; 120ad49f860SLiviu Dudau 121ad49f860SLiviu Dudau malidp_hw_enable_irq(hwdev, MALIDP_DE_BLOCK, 122ad49f860SLiviu Dudau hwdev->map.de_irq_map.vsync_irq); 123ad49f860SLiviu Dudau return 0; 124ad49f860SLiviu Dudau } 125ad49f860SLiviu Dudau 126ad49f860SLiviu Dudau static void malidp_disable_vblank(struct drm_device *drm, unsigned int pipe) 127ad49f860SLiviu Dudau { 128ad49f860SLiviu Dudau struct malidp_drm *malidp = drm->dev_private; 129ad49f860SLiviu Dudau struct malidp_hw_device *hwdev = malidp->dev; 130ad49f860SLiviu Dudau 131ad49f860SLiviu Dudau malidp_hw_disable_irq(hwdev, MALIDP_DE_BLOCK, 132ad49f860SLiviu Dudau hwdev->map.de_irq_map.vsync_irq); 133ad49f860SLiviu Dudau } 134ad49f860SLiviu Dudau 135ad49f860SLiviu Dudau static int malidp_init(struct drm_device *drm) 136ad49f860SLiviu Dudau { 137ad49f860SLiviu Dudau int ret; 138ad49f860SLiviu Dudau struct malidp_drm *malidp = drm->dev_private; 139ad49f860SLiviu Dudau struct malidp_hw_device *hwdev = malidp->dev; 140ad49f860SLiviu Dudau 141ad49f860SLiviu Dudau drm_mode_config_init(drm); 142ad49f860SLiviu Dudau 143ad49f860SLiviu Dudau drm->mode_config.min_width = hwdev->min_line_size; 144ad49f860SLiviu Dudau drm->mode_config.min_height = hwdev->min_line_size; 145ad49f860SLiviu Dudau drm->mode_config.max_width = hwdev->max_line_size; 146ad49f860SLiviu Dudau drm->mode_config.max_height = hwdev->max_line_size; 147ad49f860SLiviu Dudau drm->mode_config.funcs = &malidp_mode_config_funcs; 148ad49f860SLiviu Dudau drm->mode_config.helper_private = &malidp_mode_config_helpers; 149ad49f860SLiviu Dudau 150ad49f860SLiviu Dudau ret = malidp_crtc_init(drm); 151ad49f860SLiviu Dudau if (ret) { 152ad49f860SLiviu Dudau drm_mode_config_cleanup(drm); 153ad49f860SLiviu Dudau return ret; 154ad49f860SLiviu Dudau } 155ad49f860SLiviu Dudau 156ad49f860SLiviu Dudau return 0; 157ad49f860SLiviu Dudau } 158ad49f860SLiviu Dudau 159ad49f860SLiviu Dudau static int malidp_irq_init(struct platform_device *pdev) 160ad49f860SLiviu Dudau { 161ad49f860SLiviu Dudau int irq_de, irq_se, ret = 0; 162ad49f860SLiviu Dudau struct drm_device *drm = dev_get_drvdata(&pdev->dev); 163ad49f860SLiviu Dudau 164ad49f860SLiviu Dudau /* fetch the interrupts from DT */ 165ad49f860SLiviu Dudau irq_de = platform_get_irq_byname(pdev, "DE"); 166ad49f860SLiviu Dudau if (irq_de < 0) { 167ad49f860SLiviu Dudau DRM_ERROR("no 'DE' IRQ specified!\n"); 168ad49f860SLiviu Dudau return irq_de; 169ad49f860SLiviu Dudau } 170ad49f860SLiviu Dudau irq_se = platform_get_irq_byname(pdev, "SE"); 171ad49f860SLiviu Dudau if (irq_se < 0) { 172ad49f860SLiviu Dudau DRM_ERROR("no 'SE' IRQ specified!\n"); 173ad49f860SLiviu Dudau return irq_se; 174ad49f860SLiviu Dudau } 175ad49f860SLiviu Dudau 176ad49f860SLiviu Dudau ret = malidp_de_irq_init(drm, irq_de); 177ad49f860SLiviu Dudau if (ret) 178ad49f860SLiviu Dudau return ret; 179ad49f860SLiviu Dudau 180ad49f860SLiviu Dudau ret = malidp_se_irq_init(drm, irq_se); 181ad49f860SLiviu Dudau if (ret) { 182ad49f860SLiviu Dudau malidp_de_irq_fini(drm); 183ad49f860SLiviu Dudau return ret; 184ad49f860SLiviu Dudau } 185ad49f860SLiviu Dudau 186ad49f860SLiviu Dudau return 0; 187ad49f860SLiviu Dudau } 188ad49f860SLiviu Dudau 189ad49f860SLiviu Dudau static void malidp_lastclose(struct drm_device *drm) 190ad49f860SLiviu Dudau { 191ad49f860SLiviu Dudau struct malidp_drm *malidp = drm->dev_private; 192ad49f860SLiviu Dudau 193ad49f860SLiviu Dudau drm_fbdev_cma_restore_mode(malidp->fbdev); 194ad49f860SLiviu Dudau } 195ad49f860SLiviu Dudau 196ad49f860SLiviu Dudau static const struct file_operations fops = { 197ad49f860SLiviu Dudau .owner = THIS_MODULE, 198ad49f860SLiviu Dudau .open = drm_open, 199ad49f860SLiviu Dudau .release = drm_release, 200ad49f860SLiviu Dudau .unlocked_ioctl = drm_ioctl, 201ad49f860SLiviu Dudau #ifdef CONFIG_COMPAT 202ad49f860SLiviu Dudau .compat_ioctl = drm_compat_ioctl, 203ad49f860SLiviu Dudau #endif 204ad49f860SLiviu Dudau .poll = drm_poll, 205ad49f860SLiviu Dudau .read = drm_read, 206ad49f860SLiviu Dudau .llseek = noop_llseek, 207ad49f860SLiviu Dudau .mmap = drm_gem_cma_mmap, 208ad49f860SLiviu Dudau }; 209ad49f860SLiviu Dudau 210ad49f860SLiviu Dudau static struct drm_driver malidp_driver = { 211ad49f860SLiviu Dudau .driver_features = DRIVER_GEM | DRIVER_MODESET | DRIVER_ATOMIC | 212ad49f860SLiviu Dudau DRIVER_PRIME, 213ad49f860SLiviu Dudau .lastclose = malidp_lastclose, 214ad49f860SLiviu Dudau .get_vblank_counter = drm_vblank_no_hw_counter, 215ad49f860SLiviu Dudau .enable_vblank = malidp_enable_vblank, 216ad49f860SLiviu Dudau .disable_vblank = malidp_disable_vblank, 217ad49f860SLiviu Dudau .gem_free_object_unlocked = drm_gem_cma_free_object, 218ad49f860SLiviu Dudau .gem_vm_ops = &drm_gem_cma_vm_ops, 219ad49f860SLiviu Dudau .dumb_create = drm_gem_cma_dumb_create, 220ad49f860SLiviu Dudau .dumb_map_offset = drm_gem_cma_dumb_map_offset, 221ad49f860SLiviu Dudau .dumb_destroy = drm_gem_dumb_destroy, 222ad49f860SLiviu Dudau .prime_handle_to_fd = drm_gem_prime_handle_to_fd, 223ad49f860SLiviu Dudau .prime_fd_to_handle = drm_gem_prime_fd_to_handle, 224ad49f860SLiviu Dudau .gem_prime_export = drm_gem_prime_export, 225ad49f860SLiviu Dudau .gem_prime_import = drm_gem_prime_import, 226ad49f860SLiviu Dudau .gem_prime_get_sg_table = drm_gem_cma_prime_get_sg_table, 227ad49f860SLiviu Dudau .gem_prime_import_sg_table = drm_gem_cma_prime_import_sg_table, 228ad49f860SLiviu Dudau .gem_prime_vmap = drm_gem_cma_prime_vmap, 229ad49f860SLiviu Dudau .gem_prime_vunmap = drm_gem_cma_prime_vunmap, 230ad49f860SLiviu Dudau .gem_prime_mmap = drm_gem_cma_prime_mmap, 231ad49f860SLiviu Dudau .fops = &fops, 232ad49f860SLiviu Dudau .name = "mali-dp", 233ad49f860SLiviu Dudau .desc = "ARM Mali Display Processor driver", 234ad49f860SLiviu Dudau .date = "20160106", 235ad49f860SLiviu Dudau .major = 1, 236ad49f860SLiviu Dudau .minor = 0, 237ad49f860SLiviu Dudau }; 238ad49f860SLiviu Dudau 239ad49f860SLiviu Dudau static const struct of_device_id malidp_drm_of_match[] = { 240ad49f860SLiviu Dudau { 241ad49f860SLiviu Dudau .compatible = "arm,mali-dp500", 242ad49f860SLiviu Dudau .data = &malidp_device[MALIDP_500] 243ad49f860SLiviu Dudau }, 244ad49f860SLiviu Dudau { 245ad49f860SLiviu Dudau .compatible = "arm,mali-dp550", 246ad49f860SLiviu Dudau .data = &malidp_device[MALIDP_550] 247ad49f860SLiviu Dudau }, 248ad49f860SLiviu Dudau { 249ad49f860SLiviu Dudau .compatible = "arm,mali-dp650", 250ad49f860SLiviu Dudau .data = &malidp_device[MALIDP_650] 251ad49f860SLiviu Dudau }, 252ad49f860SLiviu Dudau {}, 253ad49f860SLiviu Dudau }; 254ad49f860SLiviu Dudau MODULE_DEVICE_TABLE(of, malidp_drm_of_match); 255ad49f860SLiviu Dudau 256ad49f860SLiviu Dudau #define MAX_OUTPUT_CHANNELS 3 257ad49f860SLiviu Dudau 258ad49f860SLiviu Dudau static int malidp_bind(struct device *dev) 259ad49f860SLiviu Dudau { 260ad49f860SLiviu Dudau struct resource *res; 261ad49f860SLiviu Dudau struct drm_device *drm; 2623c31760eSBrian Starkey struct device_node *ep; 263ad49f860SLiviu Dudau struct malidp_drm *malidp; 264ad49f860SLiviu Dudau struct malidp_hw_device *hwdev; 265ad49f860SLiviu Dudau struct platform_device *pdev = to_platform_device(dev); 266ad49f860SLiviu Dudau /* number of lines for the R, G and B output */ 267ad49f860SLiviu Dudau u8 output_width[MAX_OUTPUT_CHANNELS]; 268ad49f860SLiviu Dudau int ret = 0, i; 269ad49f860SLiviu Dudau u32 version, out_depth = 0; 270ad49f860SLiviu Dudau 271ad49f860SLiviu Dudau malidp = devm_kzalloc(dev, sizeof(*malidp), GFP_KERNEL); 272ad49f860SLiviu Dudau if (!malidp) 273ad49f860SLiviu Dudau return -ENOMEM; 274ad49f860SLiviu Dudau 275ad49f860SLiviu Dudau hwdev = devm_kzalloc(dev, sizeof(*hwdev), GFP_KERNEL); 276ad49f860SLiviu Dudau if (!hwdev) 277ad49f860SLiviu Dudau return -ENOMEM; 278ad49f860SLiviu Dudau 279ad49f860SLiviu Dudau /* 280ad49f860SLiviu Dudau * copy the associated data from malidp_drm_of_match to avoid 281ad49f860SLiviu Dudau * having to keep a reference to the OF node after binding 282ad49f860SLiviu Dudau */ 283ad49f860SLiviu Dudau memcpy(hwdev, of_device_get_match_data(dev), sizeof(*hwdev)); 284ad49f860SLiviu Dudau malidp->dev = hwdev; 285ad49f860SLiviu Dudau 286ad49f860SLiviu Dudau INIT_LIST_HEAD(&malidp->event_list); 287ad49f860SLiviu Dudau 288ad49f860SLiviu Dudau res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 289ad49f860SLiviu Dudau hwdev->regs = devm_ioremap_resource(dev, res); 2901a9d71f8SWei Yongjun if (IS_ERR(hwdev->regs)) 291ad49f860SLiviu Dudau return PTR_ERR(hwdev->regs); 292ad49f860SLiviu Dudau 293ad49f860SLiviu Dudau hwdev->pclk = devm_clk_get(dev, "pclk"); 294ad49f860SLiviu Dudau if (IS_ERR(hwdev->pclk)) 295ad49f860SLiviu Dudau return PTR_ERR(hwdev->pclk); 296ad49f860SLiviu Dudau 297ad49f860SLiviu Dudau hwdev->aclk = devm_clk_get(dev, "aclk"); 298ad49f860SLiviu Dudau if (IS_ERR(hwdev->aclk)) 299ad49f860SLiviu Dudau return PTR_ERR(hwdev->aclk); 300ad49f860SLiviu Dudau 301ad49f860SLiviu Dudau hwdev->mclk = devm_clk_get(dev, "mclk"); 302ad49f860SLiviu Dudau if (IS_ERR(hwdev->mclk)) 303ad49f860SLiviu Dudau return PTR_ERR(hwdev->mclk); 304ad49f860SLiviu Dudau 305ad49f860SLiviu Dudau hwdev->pxlclk = devm_clk_get(dev, "pxlclk"); 306ad49f860SLiviu Dudau if (IS_ERR(hwdev->pxlclk)) 307ad49f860SLiviu Dudau return PTR_ERR(hwdev->pxlclk); 308ad49f860SLiviu Dudau 309ad49f860SLiviu Dudau /* Get the optional framebuffer memory resource */ 310ad49f860SLiviu Dudau ret = of_reserved_mem_device_init(dev); 311ad49f860SLiviu Dudau if (ret && ret != -ENODEV) 312ad49f860SLiviu Dudau return ret; 313ad49f860SLiviu Dudau 314ad49f860SLiviu Dudau drm = drm_dev_alloc(&malidp_driver, dev); 3150f288605STom Gundersen if (IS_ERR(drm)) { 3160f288605STom Gundersen ret = PTR_ERR(drm); 317ad49f860SLiviu Dudau goto alloc_fail; 318ad49f860SLiviu Dudau } 319ad49f860SLiviu Dudau 320ad49f860SLiviu Dudau /* Enable APB clock in order to get access to the registers */ 321ad49f860SLiviu Dudau clk_prepare_enable(hwdev->pclk); 322ad49f860SLiviu Dudau /* 323ad49f860SLiviu Dudau * Enable AXI clock and main clock so that prefetch can start once 324ad49f860SLiviu Dudau * the registers are set 325ad49f860SLiviu Dudau */ 326ad49f860SLiviu Dudau clk_prepare_enable(hwdev->aclk); 327ad49f860SLiviu Dudau clk_prepare_enable(hwdev->mclk); 328ad49f860SLiviu Dudau 329ad49f860SLiviu Dudau ret = hwdev->query_hw(hwdev); 330ad49f860SLiviu Dudau if (ret) { 331ad49f860SLiviu Dudau DRM_ERROR("Invalid HW configuration\n"); 332ad49f860SLiviu Dudau goto query_hw_fail; 333ad49f860SLiviu Dudau } 334ad49f860SLiviu Dudau 335ad49f860SLiviu Dudau version = malidp_hw_read(hwdev, hwdev->map.dc_base + MALIDP_DE_CORE_ID); 336ad49f860SLiviu Dudau DRM_INFO("found ARM Mali-DP%3x version r%dp%d\n", version >> 16, 337ad49f860SLiviu Dudau (version >> 12) & 0xf, (version >> 8) & 0xf); 338ad49f860SLiviu Dudau 339ad49f860SLiviu Dudau /* set the number of lines used for output of RGB data */ 340ad49f860SLiviu Dudau ret = of_property_read_u8_array(dev->of_node, 341ad49f860SLiviu Dudau "arm,malidp-output-port-lines", 342ad49f860SLiviu Dudau output_width, MAX_OUTPUT_CHANNELS); 343ad49f860SLiviu Dudau if (ret) 344ad49f860SLiviu Dudau goto query_hw_fail; 345ad49f860SLiviu Dudau 346ad49f860SLiviu Dudau for (i = 0; i < MAX_OUTPUT_CHANNELS; i++) 347ad49f860SLiviu Dudau out_depth = (out_depth << 8) | (output_width[i] & 0xf); 348ad49f860SLiviu Dudau malidp_hw_write(hwdev, out_depth, hwdev->map.out_depth_base); 349ad49f860SLiviu Dudau 350ad49f860SLiviu Dudau drm->dev_private = malidp; 351ad49f860SLiviu Dudau dev_set_drvdata(dev, drm); 352ad49f860SLiviu Dudau atomic_set(&malidp->config_valid, 0); 353ad49f860SLiviu Dudau init_waitqueue_head(&malidp->wq); 354ad49f860SLiviu Dudau 355ad49f860SLiviu Dudau ret = malidp_init(drm); 356ad49f860SLiviu Dudau if (ret < 0) 357ad49f860SLiviu Dudau goto init_fail; 358ad49f860SLiviu Dudau 359ad49f860SLiviu Dudau ret = drm_dev_register(drm, 0); 360ad49f860SLiviu Dudau if (ret) 361ad49f860SLiviu Dudau goto register_fail; 362ad49f860SLiviu Dudau 363ad49f860SLiviu Dudau /* Set the CRTC's port so that the encoder component can find it */ 3643c31760eSBrian Starkey ep = of_graph_get_next_endpoint(dev->of_node, NULL); 36512ae57aaSWei Yongjun if (!ep) { 36612ae57aaSWei Yongjun ret = -EINVAL; 3673c31760eSBrian Starkey goto port_fail; 36812ae57aaSWei Yongjun } 3693c31760eSBrian Starkey malidp->crtc.port = of_get_next_parent(ep); 370ad49f860SLiviu Dudau 371ad49f860SLiviu Dudau ret = component_bind_all(dev, drm); 372ad49f860SLiviu Dudau if (ret) { 373ad49f860SLiviu Dudau DRM_ERROR("Failed to bind all components\n"); 374ad49f860SLiviu Dudau goto bind_fail; 375ad49f860SLiviu Dudau } 376ad49f860SLiviu Dudau 377ad49f860SLiviu Dudau ret = malidp_irq_init(pdev); 378ad49f860SLiviu Dudau if (ret < 0) 379ad49f860SLiviu Dudau goto irq_init_fail; 380ad49f860SLiviu Dudau 381a6a7b9a2SLiviu Dudau drm->irq_enabled = true; 382a6a7b9a2SLiviu Dudau 383ad49f860SLiviu Dudau ret = drm_vblank_init(drm, drm->mode_config.num_crtc); 384ad49f860SLiviu Dudau if (ret < 0) { 385ad49f860SLiviu Dudau DRM_ERROR("failed to initialise vblank\n"); 386ad49f860SLiviu Dudau goto vblank_fail; 387ad49f860SLiviu Dudau } 388ad49f860SLiviu Dudau 389ad49f860SLiviu Dudau drm_mode_config_reset(drm); 390ad49f860SLiviu Dudau 391ad49f860SLiviu Dudau malidp->fbdev = drm_fbdev_cma_init(drm, 32, drm->mode_config.num_crtc, 392ad49f860SLiviu Dudau drm->mode_config.num_connector); 393ad49f860SLiviu Dudau 394ad49f860SLiviu Dudau if (IS_ERR(malidp->fbdev)) { 395ad49f860SLiviu Dudau ret = PTR_ERR(malidp->fbdev); 396ad49f860SLiviu Dudau malidp->fbdev = NULL; 397ad49f860SLiviu Dudau goto fbdev_fail; 398ad49f860SLiviu Dudau } 399ad49f860SLiviu Dudau 400ad49f860SLiviu Dudau drm_kms_helper_poll_init(drm); 401ad49f860SLiviu Dudau return 0; 402ad49f860SLiviu Dudau 403ad49f860SLiviu Dudau fbdev_fail: 404ad49f860SLiviu Dudau drm_vblank_cleanup(drm); 405ad49f860SLiviu Dudau vblank_fail: 406ad49f860SLiviu Dudau malidp_se_irq_fini(drm); 407ad49f860SLiviu Dudau malidp_de_irq_fini(drm); 408a6a7b9a2SLiviu Dudau drm->irq_enabled = false; 409ad49f860SLiviu Dudau irq_init_fail: 410ad49f860SLiviu Dudau component_unbind_all(dev, drm); 411ad49f860SLiviu Dudau bind_fail: 4123c31760eSBrian Starkey of_node_put(malidp->crtc.port); 4133c31760eSBrian Starkey malidp->crtc.port = NULL; 4143c31760eSBrian Starkey port_fail: 415ad49f860SLiviu Dudau drm_dev_unregister(drm); 416ad49f860SLiviu Dudau register_fail: 417ad49f860SLiviu Dudau malidp_de_planes_destroy(drm); 418ad49f860SLiviu Dudau drm_mode_config_cleanup(drm); 419ad49f860SLiviu Dudau init_fail: 420ad49f860SLiviu Dudau drm->dev_private = NULL; 421ad49f860SLiviu Dudau dev_set_drvdata(dev, NULL); 422ad49f860SLiviu Dudau query_hw_fail: 423ad49f860SLiviu Dudau clk_disable_unprepare(hwdev->mclk); 424ad49f860SLiviu Dudau clk_disable_unprepare(hwdev->aclk); 425ad49f860SLiviu Dudau clk_disable_unprepare(hwdev->pclk); 426ad49f860SLiviu Dudau drm_dev_unref(drm); 427ad49f860SLiviu Dudau alloc_fail: 428ad49f860SLiviu Dudau of_reserved_mem_device_release(dev); 429ad49f860SLiviu Dudau 430ad49f860SLiviu Dudau return ret; 431ad49f860SLiviu Dudau } 432ad49f860SLiviu Dudau 433ad49f860SLiviu Dudau static void malidp_unbind(struct device *dev) 434ad49f860SLiviu Dudau { 435ad49f860SLiviu Dudau struct drm_device *drm = dev_get_drvdata(dev); 436ad49f860SLiviu Dudau struct malidp_drm *malidp = drm->dev_private; 437ad49f860SLiviu Dudau struct malidp_hw_device *hwdev = malidp->dev; 438ad49f860SLiviu Dudau 439ad49f860SLiviu Dudau if (malidp->fbdev) { 440ad49f860SLiviu Dudau drm_fbdev_cma_fini(malidp->fbdev); 441ad49f860SLiviu Dudau malidp->fbdev = NULL; 442ad49f860SLiviu Dudau } 443ad49f860SLiviu Dudau drm_kms_helper_poll_fini(drm); 444ad49f860SLiviu Dudau malidp_se_irq_fini(drm); 445ad49f860SLiviu Dudau malidp_de_irq_fini(drm); 446ad49f860SLiviu Dudau drm_vblank_cleanup(drm); 447ad49f860SLiviu Dudau component_unbind_all(dev, drm); 4483c31760eSBrian Starkey of_node_put(malidp->crtc.port); 4493c31760eSBrian Starkey malidp->crtc.port = NULL; 450ad49f860SLiviu Dudau drm_dev_unregister(drm); 451ad49f860SLiviu Dudau malidp_de_planes_destroy(drm); 452ad49f860SLiviu Dudau drm_mode_config_cleanup(drm); 453ad49f860SLiviu Dudau drm->dev_private = NULL; 454ad49f860SLiviu Dudau dev_set_drvdata(dev, NULL); 455ad49f860SLiviu Dudau clk_disable_unprepare(hwdev->mclk); 456ad49f860SLiviu Dudau clk_disable_unprepare(hwdev->aclk); 457ad49f860SLiviu Dudau clk_disable_unprepare(hwdev->pclk); 458ad49f860SLiviu Dudau drm_dev_unref(drm); 459ad49f860SLiviu Dudau of_reserved_mem_device_release(dev); 460ad49f860SLiviu Dudau } 461ad49f860SLiviu Dudau 462ad49f860SLiviu Dudau static const struct component_master_ops malidp_master_ops = { 463ad49f860SLiviu Dudau .bind = malidp_bind, 464ad49f860SLiviu Dudau .unbind = malidp_unbind, 465ad49f860SLiviu Dudau }; 466ad49f860SLiviu Dudau 467ad49f860SLiviu Dudau static int malidp_compare_dev(struct device *dev, void *data) 468ad49f860SLiviu Dudau { 469ad49f860SLiviu Dudau struct device_node *np = data; 470ad49f860SLiviu Dudau 471ad49f860SLiviu Dudau return dev->of_node == np; 472ad49f860SLiviu Dudau } 473ad49f860SLiviu Dudau 474ad49f860SLiviu Dudau static int malidp_platform_probe(struct platform_device *pdev) 475ad49f860SLiviu Dudau { 476ad49f860SLiviu Dudau struct device_node *port, *ep; 477ad49f860SLiviu Dudau struct component_match *match = NULL; 478ad49f860SLiviu Dudau 479ad49f860SLiviu Dudau if (!pdev->dev.of_node) 480ad49f860SLiviu Dudau return -ENODEV; 481ad49f860SLiviu Dudau 482ad49f860SLiviu Dudau /* there is only one output port inside each device, find it */ 483ad49f860SLiviu Dudau ep = of_graph_get_next_endpoint(pdev->dev.of_node, NULL); 484ad49f860SLiviu Dudau if (!ep) 485ad49f860SLiviu Dudau return -ENODEV; 486ad49f860SLiviu Dudau 487ad49f860SLiviu Dudau if (!of_device_is_available(ep)) { 488ad49f860SLiviu Dudau of_node_put(ep); 489ad49f860SLiviu Dudau return -ENODEV; 490ad49f860SLiviu Dudau } 491ad49f860SLiviu Dudau 492ad49f860SLiviu Dudau /* add the remote encoder port as component */ 493ad49f860SLiviu Dudau port = of_graph_get_remote_port_parent(ep); 494ad49f860SLiviu Dudau of_node_put(ep); 495ad49f860SLiviu Dudau if (!port || !of_device_is_available(port)) { 496ad49f860SLiviu Dudau of_node_put(port); 497ad49f860SLiviu Dudau return -EAGAIN; 498ad49f860SLiviu Dudau } 499ad49f860SLiviu Dudau 50097ac0e47SRussell King drm_of_component_match_add(&pdev->dev, &match, malidp_compare_dev, 50197ac0e47SRussell King port); 50297ac0e47SRussell King of_node_put(port); 503ad49f860SLiviu Dudau return component_master_add_with_match(&pdev->dev, &malidp_master_ops, 504ad49f860SLiviu Dudau match); 505ad49f860SLiviu Dudau } 506ad49f860SLiviu Dudau 507ad49f860SLiviu Dudau static int malidp_platform_remove(struct platform_device *pdev) 508ad49f860SLiviu Dudau { 509ad49f860SLiviu Dudau component_master_del(&pdev->dev, &malidp_master_ops); 510ad49f860SLiviu Dudau return 0; 511ad49f860SLiviu Dudau } 512ad49f860SLiviu Dudau 513ad49f860SLiviu Dudau static struct platform_driver malidp_platform_driver = { 514ad49f860SLiviu Dudau .probe = malidp_platform_probe, 515ad49f860SLiviu Dudau .remove = malidp_platform_remove, 516ad49f860SLiviu Dudau .driver = { 517ad49f860SLiviu Dudau .name = "mali-dp", 518ad49f860SLiviu Dudau .of_match_table = malidp_drm_of_match, 519ad49f860SLiviu Dudau }, 520ad49f860SLiviu Dudau }; 521ad49f860SLiviu Dudau 522ad49f860SLiviu Dudau module_platform_driver(malidp_platform_driver); 523ad49f860SLiviu Dudau 524ad49f860SLiviu Dudau MODULE_AUTHOR("Liviu Dudau <Liviu.Dudau@arm.com>"); 525ad49f860SLiviu Dudau MODULE_DESCRIPTION("ARM Mali DP DRM driver"); 526ad49f860SLiviu Dudau MODULE_LICENSE("GPL v2"); 527