18e22d792SLiviu Dudau /* 28e22d792SLiviu Dudau * Copyright (C) 2013-2015 ARM Limited 38e22d792SLiviu Dudau * Author: Liviu Dudau <Liviu.Dudau@arm.com> 48e22d792SLiviu Dudau * 58e22d792SLiviu Dudau * This file is subject to the terms and conditions of the GNU General Public 68e22d792SLiviu Dudau * License. See the file COPYING in the main directory of this archive 78e22d792SLiviu Dudau * for more details. 88e22d792SLiviu Dudau * 98e22d792SLiviu Dudau * ARM HDLCD Driver 108e22d792SLiviu Dudau */ 118e22d792SLiviu Dudau 128e22d792SLiviu Dudau #include <linux/module.h> 138e22d792SLiviu Dudau #include <linux/spinlock.h> 148e22d792SLiviu Dudau #include <linux/clk.h> 158e22d792SLiviu Dudau #include <linux/component.h> 16febae9bcSLiviu Dudau #include <linux/console.h> 17535d1b94SSam Ravnborg #include <linux/dma-mapping.h> 188e22d792SLiviu Dudau #include <linux/list.h> 198e22d792SLiviu Dudau #include <linux/of_graph.h> 208e22d792SLiviu Dudau #include <linux/of_reserved_mem.h> 21535d1b94SSam Ravnborg #include <linux/platform_device.h> 228e22d792SLiviu Dudau #include <linux/pm_runtime.h> 238e22d792SLiviu Dudau 248e22d792SLiviu Dudau #include <drm/drm_atomic_helper.h> 258e22d792SLiviu Dudau #include <drm/drm_crtc.h> 26535d1b94SSam Ravnborg #include <drm/drm_debugfs.h> 27535d1b94SSam Ravnborg #include <drm/drm_drv.h> 288e22d792SLiviu Dudau #include <drm/drm_fb_cma_helper.h> 29fcd70cd3SDaniel Vetter #include <drm/drm_fb_helper.h> 308e22d792SLiviu Dudau #include <drm/drm_gem_cma_helper.h> 3139ffd906SNoralf Trønnes #include <drm/drm_gem_framebuffer_helper.h> 325c7e5a22SNoralf Trønnes #include <drm/drm_modeset_helper.h> 338e22d792SLiviu Dudau #include <drm/drm_of.h> 34fcd70cd3SDaniel Vetter #include <drm/drm_probe_helper.h> 35535d1b94SSam Ravnborg #include <drm/drm_vblank.h> 368e22d792SLiviu Dudau 378e22d792SLiviu Dudau #include "hdlcd_drv.h" 388e22d792SLiviu Dudau #include "hdlcd_regs.h" 398e22d792SLiviu Dudau 40*71eba7bdSThomas Zimmermann static irqreturn_t hdlcd_irq(int irq, void *arg) 41*71eba7bdSThomas Zimmermann { 42*71eba7bdSThomas Zimmermann struct drm_device *drm = arg; 43*71eba7bdSThomas Zimmermann struct hdlcd_drm_private *hdlcd = drm->dev_private; 44*71eba7bdSThomas Zimmermann unsigned long irq_status; 45*71eba7bdSThomas Zimmermann 46*71eba7bdSThomas Zimmermann irq_status = hdlcd_read(hdlcd, HDLCD_REG_INT_STATUS); 47*71eba7bdSThomas Zimmermann 48*71eba7bdSThomas Zimmermann #ifdef CONFIG_DEBUG_FS 49*71eba7bdSThomas Zimmermann if (irq_status & HDLCD_INTERRUPT_UNDERRUN) 50*71eba7bdSThomas Zimmermann atomic_inc(&hdlcd->buffer_underrun_count); 51*71eba7bdSThomas Zimmermann 52*71eba7bdSThomas Zimmermann if (irq_status & HDLCD_INTERRUPT_DMA_END) 53*71eba7bdSThomas Zimmermann atomic_inc(&hdlcd->dma_end_count); 54*71eba7bdSThomas Zimmermann 55*71eba7bdSThomas Zimmermann if (irq_status & HDLCD_INTERRUPT_BUS_ERROR) 56*71eba7bdSThomas Zimmermann atomic_inc(&hdlcd->bus_error_count); 57*71eba7bdSThomas Zimmermann 58*71eba7bdSThomas Zimmermann if (irq_status & HDLCD_INTERRUPT_VSYNC) 59*71eba7bdSThomas Zimmermann atomic_inc(&hdlcd->vsync_count); 60*71eba7bdSThomas Zimmermann 61*71eba7bdSThomas Zimmermann #endif 62*71eba7bdSThomas Zimmermann if (irq_status & HDLCD_INTERRUPT_VSYNC) 63*71eba7bdSThomas Zimmermann drm_crtc_handle_vblank(&hdlcd->crtc); 64*71eba7bdSThomas Zimmermann 65*71eba7bdSThomas Zimmermann /* acknowledge interrupt(s) */ 66*71eba7bdSThomas Zimmermann hdlcd_write(hdlcd, HDLCD_REG_INT_CLEAR, irq_status); 67*71eba7bdSThomas Zimmermann 68*71eba7bdSThomas Zimmermann return IRQ_HANDLED; 69*71eba7bdSThomas Zimmermann } 70*71eba7bdSThomas Zimmermann 71*71eba7bdSThomas Zimmermann static void hdlcd_irq_preinstall(struct drm_device *drm) 72*71eba7bdSThomas Zimmermann { 73*71eba7bdSThomas Zimmermann struct hdlcd_drm_private *hdlcd = drm->dev_private; 74*71eba7bdSThomas Zimmermann /* Ensure interrupts are disabled */ 75*71eba7bdSThomas Zimmermann hdlcd_write(hdlcd, HDLCD_REG_INT_MASK, 0); 76*71eba7bdSThomas Zimmermann hdlcd_write(hdlcd, HDLCD_REG_INT_CLEAR, ~0); 77*71eba7bdSThomas Zimmermann } 78*71eba7bdSThomas Zimmermann 79*71eba7bdSThomas Zimmermann static void hdlcd_irq_postinstall(struct drm_device *drm) 80*71eba7bdSThomas Zimmermann { 81*71eba7bdSThomas Zimmermann #ifdef CONFIG_DEBUG_FS 82*71eba7bdSThomas Zimmermann struct hdlcd_drm_private *hdlcd = drm->dev_private; 83*71eba7bdSThomas Zimmermann unsigned long irq_mask = hdlcd_read(hdlcd, HDLCD_REG_INT_MASK); 84*71eba7bdSThomas Zimmermann 85*71eba7bdSThomas Zimmermann /* enable debug interrupts */ 86*71eba7bdSThomas Zimmermann irq_mask |= HDLCD_DEBUG_INT_MASK; 87*71eba7bdSThomas Zimmermann 88*71eba7bdSThomas Zimmermann hdlcd_write(hdlcd, HDLCD_REG_INT_MASK, irq_mask); 89*71eba7bdSThomas Zimmermann #endif 90*71eba7bdSThomas Zimmermann } 91*71eba7bdSThomas Zimmermann 92*71eba7bdSThomas Zimmermann static int hdlcd_irq_install(struct drm_device *drm, int irq) 93*71eba7bdSThomas Zimmermann { 94*71eba7bdSThomas Zimmermann int ret; 95*71eba7bdSThomas Zimmermann 96*71eba7bdSThomas Zimmermann if (irq == IRQ_NOTCONNECTED) 97*71eba7bdSThomas Zimmermann return -ENOTCONN; 98*71eba7bdSThomas Zimmermann 99*71eba7bdSThomas Zimmermann hdlcd_irq_preinstall(drm); 100*71eba7bdSThomas Zimmermann 101*71eba7bdSThomas Zimmermann ret = request_irq(irq, hdlcd_irq, 0, drm->driver->name, drm); 102*71eba7bdSThomas Zimmermann if (ret) 103*71eba7bdSThomas Zimmermann return ret; 104*71eba7bdSThomas Zimmermann 105*71eba7bdSThomas Zimmermann hdlcd_irq_postinstall(drm); 106*71eba7bdSThomas Zimmermann 107*71eba7bdSThomas Zimmermann return 0; 108*71eba7bdSThomas Zimmermann } 109*71eba7bdSThomas Zimmermann 110*71eba7bdSThomas Zimmermann static void hdlcd_irq_uninstall(struct drm_device *drm) 111*71eba7bdSThomas Zimmermann { 112*71eba7bdSThomas Zimmermann struct hdlcd_drm_private *hdlcd = drm->dev_private; 113*71eba7bdSThomas Zimmermann /* disable all the interrupts that we might have enabled */ 114*71eba7bdSThomas Zimmermann unsigned long irq_mask = hdlcd_read(hdlcd, HDLCD_REG_INT_MASK); 115*71eba7bdSThomas Zimmermann 116*71eba7bdSThomas Zimmermann #ifdef CONFIG_DEBUG_FS 117*71eba7bdSThomas Zimmermann /* disable debug interrupts */ 118*71eba7bdSThomas Zimmermann irq_mask &= ~HDLCD_DEBUG_INT_MASK; 119*71eba7bdSThomas Zimmermann #endif 120*71eba7bdSThomas Zimmermann 121*71eba7bdSThomas Zimmermann /* disable vsync interrupts */ 122*71eba7bdSThomas Zimmermann irq_mask &= ~HDLCD_INTERRUPT_VSYNC; 123*71eba7bdSThomas Zimmermann hdlcd_write(hdlcd, HDLCD_REG_INT_MASK, irq_mask); 124*71eba7bdSThomas Zimmermann 125*71eba7bdSThomas Zimmermann free_irq(hdlcd->irq, drm); 126*71eba7bdSThomas Zimmermann } 127*71eba7bdSThomas Zimmermann 1288e22d792SLiviu Dudau static int hdlcd_load(struct drm_device *drm, unsigned long flags) 1298e22d792SLiviu Dudau { 1308e22d792SLiviu Dudau struct hdlcd_drm_private *hdlcd = drm->dev_private; 1318e22d792SLiviu Dudau struct platform_device *pdev = to_platform_device(drm->dev); 1328e22d792SLiviu Dudau struct resource *res; 1338e22d792SLiviu Dudau u32 version; 1348e22d792SLiviu Dudau int ret; 1358e22d792SLiviu Dudau 1368e22d792SLiviu Dudau hdlcd->clk = devm_clk_get(drm->dev, "pxlclk"); 1378e22d792SLiviu Dudau if (IS_ERR(hdlcd->clk)) 1388e22d792SLiviu Dudau return PTR_ERR(hdlcd->clk); 1398e22d792SLiviu Dudau 1408e22d792SLiviu Dudau #ifdef CONFIG_DEBUG_FS 1418e22d792SLiviu Dudau atomic_set(&hdlcd->buffer_underrun_count, 0); 1428e22d792SLiviu Dudau atomic_set(&hdlcd->bus_error_count, 0); 1438e22d792SLiviu Dudau atomic_set(&hdlcd->vsync_count, 0); 1448e22d792SLiviu Dudau atomic_set(&hdlcd->dma_end_count, 0); 1458e22d792SLiviu Dudau #endif 1468e22d792SLiviu Dudau 1478e22d792SLiviu Dudau res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 1488e22d792SLiviu Dudau hdlcd->mmio = devm_ioremap_resource(drm->dev, res); 1498e22d792SLiviu Dudau if (IS_ERR(hdlcd->mmio)) { 1508e22d792SLiviu Dudau DRM_ERROR("failed to map control registers area\n"); 15169c2565aSDan Carpenter ret = PTR_ERR(hdlcd->mmio); 1528e22d792SLiviu Dudau hdlcd->mmio = NULL; 15369c2565aSDan Carpenter return ret; 1548e22d792SLiviu Dudau } 1558e22d792SLiviu Dudau 1568e22d792SLiviu Dudau version = hdlcd_read(hdlcd, HDLCD_REG_VERSION); 1578e22d792SLiviu Dudau if ((version & HDLCD_PRODUCT_MASK) != HDLCD_PRODUCT_ID) { 1588e22d792SLiviu Dudau DRM_ERROR("unknown product id: 0x%x\n", version); 15961a6dcd7SAlexey Brodkin return -EINVAL; 1608e22d792SLiviu Dudau } 1618e22d792SLiviu Dudau DRM_INFO("found ARM HDLCD version r%dp%d\n", 1628e22d792SLiviu Dudau (version & HDLCD_VERSION_MAJOR_MASK) >> 8, 1638e22d792SLiviu Dudau version & HDLCD_VERSION_MINOR_MASK); 1648e22d792SLiviu Dudau 1658e22d792SLiviu Dudau /* Get the optional framebuffer memory resource */ 1668e22d792SLiviu Dudau ret = of_reserved_mem_device_init(drm->dev); 1678e22d792SLiviu Dudau if (ret && ret != -ENODEV) 16861a6dcd7SAlexey Brodkin return ret; 1698e22d792SLiviu Dudau 1708e22d792SLiviu Dudau ret = dma_set_mask_and_coherent(drm->dev, DMA_BIT_MASK(32)); 1718e22d792SLiviu Dudau if (ret) 1728e22d792SLiviu Dudau goto setup_fail; 1738e22d792SLiviu Dudau 1748e22d792SLiviu Dudau ret = hdlcd_setup_crtc(drm); 1758e22d792SLiviu Dudau if (ret < 0) { 1768e22d792SLiviu Dudau DRM_ERROR("failed to create crtc\n"); 1778e22d792SLiviu Dudau goto setup_fail; 1788e22d792SLiviu Dudau } 1798e22d792SLiviu Dudau 180*71eba7bdSThomas Zimmermann ret = platform_get_irq(pdev, 0); 181*71eba7bdSThomas Zimmermann if (ret < 0) 182*71eba7bdSThomas Zimmermann goto irq_fail; 183*71eba7bdSThomas Zimmermann hdlcd->irq = ret; 184*71eba7bdSThomas Zimmermann 185*71eba7bdSThomas Zimmermann ret = hdlcd_irq_install(drm, hdlcd->irq); 1868e22d792SLiviu Dudau if (ret < 0) { 1878e22d792SLiviu Dudau DRM_ERROR("failed to install IRQ handler\n"); 1888e22d792SLiviu Dudau goto irq_fail; 1898e22d792SLiviu Dudau } 1908e22d792SLiviu Dudau 1918e22d792SLiviu Dudau return 0; 1928e22d792SLiviu Dudau 1938e22d792SLiviu Dudau irq_fail: 1948e22d792SLiviu Dudau drm_crtc_cleanup(&hdlcd->crtc); 1958e22d792SLiviu Dudau setup_fail: 1968e22d792SLiviu Dudau of_reserved_mem_device_release(drm->dev); 1978e22d792SLiviu Dudau 1988e22d792SLiviu Dudau return ret; 1998e22d792SLiviu Dudau } 2008e22d792SLiviu Dudau 2018e22d792SLiviu Dudau static const struct drm_mode_config_funcs hdlcd_mode_config_funcs = { 20239ffd906SNoralf Trønnes .fb_create = drm_gem_fb_create, 2038e22d792SLiviu Dudau .atomic_check = drm_atomic_helper_check, 2042bd6cc8cSDaniel Vetter .atomic_commit = drm_atomic_helper_commit, 2058e22d792SLiviu Dudau }; 2068e22d792SLiviu Dudau 2078e22d792SLiviu Dudau static void hdlcd_setup_mode_config(struct drm_device *drm) 2088e22d792SLiviu Dudau { 2098e22d792SLiviu Dudau drm_mode_config_init(drm); 2108e22d792SLiviu Dudau drm->mode_config.min_width = 0; 2118e22d792SLiviu Dudau drm->mode_config.min_height = 0; 2128e22d792SLiviu Dudau drm->mode_config.max_width = HDLCD_MAX_XRES; 2138e22d792SLiviu Dudau drm->mode_config.max_height = HDLCD_MAX_YRES; 2148e22d792SLiviu Dudau drm->mode_config.funcs = &hdlcd_mode_config_funcs; 2158e22d792SLiviu Dudau } 2168e22d792SLiviu Dudau 2178e22d792SLiviu Dudau #ifdef CONFIG_DEBUG_FS 2188e22d792SLiviu Dudau static int hdlcd_show_underrun_count(struct seq_file *m, void *arg) 2198e22d792SLiviu Dudau { 2208e22d792SLiviu Dudau struct drm_info_node *node = (struct drm_info_node *)m->private; 2218e22d792SLiviu Dudau struct drm_device *drm = node->minor->dev; 2228e22d792SLiviu Dudau struct hdlcd_drm_private *hdlcd = drm->dev_private; 2238e22d792SLiviu Dudau 2248e22d792SLiviu Dudau seq_printf(m, "underrun : %d\n", atomic_read(&hdlcd->buffer_underrun_count)); 2258e22d792SLiviu Dudau seq_printf(m, "dma_end : %d\n", atomic_read(&hdlcd->dma_end_count)); 2268e22d792SLiviu Dudau seq_printf(m, "bus_error: %d\n", atomic_read(&hdlcd->bus_error_count)); 2278e22d792SLiviu Dudau seq_printf(m, "vsync : %d\n", atomic_read(&hdlcd->vsync_count)); 2288e22d792SLiviu Dudau return 0; 2298e22d792SLiviu Dudau } 2308e22d792SLiviu Dudau 2318e22d792SLiviu Dudau static int hdlcd_show_pxlclock(struct seq_file *m, void *arg) 2328e22d792SLiviu Dudau { 2338e22d792SLiviu Dudau struct drm_info_node *node = (struct drm_info_node *)m->private; 2348e22d792SLiviu Dudau struct drm_device *drm = node->minor->dev; 2358e22d792SLiviu Dudau struct hdlcd_drm_private *hdlcd = drm->dev_private; 2368e22d792SLiviu Dudau unsigned long clkrate = clk_get_rate(hdlcd->clk); 2378e22d792SLiviu Dudau unsigned long mode_clock = hdlcd->crtc.mode.crtc_clock * 1000; 2388e22d792SLiviu Dudau 2398e22d792SLiviu Dudau seq_printf(m, "hw : %lu\n", clkrate); 2408e22d792SLiviu Dudau seq_printf(m, "mode: %lu\n", mode_clock); 2418e22d792SLiviu Dudau return 0; 2428e22d792SLiviu Dudau } 2438e22d792SLiviu Dudau 2448e22d792SLiviu Dudau static struct drm_info_list hdlcd_debugfs_list[] = { 2458e22d792SLiviu Dudau { "interrupt_count", hdlcd_show_underrun_count, 0 }, 2468e22d792SLiviu Dudau { "clocks", hdlcd_show_pxlclock, 0 }, 2478e22d792SLiviu Dudau }; 2488e22d792SLiviu Dudau 2497ce84471SWambui Karuga static void hdlcd_debugfs_init(struct drm_minor *minor) 2508e22d792SLiviu Dudau { 2510bc40e18SWambui Karuga drm_debugfs_create_files(hdlcd_debugfs_list, 2520bc40e18SWambui Karuga ARRAY_SIZE(hdlcd_debugfs_list), 2530bc40e18SWambui Karuga minor->debugfs_root, minor); 2548e22d792SLiviu Dudau } 2558e22d792SLiviu Dudau #endif 2568e22d792SLiviu Dudau 257d55f7e5dSDaniel Vetter DEFINE_DRM_GEM_CMA_FOPS(fops); 2588e22d792SLiviu Dudau 25970a59dd8SDaniel Vetter static const struct drm_driver hdlcd_driver = { 2600424fdafSDaniel Vetter .driver_features = DRIVER_GEM | DRIVER_MODESET | DRIVER_ATOMIC, 261d9ec1d2cSThomas Zimmermann DRM_GEM_CMA_DRIVER_OPS, 2628e22d792SLiviu Dudau #ifdef CONFIG_DEBUG_FS 2638e22d792SLiviu Dudau .debugfs_init = hdlcd_debugfs_init, 2648e22d792SLiviu Dudau #endif 2658e22d792SLiviu Dudau .fops = &fops, 2668e22d792SLiviu Dudau .name = "hdlcd", 2678e22d792SLiviu Dudau .desc = "ARM HDLCD Controller DRM", 2688e22d792SLiviu Dudau .date = "20151021", 2698e22d792SLiviu Dudau .major = 1, 2708e22d792SLiviu Dudau .minor = 0, 2718e22d792SLiviu Dudau }; 2728e22d792SLiviu Dudau 2738e22d792SLiviu Dudau static int hdlcd_drm_bind(struct device *dev) 2748e22d792SLiviu Dudau { 2758e22d792SLiviu Dudau struct drm_device *drm; 2768e22d792SLiviu Dudau struct hdlcd_drm_private *hdlcd; 2778e22d792SLiviu Dudau int ret; 2788e22d792SLiviu Dudau 2798e22d792SLiviu Dudau hdlcd = devm_kzalloc(dev, sizeof(*hdlcd), GFP_KERNEL); 2808e22d792SLiviu Dudau if (!hdlcd) 2818e22d792SLiviu Dudau return -ENOMEM; 2828e22d792SLiviu Dudau 2838e22d792SLiviu Dudau drm = drm_dev_alloc(&hdlcd_driver, dev); 2840f288605STom Gundersen if (IS_ERR(drm)) 2850f288605STom Gundersen return PTR_ERR(drm); 2868e22d792SLiviu Dudau 2878e22d792SLiviu Dudau drm->dev_private = hdlcd; 288a95acec1SLiviu Dudau dev_set_drvdata(dev, drm); 289a95acec1SLiviu Dudau 2908e22d792SLiviu Dudau hdlcd_setup_mode_config(drm); 2918e22d792SLiviu Dudau ret = hdlcd_load(drm, 0); 2928e22d792SLiviu Dudau if (ret) 2938e22d792SLiviu Dudau goto err_free; 2948e22d792SLiviu Dudau 295de5cc815SLiviu Dudau /* Set the CRTC's port so that the encoder component can find it */ 296de5cc815SLiviu Dudau hdlcd->crtc.port = of_graph_get_port_by_id(dev->of_node, 0); 297de5cc815SLiviu Dudau 2988e22d792SLiviu Dudau ret = component_bind_all(dev, drm); 2998e22d792SLiviu Dudau if (ret) { 3008e22d792SLiviu Dudau DRM_ERROR("Failed to bind all components\n"); 30190731c24SBrian Starkey goto err_unload; 3028e22d792SLiviu Dudau } 3038e22d792SLiviu Dudau 304a95acec1SLiviu Dudau ret = pm_runtime_set_active(dev); 305a95acec1SLiviu Dudau if (ret) 306a95acec1SLiviu Dudau goto err_pm_active; 307a95acec1SLiviu Dudau 308a95acec1SLiviu Dudau pm_runtime_enable(dev); 309a95acec1SLiviu Dudau 3108e22d792SLiviu Dudau ret = drm_vblank_init(drm, drm->mode_config.num_crtc); 3118e22d792SLiviu Dudau if (ret < 0) { 3128e22d792SLiviu Dudau DRM_ERROR("failed to initialise vblank\n"); 3138e22d792SLiviu Dudau goto err_vblank; 3148e22d792SLiviu Dudau } 3158e22d792SLiviu Dudau 3168e22d792SLiviu Dudau drm_mode_config_reset(drm); 3178e22d792SLiviu Dudau drm_kms_helper_poll_init(drm); 3188e22d792SLiviu Dudau 31990731c24SBrian Starkey ret = drm_dev_register(drm, 0); 32090731c24SBrian Starkey if (ret) 32190731c24SBrian Starkey goto err_register; 32290731c24SBrian Starkey 323941e97c1SNoralf Trønnes drm_fbdev_generic_setup(drm, 32); 324941e97c1SNoralf Trønnes 3258e22d792SLiviu Dudau return 0; 3268e22d792SLiviu Dudau 32790731c24SBrian Starkey err_register: 3288e22d792SLiviu Dudau drm_kms_helper_poll_fini(drm); 3298e22d792SLiviu Dudau err_vblank: 330a95acec1SLiviu Dudau pm_runtime_disable(drm->dev); 331a95acec1SLiviu Dudau err_pm_active: 332d664b851SLiviu Dudau drm_atomic_helper_shutdown(drm); 3338e22d792SLiviu Dudau component_unbind_all(dev, drm); 3348e22d792SLiviu Dudau err_unload: 335de5cc815SLiviu Dudau of_node_put(hdlcd->crtc.port); 336de5cc815SLiviu Dudau hdlcd->crtc.port = NULL; 337*71eba7bdSThomas Zimmermann hdlcd_irq_uninstall(drm); 3388e22d792SLiviu Dudau of_reserved_mem_device_release(drm->dev); 3398e22d792SLiviu Dudau err_free: 340747e5a5fSRobin Murphy drm_mode_config_cleanup(drm); 341a95acec1SLiviu Dudau dev_set_drvdata(dev, NULL); 342f73e8b82SSrishti Sharma drm_dev_put(drm); 3438e22d792SLiviu Dudau 3448e22d792SLiviu Dudau return ret; 3458e22d792SLiviu Dudau } 3468e22d792SLiviu Dudau 3478e22d792SLiviu Dudau static void hdlcd_drm_unbind(struct device *dev) 3488e22d792SLiviu Dudau { 3498e22d792SLiviu Dudau struct drm_device *drm = dev_get_drvdata(dev); 3508e22d792SLiviu Dudau struct hdlcd_drm_private *hdlcd = drm->dev_private; 3518e22d792SLiviu Dudau 35290731c24SBrian Starkey drm_dev_unregister(drm); 3538e22d792SLiviu Dudau drm_kms_helper_poll_fini(drm); 3548e22d792SLiviu Dudau component_unbind_all(dev, drm); 355de5cc815SLiviu Dudau of_node_put(hdlcd->crtc.port); 356de5cc815SLiviu Dudau hdlcd->crtc.port = NULL; 357d664b851SLiviu Dudau pm_runtime_get_sync(dev); 3589fd466f5SLaurent Pinchart drm_atomic_helper_shutdown(drm); 359*71eba7bdSThomas Zimmermann hdlcd_irq_uninstall(drm); 360d664b851SLiviu Dudau pm_runtime_put(dev); 361d664b851SLiviu Dudau if (pm_runtime_enabled(dev)) 362d664b851SLiviu Dudau pm_runtime_disable(dev); 363d664b851SLiviu Dudau of_reserved_mem_device_release(dev); 3648e22d792SLiviu Dudau drm_mode_config_cleanup(drm); 3658e22d792SLiviu Dudau drm->dev_private = NULL; 3668e22d792SLiviu Dudau dev_set_drvdata(dev, NULL); 367d664b851SLiviu Dudau drm_dev_put(drm); 3688e22d792SLiviu Dudau } 3698e22d792SLiviu Dudau 3708e22d792SLiviu Dudau static const struct component_master_ops hdlcd_master_ops = { 3718e22d792SLiviu Dudau .bind = hdlcd_drm_bind, 3728e22d792SLiviu Dudau .unbind = hdlcd_drm_unbind, 3738e22d792SLiviu Dudau }; 3748e22d792SLiviu Dudau 3758e22d792SLiviu Dudau static int compare_dev(struct device *dev, void *data) 3768e22d792SLiviu Dudau { 3778e22d792SLiviu Dudau return dev->of_node == data; 3788e22d792SLiviu Dudau } 3798e22d792SLiviu Dudau 3808e22d792SLiviu Dudau static int hdlcd_probe(struct platform_device *pdev) 3818e22d792SLiviu Dudau { 38286418f90SRob Herring struct device_node *port; 3838e22d792SLiviu Dudau struct component_match *match = NULL; 3848e22d792SLiviu Dudau 3858e22d792SLiviu Dudau /* there is only one output port inside each device, find it */ 38686418f90SRob Herring port = of_graph_get_remote_node(pdev->dev.of_node, 0, 0); 38786418f90SRob Herring if (!port) 3888e22d792SLiviu Dudau return -ENODEV; 3898e22d792SLiviu Dudau 39097ac0e47SRussell King drm_of_component_match_add(&pdev->dev, &match, compare_dev, port); 39197ac0e47SRussell King of_node_put(port); 3928e22d792SLiviu Dudau 3938e22d792SLiviu Dudau return component_master_add_with_match(&pdev->dev, &hdlcd_master_ops, 3948e22d792SLiviu Dudau match); 3958e22d792SLiviu Dudau } 3968e22d792SLiviu Dudau 3978e22d792SLiviu Dudau static int hdlcd_remove(struct platform_device *pdev) 3988e22d792SLiviu Dudau { 3998e22d792SLiviu Dudau component_master_del(&pdev->dev, &hdlcd_master_ops); 4008e22d792SLiviu Dudau return 0; 4018e22d792SLiviu Dudau } 4028e22d792SLiviu Dudau 4038e22d792SLiviu Dudau static const struct of_device_id hdlcd_of_match[] = { 4048e22d792SLiviu Dudau { .compatible = "arm,hdlcd" }, 4058e22d792SLiviu Dudau {}, 4068e22d792SLiviu Dudau }; 4078e22d792SLiviu Dudau MODULE_DEVICE_TABLE(of, hdlcd_of_match); 4088e22d792SLiviu Dudau 4098e22d792SLiviu Dudau static int __maybe_unused hdlcd_pm_suspend(struct device *dev) 4108e22d792SLiviu Dudau { 4118e22d792SLiviu Dudau struct drm_device *drm = dev_get_drvdata(dev); 4128e22d792SLiviu Dudau 4135c7e5a22SNoralf Trønnes return drm_mode_config_helper_suspend(drm); 4148e22d792SLiviu Dudau } 4158e22d792SLiviu Dudau 4168e22d792SLiviu Dudau static int __maybe_unused hdlcd_pm_resume(struct device *dev) 4178e22d792SLiviu Dudau { 4188e22d792SLiviu Dudau struct drm_device *drm = dev_get_drvdata(dev); 4198e22d792SLiviu Dudau 4205c7e5a22SNoralf Trønnes drm_mode_config_helper_resume(drm); 421a95acec1SLiviu Dudau 4228e22d792SLiviu Dudau return 0; 4238e22d792SLiviu Dudau } 4248e22d792SLiviu Dudau 4258e22d792SLiviu Dudau static SIMPLE_DEV_PM_OPS(hdlcd_pm_ops, hdlcd_pm_suspend, hdlcd_pm_resume); 4268e22d792SLiviu Dudau 4278e22d792SLiviu Dudau static struct platform_driver hdlcd_platform_driver = { 4288e22d792SLiviu Dudau .probe = hdlcd_probe, 4298e22d792SLiviu Dudau .remove = hdlcd_remove, 4308e22d792SLiviu Dudau .driver = { 4318e22d792SLiviu Dudau .name = "hdlcd", 4328e22d792SLiviu Dudau .pm = &hdlcd_pm_ops, 4338e22d792SLiviu Dudau .of_match_table = hdlcd_of_match, 4348e22d792SLiviu Dudau }, 4358e22d792SLiviu Dudau }; 4368e22d792SLiviu Dudau 4378e22d792SLiviu Dudau module_platform_driver(hdlcd_platform_driver); 4388e22d792SLiviu Dudau 4398e22d792SLiviu Dudau MODULE_AUTHOR("Liviu Dudau"); 4408e22d792SLiviu Dudau MODULE_DESCRIPTION("ARM HDLCD DRM driver"); 4418e22d792SLiviu Dudau MODULE_LICENSE("GPL v2"); 442