1 /* SPDX-License-Identifier: GPL-2.0 */
2 /*
3  * (C) COPYRIGHT 2018 ARM Limited. All rights reserved.
4  * Author: James.Qian.Wang <james.qian.wang@arm.com>
5  *
6  */
7 #ifndef _KOMEDA_PIPELINE_H_
8 #define _KOMEDA_PIPELINE_H_
9 
10 #include <linux/types.h>
11 #include <drm/drm_atomic.h>
12 #include <drm/drm_atomic_helper.h>
13 #include "malidp_utils.h"
14 
15 #define KOMEDA_MAX_PIPELINES		2
16 #define KOMEDA_PIPELINE_MAX_LAYERS	4
17 #define KOMEDA_PIPELINE_MAX_SCALERS	2
18 #define KOMEDA_COMPONENT_N_INPUTS	5
19 
20 /* pipeline component IDs */
21 enum {
22 	KOMEDA_COMPONENT_LAYER0		= 0,
23 	KOMEDA_COMPONENT_LAYER1		= 1,
24 	KOMEDA_COMPONENT_LAYER2		= 2,
25 	KOMEDA_COMPONENT_LAYER3		= 3,
26 	KOMEDA_COMPONENT_WB_LAYER	= 7, /* write back layer */
27 	KOMEDA_COMPONENT_SCALER0	= 8,
28 	KOMEDA_COMPONENT_SCALER1	= 9,
29 	KOMEDA_COMPONENT_SPLITTER	= 12,
30 	KOMEDA_COMPONENT_MERGER		= 14,
31 	KOMEDA_COMPONENT_COMPIZ0	= 16, /* compositor */
32 	KOMEDA_COMPONENT_COMPIZ1	= 17,
33 	KOMEDA_COMPONENT_IPS0		= 20, /* post image processor */
34 	KOMEDA_COMPONENT_IPS1		= 21,
35 	KOMEDA_COMPONENT_TIMING_CTRLR	= 22, /* timing controller */
36 };
37 
38 #define KOMEDA_PIPELINE_LAYERS		(BIT(KOMEDA_COMPONENT_LAYER0) |\
39 					 BIT(KOMEDA_COMPONENT_LAYER1) |\
40 					 BIT(KOMEDA_COMPONENT_LAYER2) |\
41 					 BIT(KOMEDA_COMPONENT_LAYER3))
42 
43 #define KOMEDA_PIPELINE_SCALERS		(BIT(KOMEDA_COMPONENT_SCALER0) |\
44 					 BIT(KOMEDA_COMPONENT_SCALER1))
45 
46 #define KOMEDA_PIPELINE_COMPIZS		(BIT(KOMEDA_COMPONENT_COMPIZ0) |\
47 					 BIT(KOMEDA_COMPONENT_COMPIZ1))
48 
49 #define KOMEDA_PIPELINE_IMPROCS		(BIT(KOMEDA_COMPONENT_IPS0) |\
50 					 BIT(KOMEDA_COMPONENT_IPS1))
51 struct komeda_component;
52 struct komeda_component_state;
53 
54 /** komeda_component_funcs - component control functions */
55 struct komeda_component_funcs {
56 	/** @validate: optional,
57 	 * component may has special requirements or limitations, this function
58 	 * supply HW the ability to do the further HW specific check.
59 	 */
60 	int (*validate)(struct komeda_component *c,
61 			struct komeda_component_state *state);
62 	/** @update: update is a active update */
63 	void (*update)(struct komeda_component *c,
64 		       struct komeda_component_state *state);
65 	/** @disable: disable component */
66 	void (*disable)(struct komeda_component *c);
67 	/** @dump_register: Optional, dump registers to seq_file */
68 	void (*dump_register)(struct komeda_component *c, struct seq_file *seq);
69 };
70 
71 /**
72  * struct komeda_component
73  *
74  * struct komeda_component describe the data flow capabilities for how to link a
75  * component into the display pipeline.
76  * all specified components are subclass of this structure.
77  */
78 struct komeda_component {
79 	/** @obj: treat component as private obj */
80 	struct drm_private_obj obj;
81 	/** @pipeline: the komeda pipeline this component belongs to */
82 	struct komeda_pipeline *pipeline;
83 	/** @name: component name */
84 	char name[32];
85 	/**
86 	 * @reg:
87 	 * component register base,
88 	 * which is initialized by chip and used by chip only
89 	 */
90 	u32 __iomem *reg;
91 	/** @id: component id */
92 	u32 id;
93 	/** @hw_ic: component hw id,
94 	 *  which is initialized by chip and used by chip only
95 	 */
96 	u32 hw_id;
97 
98 	/**
99 	 * @max_active_inputs:
100 	 * @max_active_outpus:
101 	 *
102 	 * maximum number of inputs/outputs that can be active in the same time
103 	 * Note:
104 	 * the number isn't the bit number of @supported_inputs or
105 	 * @supported_outputs, but may be less than it, since component may not
106 	 * support enabling all @supported_inputs/outputs at the same time.
107 	 */
108 	u8 max_active_inputs;
109 	u8 max_active_outputs;
110 	/**
111 	 * @supported_inputs:
112 	 * @supported_outputs:
113 	 *
114 	 * bitmask of BIT(component->id) for the supported inputs/outputs
115 	 * describes the possibilities of how a component is linked into a
116 	 * pipeline.
117 	 */
118 	u32 supported_inputs;
119 	u32 supported_outputs;
120 
121 	/**
122 	 * @funcs: chip functions to access HW
123 	 */
124 	struct komeda_component_funcs *funcs;
125 };
126 
127 /**
128  * struct komeda_component_output
129  *
130  * a component has multiple outputs, if want to know where the data
131  * comes from, only know the component is not enough, we still need to know
132  * its output port
133  */
134 struct komeda_component_output {
135 	/** @component: indicate which component the data comes from */
136 	struct komeda_component *component;
137 	/** @output_port:
138 	 * the output port of the &komeda_component_output.component
139 	 */
140 	u8 output_port;
141 };
142 
143 /**
144  * struct komeda_component_state
145  *
146  * component_state is the data flow configuration of the component, and it's
147  * the superclass of all specific component_state like @komeda_layer_state,
148  * @komeda_scaler_state
149  */
150 struct komeda_component_state {
151 	/** @obj: tracking component_state by drm_atomic_state */
152 	struct drm_private_state obj;
153 	struct komeda_component *component;
154 	/**
155 	 * @binding_user:
156 	 * currently bound user, the user can be crtc/plane/wb_conn, which is
157 	 * valid decided by @component and @inputs
158 	 *
159 	 * -  Layer: its user always is plane.
160 	 * -  compiz/improc/timing_ctrlr: the user is crtc.
161 	 * -  wb_layer: wb_conn;
162 	 * -  scaler: plane when input is layer, wb_conn if input is compiz.
163 	 */
164 	union {
165 		struct drm_crtc *crtc;
166 		struct drm_plane *plane;
167 		struct drm_connector *wb_conn;
168 		void *binding_user;
169 	};
170 	/**
171 	 * @active_inputs:
172 	 *
173 	 * active_inputs is bitmask of @inputs index
174 	 *
175 	 * -  active_inputs = changed_active_inputs + unchanged_active_inputs
176 	 * -  affected_inputs = old->active_inputs + new->active_inputs;
177 	 * -  disabling_inputs = affected_inputs ^ active_inputs;
178 	 * -  changed_inputs = disabling_inputs + changed_active_inputs;
179 	 *
180 	 * NOTE:
181 	 * changed_inputs doesn't include all active_input but only
182 	 * @changed_active_inputs, and this bitmask can be used in chip
183 	 * level for dirty update.
184 	 */
185 	u16 active_inputs;
186 	u16 changed_active_inputs;
187 	u16 affected_inputs;
188 	/**
189 	 * @inputs:
190 	 *
191 	 * the specific inputs[i] only valid on BIT(i) has been set in
192 	 * @active_inputs, if not the inputs[i] is undefined.
193 	 */
194 	struct komeda_component_output inputs[KOMEDA_COMPONENT_N_INPUTS];
195 };
196 
197 static inline u16 component_disabling_inputs(struct komeda_component_state *st)
198 {
199 	return st->affected_inputs ^ st->active_inputs;
200 }
201 
202 static inline u16 component_changed_inputs(struct komeda_component_state *st)
203 {
204 	return component_disabling_inputs(st) | st->changed_active_inputs;
205 }
206 
207 #define for_each_changed_input(st, i)	\
208 	for ((i) = 0; (i) < (st)->component->max_active_inputs; (i)++)	\
209 		if (has_bit((i), component_changed_inputs(st)))
210 
211 #define to_comp(__c)	(((__c) == NULL) ? NULL : &((__c)->base))
212 #define to_cpos(__c)	((struct komeda_component **)&(__c))
213 
214 struct komeda_layer {
215 	struct komeda_component base;
216 	/* accepted h/v input range before rotation */
217 	struct malidp_range hsize_in, vsize_in;
218 	u32 layer_type; /* RICH, SIMPLE or WB */
219 	u32 supported_rots;
220 };
221 
222 struct komeda_layer_state {
223 	struct komeda_component_state base;
224 	/* layer specific configuration state */
225 	u16 hsize, vsize;
226 	u32 rot;
227 	dma_addr_t addr[3];
228 };
229 
230 struct komeda_scaler {
231 	struct komeda_component base;
232 	/* scaler features and caps */
233 };
234 
235 struct komeda_scaler_state {
236 	struct komeda_component_state base;
237 };
238 
239 struct komeda_compiz {
240 	struct komeda_component base;
241 	struct malidp_range hsize, vsize;
242 };
243 
244 struct komeda_compiz_input_cfg {
245 	u16 hsize, vsize;
246 	u16 hoffset, voffset;
247 	u8 pixel_blend_mode, layer_alpha;
248 };
249 
250 struct komeda_compiz_state {
251 	struct komeda_component_state base;
252 	/* composition size */
253 	u16 hsize, vsize;
254 	struct komeda_compiz_input_cfg cins[KOMEDA_COMPONENT_N_INPUTS];
255 };
256 
257 struct komeda_improc {
258 	struct komeda_component base;
259 	u32 supported_color_formats;  /* DRM_RGB/YUV444/YUV420*/
260 	u32 supported_color_depths; /* BIT(8) | BIT(10)*/
261 	u8 supports_degamma : 1;
262 	u8 supports_csc : 1;
263 	u8 supports_gamma : 1;
264 };
265 
266 struct komeda_improc_state {
267 	struct komeda_component_state base;
268 	u16 hsize, vsize;
269 };
270 
271 /* display timing controller */
272 struct komeda_timing_ctrlr {
273 	struct komeda_component base;
274 	u8 supports_dual_link : 1;
275 };
276 
277 struct komeda_timing_ctrlr_state {
278 	struct komeda_component_state base;
279 };
280 
281 /** struct komeda_pipeline_funcs */
282 struct komeda_pipeline_funcs {
283 	/* dump_register: Optional, dump registers to seq_file */
284 	void (*dump_register)(struct komeda_pipeline *pipe,
285 			      struct seq_file *sf);
286 };
287 
288 /**
289  * struct komeda_pipeline
290  *
291  * Represent a complete display pipeline and hold all functional components.
292  */
293 struct komeda_pipeline {
294 	/** @obj: link pipeline as private obj of drm_atomic_state */
295 	struct drm_private_obj obj;
296 	/** @mdev: the parent komeda_dev */
297 	struct komeda_dev *mdev;
298 	/** @pxlclk: pixel clock */
299 	struct clk *pxlclk;
300 	/** @aclk: AXI clock */
301 	struct clk *aclk;
302 	/** @id: pipeline id */
303 	int id;
304 	/** @avail_comps: available components mask of pipeline */
305 	u32 avail_comps;
306 	int n_layers;
307 	struct komeda_layer *layers[KOMEDA_PIPELINE_MAX_LAYERS];
308 	int n_scalers;
309 	struct komeda_scaler *scalers[KOMEDA_PIPELINE_MAX_SCALERS];
310 	struct komeda_compiz *compiz;
311 	struct komeda_layer  *wb_layer;
312 	struct komeda_improc *improc;
313 	struct komeda_timing_ctrlr *ctrlr;
314 	struct komeda_pipeline_funcs *funcs; /* private pipeline functions */
315 
316 	/** @of_node: pipeline dt node */
317 	struct device_node *of_node;
318 	/** @of_output_port: pipeline output port */
319 	struct device_node *of_output_port;
320 	/** @of_output_dev: output connector device node */
321 	struct device_node *of_output_dev;
322 };
323 
324 /**
325  * struct komeda_pipeline_state
326  *
327  * NOTE:
328  * Unlike the pipeline, pipeline_state doesn’t gather any component_state
329  * into it. It because all component will be managed by drm_atomic_state.
330  */
331 struct komeda_pipeline_state {
332 	/** @obj: tracking pipeline_state by drm_atomic_state */
333 	struct drm_private_state obj;
334 	struct komeda_pipeline *pipe;
335 	/** @crtc: currently bound crtc */
336 	struct drm_crtc *crtc;
337 	/**
338 	 * @active_comps:
339 	 *
340 	 * bitmask - BIT(component->id) of active components
341 	 */
342 	u32 active_comps;
343 };
344 
345 #define to_layer(c)	container_of(c, struct komeda_layer, base)
346 #define to_compiz(c)	container_of(c, struct komeda_compiz, base)
347 #define to_scaler(c)	container_of(c, struct komeda_scaler, base)
348 #define to_improc(c)	container_of(c, struct komeda_improc, base)
349 #define to_ctrlr(c)	container_of(c, struct komeda_timing_ctrlr, base)
350 
351 #define to_layer_st(c)	container_of(c, struct komeda_layer_state, base)
352 #define to_compiz_st(c)	container_of(c, struct komeda_compiz_state, base)
353 #define to_scaler_st(c) container_of(c, struct komeda_scaler_state, base)
354 #define to_improc_st(c)	container_of(c, struct komeda_improc_state, base)
355 #define to_ctrlr_st(c)	container_of(c, struct komeda_timing_ctrlr_state, base)
356 
357 #define priv_to_comp_st(o) container_of(o, struct komeda_component_state, obj)
358 #define priv_to_pipe_st(o)  container_of(o, struct komeda_pipeline_state, obj)
359 
360 /* pipeline APIs */
361 struct komeda_pipeline *
362 komeda_pipeline_add(struct komeda_dev *mdev, size_t size,
363 		    struct komeda_pipeline_funcs *funcs);
364 void komeda_pipeline_destroy(struct komeda_dev *mdev,
365 			     struct komeda_pipeline *pipe);
366 int komeda_assemble_pipelines(struct komeda_dev *mdev);
367 struct komeda_component *
368 komeda_pipeline_get_component(struct komeda_pipeline *pipe, int id);
369 
370 void komeda_pipeline_dump_register(struct komeda_pipeline *pipe,
371 				   struct seq_file *sf);
372 
373 /* component APIs */
374 struct komeda_component *
375 komeda_component_add(struct komeda_pipeline *pipe,
376 		     size_t comp_sz, u32 id, u32 hw_id,
377 		     struct komeda_component_funcs *funcs,
378 		     u8 max_active_inputs, u32 supported_inputs,
379 		     u8 max_active_outputs, u32 __iomem *reg,
380 		     const char *name_fmt, ...);
381 
382 void komeda_component_destroy(struct komeda_dev *mdev,
383 			      struct komeda_component *c);
384 
385 #endif /* _KOMEDA_PIPELINE_H_*/
386