1 /* SPDX-License-Identifier: GPL-2.0 */ 2 /* 3 * (C) COPYRIGHT 2018 ARM Limited. All rights reserved. 4 * Author: James.Qian.Wang <james.qian.wang@arm.com> 5 * 6 */ 7 #ifndef _KOMEDA_PIPELINE_H_ 8 #define _KOMEDA_PIPELINE_H_ 9 10 #include <linux/types.h> 11 #include <drm/drm_atomic.h> 12 #include <drm/drm_atomic_helper.h> 13 #include "malidp_utils.h" 14 15 #define KOMEDA_MAX_PIPELINES 2 16 #define KOMEDA_PIPELINE_MAX_LAYERS 4 17 #define KOMEDA_PIPELINE_MAX_SCALERS 2 18 #define KOMEDA_COMPONENT_N_INPUTS 5 19 20 /* pipeline component IDs */ 21 enum { 22 KOMEDA_COMPONENT_LAYER0 = 0, 23 KOMEDA_COMPONENT_LAYER1 = 1, 24 KOMEDA_COMPONENT_LAYER2 = 2, 25 KOMEDA_COMPONENT_LAYER3 = 3, 26 KOMEDA_COMPONENT_WB_LAYER = 7, /* write back layer */ 27 KOMEDA_COMPONENT_SCALER0 = 8, 28 KOMEDA_COMPONENT_SCALER1 = 9, 29 KOMEDA_COMPONENT_SPLITTER = 12, 30 KOMEDA_COMPONENT_MERGER = 14, 31 KOMEDA_COMPONENT_COMPIZ0 = 16, /* compositor */ 32 KOMEDA_COMPONENT_COMPIZ1 = 17, 33 KOMEDA_COMPONENT_IPS0 = 20, /* post image processor */ 34 KOMEDA_COMPONENT_IPS1 = 21, 35 KOMEDA_COMPONENT_TIMING_CTRLR = 22, /* timing controller */ 36 }; 37 38 #define KOMEDA_PIPELINE_LAYERS (BIT(KOMEDA_COMPONENT_LAYER0) |\ 39 BIT(KOMEDA_COMPONENT_LAYER1) |\ 40 BIT(KOMEDA_COMPONENT_LAYER2) |\ 41 BIT(KOMEDA_COMPONENT_LAYER3)) 42 43 #define KOMEDA_PIPELINE_SCALERS (BIT(KOMEDA_COMPONENT_SCALER0) |\ 44 BIT(KOMEDA_COMPONENT_SCALER1)) 45 46 #define KOMEDA_PIPELINE_COMPIZS (BIT(KOMEDA_COMPONENT_COMPIZ0) |\ 47 BIT(KOMEDA_COMPONENT_COMPIZ1)) 48 49 #define KOMEDA_PIPELINE_IMPROCS (BIT(KOMEDA_COMPONENT_IPS0) |\ 50 BIT(KOMEDA_COMPONENT_IPS1)) 51 struct komeda_component; 52 struct komeda_component_state; 53 54 /** komeda_component_funcs - component control functions */ 55 struct komeda_component_funcs { 56 /** @validate: optional, 57 * component may has special requirements or limitations, this function 58 * supply HW the ability to do the further HW specific check. 59 */ 60 int (*validate)(struct komeda_component *c, 61 struct komeda_component_state *state); 62 /** @update: update is a active update */ 63 void (*update)(struct komeda_component *c, 64 struct komeda_component_state *state); 65 /** @disable: disable component */ 66 void (*disable)(struct komeda_component *c); 67 /** @dump_register: Optional, dump registers to seq_file */ 68 void (*dump_register)(struct komeda_component *c, struct seq_file *seq); 69 }; 70 71 /** 72 * struct komeda_component 73 * 74 * struct komeda_component describe the data flow capabilities for how to link a 75 * component into the display pipeline. 76 * all specified components are subclass of this structure. 77 */ 78 struct komeda_component { 79 /** @obj: treat component as private obj */ 80 struct drm_private_obj obj; 81 /** @pipeline: the komeda pipeline this component belongs to */ 82 struct komeda_pipeline *pipeline; 83 /** @name: component name */ 84 char name[32]; 85 /** 86 * @reg: 87 * component register base, 88 * which is initialized by chip and used by chip only 89 */ 90 u32 __iomem *reg; 91 /** @id: component id */ 92 u32 id; 93 /** 94 * @hw_id: component hw id, 95 * which is initialized by chip and used by chip only 96 */ 97 u32 hw_id; 98 99 /** 100 * @max_active_inputs: 101 * @max_active_outputs: 102 * 103 * maximum number of inputs/outputs that can be active at the same time 104 * Note: 105 * the number isn't the bit number of @supported_inputs or 106 * @supported_outputs, but may be less than it, since component may not 107 * support enabling all @supported_inputs/outputs at the same time. 108 */ 109 u8 max_active_inputs; 110 /** @max_active_outputs: maximum number of outputs */ 111 u8 max_active_outputs; 112 /** 113 * @supported_inputs: 114 * @supported_outputs: 115 * 116 * bitmask of BIT(component->id) for the supported inputs/outputs, 117 * describes the possibilities of how a component is linked into a 118 * pipeline. 119 */ 120 u32 supported_inputs; 121 /** @supported_outputs: bitmask of supported output componenet ids */ 122 u32 supported_outputs; 123 124 /** 125 * @funcs: chip functions to access HW 126 */ 127 const struct komeda_component_funcs *funcs; 128 }; 129 130 /** 131 * struct komeda_component_output 132 * 133 * a component has multiple outputs, if want to know where the data 134 * comes from, only know the component is not enough, we still need to know 135 * its output port 136 */ 137 struct komeda_component_output { 138 /** @component: indicate which component the data comes from */ 139 struct komeda_component *component; 140 /** 141 * @output_port: 142 * the output port of the &komeda_component_output.component 143 */ 144 u8 output_port; 145 }; 146 147 /** 148 * struct komeda_component_state 149 * 150 * component_state is the data flow configuration of the component, and it's 151 * the superclass of all specific component_state like @komeda_layer_state, 152 * @komeda_scaler_state 153 */ 154 struct komeda_component_state { 155 /** @obj: tracking component_state by drm_atomic_state */ 156 struct drm_private_state obj; 157 /** @component: backpointer to the component */ 158 struct komeda_component *component; 159 /** 160 * @binding_user: 161 * currently bound user, the user can be @crtc, @plane or @wb_conn, 162 * which is valid decided by @component and @inputs 163 * 164 * - Layer: its user always is plane. 165 * - compiz/improc/timing_ctrlr: the user is crtc. 166 * - wb_layer: wb_conn; 167 * - scaler: plane when input is layer, wb_conn if input is compiz. 168 */ 169 union { 170 /** @crtc: backpointer for user crtc */ 171 struct drm_crtc *crtc; 172 /** @plane: backpointer for user plane */ 173 struct drm_plane *plane; 174 /** @wb_conn: backpointer for user wb_connector */ 175 struct drm_connector *wb_conn; 176 void *binding_user; 177 }; 178 179 /** 180 * @active_inputs: 181 * 182 * active_inputs is bitmask of @inputs index 183 * 184 * - active_inputs = changed_active_inputs | unchanged_active_inputs 185 * - affected_inputs = old->active_inputs | new->active_inputs; 186 * - disabling_inputs = affected_inputs ^ active_inputs; 187 * - changed_inputs = disabling_inputs | changed_active_inputs; 188 * 189 * NOTE: 190 * changed_inputs doesn't include all active_input but only 191 * @changed_active_inputs, and this bitmask can be used in chip 192 * level for dirty update. 193 */ 194 u16 active_inputs; 195 /** @changed_active_inputs: bitmask of the changed @active_inputs */ 196 u16 changed_active_inputs; 197 /** @affected_inputs: bitmask for affected @inputs */ 198 u16 affected_inputs; 199 /** 200 * @inputs: 201 * 202 * the specific inputs[i] only valid on BIT(i) has been set in 203 * @active_inputs, if not the inputs[i] is undefined. 204 */ 205 struct komeda_component_output inputs[KOMEDA_COMPONENT_N_INPUTS]; 206 }; 207 208 static inline u16 component_disabling_inputs(struct komeda_component_state *st) 209 { 210 return st->affected_inputs ^ st->active_inputs; 211 } 212 213 static inline u16 component_changed_inputs(struct komeda_component_state *st) 214 { 215 return component_disabling_inputs(st) | st->changed_active_inputs; 216 } 217 218 #define for_each_changed_input(st, i) \ 219 for ((i) = 0; (i) < (st)->component->max_active_inputs; (i)++) \ 220 if (has_bit((i), component_changed_inputs(st))) 221 222 #define to_comp(__c) (((__c) == NULL) ? NULL : &((__c)->base)) 223 #define to_cpos(__c) ((struct komeda_component **)&(__c)) 224 225 struct komeda_layer { 226 struct komeda_component base; 227 /* accepted h/v input range before rotation */ 228 struct malidp_range hsize_in, vsize_in; 229 u32 layer_type; /* RICH, SIMPLE or WB */ 230 u32 supported_rots; 231 }; 232 233 struct komeda_layer_state { 234 struct komeda_component_state base; 235 /* layer specific configuration state */ 236 u16 hsize, vsize; 237 u32 rot; 238 dma_addr_t addr[3]; 239 }; 240 241 struct komeda_scaler { 242 struct komeda_component base; 243 /* scaler features and caps */ 244 }; 245 246 struct komeda_scaler_state { 247 struct komeda_component_state base; 248 }; 249 250 struct komeda_compiz { 251 struct komeda_component base; 252 struct malidp_range hsize, vsize; 253 }; 254 255 struct komeda_compiz_input_cfg { 256 u16 hsize, vsize; 257 u16 hoffset, voffset; 258 u8 pixel_blend_mode, layer_alpha; 259 }; 260 261 struct komeda_compiz_state { 262 struct komeda_component_state base; 263 /* composition size */ 264 u16 hsize, vsize; 265 struct komeda_compiz_input_cfg cins[KOMEDA_COMPONENT_N_INPUTS]; 266 }; 267 268 struct komeda_improc { 269 struct komeda_component base; 270 u32 supported_color_formats; /* DRM_RGB/YUV444/YUV420*/ 271 u32 supported_color_depths; /* BIT(8) | BIT(10)*/ 272 u8 supports_degamma : 1; 273 u8 supports_csc : 1; 274 u8 supports_gamma : 1; 275 }; 276 277 struct komeda_improc_state { 278 struct komeda_component_state base; 279 u16 hsize, vsize; 280 }; 281 282 /* display timing controller */ 283 struct komeda_timing_ctrlr { 284 struct komeda_component base; 285 u8 supports_dual_link : 1; 286 }; 287 288 struct komeda_timing_ctrlr_state { 289 struct komeda_component_state base; 290 }; 291 292 /* Why define A separated structure but not use plane_state directly ? 293 * 1. Komeda supports layer_split which means a plane_state can be split and 294 * handled by two layers, one layer only handle half of plane image. 295 * 2. Fix up the user properties according to HW's capabilities, like user 296 * set rotation to R180, but HW only supports REFLECT_X+Y. the rot here is 297 * after drm_rotation_simplify() 298 */ 299 struct komeda_data_flow_cfg { 300 struct komeda_component_output input; 301 u16 in_x, in_y, in_w, in_h; 302 u32 out_x, out_y, out_w, out_h; 303 u32 rot; 304 int blending_zorder; 305 u8 pixel_blend_mode, layer_alpha; 306 }; 307 308 /** struct komeda_pipeline_funcs */ 309 struct komeda_pipeline_funcs { 310 /* dump_register: Optional, dump registers to seq_file */ 311 void (*dump_register)(struct komeda_pipeline *pipe, 312 struct seq_file *sf); 313 }; 314 315 /** 316 * struct komeda_pipeline 317 * 318 * Represent a complete display pipeline and hold all functional components. 319 */ 320 struct komeda_pipeline { 321 /** @obj: link pipeline as private obj of drm_atomic_state */ 322 struct drm_private_obj obj; 323 /** @mdev: the parent komeda_dev */ 324 struct komeda_dev *mdev; 325 /** @pxlclk: pixel clock */ 326 struct clk *pxlclk; 327 /** @aclk: AXI clock */ 328 struct clk *aclk; 329 /** @id: pipeline id */ 330 int id; 331 /** @avail_comps: available components mask of pipeline */ 332 u32 avail_comps; 333 /** @n_layers: the number of layer on @layers */ 334 int n_layers; 335 /** @layers: the pipeline layers */ 336 struct komeda_layer *layers[KOMEDA_PIPELINE_MAX_LAYERS]; 337 /** @n_scalers: the number of scaler on @scalers */ 338 int n_scalers; 339 /** @scalers: the pipeline scalers */ 340 struct komeda_scaler *scalers[KOMEDA_PIPELINE_MAX_SCALERS]; 341 /** @compiz: compositor */ 342 struct komeda_compiz *compiz; 343 /** @wb_layer: writeback layer */ 344 struct komeda_layer *wb_layer; 345 /** @improc: post image processor */ 346 struct komeda_improc *improc; 347 /** @ctrlr: timing controller */ 348 struct komeda_timing_ctrlr *ctrlr; 349 /** @funcs: chip private pipeline functions */ 350 const struct komeda_pipeline_funcs *funcs; 351 352 /** @of_node: pipeline dt node */ 353 struct device_node *of_node; 354 /** @of_output_port: pipeline output port */ 355 struct device_node *of_output_port; 356 /** @of_output_dev: output connector device node */ 357 struct device_node *of_output_dev; 358 }; 359 360 /** 361 * struct komeda_pipeline_state 362 * 363 * NOTE: 364 * Unlike the pipeline, pipeline_state doesn’t gather any component_state 365 * into it. It because all component will be managed by drm_atomic_state. 366 */ 367 struct komeda_pipeline_state { 368 /** @obj: tracking pipeline_state by drm_atomic_state */ 369 struct drm_private_state obj; 370 /** @pipe: backpointer to the pipeline */ 371 struct komeda_pipeline *pipe; 372 /** @crtc: currently bound crtc */ 373 struct drm_crtc *crtc; 374 /** 375 * @active_comps: 376 * 377 * bitmask - BIT(component->id) of active components 378 */ 379 u32 active_comps; 380 }; 381 382 #define to_layer(c) container_of(c, struct komeda_layer, base) 383 #define to_compiz(c) container_of(c, struct komeda_compiz, base) 384 #define to_scaler(c) container_of(c, struct komeda_scaler, base) 385 #define to_improc(c) container_of(c, struct komeda_improc, base) 386 #define to_ctrlr(c) container_of(c, struct komeda_timing_ctrlr, base) 387 388 #define to_layer_st(c) container_of(c, struct komeda_layer_state, base) 389 #define to_compiz_st(c) container_of(c, struct komeda_compiz_state, base) 390 #define to_scaler_st(c) container_of(c, struct komeda_scaler_state, base) 391 #define to_improc_st(c) container_of(c, struct komeda_improc_state, base) 392 #define to_ctrlr_st(c) container_of(c, struct komeda_timing_ctrlr_state, base) 393 394 #define priv_to_comp_st(o) container_of(o, struct komeda_component_state, obj) 395 #define priv_to_pipe_st(o) container_of(o, struct komeda_pipeline_state, obj) 396 397 /* pipeline APIs */ 398 struct komeda_pipeline * 399 komeda_pipeline_add(struct komeda_dev *mdev, size_t size, 400 const struct komeda_pipeline_funcs *funcs); 401 void komeda_pipeline_destroy(struct komeda_dev *mdev, 402 struct komeda_pipeline *pipe); 403 int komeda_assemble_pipelines(struct komeda_dev *mdev); 404 struct komeda_component * 405 komeda_pipeline_get_component(struct komeda_pipeline *pipe, int id); 406 407 void komeda_pipeline_dump_register(struct komeda_pipeline *pipe, 408 struct seq_file *sf); 409 410 /* component APIs */ 411 struct komeda_component * 412 komeda_component_add(struct komeda_pipeline *pipe, 413 size_t comp_sz, u32 id, u32 hw_id, 414 const struct komeda_component_funcs *funcs, 415 u8 max_active_inputs, u32 supported_inputs, 416 u8 max_active_outputs, u32 __iomem *reg, 417 const char *name_fmt, ...); 418 419 void komeda_component_destroy(struct komeda_dev *mdev, 420 struct komeda_component *c); 421 422 struct komeda_plane_state; 423 struct komeda_crtc_state; 424 struct komeda_crtc; 425 426 int komeda_build_layer_data_flow(struct komeda_layer *layer, 427 struct komeda_plane_state *kplane_st, 428 struct komeda_crtc_state *kcrtc_st, 429 struct komeda_data_flow_cfg *dflow); 430 int komeda_build_display_data_flow(struct komeda_crtc *kcrtc, 431 struct komeda_crtc_state *kcrtc_st); 432 433 int komeda_release_unclaimed_resources(struct komeda_pipeline *pipe, 434 struct komeda_crtc_state *kcrtc_st); 435 436 struct komeda_pipeline_state * 437 komeda_pipeline_get_old_state(struct komeda_pipeline *pipe, 438 struct drm_atomic_state *state); 439 void komeda_pipeline_disable(struct komeda_pipeline *pipe, 440 struct drm_atomic_state *old_state); 441 void komeda_pipeline_update(struct komeda_pipeline *pipe, 442 struct drm_atomic_state *old_state); 443 444 #endif /* _KOMEDA_PIPELINE_H_*/ 445