1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * (C) COPYRIGHT 2018 ARM Limited. All rights reserved. 4 * Author: James.Qian.Wang <james.qian.wang@arm.com> 5 * 6 */ 7 #include <linux/component.h> 8 #include <linux/interrupt.h> 9 10 #include <drm/drm_atomic.h> 11 #include <drm/drm_atomic_helper.h> 12 #include <drm/drm_drv.h> 13 #include <drm/drm_fb_helper.h> 14 #include <drm/drm_gem_cma_helper.h> 15 #include <drm/drm_gem_framebuffer_helper.h> 16 #include <drm/drm_irq.h> 17 #include <drm/drm_managed.h> 18 #include <drm/drm_probe_helper.h> 19 #include <drm/drm_vblank.h> 20 21 #include "komeda_dev.h" 22 #include "komeda_framebuffer.h" 23 #include "komeda_kms.h" 24 25 DEFINE_DRM_GEM_CMA_FOPS(komeda_cma_fops); 26 27 static int komeda_gem_cma_dumb_create(struct drm_file *file, 28 struct drm_device *dev, 29 struct drm_mode_create_dumb *args) 30 { 31 struct komeda_dev *mdev = dev->dev_private; 32 u32 pitch = DIV_ROUND_UP(args->width * args->bpp, 8); 33 34 args->pitch = ALIGN(pitch, mdev->chip.bus_width); 35 36 return drm_gem_cma_dumb_create_internal(file, dev, args); 37 } 38 39 static irqreturn_t komeda_kms_irq_handler(int irq, void *data) 40 { 41 struct drm_device *drm = data; 42 struct komeda_dev *mdev = drm->dev_private; 43 struct komeda_kms_dev *kms = to_kdev(drm); 44 struct komeda_events evts; 45 irqreturn_t status; 46 u32 i; 47 48 /* Call into the CHIP to recognize events */ 49 memset(&evts, 0, sizeof(evts)); 50 status = mdev->funcs->irq_handler(mdev, &evts); 51 52 komeda_print_events(&evts, drm); 53 54 /* Notify the crtc to handle the events */ 55 for (i = 0; i < kms->n_crtcs; i++) 56 komeda_crtc_handle_event(&kms->crtcs[i], &evts); 57 58 return status; 59 } 60 61 static const struct drm_driver komeda_kms_driver = { 62 .driver_features = DRIVER_GEM | DRIVER_MODESET | DRIVER_ATOMIC, 63 .lastclose = drm_fb_helper_lastclose, 64 DRM_GEM_CMA_DRIVER_OPS_WITH_DUMB_CREATE(komeda_gem_cma_dumb_create), 65 .fops = &komeda_cma_fops, 66 .name = "komeda", 67 .desc = "Arm Komeda Display Processor driver", 68 .date = "20181101", 69 .major = 0, 70 .minor = 1, 71 }; 72 73 static void komeda_kms_commit_tail(struct drm_atomic_state *old_state) 74 { 75 struct drm_device *dev = old_state->dev; 76 bool fence_cookie = dma_fence_begin_signalling(); 77 78 drm_atomic_helper_commit_modeset_disables(dev, old_state); 79 80 drm_atomic_helper_commit_planes(dev, old_state, 81 DRM_PLANE_COMMIT_ACTIVE_ONLY); 82 83 drm_atomic_helper_commit_modeset_enables(dev, old_state); 84 85 drm_atomic_helper_commit_hw_done(old_state); 86 87 drm_atomic_helper_wait_for_flip_done(dev, old_state); 88 89 dma_fence_end_signalling(fence_cookie); 90 91 drm_atomic_helper_cleanup_planes(dev, old_state); 92 } 93 94 static const struct drm_mode_config_helper_funcs komeda_mode_config_helpers = { 95 .atomic_commit_tail = komeda_kms_commit_tail, 96 }; 97 98 static int komeda_plane_state_list_add(struct drm_plane_state *plane_st, 99 struct list_head *zorder_list) 100 { 101 struct komeda_plane_state *new = to_kplane_st(plane_st); 102 struct komeda_plane_state *node, *last; 103 104 last = list_empty(zorder_list) ? 105 NULL : list_last_entry(zorder_list, typeof(*last), zlist_node); 106 107 /* Considering the list sequence is zpos increasing, so if list is empty 108 * or the zpos of new node bigger than the last node in list, no need 109 * loop and just insert the new one to the tail of the list. 110 */ 111 if (!last || (new->base.zpos > last->base.zpos)) { 112 list_add_tail(&new->zlist_node, zorder_list); 113 return 0; 114 } 115 116 /* Build the list by zpos increasing */ 117 list_for_each_entry(node, zorder_list, zlist_node) { 118 if (new->base.zpos < node->base.zpos) { 119 list_add_tail(&new->zlist_node, &node->zlist_node); 120 break; 121 } else if (node->base.zpos == new->base.zpos) { 122 struct drm_plane *a = node->base.plane; 123 struct drm_plane *b = new->base.plane; 124 125 /* Komeda doesn't support setting a same zpos for 126 * different planes. 127 */ 128 DRM_DEBUG_ATOMIC("PLANE: %s and PLANE: %s are configured same zpos: %d.\n", 129 a->name, b->name, node->base.zpos); 130 return -EINVAL; 131 } 132 } 133 134 return 0; 135 } 136 137 static int komeda_crtc_normalize_zpos(struct drm_crtc *crtc, 138 struct drm_crtc_state *crtc_st) 139 { 140 struct drm_atomic_state *state = crtc_st->state; 141 struct komeda_crtc *kcrtc = to_kcrtc(crtc); 142 struct komeda_crtc_state *kcrtc_st = to_kcrtc_st(crtc_st); 143 struct komeda_plane_state *kplane_st; 144 struct drm_plane_state *plane_st; 145 struct drm_plane *plane; 146 struct list_head zorder_list; 147 int order = 0, err; 148 149 DRM_DEBUG_ATOMIC("[CRTC:%d:%s] calculating normalized zpos values\n", 150 crtc->base.id, crtc->name); 151 152 INIT_LIST_HEAD(&zorder_list); 153 154 /* This loop also added all effected planes into the new state */ 155 drm_for_each_plane_mask(plane, crtc->dev, crtc_st->plane_mask) { 156 plane_st = drm_atomic_get_plane_state(state, plane); 157 if (IS_ERR(plane_st)) 158 return PTR_ERR(plane_st); 159 160 /* Build a list by zpos increasing */ 161 err = komeda_plane_state_list_add(plane_st, &zorder_list); 162 if (err) 163 return err; 164 } 165 166 kcrtc_st->max_slave_zorder = 0; 167 168 list_for_each_entry(kplane_st, &zorder_list, zlist_node) { 169 plane_st = &kplane_st->base; 170 plane = plane_st->plane; 171 172 plane_st->normalized_zpos = order++; 173 /* When layer_split has been enabled, one plane will be handled 174 * by two separated komeda layers (left/right), which may needs 175 * two zorders. 176 * - zorder: for left_layer for left display part. 177 * - zorder + 1: will be reserved for right layer. 178 */ 179 if (to_kplane_st(plane_st)->layer_split) 180 order++; 181 182 DRM_DEBUG_ATOMIC("[PLANE:%d:%s] zpos:%d, normalized zpos: %d\n", 183 plane->base.id, plane->name, 184 plane_st->zpos, plane_st->normalized_zpos); 185 186 /* calculate max slave zorder */ 187 if (has_bit(drm_plane_index(plane), kcrtc->slave_planes)) 188 kcrtc_st->max_slave_zorder = 189 max(plane_st->normalized_zpos, 190 kcrtc_st->max_slave_zorder); 191 } 192 193 crtc_st->zpos_changed = true; 194 195 return 0; 196 } 197 198 static int komeda_kms_check(struct drm_device *dev, 199 struct drm_atomic_state *state) 200 { 201 struct drm_crtc *crtc; 202 struct drm_crtc_state *new_crtc_st; 203 int i, err; 204 205 err = drm_atomic_helper_check_modeset(dev, state); 206 if (err) 207 return err; 208 209 /* Komeda need to re-calculate resource assumption in every commit 210 * so need to add all affected_planes (even unchanged) to 211 * drm_atomic_state. 212 */ 213 for_each_new_crtc_in_state(state, crtc, new_crtc_st, i) { 214 err = drm_atomic_add_affected_planes(state, crtc); 215 if (err) 216 return err; 217 218 err = komeda_crtc_normalize_zpos(crtc, new_crtc_st); 219 if (err) 220 return err; 221 } 222 223 err = drm_atomic_helper_check_planes(dev, state); 224 if (err) 225 return err; 226 227 return 0; 228 } 229 230 static const struct drm_mode_config_funcs komeda_mode_config_funcs = { 231 .fb_create = komeda_fb_create, 232 .atomic_check = komeda_kms_check, 233 .atomic_commit = drm_atomic_helper_commit, 234 }; 235 236 static void komeda_kms_mode_config_init(struct komeda_kms_dev *kms, 237 struct komeda_dev *mdev) 238 { 239 struct drm_mode_config *config = &kms->base.mode_config; 240 241 drm_mode_config_init(&kms->base); 242 243 komeda_kms_setup_crtcs(kms, mdev); 244 245 /* Get value from dev */ 246 config->min_width = 0; 247 config->min_height = 0; 248 config->max_width = 4096; 249 config->max_height = 4096; 250 251 config->funcs = &komeda_mode_config_funcs; 252 config->helper_private = &komeda_mode_config_helpers; 253 } 254 255 struct komeda_kms_dev *komeda_kms_attach(struct komeda_dev *mdev) 256 { 257 struct komeda_kms_dev *kms; 258 struct drm_device *drm; 259 int err; 260 261 kms = devm_drm_dev_alloc(mdev->dev, &komeda_kms_driver, 262 struct komeda_kms_dev, base); 263 if (IS_ERR(kms)) 264 return kms; 265 266 drm = &kms->base; 267 268 drm->dev_private = mdev; 269 270 komeda_kms_mode_config_init(kms, mdev); 271 272 err = komeda_kms_add_private_objs(kms, mdev); 273 if (err) 274 goto cleanup_mode_config; 275 276 err = komeda_kms_add_planes(kms, mdev); 277 if (err) 278 goto cleanup_mode_config; 279 280 err = drm_vblank_init(drm, kms->n_crtcs); 281 if (err) 282 goto cleanup_mode_config; 283 284 err = komeda_kms_add_crtcs(kms, mdev); 285 if (err) 286 goto cleanup_mode_config; 287 288 err = komeda_kms_add_wb_connectors(kms, mdev); 289 if (err) 290 goto cleanup_mode_config; 291 292 err = component_bind_all(mdev->dev, kms); 293 if (err) 294 goto cleanup_mode_config; 295 296 drm_mode_config_reset(drm); 297 298 err = devm_request_irq(drm->dev, mdev->irq, 299 komeda_kms_irq_handler, IRQF_SHARED, 300 drm->driver->name, drm); 301 if (err) 302 goto free_component_binding; 303 304 drm->irq_enabled = true; 305 306 drm_kms_helper_poll_init(drm); 307 308 err = drm_dev_register(drm, 0); 309 if (err) 310 goto free_interrupts; 311 312 return kms; 313 314 free_interrupts: 315 drm_kms_helper_poll_fini(drm); 316 drm->irq_enabled = false; 317 free_component_binding: 318 component_unbind_all(mdev->dev, drm); 319 cleanup_mode_config: 320 drm_mode_config_cleanup(drm); 321 komeda_kms_cleanup_private_objs(kms); 322 drm->dev_private = NULL; 323 return ERR_PTR(err); 324 } 325 326 void komeda_kms_detach(struct komeda_kms_dev *kms) 327 { 328 struct drm_device *drm = &kms->base; 329 struct komeda_dev *mdev = drm->dev_private; 330 331 drm_dev_unregister(drm); 332 drm_kms_helper_poll_fini(drm); 333 drm_atomic_helper_shutdown(drm); 334 drm->irq_enabled = false; 335 component_unbind_all(mdev->dev, drm); 336 drm_mode_config_cleanup(drm); 337 komeda_kms_cleanup_private_objs(kms); 338 drm->dev_private = NULL; 339 } 340