1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * (C) COPYRIGHT 2018 ARM Limited. All rights reserved. 4 * Author: James.Qian.Wang <james.qian.wang@arm.com> 5 * 6 */ 7 #include <linux/io.h> 8 #include <linux/iommu.h> 9 #include <linux/of_device.h> 10 #include <linux/of_graph.h> 11 #include <linux/of_reserved_mem.h> 12 #include <linux/platform_device.h> 13 #include <linux/dma-mapping.h> 14 #ifdef CONFIG_DEBUG_FS 15 #include <linux/debugfs.h> 16 #include <linux/seq_file.h> 17 #endif 18 19 #include <drm/drm_print.h> 20 21 #include "komeda_dev.h" 22 23 static int komeda_register_show(struct seq_file *sf, void *x) 24 { 25 struct komeda_dev *mdev = sf->private; 26 int i; 27 28 seq_puts(sf, "\n====== Komeda register dump =========\n"); 29 30 if (mdev->funcs->dump_register) 31 mdev->funcs->dump_register(mdev, sf); 32 33 for (i = 0; i < mdev->n_pipelines; i++) 34 komeda_pipeline_dump_register(mdev->pipelines[i], sf); 35 36 return 0; 37 } 38 39 static int komeda_register_open(struct inode *inode, struct file *filp) 40 { 41 return single_open(filp, komeda_register_show, inode->i_private); 42 } 43 44 static const struct file_operations komeda_register_fops = { 45 .owner = THIS_MODULE, 46 .open = komeda_register_open, 47 .read = seq_read, 48 .llseek = seq_lseek, 49 .release = single_release, 50 }; 51 52 #ifdef CONFIG_DEBUG_FS 53 static void komeda_debugfs_init(struct komeda_dev *mdev) 54 { 55 if (!debugfs_initialized()) 56 return; 57 58 mdev->debugfs_root = debugfs_create_dir("komeda", NULL); 59 debugfs_create_file("register", 0444, mdev->debugfs_root, 60 mdev, &komeda_register_fops); 61 } 62 #endif 63 64 static ssize_t 65 core_id_show(struct device *dev, struct device_attribute *attr, char *buf) 66 { 67 struct komeda_dev *mdev = dev_to_mdev(dev); 68 69 return snprintf(buf, PAGE_SIZE, "0x%08x\n", mdev->chip.core_id); 70 } 71 static DEVICE_ATTR_RO(core_id); 72 73 static ssize_t 74 config_id_show(struct device *dev, struct device_attribute *attr, char *buf) 75 { 76 struct komeda_dev *mdev = dev_to_mdev(dev); 77 struct komeda_pipeline *pipe = mdev->pipelines[0]; 78 union komeda_config_id config_id; 79 int i; 80 81 memset(&config_id, 0, sizeof(config_id)); 82 83 config_id.max_line_sz = pipe->layers[0]->hsize_in.end; 84 config_id.n_pipelines = mdev->n_pipelines; 85 config_id.n_scalers = pipe->n_scalers; 86 config_id.n_layers = pipe->n_layers; 87 config_id.n_richs = 0; 88 for (i = 0; i < pipe->n_layers; i++) { 89 if (pipe->layers[i]->layer_type == KOMEDA_FMT_RICH_LAYER) 90 config_id.n_richs++; 91 } 92 return snprintf(buf, PAGE_SIZE, "0x%08x\n", config_id.value); 93 } 94 static DEVICE_ATTR_RO(config_id); 95 96 static ssize_t 97 aclk_hz_show(struct device *dev, struct device_attribute *attr, char *buf) 98 { 99 struct komeda_dev *mdev = dev_to_mdev(dev); 100 101 return snprintf(buf, PAGE_SIZE, "%lu\n", clk_get_rate(mdev->aclk)); 102 } 103 static DEVICE_ATTR_RO(aclk_hz); 104 105 static struct attribute *komeda_sysfs_entries[] = { 106 &dev_attr_core_id.attr, 107 &dev_attr_config_id.attr, 108 &dev_attr_aclk_hz.attr, 109 NULL, 110 }; 111 112 static struct attribute_group komeda_sysfs_attr_group = { 113 .attrs = komeda_sysfs_entries, 114 }; 115 116 static int komeda_parse_pipe_dt(struct komeda_dev *mdev, struct device_node *np) 117 { 118 struct komeda_pipeline *pipe; 119 struct clk *clk; 120 u32 pipe_id; 121 int ret = 0; 122 123 ret = of_property_read_u32(np, "reg", &pipe_id); 124 if (ret != 0 || pipe_id >= mdev->n_pipelines) 125 return -EINVAL; 126 127 pipe = mdev->pipelines[pipe_id]; 128 129 clk = of_clk_get_by_name(np, "pxclk"); 130 if (IS_ERR(clk)) { 131 DRM_ERROR("get pxclk for pipeline %d failed!\n", pipe_id); 132 return PTR_ERR(clk); 133 } 134 pipe->pxlclk = clk; 135 136 /* enum ports */ 137 pipe->of_output_links[0] = 138 of_graph_get_remote_node(np, KOMEDA_OF_PORT_OUTPUT, 0); 139 pipe->of_output_links[1] = 140 of_graph_get_remote_node(np, KOMEDA_OF_PORT_OUTPUT, 1); 141 pipe->of_output_port = 142 of_graph_get_port_by_id(np, KOMEDA_OF_PORT_OUTPUT); 143 144 pipe->dual_link = pipe->of_output_links[0] && pipe->of_output_links[1]; 145 pipe->of_node = of_node_get(np); 146 147 return 0; 148 } 149 150 static int komeda_parse_dt(struct device *dev, struct komeda_dev *mdev) 151 { 152 struct platform_device *pdev = to_platform_device(dev); 153 struct device_node *child, *np = dev->of_node; 154 int ret; 155 156 mdev->irq = platform_get_irq(pdev, 0); 157 if (mdev->irq < 0) { 158 DRM_ERROR("could not get IRQ number.\n"); 159 return mdev->irq; 160 } 161 162 /* Get the optional framebuffer memory resource */ 163 ret = of_reserved_mem_device_init(dev); 164 if (ret && ret != -ENODEV) 165 return ret; 166 ret = 0; 167 168 for_each_available_child_of_node(np, child) { 169 if (of_node_cmp(child->name, "pipeline") == 0) { 170 ret = komeda_parse_pipe_dt(mdev, child); 171 if (ret) { 172 DRM_ERROR("parse pipeline dt error!\n"); 173 of_node_put(child); 174 break; 175 } 176 } 177 } 178 179 return ret; 180 } 181 182 struct komeda_dev *komeda_dev_create(struct device *dev) 183 { 184 struct platform_device *pdev = to_platform_device(dev); 185 const struct komeda_product_data *product; 186 struct komeda_dev *mdev; 187 struct resource *io_res; 188 int err = 0; 189 190 product = of_device_get_match_data(dev); 191 if (!product) 192 return ERR_PTR(-ENODEV); 193 194 io_res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 195 if (!io_res) { 196 DRM_ERROR("No registers defined.\n"); 197 return ERR_PTR(-ENODEV); 198 } 199 200 mdev = devm_kzalloc(dev, sizeof(*mdev), GFP_KERNEL); 201 if (!mdev) 202 return ERR_PTR(-ENOMEM); 203 204 mutex_init(&mdev->lock); 205 206 mdev->dev = dev; 207 mdev->reg_base = devm_ioremap_resource(dev, io_res); 208 if (IS_ERR(mdev->reg_base)) { 209 DRM_ERROR("Map register space failed.\n"); 210 err = PTR_ERR(mdev->reg_base); 211 mdev->reg_base = NULL; 212 goto err_cleanup; 213 } 214 215 mdev->aclk = devm_clk_get(dev, "aclk"); 216 if (IS_ERR(mdev->aclk)) { 217 DRM_ERROR("Get engine clk failed.\n"); 218 err = PTR_ERR(mdev->aclk); 219 mdev->aclk = NULL; 220 goto err_cleanup; 221 } 222 223 clk_prepare_enable(mdev->aclk); 224 225 mdev->funcs = product->identify(mdev->reg_base, &mdev->chip); 226 if (!komeda_product_match(mdev, product->product_id)) { 227 DRM_ERROR("DT configured %x mismatch with real HW %x.\n", 228 product->product_id, 229 MALIDP_CORE_ID_PRODUCT_ID(mdev->chip.core_id)); 230 err = -ENODEV; 231 goto disable_clk; 232 } 233 234 DRM_INFO("Found ARM Mali-D%x version r%dp%d\n", 235 MALIDP_CORE_ID_PRODUCT_ID(mdev->chip.core_id), 236 MALIDP_CORE_ID_MAJOR(mdev->chip.core_id), 237 MALIDP_CORE_ID_MINOR(mdev->chip.core_id)); 238 239 mdev->funcs->init_format_table(mdev); 240 241 err = mdev->funcs->enum_resources(mdev); 242 if (err) { 243 DRM_ERROR("enumerate display resource failed.\n"); 244 goto disable_clk; 245 } 246 247 err = komeda_parse_dt(dev, mdev); 248 if (err) { 249 DRM_ERROR("parse device tree failed.\n"); 250 goto disable_clk; 251 } 252 253 err = komeda_assemble_pipelines(mdev); 254 if (err) { 255 DRM_ERROR("assemble display pipelines failed.\n"); 256 goto disable_clk; 257 } 258 259 dev->dma_parms = &mdev->dma_parms; 260 dma_set_max_seg_size(dev, DMA_BIT_MASK(32)); 261 262 mdev->iommu = iommu_get_domain_for_dev(mdev->dev); 263 if (!mdev->iommu) 264 DRM_INFO("continue without IOMMU support!\n"); 265 266 if (mdev->iommu && mdev->funcs->connect_iommu) { 267 err = mdev->funcs->connect_iommu(mdev); 268 if (err) { 269 DRM_ERROR("connect iommu failed.\n"); 270 mdev->iommu = NULL; 271 goto disable_clk; 272 } 273 } 274 275 clk_disable_unprepare(mdev->aclk); 276 277 err = sysfs_create_group(&dev->kobj, &komeda_sysfs_attr_group); 278 if (err) { 279 DRM_ERROR("create sysfs group failed.\n"); 280 goto err_cleanup; 281 } 282 283 #ifdef CONFIG_DEBUG_FS 284 komeda_debugfs_init(mdev); 285 #endif 286 287 return mdev; 288 289 disable_clk: 290 clk_disable_unprepare(mdev->aclk); 291 err_cleanup: 292 komeda_dev_destroy(mdev); 293 return ERR_PTR(err); 294 } 295 296 void komeda_dev_destroy(struct komeda_dev *mdev) 297 { 298 struct device *dev = mdev->dev; 299 const struct komeda_dev_funcs *funcs = mdev->funcs; 300 int i; 301 302 sysfs_remove_group(&dev->kobj, &komeda_sysfs_attr_group); 303 304 #ifdef CONFIG_DEBUG_FS 305 debugfs_remove_recursive(mdev->debugfs_root); 306 #endif 307 308 if (mdev->aclk) 309 clk_prepare_enable(mdev->aclk); 310 311 if (mdev->iommu && mdev->funcs->disconnect_iommu) 312 if (mdev->funcs->disconnect_iommu(mdev)) 313 DRM_ERROR("disconnect iommu failed.\n"); 314 mdev->iommu = NULL; 315 316 for (i = 0; i < mdev->n_pipelines; i++) { 317 komeda_pipeline_destroy(mdev, mdev->pipelines[i]); 318 mdev->pipelines[i] = NULL; 319 } 320 321 mdev->n_pipelines = 0; 322 323 of_reserved_mem_device_release(dev); 324 325 if (funcs && funcs->cleanup) 326 funcs->cleanup(mdev); 327 328 if (mdev->reg_base) { 329 devm_iounmap(dev, mdev->reg_base); 330 mdev->reg_base = NULL; 331 } 332 333 if (mdev->aclk) { 334 clk_disable_unprepare(mdev->aclk); 335 devm_clk_put(dev, mdev->aclk); 336 mdev->aclk = NULL; 337 } 338 339 devm_kfree(dev, mdev); 340 } 341 342 int komeda_dev_resume(struct komeda_dev *mdev) 343 { 344 int ret = 0; 345 346 clk_prepare_enable(mdev->aclk); 347 348 if (mdev->iommu && mdev->funcs->connect_iommu) { 349 ret = mdev->funcs->connect_iommu(mdev); 350 if (ret < 0) { 351 DRM_ERROR("connect iommu failed.\n"); 352 goto disable_clk; 353 } 354 } 355 356 ret = mdev->funcs->enable_irq(mdev); 357 358 disable_clk: 359 clk_disable_unprepare(mdev->aclk); 360 361 return ret; 362 } 363 364 int komeda_dev_suspend(struct komeda_dev *mdev) 365 { 366 int ret = 0; 367 368 clk_prepare_enable(mdev->aclk); 369 370 if (mdev->iommu && mdev->funcs->disconnect_iommu) { 371 ret = mdev->funcs->disconnect_iommu(mdev); 372 if (ret < 0) { 373 DRM_ERROR("disconnect iommu failed.\n"); 374 goto disable_clk; 375 } 376 } 377 378 ret = mdev->funcs->disable_irq(mdev); 379 380 disable_clk: 381 clk_disable_unprepare(mdev->aclk); 382 383 return ret; 384 } 385