1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * (C) COPYRIGHT 2018 ARM Limited. All rights reserved. 4 * Author: James.Qian.Wang <james.qian.wang@arm.com> 5 * 6 */ 7 #include <linux/io.h> 8 #include <linux/iommu.h> 9 #include <linux/of_device.h> 10 #include <linux/of_graph.h> 11 #include <linux/of_reserved_mem.h> 12 #include <linux/platform_device.h> 13 #include <linux/dma-mapping.h> 14 #ifdef CONFIG_DEBUG_FS 15 #include <linux/debugfs.h> 16 #include <linux/seq_file.h> 17 #endif 18 19 #include <drm/drm_print.h> 20 21 #include "komeda_dev.h" 22 23 static int komeda_register_show(struct seq_file *sf, void *x) 24 { 25 struct komeda_dev *mdev = sf->private; 26 int i; 27 28 if (mdev->funcs->dump_register) 29 mdev->funcs->dump_register(mdev, sf); 30 31 for (i = 0; i < mdev->n_pipelines; i++) 32 komeda_pipeline_dump_register(mdev->pipelines[i], sf); 33 34 return 0; 35 } 36 37 static int komeda_register_open(struct inode *inode, struct file *filp) 38 { 39 return single_open(filp, komeda_register_show, inode->i_private); 40 } 41 42 static const struct file_operations komeda_register_fops = { 43 .owner = THIS_MODULE, 44 .open = komeda_register_open, 45 .read = seq_read, 46 .llseek = seq_lseek, 47 .release = single_release, 48 }; 49 50 #ifdef CONFIG_DEBUG_FS 51 static void komeda_debugfs_init(struct komeda_dev *mdev) 52 { 53 if (!debugfs_initialized()) 54 return; 55 56 mdev->debugfs_root = debugfs_create_dir("komeda", NULL); 57 debugfs_create_file("register", 0444, mdev->debugfs_root, 58 mdev, &komeda_register_fops); 59 } 60 #endif 61 62 static ssize_t 63 core_id_show(struct device *dev, struct device_attribute *attr, char *buf) 64 { 65 struct komeda_dev *mdev = dev_to_mdev(dev); 66 67 return snprintf(buf, PAGE_SIZE, "0x%08x\n", mdev->chip.core_id); 68 } 69 static DEVICE_ATTR_RO(core_id); 70 71 static ssize_t 72 config_id_show(struct device *dev, struct device_attribute *attr, char *buf) 73 { 74 struct komeda_dev *mdev = dev_to_mdev(dev); 75 struct komeda_pipeline *pipe = mdev->pipelines[0]; 76 union komeda_config_id config_id; 77 int i; 78 79 memset(&config_id, 0, sizeof(config_id)); 80 81 config_id.max_line_sz = pipe->layers[0]->hsize_in.end; 82 config_id.n_pipelines = mdev->n_pipelines; 83 config_id.n_scalers = pipe->n_scalers; 84 config_id.n_layers = pipe->n_layers; 85 config_id.n_richs = 0; 86 for (i = 0; i < pipe->n_layers; i++) { 87 if (pipe->layers[i]->layer_type == KOMEDA_FMT_RICH_LAYER) 88 config_id.n_richs++; 89 } 90 return snprintf(buf, PAGE_SIZE, "0x%08x\n", config_id.value); 91 } 92 static DEVICE_ATTR_RO(config_id); 93 94 static struct attribute *komeda_sysfs_entries[] = { 95 &dev_attr_core_id.attr, 96 &dev_attr_config_id.attr, 97 NULL, 98 }; 99 100 static struct attribute_group komeda_sysfs_attr_group = { 101 .attrs = komeda_sysfs_entries, 102 }; 103 104 static int komeda_parse_pipe_dt(struct komeda_dev *mdev, struct device_node *np) 105 { 106 struct komeda_pipeline *pipe; 107 struct clk *clk; 108 u32 pipe_id; 109 int ret = 0; 110 111 ret = of_property_read_u32(np, "reg", &pipe_id); 112 if (ret != 0 || pipe_id >= mdev->n_pipelines) 113 return -EINVAL; 114 115 pipe = mdev->pipelines[pipe_id]; 116 117 clk = of_clk_get_by_name(np, "pxclk"); 118 if (IS_ERR(clk)) { 119 DRM_ERROR("get pxclk for pipeline %d failed!\n", pipe_id); 120 return PTR_ERR(clk); 121 } 122 pipe->pxlclk = clk; 123 124 /* enum ports */ 125 pipe->of_output_links[0] = 126 of_graph_get_remote_node(np, KOMEDA_OF_PORT_OUTPUT, 0); 127 pipe->of_output_links[1] = 128 of_graph_get_remote_node(np, KOMEDA_OF_PORT_OUTPUT, 1); 129 pipe->of_output_port = 130 of_graph_get_port_by_id(np, KOMEDA_OF_PORT_OUTPUT); 131 132 pipe->dual_link = pipe->of_output_links[0] && pipe->of_output_links[1]; 133 pipe->of_node = of_node_get(np); 134 135 return 0; 136 } 137 138 static int komeda_parse_dt(struct device *dev, struct komeda_dev *mdev) 139 { 140 struct platform_device *pdev = to_platform_device(dev); 141 struct device_node *child, *np = dev->of_node; 142 int ret; 143 144 mdev->irq = platform_get_irq(pdev, 0); 145 if (mdev->irq < 0) { 146 DRM_ERROR("could not get IRQ number.\n"); 147 return mdev->irq; 148 } 149 150 /* Get the optional framebuffer memory resource */ 151 ret = of_reserved_mem_device_init(dev); 152 if (ret && ret != -ENODEV) 153 return ret; 154 ret = 0; 155 156 for_each_available_child_of_node(np, child) { 157 if (of_node_cmp(child->name, "pipeline") == 0) { 158 ret = komeda_parse_pipe_dt(mdev, child); 159 if (ret) { 160 DRM_ERROR("parse pipeline dt error!\n"); 161 of_node_put(child); 162 break; 163 } 164 } 165 } 166 167 return ret; 168 } 169 170 struct komeda_dev *komeda_dev_create(struct device *dev) 171 { 172 struct platform_device *pdev = to_platform_device(dev); 173 const struct komeda_product_data *product; 174 struct komeda_dev *mdev; 175 struct resource *io_res; 176 int err = 0; 177 178 product = of_device_get_match_data(dev); 179 if (!product) 180 return ERR_PTR(-ENODEV); 181 182 io_res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 183 if (!io_res) { 184 DRM_ERROR("No registers defined.\n"); 185 return ERR_PTR(-ENODEV); 186 } 187 188 mdev = devm_kzalloc(dev, sizeof(*mdev), GFP_KERNEL); 189 if (!mdev) 190 return ERR_PTR(-ENOMEM); 191 192 mutex_init(&mdev->lock); 193 194 mdev->dev = dev; 195 mdev->reg_base = devm_ioremap_resource(dev, io_res); 196 if (IS_ERR(mdev->reg_base)) { 197 DRM_ERROR("Map register space failed.\n"); 198 err = PTR_ERR(mdev->reg_base); 199 mdev->reg_base = NULL; 200 goto err_cleanup; 201 } 202 203 mdev->aclk = devm_clk_get(dev, "aclk"); 204 if (IS_ERR(mdev->aclk)) { 205 DRM_ERROR("Get engine clk failed.\n"); 206 err = PTR_ERR(mdev->aclk); 207 mdev->aclk = NULL; 208 goto err_cleanup; 209 } 210 211 clk_prepare_enable(mdev->aclk); 212 213 mdev->funcs = product->identify(mdev->reg_base, &mdev->chip); 214 if (!komeda_product_match(mdev, product->product_id)) { 215 DRM_ERROR("DT configured %x mismatch with real HW %x.\n", 216 product->product_id, 217 MALIDP_CORE_ID_PRODUCT_ID(mdev->chip.core_id)); 218 err = -ENODEV; 219 goto err_cleanup; 220 } 221 222 DRM_INFO("Found ARM Mali-D%x version r%dp%d\n", 223 MALIDP_CORE_ID_PRODUCT_ID(mdev->chip.core_id), 224 MALIDP_CORE_ID_MAJOR(mdev->chip.core_id), 225 MALIDP_CORE_ID_MINOR(mdev->chip.core_id)); 226 227 mdev->funcs->init_format_table(mdev); 228 229 err = mdev->funcs->enum_resources(mdev); 230 if (err) { 231 DRM_ERROR("enumerate display resource failed.\n"); 232 goto err_cleanup; 233 } 234 235 err = komeda_parse_dt(dev, mdev); 236 if (err) { 237 DRM_ERROR("parse device tree failed.\n"); 238 goto err_cleanup; 239 } 240 241 err = komeda_assemble_pipelines(mdev); 242 if (err) { 243 DRM_ERROR("assemble display pipelines failed.\n"); 244 goto err_cleanup; 245 } 246 247 dev->dma_parms = &mdev->dma_parms; 248 dma_set_max_seg_size(dev, DMA_BIT_MASK(32)); 249 250 mdev->iommu = iommu_get_domain_for_dev(mdev->dev); 251 if (!mdev->iommu) 252 DRM_INFO("continue without IOMMU support!\n"); 253 254 if (mdev->iommu && mdev->funcs->connect_iommu) { 255 err = mdev->funcs->connect_iommu(mdev); 256 if (err) { 257 mdev->iommu = NULL; 258 goto err_cleanup; 259 } 260 } 261 262 err = sysfs_create_group(&dev->kobj, &komeda_sysfs_attr_group); 263 if (err) { 264 DRM_ERROR("create sysfs group failed.\n"); 265 goto err_cleanup; 266 } 267 268 #ifdef CONFIG_DEBUG_FS 269 komeda_debugfs_init(mdev); 270 #endif 271 272 return mdev; 273 274 err_cleanup: 275 komeda_dev_destroy(mdev); 276 return ERR_PTR(err); 277 } 278 279 void komeda_dev_destroy(struct komeda_dev *mdev) 280 { 281 struct device *dev = mdev->dev; 282 const struct komeda_dev_funcs *funcs = mdev->funcs; 283 int i; 284 285 sysfs_remove_group(&dev->kobj, &komeda_sysfs_attr_group); 286 287 #ifdef CONFIG_DEBUG_FS 288 debugfs_remove_recursive(mdev->debugfs_root); 289 #endif 290 291 if (mdev->iommu && mdev->funcs->disconnect_iommu) 292 mdev->funcs->disconnect_iommu(mdev); 293 mdev->iommu = NULL; 294 295 for (i = 0; i < mdev->n_pipelines; i++) { 296 komeda_pipeline_destroy(mdev, mdev->pipelines[i]); 297 mdev->pipelines[i] = NULL; 298 } 299 300 mdev->n_pipelines = 0; 301 302 of_reserved_mem_device_release(dev); 303 304 if (funcs && funcs->cleanup) 305 funcs->cleanup(mdev); 306 307 if (mdev->reg_base) { 308 devm_iounmap(dev, mdev->reg_base); 309 mdev->reg_base = NULL; 310 } 311 312 if (mdev->aclk) { 313 clk_disable_unprepare(mdev->aclk); 314 devm_clk_put(dev, mdev->aclk); 315 mdev->aclk = NULL; 316 } 317 318 devm_kfree(dev, mdev); 319 } 320