1 // SPDX-License-Identifier: GPL-2.0
2 /*
3  * (C) COPYRIGHT 2018 ARM Limited. All rights reserved.
4  * Author: James.Qian.Wang <james.qian.wang@arm.com>
5  *
6  */
7 #include <linux/clk.h>
8 #include <linux/pm_runtime.h>
9 #include <linux/spinlock.h>
10 
11 #include <drm/drm_atomic.h>
12 #include <drm/drm_atomic_helper.h>
13 #include <drm/drm_print.h>
14 #include <drm/drm_vblank.h>
15 
16 #include "komeda_dev.h"
17 #include "komeda_kms.h"
18 
19 void komeda_crtc_get_color_config(struct drm_crtc_state *crtc_st,
20 				  u32 *color_depths, u32 *color_formats)
21 {
22 	struct drm_connector *conn;
23 	struct drm_connector_state *conn_st;
24 	u32 conn_color_formats = ~0u;
25 	int i, min_bpc = 31, conn_bpc = 0;
26 
27 	for_each_new_connector_in_state(crtc_st->state, conn, conn_st, i) {
28 		if (conn_st->crtc != crtc_st->crtc)
29 			continue;
30 
31 		conn_bpc = conn->display_info.bpc ? conn->display_info.bpc : 8;
32 		conn_color_formats &= conn->display_info.color_formats;
33 
34 		if (conn_bpc < min_bpc)
35 			min_bpc = conn_bpc;
36 	}
37 
38 	/* connector doesn't config any color_format, use RGB444 as default */
39 	if (!conn_color_formats)
40 		conn_color_formats = DRM_COLOR_FORMAT_RGB444;
41 
42 	*color_depths = GENMASK(min_bpc, 0);
43 	*color_formats = conn_color_formats;
44 }
45 
46 static void komeda_crtc_update_clock_ratio(struct komeda_crtc_state *kcrtc_st)
47 {
48 	u64 pxlclk, aclk;
49 
50 	if (!kcrtc_st->base.active) {
51 		kcrtc_st->clock_ratio = 0;
52 		return;
53 	}
54 
55 	pxlclk = kcrtc_st->base.adjusted_mode.crtc_clock * 1000ULL;
56 	aclk = komeda_crtc_get_aclk(kcrtc_st);
57 
58 	kcrtc_st->clock_ratio = div64_u64(aclk << 32, pxlclk);
59 }
60 
61 /**
62  * komeda_crtc_atomic_check - build display output data flow
63  * @crtc: DRM crtc
64  * @state: the crtc state object
65  *
66  * crtc_atomic_check is the final check stage, so beside build a display data
67  * pipeline according to the crtc_state, but still needs to release or disable
68  * the unclaimed pipeline resources.
69  *
70  * RETURNS:
71  * Zero for success or -errno
72  */
73 static int
74 komeda_crtc_atomic_check(struct drm_crtc *crtc,
75 			 struct drm_atomic_state *state)
76 {
77 	struct drm_crtc_state *crtc_state = drm_atomic_get_new_crtc_state(state,
78 									  crtc);
79 	struct komeda_crtc *kcrtc = to_kcrtc(crtc);
80 	struct komeda_crtc_state *kcrtc_st = to_kcrtc_st(crtc_state);
81 	int err;
82 
83 	if (drm_atomic_crtc_needs_modeset(crtc_state))
84 		komeda_crtc_update_clock_ratio(kcrtc_st);
85 
86 	if (crtc_state->active) {
87 		err = komeda_build_display_data_flow(kcrtc, kcrtc_st);
88 		if (err)
89 			return err;
90 	}
91 
92 	/* release unclaimed pipeline resources */
93 	err = komeda_release_unclaimed_resources(kcrtc->slave, kcrtc_st);
94 	if (err)
95 		return err;
96 
97 	err = komeda_release_unclaimed_resources(kcrtc->master, kcrtc_st);
98 	if (err)
99 		return err;
100 
101 	return 0;
102 }
103 
104 /* For active a crtc, mainly need two parts of preparation
105  * 1. adjust display operation mode.
106  * 2. enable needed clk
107  */
108 static int
109 komeda_crtc_prepare(struct komeda_crtc *kcrtc)
110 {
111 	struct komeda_dev *mdev = kcrtc->base.dev->dev_private;
112 	struct komeda_pipeline *master = kcrtc->master;
113 	struct komeda_crtc_state *kcrtc_st = to_kcrtc_st(kcrtc->base.state);
114 	struct drm_display_mode *mode = &kcrtc_st->base.adjusted_mode;
115 	u32 new_mode;
116 	int err;
117 
118 	mutex_lock(&mdev->lock);
119 
120 	new_mode = mdev->dpmode | BIT(master->id);
121 	if (WARN_ON(new_mode == mdev->dpmode)) {
122 		err = 0;
123 		goto unlock;
124 	}
125 
126 	err = mdev->funcs->change_opmode(mdev, new_mode);
127 	if (err) {
128 		DRM_ERROR("failed to change opmode: 0x%x -> 0x%x.\n,",
129 			  mdev->dpmode, new_mode);
130 		goto unlock;
131 	}
132 
133 	mdev->dpmode = new_mode;
134 	/* Only need to enable aclk on single display mode, but no need to
135 	 * enable aclk it on dual display mode, since the dual mode always
136 	 * switch from single display mode, the aclk already enabled, no need
137 	 * to enable it again.
138 	 */
139 	if (new_mode != KOMEDA_MODE_DUAL_DISP) {
140 		err = clk_set_rate(mdev->aclk, komeda_crtc_get_aclk(kcrtc_st));
141 		if (err)
142 			DRM_ERROR("failed to set aclk.\n");
143 		err = clk_prepare_enable(mdev->aclk);
144 		if (err)
145 			DRM_ERROR("failed to enable aclk.\n");
146 	}
147 
148 	err = clk_set_rate(master->pxlclk, mode->crtc_clock * 1000);
149 	if (err)
150 		DRM_ERROR("failed to set pxlclk for pipe%d\n", master->id);
151 	err = clk_prepare_enable(master->pxlclk);
152 	if (err)
153 		DRM_ERROR("failed to enable pxl clk for pipe%d.\n", master->id);
154 
155 unlock:
156 	mutex_unlock(&mdev->lock);
157 
158 	return err;
159 }
160 
161 static int
162 komeda_crtc_unprepare(struct komeda_crtc *kcrtc)
163 {
164 	struct komeda_dev *mdev = kcrtc->base.dev->dev_private;
165 	struct komeda_pipeline *master = kcrtc->master;
166 	u32 new_mode;
167 	int err;
168 
169 	mutex_lock(&mdev->lock);
170 
171 	new_mode = mdev->dpmode & (~BIT(master->id));
172 
173 	if (WARN_ON(new_mode == mdev->dpmode)) {
174 		err = 0;
175 		goto unlock;
176 	}
177 
178 	err = mdev->funcs->change_opmode(mdev, new_mode);
179 	if (err) {
180 		DRM_ERROR("failed to change opmode: 0x%x -> 0x%x.\n,",
181 			  mdev->dpmode, new_mode);
182 		goto unlock;
183 	}
184 
185 	mdev->dpmode = new_mode;
186 
187 	clk_disable_unprepare(master->pxlclk);
188 	if (new_mode == KOMEDA_MODE_INACTIVE)
189 		clk_disable_unprepare(mdev->aclk);
190 
191 unlock:
192 	mutex_unlock(&mdev->lock);
193 
194 	return err;
195 }
196 
197 void komeda_crtc_handle_event(struct komeda_crtc   *kcrtc,
198 			      struct komeda_events *evts)
199 {
200 	struct drm_crtc *crtc = &kcrtc->base;
201 	u32 events = evts->pipes[kcrtc->master->id];
202 
203 	if (events & KOMEDA_EVENT_VSYNC)
204 		drm_crtc_handle_vblank(crtc);
205 
206 	if (events & KOMEDA_EVENT_EOW) {
207 		struct komeda_wb_connector *wb_conn = kcrtc->wb_conn;
208 
209 		if (wb_conn)
210 			drm_writeback_signal_completion(&wb_conn->base, 0);
211 		else
212 			DRM_WARN("CRTC[%d]: EOW happen but no wb_connector.\n",
213 				 drm_crtc_index(&kcrtc->base));
214 	}
215 	/* will handle it together with the write back support */
216 	if (events & KOMEDA_EVENT_EOW)
217 		DRM_DEBUG("EOW.\n");
218 
219 	if (events & KOMEDA_EVENT_FLIP) {
220 		unsigned long flags;
221 		struct drm_pending_vblank_event *event;
222 
223 		spin_lock_irqsave(&crtc->dev->event_lock, flags);
224 		if (kcrtc->disable_done) {
225 			complete_all(kcrtc->disable_done);
226 			kcrtc->disable_done = NULL;
227 		} else if (crtc->state->event) {
228 			event = crtc->state->event;
229 			/*
230 			 * Consume event before notifying drm core that flip
231 			 * happened.
232 			 */
233 			crtc->state->event = NULL;
234 			drm_crtc_send_vblank_event(crtc, event);
235 		} else {
236 			DRM_WARN("CRTC[%d]: FLIP happened but no pending commit.\n",
237 				 drm_crtc_index(&kcrtc->base));
238 		}
239 		spin_unlock_irqrestore(&crtc->dev->event_lock, flags);
240 	}
241 }
242 
243 static void
244 komeda_crtc_do_flush(struct drm_crtc *crtc,
245 		     struct drm_crtc_state *old)
246 {
247 	struct komeda_crtc *kcrtc = to_kcrtc(crtc);
248 	struct komeda_crtc_state *kcrtc_st = to_kcrtc_st(crtc->state);
249 	struct komeda_dev *mdev = kcrtc->base.dev->dev_private;
250 	struct komeda_pipeline *master = kcrtc->master;
251 	struct komeda_pipeline *slave = kcrtc->slave;
252 	struct komeda_wb_connector *wb_conn = kcrtc->wb_conn;
253 	struct drm_connector_state *conn_st;
254 
255 	DRM_DEBUG_ATOMIC("CRTC%d_FLUSH: active_pipes: 0x%x, affected: 0x%x.\n",
256 			 drm_crtc_index(crtc),
257 			 kcrtc_st->active_pipes, kcrtc_st->affected_pipes);
258 
259 	/* step 1: update the pipeline/component state to HW */
260 	if (has_bit(master->id, kcrtc_st->affected_pipes))
261 		komeda_pipeline_update(master, old->state);
262 
263 	if (slave && has_bit(slave->id, kcrtc_st->affected_pipes))
264 		komeda_pipeline_update(slave, old->state);
265 
266 	conn_st = wb_conn ? wb_conn->base.base.state : NULL;
267 	if (conn_st && conn_st->writeback_job)
268 		drm_writeback_queue_job(&wb_conn->base, conn_st);
269 
270 	/* step 2: notify the HW to kickoff the update */
271 	mdev->funcs->flush(mdev, master->id, kcrtc_st->active_pipes);
272 }
273 
274 static void
275 komeda_crtc_atomic_enable(struct drm_crtc *crtc,
276 			  struct drm_atomic_state *state)
277 {
278 	struct drm_crtc_state *old = drm_atomic_get_old_crtc_state(state,
279 								   crtc);
280 	pm_runtime_get_sync(crtc->dev->dev);
281 	komeda_crtc_prepare(to_kcrtc(crtc));
282 	drm_crtc_vblank_on(crtc);
283 	WARN_ON(drm_crtc_vblank_get(crtc));
284 	komeda_crtc_do_flush(crtc, old);
285 }
286 
287 void
288 komeda_crtc_flush_and_wait_for_flip_done(struct komeda_crtc *kcrtc,
289 					 struct completion *input_flip_done)
290 {
291 	struct drm_device *drm = kcrtc->base.dev;
292 	struct komeda_dev *mdev = kcrtc->master->mdev;
293 	struct completion *flip_done;
294 	struct completion temp;
295 	int timeout;
296 
297 	/* if caller doesn't send a flip_done, use a private flip_done */
298 	if (input_flip_done) {
299 		flip_done = input_flip_done;
300 	} else {
301 		init_completion(&temp);
302 		kcrtc->disable_done = &temp;
303 		flip_done = &temp;
304 	}
305 
306 	mdev->funcs->flush(mdev, kcrtc->master->id, 0);
307 
308 	/* wait the flip take affect.*/
309 	timeout = wait_for_completion_timeout(flip_done, HZ);
310 	if (timeout == 0) {
311 		DRM_ERROR("wait pipe%d flip done timeout\n", kcrtc->master->id);
312 		if (!input_flip_done) {
313 			unsigned long flags;
314 
315 			spin_lock_irqsave(&drm->event_lock, flags);
316 			kcrtc->disable_done = NULL;
317 			spin_unlock_irqrestore(&drm->event_lock, flags);
318 		}
319 	}
320 }
321 
322 static void
323 komeda_crtc_atomic_disable(struct drm_crtc *crtc,
324 			   struct drm_atomic_state *state)
325 {
326 	struct drm_crtc_state *old = drm_atomic_get_old_crtc_state(state,
327 								   crtc);
328 	struct komeda_crtc *kcrtc = to_kcrtc(crtc);
329 	struct komeda_crtc_state *old_st = to_kcrtc_st(old);
330 	struct komeda_pipeline *master = kcrtc->master;
331 	struct komeda_pipeline *slave  = kcrtc->slave;
332 	struct completion *disable_done;
333 	bool needs_phase2 = false;
334 
335 	DRM_DEBUG_ATOMIC("CRTC%d_DISABLE: active_pipes: 0x%x, affected: 0x%x\n",
336 			 drm_crtc_index(crtc),
337 			 old_st->active_pipes, old_st->affected_pipes);
338 
339 	if (slave && has_bit(slave->id, old_st->active_pipes))
340 		komeda_pipeline_disable(slave, old->state);
341 
342 	if (has_bit(master->id, old_st->active_pipes))
343 		needs_phase2 = komeda_pipeline_disable(master, old->state);
344 
345 	/* crtc_disable has two scenarios according to the state->active switch.
346 	 * 1. active -> inactive
347 	 *    this commit is a disable commit. and the commit will be finished
348 	 *    or done after the disable operation. on this case we can directly
349 	 *    use the crtc->state->event to tracking the HW disable operation.
350 	 * 2. active -> active
351 	 *    the crtc->commit is not for disable, but a modeset operation when
352 	 *    crtc is active, such commit actually has been completed by 3
353 	 *    DRM operations:
354 	 *    crtc_disable, update_planes(crtc_flush), crtc_enable
355 	 *    so on this case the crtc->commit is for the whole process.
356 	 *    we can not use it for tracing the disable, we need a temporary
357 	 *    flip_done for tracing the disable. and crtc->state->event for
358 	 *    the crtc_enable operation.
359 	 *    That's also the reason why skip modeset commit in
360 	 *    komeda_crtc_atomic_flush()
361 	 */
362 	disable_done = (needs_phase2 || crtc->state->active) ?
363 		       NULL : &crtc->state->commit->flip_done;
364 
365 	/* wait phase 1 disable done */
366 	komeda_crtc_flush_and_wait_for_flip_done(kcrtc, disable_done);
367 
368 	/* phase 2 */
369 	if (needs_phase2) {
370 		komeda_pipeline_disable(kcrtc->master, old->state);
371 
372 		disable_done = crtc->state->active ?
373 			       NULL : &crtc->state->commit->flip_done;
374 
375 		komeda_crtc_flush_and_wait_for_flip_done(kcrtc, disable_done);
376 	}
377 
378 	drm_crtc_vblank_put(crtc);
379 	drm_crtc_vblank_off(crtc);
380 	komeda_crtc_unprepare(kcrtc);
381 	pm_runtime_put(crtc->dev->dev);
382 }
383 
384 static void
385 komeda_crtc_atomic_flush(struct drm_crtc *crtc,
386 			 struct drm_atomic_state *state)
387 {
388 	struct drm_crtc_state *crtc_state = drm_atomic_get_new_crtc_state(state,
389 									  crtc);
390 	struct drm_crtc_state *old = drm_atomic_get_old_crtc_state(state,
391 								   crtc);
392 	/* commit with modeset will be handled in enable/disable */
393 	if (drm_atomic_crtc_needs_modeset(crtc_state))
394 		return;
395 
396 	komeda_crtc_do_flush(crtc, old);
397 }
398 
399 /* Returns the minimum frequency of the aclk rate (main engine clock) in Hz */
400 static unsigned long
401 komeda_calc_min_aclk_rate(struct komeda_crtc *kcrtc,
402 			  unsigned long pxlclk)
403 {
404 	/* Once dual-link one display pipeline drives two display outputs,
405 	 * the aclk needs run on the double rate of pxlclk
406 	 */
407 	if (kcrtc->master->dual_link)
408 		return pxlclk * 2;
409 	else
410 		return pxlclk;
411 }
412 
413 /* Get current aclk rate that specified by state */
414 unsigned long komeda_crtc_get_aclk(struct komeda_crtc_state *kcrtc_st)
415 {
416 	struct drm_crtc *crtc = kcrtc_st->base.crtc;
417 	struct komeda_dev *mdev = crtc->dev->dev_private;
418 	unsigned long pxlclk = kcrtc_st->base.adjusted_mode.crtc_clock * 1000;
419 	unsigned long min_aclk;
420 
421 	min_aclk = komeda_calc_min_aclk_rate(to_kcrtc(crtc), pxlclk);
422 
423 	return clk_round_rate(mdev->aclk, min_aclk);
424 }
425 
426 static enum drm_mode_status
427 komeda_crtc_mode_valid(struct drm_crtc *crtc, const struct drm_display_mode *m)
428 {
429 	struct komeda_dev *mdev = crtc->dev->dev_private;
430 	struct komeda_crtc *kcrtc = to_kcrtc(crtc);
431 	struct komeda_pipeline *master = kcrtc->master;
432 	unsigned long min_pxlclk, min_aclk;
433 
434 	if (m->flags & DRM_MODE_FLAG_INTERLACE)
435 		return MODE_NO_INTERLACE;
436 
437 	min_pxlclk = m->clock * 1000;
438 	if (master->dual_link)
439 		min_pxlclk /= 2;
440 
441 	if (min_pxlclk != clk_round_rate(master->pxlclk, min_pxlclk)) {
442 		DRM_DEBUG_ATOMIC("pxlclk doesn't support %lu Hz\n", min_pxlclk);
443 
444 		return MODE_NOCLOCK;
445 	}
446 
447 	min_aclk = komeda_calc_min_aclk_rate(to_kcrtc(crtc), min_pxlclk);
448 	if (clk_round_rate(mdev->aclk, min_aclk) < min_aclk) {
449 		DRM_DEBUG_ATOMIC("engine clk can't satisfy the requirement of %s-clk: %lu.\n",
450 				 m->name, min_pxlclk);
451 
452 		return MODE_CLOCK_HIGH;
453 	}
454 
455 	return MODE_OK;
456 }
457 
458 static bool komeda_crtc_mode_fixup(struct drm_crtc *crtc,
459 				   const struct drm_display_mode *m,
460 				   struct drm_display_mode *adjusted_mode)
461 {
462 	struct komeda_crtc *kcrtc = to_kcrtc(crtc);
463 	unsigned long clk_rate;
464 
465 	drm_mode_set_crtcinfo(adjusted_mode, 0);
466 	/* In dual link half the horizontal settings */
467 	if (kcrtc->master->dual_link) {
468 		adjusted_mode->crtc_clock /= 2;
469 		adjusted_mode->crtc_hdisplay /= 2;
470 		adjusted_mode->crtc_hsync_start /= 2;
471 		adjusted_mode->crtc_hsync_end /= 2;
472 		adjusted_mode->crtc_htotal /= 2;
473 	}
474 
475 	clk_rate = adjusted_mode->crtc_clock * 1000;
476 	/* crtc_clock will be used as the komeda output pixel clock */
477 	adjusted_mode->crtc_clock = clk_round_rate(kcrtc->master->pxlclk,
478 						   clk_rate) / 1000;
479 
480 	return true;
481 }
482 
483 static const struct drm_crtc_helper_funcs komeda_crtc_helper_funcs = {
484 	.atomic_check	= komeda_crtc_atomic_check,
485 	.atomic_flush	= komeda_crtc_atomic_flush,
486 	.atomic_enable	= komeda_crtc_atomic_enable,
487 	.atomic_disable	= komeda_crtc_atomic_disable,
488 	.mode_valid	= komeda_crtc_mode_valid,
489 	.mode_fixup	= komeda_crtc_mode_fixup,
490 };
491 
492 static void komeda_crtc_reset(struct drm_crtc *crtc)
493 {
494 	struct komeda_crtc_state *state;
495 
496 	if (crtc->state)
497 		__drm_atomic_helper_crtc_destroy_state(crtc->state);
498 
499 	kfree(to_kcrtc_st(crtc->state));
500 	crtc->state = NULL;
501 
502 	state = kzalloc(sizeof(*state), GFP_KERNEL);
503 	if (state)
504 		__drm_atomic_helper_crtc_reset(crtc, &state->base);
505 }
506 
507 static struct drm_crtc_state *
508 komeda_crtc_atomic_duplicate_state(struct drm_crtc *crtc)
509 {
510 	struct komeda_crtc_state *old = to_kcrtc_st(crtc->state);
511 	struct komeda_crtc_state *new;
512 
513 	new = kzalloc(sizeof(*new), GFP_KERNEL);
514 	if (!new)
515 		return NULL;
516 
517 	__drm_atomic_helper_crtc_duplicate_state(crtc, &new->base);
518 
519 	new->affected_pipes = old->active_pipes;
520 	new->clock_ratio = old->clock_ratio;
521 	new->max_slave_zorder = old->max_slave_zorder;
522 
523 	return &new->base;
524 }
525 
526 static void komeda_crtc_atomic_destroy_state(struct drm_crtc *crtc,
527 					     struct drm_crtc_state *state)
528 {
529 	__drm_atomic_helper_crtc_destroy_state(state);
530 	kfree(to_kcrtc_st(state));
531 }
532 
533 static int komeda_crtc_vblank_enable(struct drm_crtc *crtc)
534 {
535 	struct komeda_dev *mdev = crtc->dev->dev_private;
536 	struct komeda_crtc *kcrtc = to_kcrtc(crtc);
537 
538 	mdev->funcs->on_off_vblank(mdev, kcrtc->master->id, true);
539 	return 0;
540 }
541 
542 static void komeda_crtc_vblank_disable(struct drm_crtc *crtc)
543 {
544 	struct komeda_dev *mdev = crtc->dev->dev_private;
545 	struct komeda_crtc *kcrtc = to_kcrtc(crtc);
546 
547 	mdev->funcs->on_off_vblank(mdev, kcrtc->master->id, false);
548 }
549 
550 static const struct drm_crtc_funcs komeda_crtc_funcs = {
551 	.destroy		= drm_crtc_cleanup,
552 	.set_config		= drm_atomic_helper_set_config,
553 	.page_flip		= drm_atomic_helper_page_flip,
554 	.reset			= komeda_crtc_reset,
555 	.atomic_duplicate_state	= komeda_crtc_atomic_duplicate_state,
556 	.atomic_destroy_state	= komeda_crtc_atomic_destroy_state,
557 	.enable_vblank		= komeda_crtc_vblank_enable,
558 	.disable_vblank		= komeda_crtc_vblank_disable,
559 };
560 
561 int komeda_kms_setup_crtcs(struct komeda_kms_dev *kms,
562 			   struct komeda_dev *mdev)
563 {
564 	struct komeda_crtc *crtc;
565 	struct komeda_pipeline *master;
566 	char str[16];
567 	int i;
568 
569 	kms->n_crtcs = 0;
570 
571 	for (i = 0; i < mdev->n_pipelines; i++) {
572 		crtc = &kms->crtcs[kms->n_crtcs];
573 		master = mdev->pipelines[i];
574 
575 		crtc->master = master;
576 		crtc->slave  = komeda_pipeline_get_slave(master);
577 
578 		if (crtc->slave)
579 			sprintf(str, "pipe-%d", crtc->slave->id);
580 		else
581 			sprintf(str, "None");
582 
583 		DRM_INFO("CRTC-%d: master(pipe-%d) slave(%s).\n",
584 			 kms->n_crtcs, master->id, str);
585 
586 		kms->n_crtcs++;
587 	}
588 
589 	return 0;
590 }
591 
592 static struct drm_plane *
593 get_crtc_primary(struct komeda_kms_dev *kms, struct komeda_crtc *crtc)
594 {
595 	struct komeda_plane *kplane;
596 	struct drm_plane *plane;
597 
598 	drm_for_each_plane(plane, &kms->base) {
599 		if (plane->type != DRM_PLANE_TYPE_PRIMARY)
600 			continue;
601 
602 		kplane = to_kplane(plane);
603 		/* only master can be primary */
604 		if (kplane->layer->base.pipeline == crtc->master)
605 			return plane;
606 	}
607 
608 	return NULL;
609 }
610 
611 static int komeda_crtc_add(struct komeda_kms_dev *kms,
612 			   struct komeda_crtc *kcrtc)
613 {
614 	struct drm_crtc *crtc = &kcrtc->base;
615 	int err;
616 
617 	err = drm_crtc_init_with_planes(&kms->base, crtc,
618 					get_crtc_primary(kms, kcrtc), NULL,
619 					&komeda_crtc_funcs, NULL);
620 	if (err)
621 		return err;
622 
623 	drm_crtc_helper_add(crtc, &komeda_crtc_helper_funcs);
624 
625 	crtc->port = kcrtc->master->of_output_port;
626 
627 	drm_crtc_enable_color_mgmt(crtc, 0, true, KOMEDA_COLOR_LUT_SIZE);
628 
629 	return err;
630 }
631 
632 int komeda_kms_add_crtcs(struct komeda_kms_dev *kms, struct komeda_dev *mdev)
633 {
634 	int i, err;
635 
636 	for (i = 0; i < kms->n_crtcs; i++) {
637 		err = komeda_crtc_add(kms, &kms->crtcs[i]);
638 		if (err)
639 			return err;
640 	}
641 
642 	return 0;
643 }
644