1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * (C) COPYRIGHT 2018 ARM Limited. All rights reserved. 4 * Author: James.Qian.Wang <james.qian.wang@arm.com> 5 * 6 */ 7 #include <linux/clk.h> 8 #include <linux/spinlock.h> 9 10 #include <drm/drm_atomic.h> 11 #include <drm/drm_atomic_helper.h> 12 #include <drm/drm_crtc_helper.h> 13 #include <drm/drm_plane_helper.h> 14 #include <drm/drm_print.h> 15 #include <drm/drm_vblank.h> 16 17 #include "komeda_dev.h" 18 #include "komeda_kms.h" 19 20 static void komeda_crtc_update_clock_ratio(struct komeda_crtc_state *kcrtc_st) 21 { 22 u64 pxlclk, aclk; 23 24 if (!kcrtc_st->base.active) { 25 kcrtc_st->clock_ratio = 0; 26 return; 27 } 28 29 pxlclk = kcrtc_st->base.adjusted_mode.crtc_clock * 1000ULL; 30 aclk = komeda_crtc_get_aclk(kcrtc_st); 31 32 kcrtc_st->clock_ratio = div64_u64(aclk << 32, pxlclk); 33 } 34 35 /** 36 * komeda_crtc_atomic_check - build display output data flow 37 * @crtc: DRM crtc 38 * @state: the crtc state object 39 * 40 * crtc_atomic_check is the final check stage, so beside build a display data 41 * pipeline according to the crtc_state, but still needs to release or disable 42 * the unclaimed pipeline resources. 43 * 44 * RETURNS: 45 * Zero for success or -errno 46 */ 47 static int 48 komeda_crtc_atomic_check(struct drm_crtc *crtc, 49 struct drm_crtc_state *state) 50 { 51 struct komeda_crtc *kcrtc = to_kcrtc(crtc); 52 struct komeda_crtc_state *kcrtc_st = to_kcrtc_st(state); 53 int err; 54 55 if (drm_atomic_crtc_needs_modeset(state)) 56 komeda_crtc_update_clock_ratio(kcrtc_st); 57 58 if (state->active) { 59 err = komeda_build_display_data_flow(kcrtc, kcrtc_st); 60 if (err) 61 return err; 62 } 63 64 /* release unclaimed pipeline resources */ 65 err = komeda_release_unclaimed_resources(kcrtc->slave, kcrtc_st); 66 if (err) 67 return err; 68 69 err = komeda_release_unclaimed_resources(kcrtc->master, kcrtc_st); 70 if (err) 71 return err; 72 73 return 0; 74 } 75 76 /* For active a crtc, mainly need two parts of preparation 77 * 1. adjust display operation mode. 78 * 2. enable needed clk 79 */ 80 static int 81 komeda_crtc_prepare(struct komeda_crtc *kcrtc) 82 { 83 struct komeda_dev *mdev = kcrtc->base.dev->dev_private; 84 struct komeda_pipeline *master = kcrtc->master; 85 struct komeda_crtc_state *kcrtc_st = to_kcrtc_st(kcrtc->base.state); 86 struct drm_display_mode *mode = &kcrtc_st->base.adjusted_mode; 87 u32 new_mode; 88 int err; 89 90 mutex_lock(&mdev->lock); 91 92 new_mode = mdev->dpmode | BIT(master->id); 93 if (WARN_ON(new_mode == mdev->dpmode)) { 94 err = 0; 95 goto unlock; 96 } 97 98 err = mdev->funcs->change_opmode(mdev, new_mode); 99 if (err) { 100 DRM_ERROR("failed to change opmode: 0x%x -> 0x%x.\n,", 101 mdev->dpmode, new_mode); 102 goto unlock; 103 } 104 105 mdev->dpmode = new_mode; 106 /* Only need to enable aclk on single display mode, but no need to 107 * enable aclk it on dual display mode, since the dual mode always 108 * switch from single display mode, the aclk already enabled, no need 109 * to enable it again. 110 */ 111 if (new_mode != KOMEDA_MODE_DUAL_DISP) { 112 err = clk_set_rate(mdev->aclk, komeda_crtc_get_aclk(kcrtc_st)); 113 if (err) 114 DRM_ERROR("failed to set aclk.\n"); 115 err = clk_prepare_enable(mdev->aclk); 116 if (err) 117 DRM_ERROR("failed to enable aclk.\n"); 118 } 119 120 err = clk_set_rate(master->pxlclk, mode->crtc_clock * 1000); 121 if (err) 122 DRM_ERROR("failed to set pxlclk for pipe%d\n", master->id); 123 err = clk_prepare_enable(master->pxlclk); 124 if (err) 125 DRM_ERROR("failed to enable pxl clk for pipe%d.\n", master->id); 126 127 unlock: 128 mutex_unlock(&mdev->lock); 129 130 return err; 131 } 132 133 static int 134 komeda_crtc_unprepare(struct komeda_crtc *kcrtc) 135 { 136 struct komeda_dev *mdev = kcrtc->base.dev->dev_private; 137 struct komeda_pipeline *master = kcrtc->master; 138 u32 new_mode; 139 int err; 140 141 mutex_lock(&mdev->lock); 142 143 new_mode = mdev->dpmode & (~BIT(master->id)); 144 145 if (WARN_ON(new_mode == mdev->dpmode)) { 146 err = 0; 147 goto unlock; 148 } 149 150 err = mdev->funcs->change_opmode(mdev, new_mode); 151 if (err) { 152 DRM_ERROR("failed to change opmode: 0x%x -> 0x%x.\n,", 153 mdev->dpmode, new_mode); 154 goto unlock; 155 } 156 157 mdev->dpmode = new_mode; 158 159 clk_disable_unprepare(master->pxlclk); 160 if (new_mode == KOMEDA_MODE_INACTIVE) 161 clk_disable_unprepare(mdev->aclk); 162 163 unlock: 164 mutex_unlock(&mdev->lock); 165 166 return err; 167 } 168 169 void komeda_crtc_handle_event(struct komeda_crtc *kcrtc, 170 struct komeda_events *evts) 171 { 172 struct drm_crtc *crtc = &kcrtc->base; 173 u32 events = evts->pipes[kcrtc->master->id]; 174 175 if (events & KOMEDA_EVENT_VSYNC) 176 drm_crtc_handle_vblank(crtc); 177 178 if (events & KOMEDA_EVENT_EOW) { 179 struct komeda_wb_connector *wb_conn = kcrtc->wb_conn; 180 181 if (wb_conn) 182 drm_writeback_signal_completion(&wb_conn->base, 0); 183 else 184 DRM_WARN("CRTC[%d]: EOW happen but no wb_connector.\n", 185 drm_crtc_index(&kcrtc->base)); 186 } 187 /* will handle it together with the write back support */ 188 if (events & KOMEDA_EVENT_EOW) 189 DRM_DEBUG("EOW.\n"); 190 191 if (events & KOMEDA_EVENT_FLIP) { 192 unsigned long flags; 193 struct drm_pending_vblank_event *event; 194 195 spin_lock_irqsave(&crtc->dev->event_lock, flags); 196 if (kcrtc->disable_done) { 197 complete_all(kcrtc->disable_done); 198 kcrtc->disable_done = NULL; 199 } else if (crtc->state->event) { 200 event = crtc->state->event; 201 /* 202 * Consume event before notifying drm core that flip 203 * happened. 204 */ 205 crtc->state->event = NULL; 206 drm_crtc_send_vblank_event(crtc, event); 207 } else { 208 DRM_WARN("CRTC[%d]: FLIP happen but no pending commit.\n", 209 drm_crtc_index(&kcrtc->base)); 210 } 211 spin_unlock_irqrestore(&crtc->dev->event_lock, flags); 212 } 213 } 214 215 static void 216 komeda_crtc_do_flush(struct drm_crtc *crtc, 217 struct drm_crtc_state *old) 218 { 219 struct komeda_crtc *kcrtc = to_kcrtc(crtc); 220 struct komeda_crtc_state *kcrtc_st = to_kcrtc_st(crtc->state); 221 struct komeda_dev *mdev = kcrtc->base.dev->dev_private; 222 struct komeda_pipeline *master = kcrtc->master; 223 struct komeda_pipeline *slave = kcrtc->slave; 224 struct komeda_wb_connector *wb_conn = kcrtc->wb_conn; 225 struct drm_connector_state *conn_st; 226 227 DRM_DEBUG_ATOMIC("CRTC%d_FLUSH: active_pipes: 0x%x, affected: 0x%x.\n", 228 drm_crtc_index(crtc), 229 kcrtc_st->active_pipes, kcrtc_st->affected_pipes); 230 231 /* step 1: update the pipeline/component state to HW */ 232 if (has_bit(master->id, kcrtc_st->affected_pipes)) 233 komeda_pipeline_update(master, old->state); 234 235 if (slave && has_bit(slave->id, kcrtc_st->affected_pipes)) 236 komeda_pipeline_update(slave, old->state); 237 238 conn_st = wb_conn ? wb_conn->base.base.state : NULL; 239 if (conn_st && conn_st->writeback_job) 240 drm_writeback_queue_job(&wb_conn->base, conn_st); 241 242 /* step 2: notify the HW to kickoff the update */ 243 mdev->funcs->flush(mdev, master->id, kcrtc_st->active_pipes); 244 } 245 246 static void 247 komeda_crtc_atomic_enable(struct drm_crtc *crtc, 248 struct drm_crtc_state *old) 249 { 250 komeda_crtc_prepare(to_kcrtc(crtc)); 251 drm_crtc_vblank_on(crtc); 252 WARN_ON(drm_crtc_vblank_get(crtc)); 253 komeda_crtc_do_flush(crtc, old); 254 } 255 256 static void 257 komeda_crtc_flush_and_wait_for_flip_done(struct komeda_crtc *kcrtc, 258 struct completion *input_flip_done) 259 { 260 struct drm_device *drm = kcrtc->base.dev; 261 struct komeda_dev *mdev = kcrtc->master->mdev; 262 struct completion *flip_done; 263 struct completion temp; 264 int timeout; 265 266 /* if caller doesn't send a flip_done, use a private flip_done */ 267 if (input_flip_done) { 268 flip_done = input_flip_done; 269 } else { 270 init_completion(&temp); 271 kcrtc->disable_done = &temp; 272 flip_done = &temp; 273 } 274 275 mdev->funcs->flush(mdev, kcrtc->master->id, 0); 276 277 /* wait the flip take affect.*/ 278 timeout = wait_for_completion_timeout(flip_done, HZ); 279 if (timeout == 0) { 280 DRM_ERROR("wait pipe%d flip done timeout\n", kcrtc->master->id); 281 if (!input_flip_done) { 282 unsigned long flags; 283 284 spin_lock_irqsave(&drm->event_lock, flags); 285 kcrtc->disable_done = NULL; 286 spin_unlock_irqrestore(&drm->event_lock, flags); 287 } 288 } 289 } 290 291 static void 292 komeda_crtc_atomic_disable(struct drm_crtc *crtc, 293 struct drm_crtc_state *old) 294 { 295 struct komeda_crtc *kcrtc = to_kcrtc(crtc); 296 struct komeda_crtc_state *old_st = to_kcrtc_st(old); 297 struct komeda_pipeline *master = kcrtc->master; 298 struct komeda_pipeline *slave = kcrtc->slave; 299 struct completion *disable_done = &crtc->state->commit->flip_done; 300 bool needs_phase2 = false; 301 302 DRM_DEBUG_ATOMIC("CRTC%d_DISABLE: active_pipes: 0x%x, affected: 0x%x\n", 303 drm_crtc_index(crtc), 304 old_st->active_pipes, old_st->affected_pipes); 305 306 if (slave && has_bit(slave->id, old_st->active_pipes)) 307 komeda_pipeline_disable(slave, old->state); 308 309 if (has_bit(master->id, old_st->active_pipes)) 310 needs_phase2 = komeda_pipeline_disable(master, old->state); 311 312 /* crtc_disable has two scenarios according to the state->active switch. 313 * 1. active -> inactive 314 * this commit is a disable commit. and the commit will be finished 315 * or done after the disable operation. on this case we can directly 316 * use the crtc->state->event to tracking the HW disable operation. 317 * 2. active -> active 318 * the crtc->commit is not for disable, but a modeset operation when 319 * crtc is active, such commit actually has been completed by 3 320 * DRM operations: 321 * crtc_disable, update_planes(crtc_flush), crtc_enable 322 * so on this case the crtc->commit is for the whole process. 323 * we can not use it for tracing the disable, we need a temporary 324 * flip_done for tracing the disable. and crtc->state->event for 325 * the crtc_enable operation. 326 * That's also the reason why skip modeset commit in 327 * komeda_crtc_atomic_flush() 328 */ 329 disable_done = (needs_phase2 || crtc->state->active) ? 330 NULL : &crtc->state->commit->flip_done; 331 332 /* wait phase 1 disable done */ 333 komeda_crtc_flush_and_wait_for_flip_done(kcrtc, disable_done); 334 335 /* phase 2 */ 336 if (needs_phase2) { 337 komeda_pipeline_disable(kcrtc->master, old->state); 338 339 disable_done = crtc->state->active ? 340 NULL : &crtc->state->commit->flip_done; 341 342 komeda_crtc_flush_and_wait_for_flip_done(kcrtc, disable_done); 343 } 344 345 drm_crtc_vblank_put(crtc); 346 drm_crtc_vblank_off(crtc); 347 komeda_crtc_unprepare(kcrtc); 348 } 349 350 static void 351 komeda_crtc_atomic_flush(struct drm_crtc *crtc, 352 struct drm_crtc_state *old) 353 { 354 /* commit with modeset will be handled in enable/disable */ 355 if (drm_atomic_crtc_needs_modeset(crtc->state)) 356 return; 357 358 komeda_crtc_do_flush(crtc, old); 359 } 360 361 /* Returns the minimum frequency of the aclk rate (main engine clock) in Hz */ 362 static unsigned long 363 komeda_calc_min_aclk_rate(struct komeda_crtc *kcrtc, 364 unsigned long pxlclk) 365 { 366 /* Once dual-link one display pipeline drives two display outputs, 367 * the aclk needs run on the double rate of pxlclk 368 */ 369 if (kcrtc->master->dual_link) 370 return pxlclk * 2; 371 else 372 return pxlclk; 373 } 374 375 /* Get current aclk rate that specified by state */ 376 unsigned long komeda_crtc_get_aclk(struct komeda_crtc_state *kcrtc_st) 377 { 378 struct drm_crtc *crtc = kcrtc_st->base.crtc; 379 struct komeda_dev *mdev = crtc->dev->dev_private; 380 unsigned long pxlclk = kcrtc_st->base.adjusted_mode.crtc_clock * 1000; 381 unsigned long min_aclk; 382 383 min_aclk = komeda_calc_min_aclk_rate(to_kcrtc(crtc), pxlclk); 384 385 return clk_round_rate(mdev->aclk, min_aclk); 386 } 387 388 static enum drm_mode_status 389 komeda_crtc_mode_valid(struct drm_crtc *crtc, const struct drm_display_mode *m) 390 { 391 struct komeda_dev *mdev = crtc->dev->dev_private; 392 struct komeda_crtc *kcrtc = to_kcrtc(crtc); 393 struct komeda_pipeline *master = kcrtc->master; 394 unsigned long min_pxlclk, min_aclk; 395 396 if (m->flags & DRM_MODE_FLAG_INTERLACE) 397 return MODE_NO_INTERLACE; 398 399 min_pxlclk = m->clock * 1000; 400 if (master->dual_link) 401 min_pxlclk /= 2; 402 403 if (min_pxlclk != clk_round_rate(master->pxlclk, min_pxlclk)) { 404 DRM_DEBUG_ATOMIC("pxlclk doesn't support %lu Hz\n", min_pxlclk); 405 406 return MODE_NOCLOCK; 407 } 408 409 min_aclk = komeda_calc_min_aclk_rate(to_kcrtc(crtc), min_pxlclk); 410 if (clk_round_rate(mdev->aclk, min_aclk) < min_aclk) { 411 DRM_DEBUG_ATOMIC("engine clk can't satisfy the requirement of %s-clk: %lu.\n", 412 m->name, min_pxlclk); 413 414 return MODE_CLOCK_HIGH; 415 } 416 417 return MODE_OK; 418 } 419 420 static bool komeda_crtc_mode_fixup(struct drm_crtc *crtc, 421 const struct drm_display_mode *m, 422 struct drm_display_mode *adjusted_mode) 423 { 424 struct komeda_crtc *kcrtc = to_kcrtc(crtc); 425 unsigned long clk_rate; 426 427 drm_mode_set_crtcinfo(adjusted_mode, 0); 428 /* In dual link half the horizontal settings */ 429 if (kcrtc->master->dual_link) { 430 adjusted_mode->crtc_clock /= 2; 431 adjusted_mode->crtc_hdisplay /= 2; 432 adjusted_mode->crtc_hsync_start /= 2; 433 adjusted_mode->crtc_hsync_end /= 2; 434 adjusted_mode->crtc_htotal /= 2; 435 } 436 437 clk_rate = adjusted_mode->crtc_clock * 1000; 438 /* crtc_clock will be used as the komeda output pixel clock */ 439 adjusted_mode->crtc_clock = clk_round_rate(kcrtc->master->pxlclk, 440 clk_rate) / 1000; 441 442 return true; 443 } 444 445 static const struct drm_crtc_helper_funcs komeda_crtc_helper_funcs = { 446 .atomic_check = komeda_crtc_atomic_check, 447 .atomic_flush = komeda_crtc_atomic_flush, 448 .atomic_enable = komeda_crtc_atomic_enable, 449 .atomic_disable = komeda_crtc_atomic_disable, 450 .mode_valid = komeda_crtc_mode_valid, 451 .mode_fixup = komeda_crtc_mode_fixup, 452 }; 453 454 static void komeda_crtc_reset(struct drm_crtc *crtc) 455 { 456 struct komeda_crtc_state *state; 457 458 if (crtc->state) 459 __drm_atomic_helper_crtc_destroy_state(crtc->state); 460 461 kfree(to_kcrtc_st(crtc->state)); 462 crtc->state = NULL; 463 464 state = kzalloc(sizeof(*state), GFP_KERNEL); 465 if (state) { 466 crtc->state = &state->base; 467 crtc->state->crtc = crtc; 468 } 469 } 470 471 static struct drm_crtc_state * 472 komeda_crtc_atomic_duplicate_state(struct drm_crtc *crtc) 473 { 474 struct komeda_crtc_state *old = to_kcrtc_st(crtc->state); 475 struct komeda_crtc_state *new; 476 477 new = kzalloc(sizeof(*new), GFP_KERNEL); 478 if (!new) 479 return NULL; 480 481 __drm_atomic_helper_crtc_duplicate_state(crtc, &new->base); 482 483 new->affected_pipes = old->active_pipes; 484 new->clock_ratio = old->clock_ratio; 485 new->max_slave_zorder = old->max_slave_zorder; 486 487 return &new->base; 488 } 489 490 static void komeda_crtc_atomic_destroy_state(struct drm_crtc *crtc, 491 struct drm_crtc_state *state) 492 { 493 __drm_atomic_helper_crtc_destroy_state(state); 494 kfree(to_kcrtc_st(state)); 495 } 496 497 static int komeda_crtc_vblank_enable(struct drm_crtc *crtc) 498 { 499 struct komeda_dev *mdev = crtc->dev->dev_private; 500 struct komeda_crtc *kcrtc = to_kcrtc(crtc); 501 502 mdev->funcs->on_off_vblank(mdev, kcrtc->master->id, true); 503 return 0; 504 } 505 506 static void komeda_crtc_vblank_disable(struct drm_crtc *crtc) 507 { 508 struct komeda_dev *mdev = crtc->dev->dev_private; 509 struct komeda_crtc *kcrtc = to_kcrtc(crtc); 510 511 mdev->funcs->on_off_vblank(mdev, kcrtc->master->id, false); 512 } 513 514 static const struct drm_crtc_funcs komeda_crtc_funcs = { 515 .gamma_set = drm_atomic_helper_legacy_gamma_set, 516 .destroy = drm_crtc_cleanup, 517 .set_config = drm_atomic_helper_set_config, 518 .page_flip = drm_atomic_helper_page_flip, 519 .reset = komeda_crtc_reset, 520 .atomic_duplicate_state = komeda_crtc_atomic_duplicate_state, 521 .atomic_destroy_state = komeda_crtc_atomic_destroy_state, 522 .enable_vblank = komeda_crtc_vblank_enable, 523 .disable_vblank = komeda_crtc_vblank_disable, 524 }; 525 526 int komeda_kms_setup_crtcs(struct komeda_kms_dev *kms, 527 struct komeda_dev *mdev) 528 { 529 struct komeda_crtc *crtc; 530 struct komeda_pipeline *master; 531 char str[16]; 532 int i; 533 534 kms->n_crtcs = 0; 535 536 for (i = 0; i < mdev->n_pipelines; i++) { 537 crtc = &kms->crtcs[kms->n_crtcs]; 538 master = mdev->pipelines[i]; 539 540 crtc->master = master; 541 crtc->slave = komeda_pipeline_get_slave(master); 542 543 if (crtc->slave) 544 sprintf(str, "pipe-%d", crtc->slave->id); 545 else 546 sprintf(str, "None"); 547 548 DRM_INFO("CRTC-%d: master(pipe-%d) slave(%s).\n", 549 kms->n_crtcs, master->id, str); 550 551 kms->n_crtcs++; 552 } 553 554 return 0; 555 } 556 557 static struct drm_plane * 558 get_crtc_primary(struct komeda_kms_dev *kms, struct komeda_crtc *crtc) 559 { 560 struct komeda_plane *kplane; 561 struct drm_plane *plane; 562 563 drm_for_each_plane(plane, &kms->base) { 564 if (plane->type != DRM_PLANE_TYPE_PRIMARY) 565 continue; 566 567 kplane = to_kplane(plane); 568 /* only master can be primary */ 569 if (kplane->layer->base.pipeline == crtc->master) 570 return plane; 571 } 572 573 return NULL; 574 } 575 576 static int komeda_crtc_add(struct komeda_kms_dev *kms, 577 struct komeda_crtc *kcrtc) 578 { 579 struct drm_crtc *crtc = &kcrtc->base; 580 int err; 581 582 err = drm_crtc_init_with_planes(&kms->base, crtc, 583 get_crtc_primary(kms, kcrtc), NULL, 584 &komeda_crtc_funcs, NULL); 585 if (err) 586 return err; 587 588 drm_crtc_helper_add(crtc, &komeda_crtc_helper_funcs); 589 drm_crtc_vblank_reset(crtc); 590 591 crtc->port = kcrtc->master->of_output_port; 592 593 return err; 594 } 595 596 int komeda_kms_add_crtcs(struct komeda_kms_dev *kms, struct komeda_dev *mdev) 597 { 598 int i, err; 599 600 for (i = 0; i < kms->n_crtcs; i++) { 601 err = komeda_crtc_add(kms, &kms->crtcs[i]); 602 if (err) 603 return err; 604 } 605 606 return 0; 607 } 608