1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * (C) COPYRIGHT 2018 ARM Limited. All rights reserved. 4 * Author: James.Qian.Wang <james.qian.wang@arm.com> 5 * 6 */ 7 #include <linux/clk.h> 8 #include <linux/spinlock.h> 9 10 #include <drm/drm_atomic.h> 11 #include <drm/drm_atomic_helper.h> 12 #include <drm/drm_crtc_helper.h> 13 #include <drm/drm_plane_helper.h> 14 #include <drm/drm_print.h> 15 #include <drm/drm_vblank.h> 16 17 #include "komeda_dev.h" 18 #include "komeda_kms.h" 19 20 void komeda_crtc_get_color_config(struct drm_crtc_state *crtc_st, 21 u32 *color_depths, u32 *color_formats) 22 { 23 struct drm_connector *conn; 24 struct drm_connector_state *conn_st; 25 u32 conn_color_formats = ~0u; 26 int i, min_bpc = 31, conn_bpc = 0; 27 28 for_each_new_connector_in_state(crtc_st->state, conn, conn_st, i) { 29 if (conn_st->crtc != crtc_st->crtc) 30 continue; 31 32 conn_bpc = conn->display_info.bpc ? conn->display_info.bpc : 8; 33 conn_color_formats &= conn->display_info.color_formats; 34 35 if (conn_bpc < min_bpc) 36 min_bpc = conn_bpc; 37 } 38 39 /* connector doesn't config any color_format, use RGB444 as default */ 40 if (!conn_color_formats) 41 conn_color_formats = DRM_COLOR_FORMAT_RGB444; 42 43 *color_depths = GENMASK(min_bpc, 0); 44 *color_formats = conn_color_formats; 45 } 46 47 static void komeda_crtc_update_clock_ratio(struct komeda_crtc_state *kcrtc_st) 48 { 49 u64 pxlclk, aclk; 50 51 if (!kcrtc_st->base.active) { 52 kcrtc_st->clock_ratio = 0; 53 return; 54 } 55 56 pxlclk = kcrtc_st->base.adjusted_mode.crtc_clock * 1000ULL; 57 aclk = komeda_crtc_get_aclk(kcrtc_st); 58 59 kcrtc_st->clock_ratio = div64_u64(aclk << 32, pxlclk); 60 } 61 62 /** 63 * komeda_crtc_atomic_check - build display output data flow 64 * @crtc: DRM crtc 65 * @state: the crtc state object 66 * 67 * crtc_atomic_check is the final check stage, so beside build a display data 68 * pipeline according to the crtc_state, but still needs to release or disable 69 * the unclaimed pipeline resources. 70 * 71 * RETURNS: 72 * Zero for success or -errno 73 */ 74 static int 75 komeda_crtc_atomic_check(struct drm_crtc *crtc, 76 struct drm_crtc_state *state) 77 { 78 struct komeda_crtc *kcrtc = to_kcrtc(crtc); 79 struct komeda_crtc_state *kcrtc_st = to_kcrtc_st(state); 80 int err; 81 82 if (drm_atomic_crtc_needs_modeset(state)) 83 komeda_crtc_update_clock_ratio(kcrtc_st); 84 85 if (state->active) { 86 err = komeda_build_display_data_flow(kcrtc, kcrtc_st); 87 if (err) 88 return err; 89 } 90 91 /* release unclaimed pipeline resources */ 92 err = komeda_release_unclaimed_resources(kcrtc->slave, kcrtc_st); 93 if (err) 94 return err; 95 96 err = komeda_release_unclaimed_resources(kcrtc->master, kcrtc_st); 97 if (err) 98 return err; 99 100 return 0; 101 } 102 103 /* For active a crtc, mainly need two parts of preparation 104 * 1. adjust display operation mode. 105 * 2. enable needed clk 106 */ 107 static int 108 komeda_crtc_prepare(struct komeda_crtc *kcrtc) 109 { 110 struct komeda_dev *mdev = kcrtc->base.dev->dev_private; 111 struct komeda_pipeline *master = kcrtc->master; 112 struct komeda_crtc_state *kcrtc_st = to_kcrtc_st(kcrtc->base.state); 113 struct drm_display_mode *mode = &kcrtc_st->base.adjusted_mode; 114 u32 new_mode; 115 int err; 116 117 mutex_lock(&mdev->lock); 118 119 new_mode = mdev->dpmode | BIT(master->id); 120 if (WARN_ON(new_mode == mdev->dpmode)) { 121 err = 0; 122 goto unlock; 123 } 124 125 err = mdev->funcs->change_opmode(mdev, new_mode); 126 if (err) { 127 DRM_ERROR("failed to change opmode: 0x%x -> 0x%x.\n,", 128 mdev->dpmode, new_mode); 129 goto unlock; 130 } 131 132 mdev->dpmode = new_mode; 133 /* Only need to enable aclk on single display mode, but no need to 134 * enable aclk it on dual display mode, since the dual mode always 135 * switch from single display mode, the aclk already enabled, no need 136 * to enable it again. 137 */ 138 if (new_mode != KOMEDA_MODE_DUAL_DISP) { 139 err = clk_set_rate(mdev->aclk, komeda_crtc_get_aclk(kcrtc_st)); 140 if (err) 141 DRM_ERROR("failed to set aclk.\n"); 142 err = clk_prepare_enable(mdev->aclk); 143 if (err) 144 DRM_ERROR("failed to enable aclk.\n"); 145 } 146 147 err = clk_set_rate(master->pxlclk, mode->crtc_clock * 1000); 148 if (err) 149 DRM_ERROR("failed to set pxlclk for pipe%d\n", master->id); 150 err = clk_prepare_enable(master->pxlclk); 151 if (err) 152 DRM_ERROR("failed to enable pxl clk for pipe%d.\n", master->id); 153 154 unlock: 155 mutex_unlock(&mdev->lock); 156 157 return err; 158 } 159 160 static int 161 komeda_crtc_unprepare(struct komeda_crtc *kcrtc) 162 { 163 struct komeda_dev *mdev = kcrtc->base.dev->dev_private; 164 struct komeda_pipeline *master = kcrtc->master; 165 u32 new_mode; 166 int err; 167 168 mutex_lock(&mdev->lock); 169 170 new_mode = mdev->dpmode & (~BIT(master->id)); 171 172 if (WARN_ON(new_mode == mdev->dpmode)) { 173 err = 0; 174 goto unlock; 175 } 176 177 err = mdev->funcs->change_opmode(mdev, new_mode); 178 if (err) { 179 DRM_ERROR("failed to change opmode: 0x%x -> 0x%x.\n,", 180 mdev->dpmode, new_mode); 181 goto unlock; 182 } 183 184 mdev->dpmode = new_mode; 185 186 clk_disable_unprepare(master->pxlclk); 187 if (new_mode == KOMEDA_MODE_INACTIVE) 188 clk_disable_unprepare(mdev->aclk); 189 190 unlock: 191 mutex_unlock(&mdev->lock); 192 193 return err; 194 } 195 196 void komeda_crtc_handle_event(struct komeda_crtc *kcrtc, 197 struct komeda_events *evts) 198 { 199 struct drm_crtc *crtc = &kcrtc->base; 200 u32 events = evts->pipes[kcrtc->master->id]; 201 202 if (events & KOMEDA_EVENT_VSYNC) 203 drm_crtc_handle_vblank(crtc); 204 205 if (events & KOMEDA_EVENT_EOW) { 206 struct komeda_wb_connector *wb_conn = kcrtc->wb_conn; 207 208 if (wb_conn) 209 drm_writeback_signal_completion(&wb_conn->base, 0); 210 else 211 DRM_WARN("CRTC[%d]: EOW happen but no wb_connector.\n", 212 drm_crtc_index(&kcrtc->base)); 213 } 214 /* will handle it together with the write back support */ 215 if (events & KOMEDA_EVENT_EOW) 216 DRM_DEBUG("EOW.\n"); 217 218 if (events & KOMEDA_EVENT_FLIP) { 219 unsigned long flags; 220 struct drm_pending_vblank_event *event; 221 222 spin_lock_irqsave(&crtc->dev->event_lock, flags); 223 if (kcrtc->disable_done) { 224 complete_all(kcrtc->disable_done); 225 kcrtc->disable_done = NULL; 226 } else if (crtc->state->event) { 227 event = crtc->state->event; 228 /* 229 * Consume event before notifying drm core that flip 230 * happened. 231 */ 232 crtc->state->event = NULL; 233 drm_crtc_send_vblank_event(crtc, event); 234 } else { 235 DRM_WARN("CRTC[%d]: FLIP happen but no pending commit.\n", 236 drm_crtc_index(&kcrtc->base)); 237 } 238 spin_unlock_irqrestore(&crtc->dev->event_lock, flags); 239 } 240 } 241 242 static void 243 komeda_crtc_do_flush(struct drm_crtc *crtc, 244 struct drm_crtc_state *old) 245 { 246 struct komeda_crtc *kcrtc = to_kcrtc(crtc); 247 struct komeda_crtc_state *kcrtc_st = to_kcrtc_st(crtc->state); 248 struct komeda_dev *mdev = kcrtc->base.dev->dev_private; 249 struct komeda_pipeline *master = kcrtc->master; 250 struct komeda_pipeline *slave = kcrtc->slave; 251 struct komeda_wb_connector *wb_conn = kcrtc->wb_conn; 252 struct drm_connector_state *conn_st; 253 254 DRM_DEBUG_ATOMIC("CRTC%d_FLUSH: active_pipes: 0x%x, affected: 0x%x.\n", 255 drm_crtc_index(crtc), 256 kcrtc_st->active_pipes, kcrtc_st->affected_pipes); 257 258 /* step 1: update the pipeline/component state to HW */ 259 if (has_bit(master->id, kcrtc_st->affected_pipes)) 260 komeda_pipeline_update(master, old->state); 261 262 if (slave && has_bit(slave->id, kcrtc_st->affected_pipes)) 263 komeda_pipeline_update(slave, old->state); 264 265 conn_st = wb_conn ? wb_conn->base.base.state : NULL; 266 if (conn_st && conn_st->writeback_job) 267 drm_writeback_queue_job(&wb_conn->base, conn_st); 268 269 /* step 2: notify the HW to kickoff the update */ 270 mdev->funcs->flush(mdev, master->id, kcrtc_st->active_pipes); 271 } 272 273 static void 274 komeda_crtc_atomic_enable(struct drm_crtc *crtc, 275 struct drm_crtc_state *old) 276 { 277 komeda_crtc_prepare(to_kcrtc(crtc)); 278 drm_crtc_vblank_on(crtc); 279 WARN_ON(drm_crtc_vblank_get(crtc)); 280 komeda_crtc_do_flush(crtc, old); 281 } 282 283 static void 284 komeda_crtc_flush_and_wait_for_flip_done(struct komeda_crtc *kcrtc, 285 struct completion *input_flip_done) 286 { 287 struct drm_device *drm = kcrtc->base.dev; 288 struct komeda_dev *mdev = kcrtc->master->mdev; 289 struct completion *flip_done; 290 struct completion temp; 291 int timeout; 292 293 /* if caller doesn't send a flip_done, use a private flip_done */ 294 if (input_flip_done) { 295 flip_done = input_flip_done; 296 } else { 297 init_completion(&temp); 298 kcrtc->disable_done = &temp; 299 flip_done = &temp; 300 } 301 302 mdev->funcs->flush(mdev, kcrtc->master->id, 0); 303 304 /* wait the flip take affect.*/ 305 timeout = wait_for_completion_timeout(flip_done, HZ); 306 if (timeout == 0) { 307 DRM_ERROR("wait pipe%d flip done timeout\n", kcrtc->master->id); 308 if (!input_flip_done) { 309 unsigned long flags; 310 311 spin_lock_irqsave(&drm->event_lock, flags); 312 kcrtc->disable_done = NULL; 313 spin_unlock_irqrestore(&drm->event_lock, flags); 314 } 315 } 316 } 317 318 static void 319 komeda_crtc_atomic_disable(struct drm_crtc *crtc, 320 struct drm_crtc_state *old) 321 { 322 struct komeda_crtc *kcrtc = to_kcrtc(crtc); 323 struct komeda_crtc_state *old_st = to_kcrtc_st(old); 324 struct komeda_pipeline *master = kcrtc->master; 325 struct komeda_pipeline *slave = kcrtc->slave; 326 struct completion *disable_done; 327 bool needs_phase2 = false; 328 329 DRM_DEBUG_ATOMIC("CRTC%d_DISABLE: active_pipes: 0x%x, affected: 0x%x\n", 330 drm_crtc_index(crtc), 331 old_st->active_pipes, old_st->affected_pipes); 332 333 if (slave && has_bit(slave->id, old_st->active_pipes)) 334 komeda_pipeline_disable(slave, old->state); 335 336 if (has_bit(master->id, old_st->active_pipes)) 337 needs_phase2 = komeda_pipeline_disable(master, old->state); 338 339 /* crtc_disable has two scenarios according to the state->active switch. 340 * 1. active -> inactive 341 * this commit is a disable commit. and the commit will be finished 342 * or done after the disable operation. on this case we can directly 343 * use the crtc->state->event to tracking the HW disable operation. 344 * 2. active -> active 345 * the crtc->commit is not for disable, but a modeset operation when 346 * crtc is active, such commit actually has been completed by 3 347 * DRM operations: 348 * crtc_disable, update_planes(crtc_flush), crtc_enable 349 * so on this case the crtc->commit is for the whole process. 350 * we can not use it for tracing the disable, we need a temporary 351 * flip_done for tracing the disable. and crtc->state->event for 352 * the crtc_enable operation. 353 * That's also the reason why skip modeset commit in 354 * komeda_crtc_atomic_flush() 355 */ 356 disable_done = (needs_phase2 || crtc->state->active) ? 357 NULL : &crtc->state->commit->flip_done; 358 359 /* wait phase 1 disable done */ 360 komeda_crtc_flush_and_wait_for_flip_done(kcrtc, disable_done); 361 362 /* phase 2 */ 363 if (needs_phase2) { 364 komeda_pipeline_disable(kcrtc->master, old->state); 365 366 disable_done = crtc->state->active ? 367 NULL : &crtc->state->commit->flip_done; 368 369 komeda_crtc_flush_and_wait_for_flip_done(kcrtc, disable_done); 370 } 371 372 drm_crtc_vblank_put(crtc); 373 drm_crtc_vblank_off(crtc); 374 komeda_crtc_unprepare(kcrtc); 375 } 376 377 static void 378 komeda_crtc_atomic_flush(struct drm_crtc *crtc, 379 struct drm_crtc_state *old) 380 { 381 /* commit with modeset will be handled in enable/disable */ 382 if (drm_atomic_crtc_needs_modeset(crtc->state)) 383 return; 384 385 komeda_crtc_do_flush(crtc, old); 386 } 387 388 /* Returns the minimum frequency of the aclk rate (main engine clock) in Hz */ 389 static unsigned long 390 komeda_calc_min_aclk_rate(struct komeda_crtc *kcrtc, 391 unsigned long pxlclk) 392 { 393 /* Once dual-link one display pipeline drives two display outputs, 394 * the aclk needs run on the double rate of pxlclk 395 */ 396 if (kcrtc->master->dual_link) 397 return pxlclk * 2; 398 else 399 return pxlclk; 400 } 401 402 /* Get current aclk rate that specified by state */ 403 unsigned long komeda_crtc_get_aclk(struct komeda_crtc_state *kcrtc_st) 404 { 405 struct drm_crtc *crtc = kcrtc_st->base.crtc; 406 struct komeda_dev *mdev = crtc->dev->dev_private; 407 unsigned long pxlclk = kcrtc_st->base.adjusted_mode.crtc_clock * 1000; 408 unsigned long min_aclk; 409 410 min_aclk = komeda_calc_min_aclk_rate(to_kcrtc(crtc), pxlclk); 411 412 return clk_round_rate(mdev->aclk, min_aclk); 413 } 414 415 static enum drm_mode_status 416 komeda_crtc_mode_valid(struct drm_crtc *crtc, const struct drm_display_mode *m) 417 { 418 struct komeda_dev *mdev = crtc->dev->dev_private; 419 struct komeda_crtc *kcrtc = to_kcrtc(crtc); 420 struct komeda_pipeline *master = kcrtc->master; 421 unsigned long min_pxlclk, min_aclk; 422 423 if (m->flags & DRM_MODE_FLAG_INTERLACE) 424 return MODE_NO_INTERLACE; 425 426 min_pxlclk = m->clock * 1000; 427 if (master->dual_link) 428 min_pxlclk /= 2; 429 430 if (min_pxlclk != clk_round_rate(master->pxlclk, min_pxlclk)) { 431 DRM_DEBUG_ATOMIC("pxlclk doesn't support %lu Hz\n", min_pxlclk); 432 433 return MODE_NOCLOCK; 434 } 435 436 min_aclk = komeda_calc_min_aclk_rate(to_kcrtc(crtc), min_pxlclk); 437 if (clk_round_rate(mdev->aclk, min_aclk) < min_aclk) { 438 DRM_DEBUG_ATOMIC("engine clk can't satisfy the requirement of %s-clk: %lu.\n", 439 m->name, min_pxlclk); 440 441 return MODE_CLOCK_HIGH; 442 } 443 444 return MODE_OK; 445 } 446 447 static bool komeda_crtc_mode_fixup(struct drm_crtc *crtc, 448 const struct drm_display_mode *m, 449 struct drm_display_mode *adjusted_mode) 450 { 451 struct komeda_crtc *kcrtc = to_kcrtc(crtc); 452 unsigned long clk_rate; 453 454 drm_mode_set_crtcinfo(adjusted_mode, 0); 455 /* In dual link half the horizontal settings */ 456 if (kcrtc->master->dual_link) { 457 adjusted_mode->crtc_clock /= 2; 458 adjusted_mode->crtc_hdisplay /= 2; 459 adjusted_mode->crtc_hsync_start /= 2; 460 adjusted_mode->crtc_hsync_end /= 2; 461 adjusted_mode->crtc_htotal /= 2; 462 } 463 464 clk_rate = adjusted_mode->crtc_clock * 1000; 465 /* crtc_clock will be used as the komeda output pixel clock */ 466 adjusted_mode->crtc_clock = clk_round_rate(kcrtc->master->pxlclk, 467 clk_rate) / 1000; 468 469 return true; 470 } 471 472 static const struct drm_crtc_helper_funcs komeda_crtc_helper_funcs = { 473 .atomic_check = komeda_crtc_atomic_check, 474 .atomic_flush = komeda_crtc_atomic_flush, 475 .atomic_enable = komeda_crtc_atomic_enable, 476 .atomic_disable = komeda_crtc_atomic_disable, 477 .mode_valid = komeda_crtc_mode_valid, 478 .mode_fixup = komeda_crtc_mode_fixup, 479 }; 480 481 static void komeda_crtc_reset(struct drm_crtc *crtc) 482 { 483 struct komeda_crtc_state *state; 484 485 if (crtc->state) 486 __drm_atomic_helper_crtc_destroy_state(crtc->state); 487 488 kfree(to_kcrtc_st(crtc->state)); 489 crtc->state = NULL; 490 491 state = kzalloc(sizeof(*state), GFP_KERNEL); 492 if (state) { 493 crtc->state = &state->base; 494 crtc->state->crtc = crtc; 495 } 496 } 497 498 static struct drm_crtc_state * 499 komeda_crtc_atomic_duplicate_state(struct drm_crtc *crtc) 500 { 501 struct komeda_crtc_state *old = to_kcrtc_st(crtc->state); 502 struct komeda_crtc_state *new; 503 504 new = kzalloc(sizeof(*new), GFP_KERNEL); 505 if (!new) 506 return NULL; 507 508 __drm_atomic_helper_crtc_duplicate_state(crtc, &new->base); 509 510 new->affected_pipes = old->active_pipes; 511 new->clock_ratio = old->clock_ratio; 512 new->max_slave_zorder = old->max_slave_zorder; 513 514 return &new->base; 515 } 516 517 static void komeda_crtc_atomic_destroy_state(struct drm_crtc *crtc, 518 struct drm_crtc_state *state) 519 { 520 __drm_atomic_helper_crtc_destroy_state(state); 521 kfree(to_kcrtc_st(state)); 522 } 523 524 static int komeda_crtc_vblank_enable(struct drm_crtc *crtc) 525 { 526 struct komeda_dev *mdev = crtc->dev->dev_private; 527 struct komeda_crtc *kcrtc = to_kcrtc(crtc); 528 529 mdev->funcs->on_off_vblank(mdev, kcrtc->master->id, true); 530 return 0; 531 } 532 533 static void komeda_crtc_vblank_disable(struct drm_crtc *crtc) 534 { 535 struct komeda_dev *mdev = crtc->dev->dev_private; 536 struct komeda_crtc *kcrtc = to_kcrtc(crtc); 537 538 mdev->funcs->on_off_vblank(mdev, kcrtc->master->id, false); 539 } 540 541 static const struct drm_crtc_funcs komeda_crtc_funcs = { 542 .gamma_set = drm_atomic_helper_legacy_gamma_set, 543 .destroy = drm_crtc_cleanup, 544 .set_config = drm_atomic_helper_set_config, 545 .page_flip = drm_atomic_helper_page_flip, 546 .reset = komeda_crtc_reset, 547 .atomic_duplicate_state = komeda_crtc_atomic_duplicate_state, 548 .atomic_destroy_state = komeda_crtc_atomic_destroy_state, 549 .enable_vblank = komeda_crtc_vblank_enable, 550 .disable_vblank = komeda_crtc_vblank_disable, 551 }; 552 553 int komeda_kms_setup_crtcs(struct komeda_kms_dev *kms, 554 struct komeda_dev *mdev) 555 { 556 struct komeda_crtc *crtc; 557 struct komeda_pipeline *master; 558 char str[16]; 559 int i; 560 561 kms->n_crtcs = 0; 562 563 for (i = 0; i < mdev->n_pipelines; i++) { 564 crtc = &kms->crtcs[kms->n_crtcs]; 565 master = mdev->pipelines[i]; 566 567 crtc->master = master; 568 crtc->slave = komeda_pipeline_get_slave(master); 569 570 if (crtc->slave) 571 sprintf(str, "pipe-%d", crtc->slave->id); 572 else 573 sprintf(str, "None"); 574 575 DRM_INFO("CRTC-%d: master(pipe-%d) slave(%s).\n", 576 kms->n_crtcs, master->id, str); 577 578 kms->n_crtcs++; 579 } 580 581 return 0; 582 } 583 584 static struct drm_plane * 585 get_crtc_primary(struct komeda_kms_dev *kms, struct komeda_crtc *crtc) 586 { 587 struct komeda_plane *kplane; 588 struct drm_plane *plane; 589 590 drm_for_each_plane(plane, &kms->base) { 591 if (plane->type != DRM_PLANE_TYPE_PRIMARY) 592 continue; 593 594 kplane = to_kplane(plane); 595 /* only master can be primary */ 596 if (kplane->layer->base.pipeline == crtc->master) 597 return plane; 598 } 599 600 return NULL; 601 } 602 603 static int komeda_crtc_add(struct komeda_kms_dev *kms, 604 struct komeda_crtc *kcrtc) 605 { 606 struct drm_crtc *crtc = &kcrtc->base; 607 int err; 608 609 err = drm_crtc_init_with_planes(&kms->base, crtc, 610 get_crtc_primary(kms, kcrtc), NULL, 611 &komeda_crtc_funcs, NULL); 612 if (err) 613 return err; 614 615 drm_crtc_helper_add(crtc, &komeda_crtc_helper_funcs); 616 drm_crtc_vblank_reset(crtc); 617 618 crtc->port = kcrtc->master->of_output_port; 619 620 return err; 621 } 622 623 int komeda_kms_add_crtcs(struct komeda_kms_dev *kms, struct komeda_dev *mdev) 624 { 625 int i, err; 626 627 for (i = 0; i < kms->n_crtcs; i++) { 628 err = komeda_crtc_add(kms, &kms->crtcs[i]); 629 if (err) 630 return err; 631 } 632 633 return 0; 634 } 635