1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * (C) COPYRIGHT 2018 ARM Limited. All rights reserved. 4 * Author: James.Qian.Wang <james.qian.wang@arm.com> 5 * 6 */ 7 #include <linux/clk.h> 8 #include <linux/pm_runtime.h> 9 #include <linux/spinlock.h> 10 11 #include <drm/drm_atomic.h> 12 #include <drm/drm_atomic_helper.h> 13 #include <drm/drm_crtc_helper.h> 14 #include <drm/drm_plane_helper.h> 15 #include <drm/drm_print.h> 16 #include <drm/drm_vblank.h> 17 18 #include "komeda_dev.h" 19 #include "komeda_kms.h" 20 21 static void komeda_crtc_update_clock_ratio(struct komeda_crtc_state *kcrtc_st) 22 { 23 u64 pxlclk, aclk; 24 25 if (!kcrtc_st->base.active) { 26 kcrtc_st->clock_ratio = 0; 27 return; 28 } 29 30 pxlclk = kcrtc_st->base.adjusted_mode.clock * 1000; 31 aclk = komeda_calc_aclk(kcrtc_st); 32 33 kcrtc_st->clock_ratio = div64_u64(aclk << 32, pxlclk); 34 } 35 36 /** 37 * komeda_crtc_atomic_check - build display output data flow 38 * @crtc: DRM crtc 39 * @state: the crtc state object 40 * 41 * crtc_atomic_check is the final check stage, so beside build a display data 42 * pipeline according to the crtc_state, but still needs to release or disable 43 * the unclaimed pipeline resources. 44 * 45 * RETURNS: 46 * Zero for success or -errno 47 */ 48 static int 49 komeda_crtc_atomic_check(struct drm_crtc *crtc, 50 struct drm_crtc_state *state) 51 { 52 struct komeda_crtc *kcrtc = to_kcrtc(crtc); 53 struct komeda_crtc_state *kcrtc_st = to_kcrtc_st(state); 54 int err; 55 56 if (drm_atomic_crtc_needs_modeset(state)) 57 komeda_crtc_update_clock_ratio(kcrtc_st); 58 59 if (state->active) { 60 err = komeda_build_display_data_flow(kcrtc, kcrtc_st); 61 if (err) 62 return err; 63 } 64 65 /* release unclaimed pipeline resources */ 66 err = komeda_release_unclaimed_resources(kcrtc->slave, kcrtc_st); 67 if (err) 68 return err; 69 70 err = komeda_release_unclaimed_resources(kcrtc->master, kcrtc_st); 71 if (err) 72 return err; 73 74 return 0; 75 } 76 77 unsigned long komeda_calc_aclk(struct komeda_crtc_state *kcrtc_st) 78 { 79 struct komeda_dev *mdev = kcrtc_st->base.crtc->dev->dev_private; 80 unsigned long pxlclk = kcrtc_st->base.adjusted_mode.clock; 81 82 return clk_round_rate(mdev->aclk, pxlclk * 1000); 83 } 84 85 /* For active a crtc, mainly need two parts of preparation 86 * 1. adjust display operation mode. 87 * 2. enable needed clk 88 */ 89 static int 90 komeda_crtc_prepare(struct komeda_crtc *kcrtc) 91 { 92 struct komeda_dev *mdev = kcrtc->base.dev->dev_private; 93 struct komeda_pipeline *master = kcrtc->master; 94 struct komeda_crtc_state *kcrtc_st = to_kcrtc_st(kcrtc->base.state); 95 unsigned long pxlclk_rate = kcrtc_st->base.adjusted_mode.clock * 1000; 96 u32 new_mode; 97 int err; 98 99 mutex_lock(&mdev->lock); 100 101 new_mode = mdev->dpmode | BIT(master->id); 102 if (WARN_ON(new_mode == mdev->dpmode)) { 103 err = 0; 104 goto unlock; 105 } 106 107 err = mdev->funcs->change_opmode(mdev, new_mode); 108 if (err) { 109 DRM_ERROR("failed to change opmode: 0x%x -> 0x%x.\n,", 110 mdev->dpmode, new_mode); 111 goto unlock; 112 } 113 114 mdev->dpmode = new_mode; 115 /* Only need to enable aclk on single display mode, but no need to 116 * enable aclk it on dual display mode, since the dual mode always 117 * switch from single display mode, the aclk already enabled, no need 118 * to enable it again. 119 */ 120 if (new_mode != KOMEDA_MODE_DUAL_DISP) { 121 err = clk_set_rate(mdev->aclk, komeda_calc_aclk(kcrtc_st)); 122 if (err) 123 DRM_ERROR("failed to set aclk.\n"); 124 err = clk_prepare_enable(mdev->aclk); 125 if (err) 126 DRM_ERROR("failed to enable aclk.\n"); 127 } 128 129 err = clk_set_rate(master->pxlclk, pxlclk_rate); 130 if (err) 131 DRM_ERROR("failed to set pxlclk for pipe%d\n", master->id); 132 err = clk_prepare_enable(master->pxlclk); 133 if (err) 134 DRM_ERROR("failed to enable pxl clk for pipe%d.\n", master->id); 135 136 unlock: 137 mutex_unlock(&mdev->lock); 138 139 return err; 140 } 141 142 static int 143 komeda_crtc_unprepare(struct komeda_crtc *kcrtc) 144 { 145 struct komeda_dev *mdev = kcrtc->base.dev->dev_private; 146 struct komeda_pipeline *master = kcrtc->master; 147 u32 new_mode; 148 int err; 149 150 mutex_lock(&mdev->lock); 151 152 new_mode = mdev->dpmode & (~BIT(master->id)); 153 154 if (WARN_ON(new_mode == mdev->dpmode)) { 155 err = 0; 156 goto unlock; 157 } 158 159 err = mdev->funcs->change_opmode(mdev, new_mode); 160 if (err) { 161 DRM_ERROR("failed to change opmode: 0x%x -> 0x%x.\n,", 162 mdev->dpmode, new_mode); 163 goto unlock; 164 } 165 166 mdev->dpmode = new_mode; 167 168 clk_disable_unprepare(master->pxlclk); 169 if (new_mode == KOMEDA_MODE_INACTIVE) 170 clk_disable_unprepare(mdev->aclk); 171 172 unlock: 173 mutex_unlock(&mdev->lock); 174 175 return err; 176 } 177 178 void komeda_crtc_handle_event(struct komeda_crtc *kcrtc, 179 struct komeda_events *evts) 180 { 181 struct drm_crtc *crtc = &kcrtc->base; 182 u32 events = evts->pipes[kcrtc->master->id]; 183 184 if (events & KOMEDA_EVENT_VSYNC) 185 drm_crtc_handle_vblank(crtc); 186 187 if (events & KOMEDA_EVENT_EOW) { 188 struct komeda_wb_connector *wb_conn = kcrtc->wb_conn; 189 190 if (wb_conn) 191 drm_writeback_signal_completion(&wb_conn->base, 0); 192 else 193 DRM_WARN("CRTC[%d]: EOW happen but no wb_connector.\n", 194 drm_crtc_index(&kcrtc->base)); 195 } 196 /* will handle it together with the write back support */ 197 if (events & KOMEDA_EVENT_EOW) 198 DRM_DEBUG("EOW.\n"); 199 200 if (events & KOMEDA_EVENT_FLIP) { 201 unsigned long flags; 202 struct drm_pending_vblank_event *event; 203 204 spin_lock_irqsave(&crtc->dev->event_lock, flags); 205 if (kcrtc->disable_done) { 206 complete_all(kcrtc->disable_done); 207 kcrtc->disable_done = NULL; 208 } else if (crtc->state->event) { 209 event = crtc->state->event; 210 /* 211 * Consume event before notifying drm core that flip 212 * happened. 213 */ 214 crtc->state->event = NULL; 215 drm_crtc_send_vblank_event(crtc, event); 216 } else { 217 DRM_WARN("CRTC[%d]: FLIP happen but no pending commit.\n", 218 drm_crtc_index(&kcrtc->base)); 219 } 220 spin_unlock_irqrestore(&crtc->dev->event_lock, flags); 221 } 222 } 223 224 static void 225 komeda_crtc_do_flush(struct drm_crtc *crtc, 226 struct drm_crtc_state *old) 227 { 228 struct komeda_crtc *kcrtc = to_kcrtc(crtc); 229 struct komeda_crtc_state *kcrtc_st = to_kcrtc_st(crtc->state); 230 struct komeda_dev *mdev = kcrtc->base.dev->dev_private; 231 struct komeda_pipeline *master = kcrtc->master; 232 struct komeda_pipeline *slave = kcrtc->slave; 233 struct komeda_wb_connector *wb_conn = kcrtc->wb_conn; 234 struct drm_connector_state *conn_st; 235 236 DRM_DEBUG_ATOMIC("CRTC%d_FLUSH: active_pipes: 0x%x, affected: 0x%x.\n", 237 drm_crtc_index(crtc), 238 kcrtc_st->active_pipes, kcrtc_st->affected_pipes); 239 240 /* step 1: update the pipeline/component state to HW */ 241 if (has_bit(master->id, kcrtc_st->affected_pipes)) 242 komeda_pipeline_update(master, old->state); 243 244 if (slave && has_bit(slave->id, kcrtc_st->affected_pipes)) 245 komeda_pipeline_update(slave, old->state); 246 247 conn_st = wb_conn ? wb_conn->base.base.state : NULL; 248 if (conn_st && conn_st->writeback_job) 249 drm_writeback_queue_job(&wb_conn->base, conn_st); 250 251 /* step 2: notify the HW to kickoff the update */ 252 mdev->funcs->flush(mdev, master->id, kcrtc_st->active_pipes); 253 } 254 255 static void 256 komeda_crtc_atomic_enable(struct drm_crtc *crtc, 257 struct drm_crtc_state *old) 258 { 259 komeda_crtc_prepare(to_kcrtc(crtc)); 260 drm_crtc_vblank_on(crtc); 261 komeda_crtc_do_flush(crtc, old); 262 } 263 264 static void 265 komeda_crtc_atomic_disable(struct drm_crtc *crtc, 266 struct drm_crtc_state *old) 267 { 268 struct komeda_crtc *kcrtc = to_kcrtc(crtc); 269 struct komeda_crtc_state *old_st = to_kcrtc_st(old); 270 struct komeda_dev *mdev = crtc->dev->dev_private; 271 struct komeda_pipeline *master = kcrtc->master; 272 struct komeda_pipeline *slave = kcrtc->slave; 273 struct completion *disable_done = &crtc->state->commit->flip_done; 274 struct completion temp; 275 int timeout; 276 277 DRM_DEBUG_ATOMIC("CRTC%d_DISABLE: active_pipes: 0x%x, affected: 0x%x.\n", 278 drm_crtc_index(crtc), 279 old_st->active_pipes, old_st->affected_pipes); 280 281 if (slave && has_bit(slave->id, old_st->active_pipes)) 282 komeda_pipeline_disable(slave, old->state); 283 284 if (has_bit(master->id, old_st->active_pipes)) 285 komeda_pipeline_disable(master, old->state); 286 287 /* crtc_disable has two scenarios according to the state->active switch. 288 * 1. active -> inactive 289 * this commit is a disable commit. and the commit will be finished 290 * or done after the disable operation. on this case we can directly 291 * use the crtc->state->event to tracking the HW disable operation. 292 * 2. active -> active 293 * the crtc->commit is not for disable, but a modeset operation when 294 * crtc is active, such commit actually has been completed by 3 295 * DRM operations: 296 * crtc_disable, update_planes(crtc_flush), crtc_enable 297 * so on this case the crtc->commit is for the whole process. 298 * we can not use it for tracing the disable, we need a temporary 299 * flip_done for tracing the disable. and crtc->state->event for 300 * the crtc_enable operation. 301 * That's also the reason why skip modeset commit in 302 * komeda_crtc_atomic_flush() 303 */ 304 if (crtc->state->active) { 305 struct komeda_pipeline_state *pipe_st; 306 /* clear the old active_comps to zero */ 307 pipe_st = komeda_pipeline_get_old_state(master, old->state); 308 pipe_st->active_comps = 0; 309 310 init_completion(&temp); 311 kcrtc->disable_done = &temp; 312 disable_done = &temp; 313 } 314 315 mdev->funcs->flush(mdev, master->id, 0); 316 317 /* wait the disable take affect.*/ 318 timeout = wait_for_completion_timeout(disable_done, HZ); 319 if (timeout == 0) { 320 DRM_ERROR("disable pipeline%d timeout.\n", kcrtc->master->id); 321 if (crtc->state->active) { 322 unsigned long flags; 323 324 spin_lock_irqsave(&crtc->dev->event_lock, flags); 325 kcrtc->disable_done = NULL; 326 spin_unlock_irqrestore(&crtc->dev->event_lock, flags); 327 } 328 } 329 330 drm_crtc_vblank_off(crtc); 331 komeda_crtc_unprepare(kcrtc); 332 } 333 334 static void 335 komeda_crtc_atomic_flush(struct drm_crtc *crtc, 336 struct drm_crtc_state *old) 337 { 338 /* commit with modeset will be handled in enable/disable */ 339 if (drm_atomic_crtc_needs_modeset(crtc->state)) 340 return; 341 342 komeda_crtc_do_flush(crtc, old); 343 } 344 345 static enum drm_mode_status 346 komeda_crtc_mode_valid(struct drm_crtc *crtc, const struct drm_display_mode *m) 347 { 348 struct komeda_dev *mdev = crtc->dev->dev_private; 349 struct komeda_crtc *kcrtc = to_kcrtc(crtc); 350 struct komeda_pipeline *master = kcrtc->master; 351 long mode_clk, pxlclk; 352 353 if (m->flags & DRM_MODE_FLAG_INTERLACE) 354 return MODE_NO_INTERLACE; 355 356 mode_clk = m->clock * 1000; 357 pxlclk = clk_round_rate(master->pxlclk, mode_clk); 358 if (pxlclk != mode_clk) { 359 DRM_DEBUG_ATOMIC("pxlclk doesn't support %ld Hz\n", mode_clk); 360 361 return MODE_NOCLOCK; 362 } 363 364 /* main engine clock must be faster than pxlclk*/ 365 if (clk_round_rate(mdev->aclk, mode_clk) < pxlclk) { 366 DRM_DEBUG_ATOMIC("engine clk can't satisfy the requirement of %s-clk: %ld.\n", 367 m->name, pxlclk); 368 369 return MODE_CLOCK_HIGH; 370 } 371 372 return MODE_OK; 373 } 374 375 static bool komeda_crtc_mode_fixup(struct drm_crtc *crtc, 376 const struct drm_display_mode *m, 377 struct drm_display_mode *adjusted_mode) 378 { 379 struct komeda_crtc *kcrtc = to_kcrtc(crtc); 380 struct komeda_pipeline *master = kcrtc->master; 381 long mode_clk = m->clock * 1000; 382 383 adjusted_mode->clock = clk_round_rate(master->pxlclk, mode_clk) / 1000; 384 385 return true; 386 } 387 388 static const struct drm_crtc_helper_funcs komeda_crtc_helper_funcs = { 389 .atomic_check = komeda_crtc_atomic_check, 390 .atomic_flush = komeda_crtc_atomic_flush, 391 .atomic_enable = komeda_crtc_atomic_enable, 392 .atomic_disable = komeda_crtc_atomic_disable, 393 .mode_valid = komeda_crtc_mode_valid, 394 .mode_fixup = komeda_crtc_mode_fixup, 395 }; 396 397 static void komeda_crtc_reset(struct drm_crtc *crtc) 398 { 399 struct komeda_crtc_state *state; 400 401 if (crtc->state) 402 __drm_atomic_helper_crtc_destroy_state(crtc->state); 403 404 kfree(to_kcrtc_st(crtc->state)); 405 crtc->state = NULL; 406 407 state = kzalloc(sizeof(*state), GFP_KERNEL); 408 if (state) { 409 crtc->state = &state->base; 410 crtc->state->crtc = crtc; 411 } 412 } 413 414 static struct drm_crtc_state * 415 komeda_crtc_atomic_duplicate_state(struct drm_crtc *crtc) 416 { 417 struct komeda_crtc_state *old = to_kcrtc_st(crtc->state); 418 struct komeda_crtc_state *new; 419 420 new = kzalloc(sizeof(*new), GFP_KERNEL); 421 if (!new) 422 return NULL; 423 424 __drm_atomic_helper_crtc_duplicate_state(crtc, &new->base); 425 426 new->affected_pipes = old->active_pipes; 427 new->clock_ratio = old->clock_ratio; 428 new->max_slave_zorder = old->max_slave_zorder; 429 430 return &new->base; 431 } 432 433 static void komeda_crtc_atomic_destroy_state(struct drm_crtc *crtc, 434 struct drm_crtc_state *state) 435 { 436 __drm_atomic_helper_crtc_destroy_state(state); 437 kfree(to_kcrtc_st(state)); 438 } 439 440 static int komeda_crtc_vblank_enable(struct drm_crtc *crtc) 441 { 442 struct komeda_dev *mdev = crtc->dev->dev_private; 443 struct komeda_crtc *kcrtc = to_kcrtc(crtc); 444 445 mdev->funcs->on_off_vblank(mdev, kcrtc->master->id, true); 446 return 0; 447 } 448 449 static void komeda_crtc_vblank_disable(struct drm_crtc *crtc) 450 { 451 struct komeda_dev *mdev = crtc->dev->dev_private; 452 struct komeda_crtc *kcrtc = to_kcrtc(crtc); 453 454 mdev->funcs->on_off_vblank(mdev, kcrtc->master->id, false); 455 } 456 457 static int 458 komeda_crtc_atomic_get_property(struct drm_crtc *crtc, 459 const struct drm_crtc_state *state, 460 struct drm_property *property, uint64_t *val) 461 { 462 struct komeda_crtc *kcrtc = to_kcrtc(crtc); 463 struct komeda_crtc_state *kcrtc_st = to_kcrtc_st(state); 464 465 if (property == kcrtc->clock_ratio_property) { 466 *val = kcrtc_st->clock_ratio; 467 } else { 468 DRM_DEBUG_DRIVER("Unknown property %s\n", property->name); 469 return -EINVAL; 470 } 471 472 return 0; 473 } 474 475 static const struct drm_crtc_funcs komeda_crtc_funcs = { 476 .gamma_set = drm_atomic_helper_legacy_gamma_set, 477 .destroy = drm_crtc_cleanup, 478 .set_config = drm_atomic_helper_set_config, 479 .page_flip = drm_atomic_helper_page_flip, 480 .reset = komeda_crtc_reset, 481 .atomic_duplicate_state = komeda_crtc_atomic_duplicate_state, 482 .atomic_destroy_state = komeda_crtc_atomic_destroy_state, 483 .enable_vblank = komeda_crtc_vblank_enable, 484 .disable_vblank = komeda_crtc_vblank_disable, 485 .atomic_get_property = komeda_crtc_atomic_get_property, 486 }; 487 488 int komeda_kms_setup_crtcs(struct komeda_kms_dev *kms, 489 struct komeda_dev *mdev) 490 { 491 struct komeda_crtc *crtc; 492 struct komeda_pipeline *master; 493 char str[16]; 494 int i; 495 496 kms->n_crtcs = 0; 497 498 for (i = 0; i < mdev->n_pipelines; i++) { 499 crtc = &kms->crtcs[kms->n_crtcs]; 500 master = mdev->pipelines[i]; 501 502 crtc->master = master; 503 crtc->slave = komeda_pipeline_get_slave(master); 504 505 if (crtc->slave) 506 sprintf(str, "pipe-%d", crtc->slave->id); 507 else 508 sprintf(str, "None"); 509 510 DRM_INFO("crtc%d: master(pipe-%d) slave(%s) output: %s.\n", 511 kms->n_crtcs, master->id, str, 512 master->of_output_dev ? 513 master->of_output_dev->full_name : "None"); 514 515 kms->n_crtcs++; 516 } 517 518 return 0; 519 } 520 521 static int komeda_crtc_create_clock_ratio_property(struct komeda_crtc *kcrtc) 522 { 523 struct drm_crtc *crtc = &kcrtc->base; 524 struct drm_property *prop; 525 526 prop = drm_property_create_range(crtc->dev, DRM_MODE_PROP_ATOMIC, 527 "CLOCK_RATIO", 0, U64_MAX); 528 if (!prop) 529 return -ENOMEM; 530 531 drm_object_attach_property(&crtc->base, prop, 0); 532 kcrtc->clock_ratio_property = prop; 533 534 return 0; 535 } 536 537 static int komeda_crtc_create_slave_planes_property(struct komeda_crtc *kcrtc) 538 { 539 struct drm_crtc *crtc = &kcrtc->base; 540 struct drm_property *prop; 541 542 if (kcrtc->slave_planes == 0) 543 return 0; 544 545 prop = drm_property_create_range(crtc->dev, DRM_MODE_PROP_IMMUTABLE, 546 "slave_planes", 0, U32_MAX); 547 if (!prop) 548 return -ENOMEM; 549 550 drm_object_attach_property(&crtc->base, prop, kcrtc->slave_planes); 551 552 kcrtc->slave_planes_property = prop; 553 554 return 0; 555 } 556 557 static struct drm_plane * 558 get_crtc_primary(struct komeda_kms_dev *kms, struct komeda_crtc *crtc) 559 { 560 struct komeda_plane *kplane; 561 struct drm_plane *plane; 562 563 drm_for_each_plane(plane, &kms->base) { 564 if (plane->type != DRM_PLANE_TYPE_PRIMARY) 565 continue; 566 567 kplane = to_kplane(plane); 568 /* only master can be primary */ 569 if (kplane->layer->base.pipeline == crtc->master) 570 return plane; 571 } 572 573 return NULL; 574 } 575 576 static int komeda_crtc_add(struct komeda_kms_dev *kms, 577 struct komeda_crtc *kcrtc) 578 { 579 struct drm_crtc *crtc = &kcrtc->base; 580 int err; 581 582 err = drm_crtc_init_with_planes(&kms->base, crtc, 583 get_crtc_primary(kms, kcrtc), NULL, 584 &komeda_crtc_funcs, NULL); 585 if (err) 586 return err; 587 588 drm_crtc_helper_add(crtc, &komeda_crtc_helper_funcs); 589 drm_crtc_vblank_reset(crtc); 590 591 crtc->port = kcrtc->master->of_output_port; 592 593 err = komeda_crtc_create_clock_ratio_property(kcrtc); 594 if (err) 595 return err; 596 597 err = komeda_crtc_create_slave_planes_property(kcrtc); 598 if (err) 599 return err; 600 601 return err; 602 } 603 604 int komeda_kms_add_crtcs(struct komeda_kms_dev *kms, struct komeda_dev *mdev) 605 { 606 int i, err; 607 608 for (i = 0; i < kms->n_crtcs; i++) { 609 err = komeda_crtc_add(kms, &kms->crtcs[i]); 610 if (err) 611 return err; 612 } 613 614 return 0; 615 } 616