1837d542aSEvan Quan /* 2837d542aSEvan Quan * Copyright 2019 Advanced Micro Devices, Inc. 3837d542aSEvan Quan * 4837d542aSEvan Quan * Permission is hereby granted, free of charge, to any person obtaining a 5837d542aSEvan Quan * copy of this software and associated documentation files (the "Software"), 6837d542aSEvan Quan * to deal in the Software without restriction, including without limitation 7837d542aSEvan Quan * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8837d542aSEvan Quan * and/or sell copies of the Software, and to permit persons to whom the 9837d542aSEvan Quan * Software is furnished to do so, subject to the following conditions: 10837d542aSEvan Quan * 11837d542aSEvan Quan * The above copyright notice and this permission notice shall be included in 12837d542aSEvan Quan * all copies or substantial portions of the Software. 13837d542aSEvan Quan * 14837d542aSEvan Quan * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 15837d542aSEvan Quan * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16837d542aSEvan Quan * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17837d542aSEvan Quan * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 18837d542aSEvan Quan * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 19837d542aSEvan Quan * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 20837d542aSEvan Quan * OTHER DEALINGS IN THE SOFTWARE. 21837d542aSEvan Quan * 22837d542aSEvan Quan */ 23837d542aSEvan Quan 24837d542aSEvan Quan #ifndef ARCTURUS_PP_SMC_H 25837d542aSEvan Quan #define ARCTURUS_PP_SMC_H 26837d542aSEvan Quan 27837d542aSEvan Quan #pragma pack(push, 1) 28837d542aSEvan Quan 29837d542aSEvan Quan // SMU Response Codes: 30837d542aSEvan Quan #define PPSMC_Result_OK 0x1 31837d542aSEvan Quan #define PPSMC_Result_Failed 0xFF 32837d542aSEvan Quan #define PPSMC_Result_UnknownCmd 0xFE 33837d542aSEvan Quan #define PPSMC_Result_CmdRejectedPrereq 0xFD 34837d542aSEvan Quan #define PPSMC_Result_CmdRejectedBusy 0xFC 35837d542aSEvan Quan 36837d542aSEvan Quan // Message Definitions: 37837d542aSEvan Quan // BASIC 38837d542aSEvan Quan #define PPSMC_MSG_TestMessage 0x1 39837d542aSEvan Quan #define PPSMC_MSG_GetSmuVersion 0x2 40837d542aSEvan Quan #define PPSMC_MSG_GetDriverIfVersion 0x3 41837d542aSEvan Quan #define PPSMC_MSG_SetAllowedFeaturesMaskLow 0x4 42837d542aSEvan Quan #define PPSMC_MSG_SetAllowedFeaturesMaskHigh 0x5 43837d542aSEvan Quan #define PPSMC_MSG_EnableAllSmuFeatures 0x6 44837d542aSEvan Quan #define PPSMC_MSG_DisableAllSmuFeatures 0x7 45837d542aSEvan Quan #define PPSMC_MSG_EnableSmuFeaturesLow 0x8 46837d542aSEvan Quan #define PPSMC_MSG_EnableSmuFeaturesHigh 0x9 47837d542aSEvan Quan #define PPSMC_MSG_DisableSmuFeaturesLow 0xA 48837d542aSEvan Quan #define PPSMC_MSG_DisableSmuFeaturesHigh 0xB 49837d542aSEvan Quan #define PPSMC_MSG_GetEnabledSmuFeaturesLow 0xC 50837d542aSEvan Quan #define PPSMC_MSG_GetEnabledSmuFeaturesHigh 0xD 51837d542aSEvan Quan #define PPSMC_MSG_SetDriverDramAddrHigh 0xE 52837d542aSEvan Quan #define PPSMC_MSG_SetDriverDramAddrLow 0xF 53837d542aSEvan Quan #define PPSMC_MSG_SetToolsDramAddrHigh 0x10 54837d542aSEvan Quan #define PPSMC_MSG_SetToolsDramAddrLow 0x11 55837d542aSEvan Quan #define PPSMC_MSG_TransferTableSmu2Dram 0x12 56837d542aSEvan Quan #define PPSMC_MSG_TransferTableDram2Smu 0x13 57837d542aSEvan Quan #define PPSMC_MSG_UseDefaultPPTable 0x14 58837d542aSEvan Quan #define PPSMC_MSG_UseBackupPPTable 0x15 59837d542aSEvan Quan #define PPSMC_MSG_SetSystemVirtualDramAddrHigh 0x16 60837d542aSEvan Quan #define PPSMC_MSG_SetSystemVirtualDramAddrLow 0x17 61837d542aSEvan Quan 62837d542aSEvan Quan //BACO/BAMACO/BOMACO 63837d542aSEvan Quan #define PPSMC_MSG_EnterBaco 0x18 64837d542aSEvan Quan #define PPSMC_MSG_ExitBaco 0x19 65837d542aSEvan Quan #define PPSMC_MSG_ArmD3 0x1A 66837d542aSEvan Quan 67837d542aSEvan Quan //DPM 68837d542aSEvan Quan #define PPSMC_MSG_SetSoftMinByFreq 0x1B 69837d542aSEvan Quan #define PPSMC_MSG_SetSoftMaxByFreq 0x1C 70837d542aSEvan Quan #define PPSMC_MSG_SetHardMinByFreq 0x1D 71837d542aSEvan Quan #define PPSMC_MSG_SetHardMaxByFreq 0x1E 72837d542aSEvan Quan #define PPSMC_MSG_GetMinDpmFreq 0x1F 73837d542aSEvan Quan #define PPSMC_MSG_GetMaxDpmFreq 0x20 74837d542aSEvan Quan #define PPSMC_MSG_GetDpmFreqByIndex 0x21 75837d542aSEvan Quan 76837d542aSEvan Quan #define PPSMC_MSG_SetWorkloadMask 0x22 77837d542aSEvan Quan #define PPSMC_MSG_SetDfSwitchType 0x23 78837d542aSEvan Quan #define PPSMC_MSG_GetVoltageByDpm 0x24 79837d542aSEvan Quan #define PPSMC_MSG_GetVoltageByDpmOverdrive 0x25 80837d542aSEvan Quan 81837d542aSEvan Quan #define PPSMC_MSG_SetPptLimit 0x26 82837d542aSEvan Quan #define PPSMC_MSG_GetPptLimit 0x27 83837d542aSEvan Quan 84837d542aSEvan Quan //Power Gating 85837d542aSEvan Quan #define PPSMC_MSG_PowerUpVcn0 0x28 86837d542aSEvan Quan #define PPSMC_MSG_PowerDownVcn0 0x29 87837d542aSEvan Quan #define PPSMC_MSG_PowerUpVcn1 0x2A 88837d542aSEvan Quan #define PPSMC_MSG_PowerDownVcn1 0x2B 89837d542aSEvan Quan 90837d542aSEvan Quan //Resets and reload 91837d542aSEvan Quan #define PPSMC_MSG_PrepareMp1ForUnload 0x2C 92837d542aSEvan Quan #define PPSMC_MSG_PrepareMp1ForReset 0x2D 93837d542aSEvan Quan #define PPSMC_MSG_PrepareMp1ForShutdown 0x2E 94837d542aSEvan Quan #define PPSMC_MSG_SoftReset 0x2F 95837d542aSEvan Quan 96837d542aSEvan Quan //BTC 97837d542aSEvan Quan #define PPSMC_MSG_RunAfllBtc 0x30 98837d542aSEvan Quan #define PPSMC_MSG_RunDcBtc 0x31 99837d542aSEvan Quan 100837d542aSEvan Quan //Debug 101837d542aSEvan Quan #define PPSMC_MSG_DramLogSetDramAddrHigh 0x33 102837d542aSEvan Quan #define PPSMC_MSG_DramLogSetDramAddrLow 0x34 103837d542aSEvan Quan #define PPSMC_MSG_DramLogSetDramSize 0x35 104837d542aSEvan Quan #define PPSMC_MSG_GetDebugData 0x36 105837d542aSEvan Quan 106837d542aSEvan Quan //WAFL and XGMI 107837d542aSEvan Quan #define PPSMC_MSG_WaflTest 0x37 108837d542aSEvan Quan #define PPSMC_MSG_SetXgmiMode 0x38 109837d542aSEvan Quan 110837d542aSEvan Quan //Others 111837d542aSEvan Quan #define PPSMC_MSG_SetMemoryChannelEnable 0x39 112837d542aSEvan Quan 113837d542aSEvan Quan //OOB 114837d542aSEvan Quan #define PPSMC_MSG_SetNumBadHbmPagesRetired 0x3A 115837d542aSEvan Quan 116837d542aSEvan Quan #define PPSMC_MSG_DFCstateControl 0x3B 117837d542aSEvan Quan #define PPSMC_MSG_GmiPwrDnControl 0x3D 118837d542aSEvan Quan #define PPSMC_Message_Count 0x3E 119837d542aSEvan Quan 120837d542aSEvan Quan #define PPSMC_MSG_ReadSerialNumTop32 0x40 121837d542aSEvan Quan #define PPSMC_MSG_ReadSerialNumBottom32 0x41 122837d542aSEvan Quan 123*faf26f2bSpengfuyuan /* parameter for MSG_LightSBR 124837d542aSEvan Quan * 1 -- Enable light secondary bus reset, only do nbio respond without further handling, 125837d542aSEvan Quan * leave driver to handle the real reset 126837d542aSEvan Quan * 0 -- Disable LightSBR, default behavior, SMU will pass the reset to PSP 127837d542aSEvan Quan */ 128837d542aSEvan Quan #define PPSMC_MSG_LightSBR 0x42 129837d542aSEvan Quan 130837d542aSEvan Quan typedef uint32_t PPSMC_Result; 131837d542aSEvan Quan typedef uint32_t PPSMC_Msg; 132837d542aSEvan Quan #pragma pack(pop) 133837d542aSEvan Quan 134837d542aSEvan Quan #endif 135