1 /*
2  * Copyright 2018 Advanced Micro Devices, Inc.
3  *
4  * Permission is hereby granted, free of charge, to any person obtaining a
5  * copy of this software and associated documentation files (the "Software"),
6  * to deal in the Software without restriction, including without limitation
7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8  * and/or sell copies of the Software, and to permit persons to whom the
9  * Software is furnished to do so, subject to the following conditions:
10  *
11  * The above copyright notice and this permission notice shall be included in
12  * all copies or substantial portions of the Software.
13  *
14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
17  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20  * OTHER DEALINGS IN THE SOFTWARE.
21  *
22  */
23 #include <linux/module.h>
24 #include <linux/slab.h>
25 
26 #include "smu11_driver_if.h"
27 #include "vega20_processpptables.h"
28 #include "ppatomfwctrl.h"
29 #include "atomfirmware.h"
30 #include "pp_debug.h"
31 #include "cgs_common.h"
32 #include "vega20_pptable.h"
33 
34 #define VEGA20_FAN_TARGET_TEMPERATURE_OVERRIDE 105
35 
36 static void set_hw_cap(struct pp_hwmgr *hwmgr, bool enable,
37 		enum phm_platform_caps cap)
38 {
39 	if (enable)
40 		phm_cap_set(hwmgr->platform_descriptor.platformCaps, cap);
41 	else
42 		phm_cap_unset(hwmgr->platform_descriptor.platformCaps, cap);
43 }
44 
45 static const void *get_powerplay_table(struct pp_hwmgr *hwmgr)
46 {
47 	int index = GetIndexIntoMasterDataTable(powerplayinfo);
48 
49 	u16 size;
50 	u8 frev, crev;
51 	const void *table_address = hwmgr->soft_pp_table;
52 
53 	if (!table_address) {
54 		table_address = (ATOM_Vega20_POWERPLAYTABLE *)
55 				smu_atom_get_data_table(hwmgr->adev, index,
56 						&size, &frev, &crev);
57 
58 		hwmgr->soft_pp_table = table_address;
59 		hwmgr->soft_pp_table_size = size;
60 	}
61 
62 	return table_address;
63 }
64 
65 #if 0
66 static void dump_pptable(PPTable_t *pptable)
67 {
68 	int i;
69 
70 	pr_info("Version = 0x%08x\n", pptable->Version);
71 
72 	pr_info("FeaturesToRun[0] = 0x%08x\n", pptable->FeaturesToRun[0]);
73 	pr_info("FeaturesToRun[1] = 0x%08x\n", pptable->FeaturesToRun[1]);
74 
75 	pr_info("SocketPowerLimitAc0 = %d\n", pptable->SocketPowerLimitAc0);
76 	pr_info("SocketPowerLimitAc0Tau = %d\n", pptable->SocketPowerLimitAc0Tau);
77 	pr_info("SocketPowerLimitAc1 = %d\n", pptable->SocketPowerLimitAc1);
78 	pr_info("SocketPowerLimitAc1Tau = %d\n", pptable->SocketPowerLimitAc1Tau);
79 	pr_info("SocketPowerLimitAc2 = %d\n", pptable->SocketPowerLimitAc2);
80 	pr_info("SocketPowerLimitAc2Tau = %d\n", pptable->SocketPowerLimitAc2Tau);
81 	pr_info("SocketPowerLimitAc3 = %d\n", pptable->SocketPowerLimitAc3);
82 	pr_info("SocketPowerLimitAc3Tau = %d\n", pptable->SocketPowerLimitAc3Tau);
83 	pr_info("SocketPowerLimitDc = %d\n", pptable->SocketPowerLimitDc);
84 	pr_info("SocketPowerLimitDcTau = %d\n", pptable->SocketPowerLimitDcTau);
85 	pr_info("TdcLimitSoc = %d\n", pptable->TdcLimitSoc);
86 	pr_info("TdcLimitSocTau = %d\n", pptable->TdcLimitSocTau);
87 	pr_info("TdcLimitGfx = %d\n", pptable->TdcLimitGfx);
88 	pr_info("TdcLimitGfxTau = %d\n", pptable->TdcLimitGfxTau);
89 
90 	pr_info("TedgeLimit = %d\n", pptable->TedgeLimit);
91 	pr_info("ThotspotLimit = %d\n", pptable->ThotspotLimit);
92 	pr_info("ThbmLimit = %d\n", pptable->ThbmLimit);
93 	pr_info("Tvr_gfxLimit = %d\n", pptable->Tvr_gfxLimit);
94 	pr_info("Tvr_memLimit = %d\n", pptable->Tvr_memLimit);
95 	pr_info("Tliquid1Limit = %d\n", pptable->Tliquid1Limit);
96 	pr_info("Tliquid2Limit = %d\n", pptable->Tliquid2Limit);
97 	pr_info("TplxLimit = %d\n", pptable->TplxLimit);
98 	pr_info("FitLimit = %d\n", pptable->FitLimit);
99 
100 	pr_info("PpmPowerLimit = %d\n", pptable->PpmPowerLimit);
101 	pr_info("PpmTemperatureThreshold = %d\n", pptable->PpmTemperatureThreshold);
102 
103 	pr_info("MemoryOnPackage = 0x%02x\n", pptable->MemoryOnPackage);
104 	pr_info("padding8_limits = 0x%02x\n", pptable->padding8_limits);
105 	pr_info("Tvr_SocLimit = %d\n", pptable->Tvr_SocLimit);
106 
107 	pr_info("UlvVoltageOffsetSoc = %d\n", pptable->UlvVoltageOffsetSoc);
108 	pr_info("UlvVoltageOffsetGfx = %d\n", pptable->UlvVoltageOffsetGfx);
109 
110 	pr_info("UlvSmnclkDid = %d\n", pptable->UlvSmnclkDid);
111 	pr_info("UlvMp1clkDid = %d\n", pptable->UlvMp1clkDid);
112 	pr_info("UlvGfxclkBypass = %d\n", pptable->UlvGfxclkBypass);
113 	pr_info("Padding234 = 0x%02x\n", pptable->Padding234);
114 
115 	pr_info("MinVoltageGfx = %d\n", pptable->MinVoltageGfx);
116 	pr_info("MinVoltageSoc = %d\n", pptable->MinVoltageSoc);
117 	pr_info("MaxVoltageGfx = %d\n", pptable->MaxVoltageGfx);
118 	pr_info("MaxVoltageSoc = %d\n", pptable->MaxVoltageSoc);
119 
120 	pr_info("LoadLineResistanceGfx = %d\n", pptable->LoadLineResistanceGfx);
121 	pr_info("LoadLineResistanceSoc = %d\n", pptable->LoadLineResistanceSoc);
122 
123 	pr_info("[PPCLK_GFXCLK]\n"
124 			"  .VoltageMode          = 0x%02x\n"
125 			"  .SnapToDiscrete       = 0x%02x\n"
126 			"  .NumDiscreteLevels    = 0x%02x\n"
127 			"  .padding              = 0x%02x\n"
128 			"  .ConversionToAvfsClk{m = 0x%08x b = 0x%08x}\n"
129 			"  .SsCurve            {a = 0x%08x b = 0x%08x c = 0x%08x}\n",
130 			pptable->DpmDescriptor[PPCLK_GFXCLK].VoltageMode,
131 			pptable->DpmDescriptor[PPCLK_GFXCLK].SnapToDiscrete,
132 			pptable->DpmDescriptor[PPCLK_GFXCLK].NumDiscreteLevels,
133 			pptable->DpmDescriptor[PPCLK_GFXCLK].padding,
134 			pptable->DpmDescriptor[PPCLK_GFXCLK].ConversionToAvfsClk.m,
135 			pptable->DpmDescriptor[PPCLK_GFXCLK].ConversionToAvfsClk.b,
136 			pptable->DpmDescriptor[PPCLK_GFXCLK].SsCurve.a,
137 			pptable->DpmDescriptor[PPCLK_GFXCLK].SsCurve.b,
138 			pptable->DpmDescriptor[PPCLK_GFXCLK].SsCurve.c);
139 
140 	pr_info("[PPCLK_VCLK]\n"
141 			"  .VoltageMode          = 0x%02x\n"
142 			"  .SnapToDiscrete       = 0x%02x\n"
143 			"  .NumDiscreteLevels    = 0x%02x\n"
144 			"  .padding              = 0x%02x\n"
145 			"  .ConversionToAvfsClk{m = 0x%08x b = 0x%08x}\n"
146 			"  .SsCurve            {a = 0x%08x b = 0x%08x c = 0x%08x}\n",
147 			pptable->DpmDescriptor[PPCLK_VCLK].VoltageMode,
148 			pptable->DpmDescriptor[PPCLK_VCLK].SnapToDiscrete,
149 			pptable->DpmDescriptor[PPCLK_VCLK].NumDiscreteLevels,
150 			pptable->DpmDescriptor[PPCLK_VCLK].padding,
151 			pptable->DpmDescriptor[PPCLK_VCLK].ConversionToAvfsClk.m,
152 			pptable->DpmDescriptor[PPCLK_VCLK].ConversionToAvfsClk.b,
153 			pptable->DpmDescriptor[PPCLK_VCLK].SsCurve.a,
154 			pptable->DpmDescriptor[PPCLK_VCLK].SsCurve.b,
155 			pptable->DpmDescriptor[PPCLK_VCLK].SsCurve.c);
156 
157 	pr_info("[PPCLK_DCLK]\n"
158 			"  .VoltageMode          = 0x%02x\n"
159 			"  .SnapToDiscrete       = 0x%02x\n"
160 			"  .NumDiscreteLevels    = 0x%02x\n"
161 			"  .padding              = 0x%02x\n"
162 			"  .ConversionToAvfsClk{m = 0x%08x b = 0x%08x}\n"
163 			"  .SsCurve            {a = 0x%08x b = 0x%08x c = 0x%08x}\n",
164 			pptable->DpmDescriptor[PPCLK_DCLK].VoltageMode,
165 			pptable->DpmDescriptor[PPCLK_DCLK].SnapToDiscrete,
166 			pptable->DpmDescriptor[PPCLK_DCLK].NumDiscreteLevels,
167 			pptable->DpmDescriptor[PPCLK_DCLK].padding,
168 			pptable->DpmDescriptor[PPCLK_DCLK].ConversionToAvfsClk.m,
169 			pptable->DpmDescriptor[PPCLK_DCLK].ConversionToAvfsClk.b,
170 			pptable->DpmDescriptor[PPCLK_DCLK].SsCurve.a,
171 			pptable->DpmDescriptor[PPCLK_DCLK].SsCurve.b,
172 			pptable->DpmDescriptor[PPCLK_DCLK].SsCurve.c);
173 
174 	pr_info("[PPCLK_ECLK]\n"
175 			"  .VoltageMode          = 0x%02x\n"
176 			"  .SnapToDiscrete       = 0x%02x\n"
177 			"  .NumDiscreteLevels    = 0x%02x\n"
178 			"  .padding              = 0x%02x\n"
179 			"  .ConversionToAvfsClk{m = 0x%08x b = 0x%08x}\n"
180 			"  .SsCurve            {a = 0x%08x b = 0x%08x c = 0x%08x}\n",
181 			pptable->DpmDescriptor[PPCLK_ECLK].VoltageMode,
182 			pptable->DpmDescriptor[PPCLK_ECLK].SnapToDiscrete,
183 			pptable->DpmDescriptor[PPCLK_ECLK].NumDiscreteLevels,
184 			pptable->DpmDescriptor[PPCLK_ECLK].padding,
185 			pptable->DpmDescriptor[PPCLK_ECLK].ConversionToAvfsClk.m,
186 			pptable->DpmDescriptor[PPCLK_ECLK].ConversionToAvfsClk.b,
187 			pptable->DpmDescriptor[PPCLK_ECLK].SsCurve.a,
188 			pptable->DpmDescriptor[PPCLK_ECLK].SsCurve.b,
189 			pptable->DpmDescriptor[PPCLK_ECLK].SsCurve.c);
190 
191 	pr_info("[PPCLK_SOCCLK]\n"
192 			"  .VoltageMode          = 0x%02x\n"
193 			"  .SnapToDiscrete       = 0x%02x\n"
194 			"  .NumDiscreteLevels    = 0x%02x\n"
195 			"  .padding              = 0x%02x\n"
196 			"  .ConversionToAvfsClk{m = 0x%08x b = 0x%08x}\n"
197 			"  .SsCurve            {a = 0x%08x b = 0x%08x c = 0x%08x}\n",
198 			pptable->DpmDescriptor[PPCLK_SOCCLK].VoltageMode,
199 			pptable->DpmDescriptor[PPCLK_SOCCLK].SnapToDiscrete,
200 			pptable->DpmDescriptor[PPCLK_SOCCLK].NumDiscreteLevels,
201 			pptable->DpmDescriptor[PPCLK_SOCCLK].padding,
202 			pptable->DpmDescriptor[PPCLK_SOCCLK].ConversionToAvfsClk.m,
203 			pptable->DpmDescriptor[PPCLK_SOCCLK].ConversionToAvfsClk.b,
204 			pptable->DpmDescriptor[PPCLK_SOCCLK].SsCurve.a,
205 			pptable->DpmDescriptor[PPCLK_SOCCLK].SsCurve.b,
206 			pptable->DpmDescriptor[PPCLK_SOCCLK].SsCurve.c);
207 
208 	pr_info("[PPCLK_UCLK]\n"
209 			"  .VoltageMode          = 0x%02x\n"
210 			"  .SnapToDiscrete       = 0x%02x\n"
211 			"  .NumDiscreteLevels    = 0x%02x\n"
212 			"  .padding              = 0x%02x\n"
213 			"  .ConversionToAvfsClk{m = 0x%08x b = 0x%08x}\n"
214 			"  .SsCurve            {a = 0x%08x b = 0x%08x c = 0x%08x}\n",
215 			pptable->DpmDescriptor[PPCLK_UCLK].VoltageMode,
216 			pptable->DpmDescriptor[PPCLK_UCLK].SnapToDiscrete,
217 			pptable->DpmDescriptor[PPCLK_UCLK].NumDiscreteLevels,
218 			pptable->DpmDescriptor[PPCLK_UCLK].padding,
219 			pptable->DpmDescriptor[PPCLK_UCLK].ConversionToAvfsClk.m,
220 			pptable->DpmDescriptor[PPCLK_UCLK].ConversionToAvfsClk.b,
221 			pptable->DpmDescriptor[PPCLK_UCLK].SsCurve.a,
222 			pptable->DpmDescriptor[PPCLK_UCLK].SsCurve.b,
223 			pptable->DpmDescriptor[PPCLK_UCLK].SsCurve.c);
224 
225 	pr_info("[PPCLK_DCEFCLK]\n"
226 			"  .VoltageMode          = 0x%02x\n"
227 			"  .SnapToDiscrete       = 0x%02x\n"
228 			"  .NumDiscreteLevels    = 0x%02x\n"
229 			"  .padding              = 0x%02x\n"
230 			"  .ConversionToAvfsClk{m = 0x%08x b = 0x%08x}\n"
231 			"  .SsCurve            {a = 0x%08x b = 0x%08x c = 0x%08x}\n",
232 			pptable->DpmDescriptor[PPCLK_DCEFCLK].VoltageMode,
233 			pptable->DpmDescriptor[PPCLK_DCEFCLK].SnapToDiscrete,
234 			pptable->DpmDescriptor[PPCLK_DCEFCLK].NumDiscreteLevels,
235 			pptable->DpmDescriptor[PPCLK_DCEFCLK].padding,
236 			pptable->DpmDescriptor[PPCLK_DCEFCLK].ConversionToAvfsClk.m,
237 			pptable->DpmDescriptor[PPCLK_DCEFCLK].ConversionToAvfsClk.b,
238 			pptable->DpmDescriptor[PPCLK_DCEFCLK].SsCurve.a,
239 			pptable->DpmDescriptor[PPCLK_DCEFCLK].SsCurve.b,
240 			pptable->DpmDescriptor[PPCLK_DCEFCLK].SsCurve.c);
241 
242 	pr_info("[PPCLK_DISPCLK]\n"
243 			"  .VoltageMode          = 0x%02x\n"
244 			"  .SnapToDiscrete       = 0x%02x\n"
245 			"  .NumDiscreteLevels    = 0x%02x\n"
246 			"  .padding              = 0x%02x\n"
247 			"  .ConversionToAvfsClk{m = 0x%08x b = 0x%08x}\n"
248 			"  .SsCurve            {a = 0x%08x b = 0x%08x c = 0x%08x}\n",
249 			pptable->DpmDescriptor[PPCLK_DISPCLK].VoltageMode,
250 			pptable->DpmDescriptor[PPCLK_DISPCLK].SnapToDiscrete,
251 			pptable->DpmDescriptor[PPCLK_DISPCLK].NumDiscreteLevels,
252 			pptable->DpmDescriptor[PPCLK_DISPCLK].padding,
253 			pptable->DpmDescriptor[PPCLK_DISPCLK].ConversionToAvfsClk.m,
254 			pptable->DpmDescriptor[PPCLK_DISPCLK].ConversionToAvfsClk.b,
255 			pptable->DpmDescriptor[PPCLK_DISPCLK].SsCurve.a,
256 			pptable->DpmDescriptor[PPCLK_DISPCLK].SsCurve.b,
257 			pptable->DpmDescriptor[PPCLK_DISPCLK].SsCurve.c);
258 
259 	pr_info("[PPCLK_PIXCLK]\n"
260 			"  .VoltageMode          = 0x%02x\n"
261 			"  .SnapToDiscrete       = 0x%02x\n"
262 			"  .NumDiscreteLevels    = 0x%02x\n"
263 			"  .padding              = 0x%02x\n"
264 			"  .ConversionToAvfsClk{m = 0x%08x b = 0x%08x}\n"
265 			"  .SsCurve            {a = 0x%08x b = 0x%08x c = 0x%08x}\n",
266 			pptable->DpmDescriptor[PPCLK_PIXCLK].VoltageMode,
267 			pptable->DpmDescriptor[PPCLK_PIXCLK].SnapToDiscrete,
268 			pptable->DpmDescriptor[PPCLK_PIXCLK].NumDiscreteLevels,
269 			pptable->DpmDescriptor[PPCLK_PIXCLK].padding,
270 			pptable->DpmDescriptor[PPCLK_PIXCLK].ConversionToAvfsClk.m,
271 			pptable->DpmDescriptor[PPCLK_PIXCLK].ConversionToAvfsClk.b,
272 			pptable->DpmDescriptor[PPCLK_PIXCLK].SsCurve.a,
273 			pptable->DpmDescriptor[PPCLK_PIXCLK].SsCurve.b,
274 			pptable->DpmDescriptor[PPCLK_PIXCLK].SsCurve.c);
275 
276 	pr_info("[PPCLK_PHYCLK]\n"
277 			"  .VoltageMode          = 0x%02x\n"
278 			"  .SnapToDiscrete       = 0x%02x\n"
279 			"  .NumDiscreteLevels    = 0x%02x\n"
280 			"  .padding              = 0x%02x\n"
281 			"  .ConversionToAvfsClk{m = 0x%08x b = 0x%08x}\n"
282 			"  .SsCurve            {a = 0x%08x b = 0x%08x c = 0x%08x}\n",
283 			pptable->DpmDescriptor[PPCLK_PHYCLK].VoltageMode,
284 			pptable->DpmDescriptor[PPCLK_PHYCLK].SnapToDiscrete,
285 			pptable->DpmDescriptor[PPCLK_PHYCLK].NumDiscreteLevels,
286 			pptable->DpmDescriptor[PPCLK_PHYCLK].padding,
287 			pptable->DpmDescriptor[PPCLK_PHYCLK].ConversionToAvfsClk.m,
288 			pptable->DpmDescriptor[PPCLK_PHYCLK].ConversionToAvfsClk.b,
289 			pptable->DpmDescriptor[PPCLK_PHYCLK].SsCurve.a,
290 			pptable->DpmDescriptor[PPCLK_PHYCLK].SsCurve.b,
291 			pptable->DpmDescriptor[PPCLK_PHYCLK].SsCurve.c);
292 
293 	pr_info("[PPCLK_FCLK]\n"
294 			"  .VoltageMode          = 0x%02x\n"
295 			"  .SnapToDiscrete       = 0x%02x\n"
296 			"  .NumDiscreteLevels    = 0x%02x\n"
297 			"  .padding              = 0x%02x\n"
298 			"  .ConversionToAvfsClk{m = 0x%08x b = 0x%08x}\n"
299 			"  .SsCurve            {a = 0x%08x b = 0x%08x c = 0x%08x}\n",
300 			pptable->DpmDescriptor[PPCLK_FCLK].VoltageMode,
301 			pptable->DpmDescriptor[PPCLK_FCLK].SnapToDiscrete,
302 			pptable->DpmDescriptor[PPCLK_FCLK].NumDiscreteLevels,
303 			pptable->DpmDescriptor[PPCLK_FCLK].padding,
304 			pptable->DpmDescriptor[PPCLK_FCLK].ConversionToAvfsClk.m,
305 			pptable->DpmDescriptor[PPCLK_FCLK].ConversionToAvfsClk.b,
306 			pptable->DpmDescriptor[PPCLK_FCLK].SsCurve.a,
307 			pptable->DpmDescriptor[PPCLK_FCLK].SsCurve.b,
308 			pptable->DpmDescriptor[PPCLK_FCLK].SsCurve.c);
309 
310 
311 	pr_info("FreqTableGfx\n");
312 	for (i = 0; i < NUM_GFXCLK_DPM_LEVELS; i++)
313 		pr_info("  .[%02d] = %d\n", i, pptable->FreqTableGfx[i]);
314 
315 	pr_info("FreqTableVclk\n");
316 	for (i = 0; i < NUM_VCLK_DPM_LEVELS; i++)
317 		pr_info("  .[%02d] = %d\n", i, pptable->FreqTableVclk[i]);
318 
319 	pr_info("FreqTableDclk\n");
320 	for (i = 0; i < NUM_DCLK_DPM_LEVELS; i++)
321 		pr_info("  .[%02d] = %d\n", i, pptable->FreqTableDclk[i]);
322 
323 	pr_info("FreqTableEclk\n");
324 	for (i = 0; i < NUM_ECLK_DPM_LEVELS; i++)
325 		pr_info("  .[%02d] = %d\n", i, pptable->FreqTableEclk[i]);
326 
327 	pr_info("FreqTableSocclk\n");
328 	for (i = 0; i < NUM_SOCCLK_DPM_LEVELS; i++)
329 		pr_info("  .[%02d] = %d\n", i, pptable->FreqTableSocclk[i]);
330 
331 	pr_info("FreqTableUclk\n");
332 	for (i = 0; i < NUM_UCLK_DPM_LEVELS; i++)
333 		pr_info("  .[%02d] = %d\n", i, pptable->FreqTableUclk[i]);
334 
335 	pr_info("FreqTableFclk\n");
336 	for (i = 0; i < NUM_FCLK_DPM_LEVELS; i++)
337 		pr_info("  .[%02d] = %d\n", i, pptable->FreqTableFclk[i]);
338 
339 	pr_info("FreqTableDcefclk\n");
340 	for (i = 0; i < NUM_DCEFCLK_DPM_LEVELS; i++)
341 		pr_info("  .[%02d] = %d\n", i, pptable->FreqTableDcefclk[i]);
342 
343 	pr_info("FreqTableDispclk\n");
344 	for (i = 0; i < NUM_DISPCLK_DPM_LEVELS; i++)
345 		pr_info("  .[%02d] = %d\n", i, pptable->FreqTableDispclk[i]);
346 
347 	pr_info("FreqTablePixclk\n");
348 	for (i = 0; i < NUM_PIXCLK_DPM_LEVELS; i++)
349 		pr_info("  .[%02d] = %d\n", i, pptable->FreqTablePixclk[i]);
350 
351 	pr_info("FreqTablePhyclk\n");
352 	for (i = 0; i < NUM_PHYCLK_DPM_LEVELS; i++)
353 		pr_info("  .[%02d] = %d\n", i, pptable->FreqTablePhyclk[i]);
354 
355 	pr_info("DcModeMaxFreq[PPCLK_GFXCLK] = %d\n", pptable->DcModeMaxFreq[PPCLK_GFXCLK]);
356 	pr_info("DcModeMaxFreq[PPCLK_VCLK] = %d\n", pptable->DcModeMaxFreq[PPCLK_VCLK]);
357 	pr_info("DcModeMaxFreq[PPCLK_DCLK] = %d\n", pptable->DcModeMaxFreq[PPCLK_DCLK]);
358 	pr_info("DcModeMaxFreq[PPCLK_ECLK] = %d\n", pptable->DcModeMaxFreq[PPCLK_ECLK]);
359 	pr_info("DcModeMaxFreq[PPCLK_SOCCLK] = %d\n", pptable->DcModeMaxFreq[PPCLK_SOCCLK]);
360 	pr_info("DcModeMaxFreq[PPCLK_UCLK] = %d\n", pptable->DcModeMaxFreq[PPCLK_UCLK]);
361 	pr_info("DcModeMaxFreq[PPCLK_DCEFCLK] = %d\n", pptable->DcModeMaxFreq[PPCLK_DCEFCLK]);
362 	pr_info("DcModeMaxFreq[PPCLK_DISPCLK] = %d\n", pptable->DcModeMaxFreq[PPCLK_DISPCLK]);
363 	pr_info("DcModeMaxFreq[PPCLK_PIXCLK] = %d\n", pptable->DcModeMaxFreq[PPCLK_PIXCLK]);
364 	pr_info("DcModeMaxFreq[PPCLK_PHYCLK] = %d\n", pptable->DcModeMaxFreq[PPCLK_PHYCLK]);
365 	pr_info("DcModeMaxFreq[PPCLK_FCLK] = %d\n", pptable->DcModeMaxFreq[PPCLK_FCLK]);
366 	pr_info("Padding8_Clks = %d\n", pptable->Padding8_Clks);
367 
368 	pr_info("Mp0clkFreq\n");
369 	for (i = 0; i < NUM_MP0CLK_DPM_LEVELS; i++)
370 		pr_info("  .[%d] = %d\n", i, pptable->Mp0clkFreq[i]);
371 
372 	pr_info("Mp0DpmVoltage\n");
373 	for (i = 0; i < NUM_MP0CLK_DPM_LEVELS; i++)
374 		pr_info("  .[%d] = %d\n", i, pptable->Mp0DpmVoltage[i]);
375 
376 	pr_info("GfxclkFidle = 0x%x\n", pptable->GfxclkFidle);
377 	pr_info("GfxclkSlewRate = 0x%x\n", pptable->GfxclkSlewRate);
378 	pr_info("CksEnableFreq = 0x%x\n", pptable->CksEnableFreq);
379 	pr_info("Padding789 = 0x%x\n", pptable->Padding789);
380 	pr_info("CksVoltageOffset[a = 0x%08x b = 0x%08x c = 0x%08x]\n",
381 			pptable->CksVoltageOffset.a,
382 			pptable->CksVoltageOffset.b,
383 			pptable->CksVoltageOffset.c);
384 	pr_info("Padding567[0] = 0x%x\n", pptable->Padding567[0]);
385 	pr_info("Padding567[1] = 0x%x\n", pptable->Padding567[1]);
386 	pr_info("Padding567[2] = 0x%x\n", pptable->Padding567[2]);
387 	pr_info("Padding567[3] = 0x%x\n", pptable->Padding567[3]);
388 	pr_info("GfxclkDsMaxFreq = %d\n", pptable->GfxclkDsMaxFreq);
389 	pr_info("GfxclkSource = 0x%x\n", pptable->GfxclkSource);
390 	pr_info("Padding456 = 0x%x\n", pptable->Padding456);
391 
392 	pr_info("LowestUclkReservedForUlv = %d\n", pptable->LowestUclkReservedForUlv);
393 	pr_info("Padding8_Uclk[0] = 0x%x\n", pptable->Padding8_Uclk[0]);
394 	pr_info("Padding8_Uclk[1] = 0x%x\n", pptable->Padding8_Uclk[1]);
395 	pr_info("Padding8_Uclk[2] = 0x%x\n", pptable->Padding8_Uclk[2]);
396 
397 	pr_info("PcieGenSpeed\n");
398 	for (i = 0; i < NUM_LINK_LEVELS; i++)
399 		pr_info("  .[%d] = %d\n", i, pptable->PcieGenSpeed[i]);
400 
401 	pr_info("PcieLaneCount\n");
402 	for (i = 0; i < NUM_LINK_LEVELS; i++)
403 		pr_info("  .[%d] = %d\n", i, pptable->PcieLaneCount[i]);
404 
405 	pr_info("LclkFreq\n");
406 	for (i = 0; i < NUM_LINK_LEVELS; i++)
407 		pr_info("  .[%d] = %d\n", i, pptable->LclkFreq[i]);
408 
409 	pr_info("EnableTdpm = %d\n", pptable->EnableTdpm);
410 	pr_info("TdpmHighHystTemperature = %d\n", pptable->TdpmHighHystTemperature);
411 	pr_info("TdpmLowHystTemperature = %d\n", pptable->TdpmLowHystTemperature);
412 	pr_info("GfxclkFreqHighTempLimit = %d\n", pptable->GfxclkFreqHighTempLimit);
413 
414 	pr_info("FanStopTemp = %d\n", pptable->FanStopTemp);
415 	pr_info("FanStartTemp = %d\n", pptable->FanStartTemp);
416 
417 	pr_info("FanGainEdge = %d\n", pptable->FanGainEdge);
418 	pr_info("FanGainHotspot = %d\n", pptable->FanGainHotspot);
419 	pr_info("FanGainLiquid = %d\n", pptable->FanGainLiquid);
420 	pr_info("FanGainVrGfx = %d\n", pptable->FanGainVrGfx);
421 	pr_info("FanGainVrSoc = %d\n", pptable->FanGainVrSoc);
422 	pr_info("FanGainPlx = %d\n", pptable->FanGainPlx);
423 	pr_info("FanGainHbm = %d\n", pptable->FanGainHbm);
424 	pr_info("FanPwmMin = %d\n", pptable->FanPwmMin);
425 	pr_info("FanAcousticLimitRpm = %d\n", pptable->FanAcousticLimitRpm);
426 	pr_info("FanThrottlingRpm = %d\n", pptable->FanThrottlingRpm);
427 	pr_info("FanMaximumRpm = %d\n", pptable->FanMaximumRpm);
428 	pr_info("FanTargetTemperature = %d\n", pptable->FanTargetTemperature);
429 	pr_info("FanTargetGfxclk = %d\n", pptable->FanTargetGfxclk);
430 	pr_info("FanZeroRpmEnable = %d\n", pptable->FanZeroRpmEnable);
431 	pr_info("FanTachEdgePerRev = %d\n", pptable->FanTachEdgePerRev);
432 
433 	pr_info("FuzzyFan_ErrorSetDelta = %d\n", pptable->FuzzyFan_ErrorSetDelta);
434 	pr_info("FuzzyFan_ErrorRateSetDelta = %d\n", pptable->FuzzyFan_ErrorRateSetDelta);
435 	pr_info("FuzzyFan_PwmSetDelta = %d\n", pptable->FuzzyFan_PwmSetDelta);
436 	pr_info("FuzzyFan_Reserved = %d\n", pptable->FuzzyFan_Reserved);
437 
438 	pr_info("OverrideAvfsGb[AVFS_VOLTAGE_GFX] = 0x%x\n", pptable->OverrideAvfsGb[AVFS_VOLTAGE_GFX]);
439 	pr_info("OverrideAvfsGb[AVFS_VOLTAGE_SOC] = 0x%x\n", pptable->OverrideAvfsGb[AVFS_VOLTAGE_SOC]);
440 	pr_info("Padding8_Avfs[0] = %d\n", pptable->Padding8_Avfs[0]);
441 	pr_info("Padding8_Avfs[1] = %d\n", pptable->Padding8_Avfs[1]);
442 
443 	pr_info("qAvfsGb[AVFS_VOLTAGE_GFX]{a = 0x%x b = 0x%x c = 0x%x}\n",
444 			pptable->qAvfsGb[AVFS_VOLTAGE_GFX].a,
445 			pptable->qAvfsGb[AVFS_VOLTAGE_GFX].b,
446 			pptable->qAvfsGb[AVFS_VOLTAGE_GFX].c);
447 	pr_info("qAvfsGb[AVFS_VOLTAGE_SOC]{a = 0x%x b = 0x%x c = 0x%x}\n",
448 			pptable->qAvfsGb[AVFS_VOLTAGE_SOC].a,
449 			pptable->qAvfsGb[AVFS_VOLTAGE_SOC].b,
450 			pptable->qAvfsGb[AVFS_VOLTAGE_SOC].c);
451 	pr_info("dBtcGbGfxCksOn{a = 0x%x b = 0x%x c = 0x%x}\n",
452 			pptable->dBtcGbGfxCksOn.a,
453 			pptable->dBtcGbGfxCksOn.b,
454 			pptable->dBtcGbGfxCksOn.c);
455 	pr_info("dBtcGbGfxCksOff{a = 0x%x b = 0x%x c = 0x%x}\n",
456 			pptable->dBtcGbGfxCksOff.a,
457 			pptable->dBtcGbGfxCksOff.b,
458 			pptable->dBtcGbGfxCksOff.c);
459 	pr_info("dBtcGbGfxAfll{a = 0x%x b = 0x%x c = 0x%x}\n",
460 			pptable->dBtcGbGfxAfll.a,
461 			pptable->dBtcGbGfxAfll.b,
462 			pptable->dBtcGbGfxAfll.c);
463 	pr_info("dBtcGbSoc{a = 0x%x b = 0x%x c = 0x%x}\n",
464 			pptable->dBtcGbSoc.a,
465 			pptable->dBtcGbSoc.b,
466 			pptable->dBtcGbSoc.c);
467 	pr_info("qAgingGb[AVFS_VOLTAGE_GFX]{m = 0x%x b = 0x%x}\n",
468 			pptable->qAgingGb[AVFS_VOLTAGE_GFX].m,
469 			pptable->qAgingGb[AVFS_VOLTAGE_GFX].b);
470 	pr_info("qAgingGb[AVFS_VOLTAGE_SOC]{m = 0x%x b = 0x%x}\n",
471 			pptable->qAgingGb[AVFS_VOLTAGE_SOC].m,
472 			pptable->qAgingGb[AVFS_VOLTAGE_SOC].b);
473 
474 	pr_info("qStaticVoltageOffset[AVFS_VOLTAGE_GFX]{a = 0x%x b = 0x%x c = 0x%x}\n",
475 			pptable->qStaticVoltageOffset[AVFS_VOLTAGE_GFX].a,
476 			pptable->qStaticVoltageOffset[AVFS_VOLTAGE_GFX].b,
477 			pptable->qStaticVoltageOffset[AVFS_VOLTAGE_GFX].c);
478 	pr_info("qStaticVoltageOffset[AVFS_VOLTAGE_SOC]{a = 0x%x b = 0x%x c = 0x%x}\n",
479 			pptable->qStaticVoltageOffset[AVFS_VOLTAGE_SOC].a,
480 			pptable->qStaticVoltageOffset[AVFS_VOLTAGE_SOC].b,
481 			pptable->qStaticVoltageOffset[AVFS_VOLTAGE_SOC].c);
482 
483 	pr_info("DcTol[AVFS_VOLTAGE_GFX] = 0x%x\n", pptable->DcTol[AVFS_VOLTAGE_GFX]);
484 	pr_info("DcTol[AVFS_VOLTAGE_SOC] = 0x%x\n", pptable->DcTol[AVFS_VOLTAGE_SOC]);
485 
486 	pr_info("DcBtcEnabled[AVFS_VOLTAGE_GFX] = 0x%x\n", pptable->DcBtcEnabled[AVFS_VOLTAGE_GFX]);
487 	pr_info("DcBtcEnabled[AVFS_VOLTAGE_SOC] = 0x%x\n", pptable->DcBtcEnabled[AVFS_VOLTAGE_SOC]);
488 	pr_info("Padding8_GfxBtc[0] = 0x%x\n", pptable->Padding8_GfxBtc[0]);
489 	pr_info("Padding8_GfxBtc[1] = 0x%x\n", pptable->Padding8_GfxBtc[1]);
490 
491 	pr_info("DcBtcMin[AVFS_VOLTAGE_GFX] = 0x%x\n", pptable->DcBtcMin[AVFS_VOLTAGE_GFX]);
492 	pr_info("DcBtcMin[AVFS_VOLTAGE_SOC] = 0x%x\n", pptable->DcBtcMin[AVFS_VOLTAGE_SOC]);
493 	pr_info("DcBtcMax[AVFS_VOLTAGE_GFX] = 0x%x\n", pptable->DcBtcMax[AVFS_VOLTAGE_GFX]);
494 	pr_info("DcBtcMax[AVFS_VOLTAGE_SOC] = 0x%x\n", pptable->DcBtcMax[AVFS_VOLTAGE_SOC]);
495 
496 	pr_info("XgmiLinkSpeed\n");
497 	for (i = 0; i < NUM_XGMI_LEVELS; i++)
498 		pr_info("  .[%d] = %d\n", i, pptable->XgmiLinkSpeed[i]);
499 	pr_info("XgmiLinkWidth\n");
500 	for (i = 0; i < NUM_XGMI_LEVELS; i++)
501 		pr_info("  .[%d] = %d\n", i, pptable->XgmiLinkWidth[i]);
502 	pr_info("XgmiFclkFreq\n");
503 	for (i = 0; i < NUM_XGMI_LEVELS; i++)
504 		pr_info("  .[%d] = %d\n", i, pptable->XgmiFclkFreq[i]);
505 	pr_info("XgmiUclkFreq\n");
506 	for (i = 0; i < NUM_XGMI_LEVELS; i++)
507 		pr_info("  .[%d] = %d\n", i, pptable->XgmiUclkFreq[i]);
508 	pr_info("XgmiSocclkFreq\n");
509 	for (i = 0; i < NUM_XGMI_LEVELS; i++)
510 		pr_info("  .[%d] = %d\n", i, pptable->XgmiSocclkFreq[i]);
511 	pr_info("XgmiSocVoltage\n");
512 	for (i = 0; i < NUM_XGMI_LEVELS; i++)
513 		pr_info("  .[%d] = %d\n", i, pptable->XgmiSocVoltage[i]);
514 
515 	pr_info("DebugOverrides = 0x%x\n", pptable->DebugOverrides);
516 	pr_info("ReservedEquation0{a = 0x%x b = 0x%x c = 0x%x}\n",
517 			pptable->ReservedEquation0.a,
518 			pptable->ReservedEquation0.b,
519 			pptable->ReservedEquation0.c);
520 	pr_info("ReservedEquation1{a = 0x%x b = 0x%x c = 0x%x}\n",
521 			pptable->ReservedEquation1.a,
522 			pptable->ReservedEquation1.b,
523 			pptable->ReservedEquation1.c);
524 	pr_info("ReservedEquation2{a = 0x%x b = 0x%x c = 0x%x}\n",
525 			pptable->ReservedEquation2.a,
526 			pptable->ReservedEquation2.b,
527 			pptable->ReservedEquation2.c);
528 	pr_info("ReservedEquation3{a = 0x%x b = 0x%x c = 0x%x}\n",
529 			pptable->ReservedEquation3.a,
530 			pptable->ReservedEquation3.b,
531 			pptable->ReservedEquation3.c);
532 
533 	pr_info("MinVoltageUlvGfx = %d\n", pptable->MinVoltageUlvGfx);
534 	pr_info("MinVoltageUlvSoc = %d\n", pptable->MinVoltageUlvSoc);
535 
536 	pr_info("MGpuFanBoostLimitRpm = %d\n", pptable->MGpuFanBoostLimitRpm);
537 	pr_info("padding16_Fan = %d\n", pptable->padding16_Fan);
538 
539 	pr_info("FanGainVrMem0 = %d\n", pptable->FanGainVrMem0);
540 	pr_info("FanGainVrMem0 = %d\n", pptable->FanGainVrMem0);
541 
542 	pr_info("DcBtcGb[AVFS_VOLTAGE_GFX] = 0x%x\n", pptable->DcBtcGb[AVFS_VOLTAGE_GFX]);
543 	pr_info("DcBtcGb[AVFS_VOLTAGE_SOC] = 0x%x\n", pptable->DcBtcGb[AVFS_VOLTAGE_SOC]);
544 
545 	for (i = 0; i < 11; i++)
546 		pr_info("Reserved[%d] = 0x%x\n", i, pptable->Reserved[i]);
547 
548 	for (i = 0; i < 3; i++)
549 		pr_info("Padding32[%d] = 0x%x\n", i, pptable->Padding32[i]);
550 
551 	pr_info("MaxVoltageStepGfx = 0x%x\n", pptable->MaxVoltageStepGfx);
552 	pr_info("MaxVoltageStepSoc = 0x%x\n", pptable->MaxVoltageStepSoc);
553 
554 	pr_info("VddGfxVrMapping = 0x%x\n", pptable->VddGfxVrMapping);
555 	pr_info("VddSocVrMapping = 0x%x\n", pptable->VddSocVrMapping);
556 	pr_info("VddMem0VrMapping = 0x%x\n", pptable->VddMem0VrMapping);
557 	pr_info("VddMem1VrMapping = 0x%x\n", pptable->VddMem1VrMapping);
558 
559 	pr_info("GfxUlvPhaseSheddingMask = 0x%x\n", pptable->GfxUlvPhaseSheddingMask);
560 	pr_info("SocUlvPhaseSheddingMask = 0x%x\n", pptable->SocUlvPhaseSheddingMask);
561 	pr_info("ExternalSensorPresent = 0x%x\n", pptable->ExternalSensorPresent);
562 	pr_info("Padding8_V = 0x%x\n", pptable->Padding8_V);
563 
564 	pr_info("GfxMaxCurrent = 0x%x\n", pptable->GfxMaxCurrent);
565 	pr_info("GfxOffset = 0x%x\n", pptable->GfxOffset);
566 	pr_info("Padding_TelemetryGfx = 0x%x\n", pptable->Padding_TelemetryGfx);
567 
568 	pr_info("SocMaxCurrent = 0x%x\n", pptable->SocMaxCurrent);
569 	pr_info("SocOffset = 0x%x\n", pptable->SocOffset);
570 	pr_info("Padding_TelemetrySoc = 0x%x\n", pptable->Padding_TelemetrySoc);
571 
572 	pr_info("Mem0MaxCurrent = 0x%x\n", pptable->Mem0MaxCurrent);
573 	pr_info("Mem0Offset = 0x%x\n", pptable->Mem0Offset);
574 	pr_info("Padding_TelemetryMem0 = 0x%x\n", pptable->Padding_TelemetryMem0);
575 
576 	pr_info("Mem1MaxCurrent = 0x%x\n", pptable->Mem1MaxCurrent);
577 	pr_info("Mem1Offset = 0x%x\n", pptable->Mem1Offset);
578 	pr_info("Padding_TelemetryMem1 = 0x%x\n", pptable->Padding_TelemetryMem1);
579 
580 	pr_info("AcDcGpio = %d\n", pptable->AcDcGpio);
581 	pr_info("AcDcPolarity = %d\n", pptable->AcDcPolarity);
582 	pr_info("VR0HotGpio = %d\n", pptable->VR0HotGpio);
583 	pr_info("VR0HotPolarity = %d\n", pptable->VR0HotPolarity);
584 
585 	pr_info("VR1HotGpio = %d\n", pptable->VR1HotGpio);
586 	pr_info("VR1HotPolarity = %d\n", pptable->VR1HotPolarity);
587 	pr_info("Padding1 = 0x%x\n", pptable->Padding1);
588 	pr_info("Padding2 = 0x%x\n", pptable->Padding2);
589 
590 	pr_info("LedPin0 = %d\n", pptable->LedPin0);
591 	pr_info("LedPin1 = %d\n", pptable->LedPin1);
592 	pr_info("LedPin2 = %d\n", pptable->LedPin2);
593 	pr_info("padding8_4 = 0x%x\n", pptable->padding8_4);
594 
595 	pr_info("PllGfxclkSpreadEnabled = %d\n", pptable->PllGfxclkSpreadEnabled);
596 	pr_info("PllGfxclkSpreadPercent = %d\n", pptable->PllGfxclkSpreadPercent);
597 	pr_info("PllGfxclkSpreadFreq = %d\n", pptable->PllGfxclkSpreadFreq);
598 
599 	pr_info("UclkSpreadEnabled = %d\n", pptable->UclkSpreadEnabled);
600 	pr_info("UclkSpreadPercent = %d\n", pptable->UclkSpreadPercent);
601 	pr_info("UclkSpreadFreq = %d\n", pptable->UclkSpreadFreq);
602 
603 	pr_info("FclkSpreadEnabled = %d\n", pptable->FclkSpreadEnabled);
604 	pr_info("FclkSpreadPercent = %d\n", pptable->FclkSpreadPercent);
605 	pr_info("FclkSpreadFreq = %d\n", pptable->FclkSpreadFreq);
606 
607 	pr_info("FllGfxclkSpreadEnabled = %d\n", pptable->FllGfxclkSpreadEnabled);
608 	pr_info("FllGfxclkSpreadPercent = %d\n", pptable->FllGfxclkSpreadPercent);
609 	pr_info("FllGfxclkSpreadFreq = %d\n", pptable->FllGfxclkSpreadFreq);
610 
611 	for (i = 0; i < I2C_CONTROLLER_NAME_COUNT; i++) {
612 		pr_info("I2cControllers[%d]:\n", i);
613 		pr_info("                   .Enabled = %d\n",
614 				pptable->I2cControllers[i].Enabled);
615 		pr_info("                   .SlaveAddress = 0x%x\n",
616 				pptable->I2cControllers[i].SlaveAddress);
617 		pr_info("                   .ControllerPort = %d\n",
618 				pptable->I2cControllers[i].ControllerPort);
619 		pr_info("                   .ControllerName = %d\n",
620 				pptable->I2cControllers[i].ControllerName);
621 		pr_info("                   .ThermalThrottler = %d\n",
622 				pptable->I2cControllers[i].ThermalThrottler);
623 		pr_info("                   .I2cProtocol = %d\n",
624 				pptable->I2cControllers[i].I2cProtocol);
625 		pr_info("                   .I2cSpeed = %d\n",
626 				pptable->I2cControllers[i].I2cSpeed);
627 	}
628 
629 	for (i = 0; i < 10; i++)
630 		pr_info("BoardReserved[%d] = 0x%x\n", i, pptable->BoardReserved[i]);
631 
632 	for (i = 0; i < 8; i++)
633 		pr_info("MmHubPadding[%d] = 0x%x\n", i, pptable->MmHubPadding[i]);
634 }
635 #endif
636 
637 static int check_powerplay_tables(
638 		struct pp_hwmgr *hwmgr,
639 		const ATOM_Vega20_POWERPLAYTABLE *powerplay_table)
640 {
641 	PP_ASSERT_WITH_CODE((powerplay_table->sHeader.format_revision >=
642 		ATOM_VEGA20_TABLE_REVISION_VEGA20),
643 		"Unsupported PPTable format!", return -1);
644 	PP_ASSERT_WITH_CODE(powerplay_table->sHeader.structuresize > 0,
645 		"Invalid PowerPlay Table!", return -1);
646 
647 	if (powerplay_table->smcPPTable.Version != PPTABLE_V20_SMU_VERSION) {
648 		pr_info("Unmatch PPTable version: "
649 			"pptable from VBIOS is V%d while driver supported is V%d!",
650 			powerplay_table->smcPPTable.Version,
651 			PPTABLE_V20_SMU_VERSION);
652 		return -EINVAL;
653 	}
654 
655 	//dump_pptable(&powerplay_table->smcPPTable);
656 
657 	return 0;
658 }
659 
660 static int set_platform_caps(struct pp_hwmgr *hwmgr, uint32_t powerplay_caps)
661 {
662 	set_hw_cap(
663 		hwmgr,
664 		0 != (powerplay_caps & ATOM_VEGA20_PP_PLATFORM_CAP_POWERPLAY),
665 		PHM_PlatformCaps_PowerPlaySupport);
666 
667 	set_hw_cap(
668 		hwmgr,
669 		0 != (powerplay_caps & ATOM_VEGA20_PP_PLATFORM_CAP_SBIOSPOWERSOURCE),
670 		PHM_PlatformCaps_BiosPowerSourceControl);
671 
672 	set_hw_cap(
673 		hwmgr,
674 		0 != (powerplay_caps & ATOM_VEGA20_PP_PLATFORM_CAP_BACO),
675 		PHM_PlatformCaps_BACO);
676 
677 	set_hw_cap(
678 		hwmgr,
679 		0 != (powerplay_caps & ATOM_VEGA20_PP_PLATFORM_CAP_BAMACO),
680 		 PHM_PlatformCaps_BAMACO);
681 
682 	return 0;
683 }
684 
685 static int copy_overdrive_feature_capabilities_array(
686 		struct pp_hwmgr *hwmgr,
687 		uint8_t **pptable_info_array,
688 		const uint8_t *pptable_array,
689 		uint8_t od_feature_count)
690 {
691 	uint32_t array_size, i;
692 	uint8_t *table;
693 	bool od_supported = false;
694 
695 	array_size = sizeof(uint8_t) * od_feature_count;
696 	table = kzalloc(array_size, GFP_KERNEL);
697 	if (NULL == table)
698 		return -ENOMEM;
699 
700 	for (i = 0; i < od_feature_count; i++) {
701 		table[i] = le32_to_cpu(pptable_array[i]);
702 		if (table[i])
703 			od_supported = true;
704 	}
705 
706 	*pptable_info_array = table;
707 
708 	if (od_supported)
709 		phm_cap_set(hwmgr->platform_descriptor.platformCaps,
710 				PHM_PlatformCaps_ACOverdriveSupport);
711 
712 	return 0;
713 }
714 
715 static int append_vbios_pptable(struct pp_hwmgr *hwmgr, PPTable_t *ppsmc_pptable)
716 {
717 	struct atom_smc_dpm_info_v4_4 *smc_dpm_table;
718 	int index = GetIndexIntoMasterDataTable(smc_dpm_info);
719 	int i;
720 
721 	PP_ASSERT_WITH_CODE(
722 		smc_dpm_table = smu_atom_get_data_table(hwmgr->adev, index, NULL, NULL, NULL),
723 		"[appendVbiosPPTable] Failed to retrieve Smc Dpm Table from VBIOS!",
724 		return -1);
725 
726 	ppsmc_pptable->MaxVoltageStepGfx = smc_dpm_table->maxvoltagestepgfx;
727 	ppsmc_pptable->MaxVoltageStepSoc = smc_dpm_table->maxvoltagestepsoc;
728 
729 	ppsmc_pptable->VddGfxVrMapping = smc_dpm_table->vddgfxvrmapping;
730 	ppsmc_pptable->VddSocVrMapping = smc_dpm_table->vddsocvrmapping;
731 	ppsmc_pptable->VddMem0VrMapping = smc_dpm_table->vddmem0vrmapping;
732 	ppsmc_pptable->VddMem1VrMapping = smc_dpm_table->vddmem1vrmapping;
733 
734 	ppsmc_pptable->GfxUlvPhaseSheddingMask = smc_dpm_table->gfxulvphasesheddingmask;
735 	ppsmc_pptable->SocUlvPhaseSheddingMask = smc_dpm_table->soculvphasesheddingmask;
736 	ppsmc_pptable->ExternalSensorPresent = smc_dpm_table->externalsensorpresent;
737 
738 	ppsmc_pptable->GfxMaxCurrent = smc_dpm_table->gfxmaxcurrent;
739 	ppsmc_pptable->GfxOffset = smc_dpm_table->gfxoffset;
740 	ppsmc_pptable->Padding_TelemetryGfx = smc_dpm_table->padding_telemetrygfx;
741 
742 	ppsmc_pptable->SocMaxCurrent = smc_dpm_table->socmaxcurrent;
743 	ppsmc_pptable->SocOffset = smc_dpm_table->socoffset;
744 	ppsmc_pptable->Padding_TelemetrySoc = smc_dpm_table->padding_telemetrysoc;
745 
746 	ppsmc_pptable->Mem0MaxCurrent = smc_dpm_table->mem0maxcurrent;
747 	ppsmc_pptable->Mem0Offset = smc_dpm_table->mem0offset;
748 	ppsmc_pptable->Padding_TelemetryMem0 = smc_dpm_table->padding_telemetrymem0;
749 
750 	ppsmc_pptable->Mem1MaxCurrent = smc_dpm_table->mem1maxcurrent;
751 	ppsmc_pptable->Mem1Offset = smc_dpm_table->mem1offset;
752 	ppsmc_pptable->Padding_TelemetryMem1 = smc_dpm_table->padding_telemetrymem1;
753 
754 	ppsmc_pptable->AcDcGpio = smc_dpm_table->acdcgpio;
755 	ppsmc_pptable->AcDcPolarity = smc_dpm_table->acdcpolarity;
756 	ppsmc_pptable->VR0HotGpio = smc_dpm_table->vr0hotgpio;
757 	ppsmc_pptable->VR0HotPolarity = smc_dpm_table->vr0hotpolarity;
758 
759 	ppsmc_pptable->VR1HotGpio = smc_dpm_table->vr1hotgpio;
760 	ppsmc_pptable->VR1HotPolarity = smc_dpm_table->vr1hotpolarity;
761 	ppsmc_pptable->Padding1 = smc_dpm_table->padding1;
762 	ppsmc_pptable->Padding2 = smc_dpm_table->padding2;
763 
764 	ppsmc_pptable->LedPin0 = smc_dpm_table->ledpin0;
765 	ppsmc_pptable->LedPin1 = smc_dpm_table->ledpin1;
766 	ppsmc_pptable->LedPin2 = smc_dpm_table->ledpin2;
767 
768 	ppsmc_pptable->PllGfxclkSpreadEnabled = smc_dpm_table->pllgfxclkspreadenabled;
769 	ppsmc_pptable->PllGfxclkSpreadPercent = smc_dpm_table->pllgfxclkspreadpercent;
770 	ppsmc_pptable->PllGfxclkSpreadFreq = smc_dpm_table->pllgfxclkspreadfreq;
771 
772 	ppsmc_pptable->UclkSpreadEnabled = 0;
773 	ppsmc_pptable->UclkSpreadPercent = smc_dpm_table->uclkspreadpercent;
774 	ppsmc_pptable->UclkSpreadFreq = smc_dpm_table->uclkspreadfreq;
775 
776 	ppsmc_pptable->FclkSpreadEnabled = smc_dpm_table->fclkspreadenabled;
777 	ppsmc_pptable->FclkSpreadPercent = smc_dpm_table->fclkspreadpercent;
778 	ppsmc_pptable->FclkSpreadFreq = smc_dpm_table->fclkspreadfreq;
779 
780 	ppsmc_pptable->FllGfxclkSpreadEnabled = smc_dpm_table->fllgfxclkspreadenabled;
781 	ppsmc_pptable->FllGfxclkSpreadPercent = smc_dpm_table->fllgfxclkspreadpercent;
782 	ppsmc_pptable->FllGfxclkSpreadFreq = smc_dpm_table->fllgfxclkspreadfreq;
783 
784 	for (i = 0; i < I2C_CONTROLLER_NAME_COUNT; i++) {
785 		ppsmc_pptable->I2cControllers[i].Enabled =
786 			smc_dpm_table->i2ccontrollers[i].enabled;
787 		ppsmc_pptable->I2cControllers[i].SlaveAddress =
788 			smc_dpm_table->i2ccontrollers[i].slaveaddress;
789 		ppsmc_pptable->I2cControllers[i].ControllerPort =
790 			smc_dpm_table->i2ccontrollers[i].controllerport;
791 		ppsmc_pptable->I2cControllers[i].ThermalThrottler =
792 			smc_dpm_table->i2ccontrollers[i].thermalthrottler;
793 		ppsmc_pptable->I2cControllers[i].I2cProtocol =
794 			smc_dpm_table->i2ccontrollers[i].i2cprotocol;
795 		ppsmc_pptable->I2cControllers[i].I2cSpeed =
796 			smc_dpm_table->i2ccontrollers[i].i2cspeed;
797 	}
798 
799 	return 0;
800 }
801 
802 static int override_powerplay_table_fantargettemperature(struct pp_hwmgr *hwmgr)
803 {
804 	struct phm_ppt_v3_information *pptable_information =
805 		(struct phm_ppt_v3_information *)hwmgr->pptable;
806 	PPTable_t *ppsmc_pptable = (PPTable_t *)(pptable_information->smc_pptable);
807 
808 	ppsmc_pptable->FanTargetTemperature = VEGA20_FAN_TARGET_TEMPERATURE_OVERRIDE;
809 
810 	return 0;
811 }
812 
813 #define VEGA20_ENGINECLOCK_HARDMAX 198000
814 static int init_powerplay_table_information(
815 		struct pp_hwmgr *hwmgr,
816 		const ATOM_Vega20_POWERPLAYTABLE *powerplay_table)
817 {
818 	struct phm_ppt_v3_information *pptable_information =
819 		(struct phm_ppt_v3_information *)hwmgr->pptable;
820 	uint32_t disable_power_control = 0;
821 	uint32_t od_feature_count, od_setting_count, power_saving_clock_count;
822 	int result;
823 
824 	hwmgr->thermal_controller.ucType = powerplay_table->ucThermalControllerType;
825 	pptable_information->uc_thermal_controller_type = powerplay_table->ucThermalControllerType;
826 	hwmgr->thermal_controller.fanInfo.ulMinRPM = 0;
827 	hwmgr->thermal_controller.fanInfo.ulMaxRPM = powerplay_table->smcPPTable.FanMaximumRpm;
828 
829 	set_hw_cap(hwmgr,
830 		ATOM_VEGA20_PP_THERMALCONTROLLER_NONE != hwmgr->thermal_controller.ucType,
831 		PHM_PlatformCaps_ThermalController);
832 
833 	phm_cap_set(hwmgr->platform_descriptor.platformCaps, PHM_PlatformCaps_MicrocodeFanControl);
834 
835 	if (powerplay_table->OverDrive8Table.ucODTableRevision == 1) {
836 		od_feature_count =
837 			(le32_to_cpu(powerplay_table->OverDrive8Table.ODFeatureCount) >
838 			 ATOM_VEGA20_ODFEATURE_COUNT) ?
839 			ATOM_VEGA20_ODFEATURE_COUNT :
840 			le32_to_cpu(powerplay_table->OverDrive8Table.ODFeatureCount);
841 		od_setting_count =
842 			(le32_to_cpu(powerplay_table->OverDrive8Table.ODSettingCount) >
843 			 ATOM_VEGA20_ODSETTING_COUNT) ?
844 			ATOM_VEGA20_ODSETTING_COUNT :
845 			le32_to_cpu(powerplay_table->OverDrive8Table.ODSettingCount);
846 
847 		copy_overdrive_feature_capabilities_array(hwmgr,
848 				&pptable_information->od_feature_capabilities,
849 				powerplay_table->OverDrive8Table.ODFeatureCapabilities,
850 				od_feature_count);
851 		phm_copy_overdrive_settings_limits_array(hwmgr,
852 				&pptable_information->od_settings_max,
853 				powerplay_table->OverDrive8Table.ODSettingsMax,
854 				od_setting_count);
855 		phm_copy_overdrive_settings_limits_array(hwmgr,
856 				&pptable_information->od_settings_min,
857 				powerplay_table->OverDrive8Table.ODSettingsMin,
858 				od_setting_count);
859 	}
860 
861 	pptable_information->us_small_power_limit1 = le16_to_cpu(powerplay_table->usSmallPowerLimit1);
862 	pptable_information->us_small_power_limit2 = le16_to_cpu(powerplay_table->usSmallPowerLimit2);
863 	pptable_information->us_boost_power_limit = le16_to_cpu(powerplay_table->usBoostPowerLimit);
864 	pptable_information->us_od_turbo_power_limit = le16_to_cpu(powerplay_table->usODTurboPowerLimit);
865 	pptable_information->us_od_powersave_power_limit = le16_to_cpu(powerplay_table->usODPowerSavePowerLimit);
866 
867 	pptable_information->us_software_shutdown_temp = le16_to_cpu(powerplay_table->usSoftwareShutdownTemp);
868 
869 	hwmgr->platform_descriptor.TDPODLimit = le32_to_cpu(powerplay_table->OverDrive8Table.ODSettingsMax[ATOM_VEGA20_ODSETTING_POWERPERCENTAGE]);
870 
871 	disable_power_control = 0;
872 	if (!disable_power_control && hwmgr->platform_descriptor.TDPODLimit)
873 		/* enable TDP overdrive (PowerControl) feature as well if supported */
874 		phm_cap_set(hwmgr->platform_descriptor.platformCaps, PHM_PlatformCaps_PowerControl);
875 
876 	if (powerplay_table->PowerSavingClockTable.ucTableRevision == 1) {
877 		power_saving_clock_count =
878 			(le32_to_cpu(powerplay_table->PowerSavingClockTable.PowerSavingClockCount) >=
879 			 ATOM_VEGA20_PPCLOCK_COUNT) ?
880 			ATOM_VEGA20_PPCLOCK_COUNT :
881 			le32_to_cpu(powerplay_table->PowerSavingClockTable.PowerSavingClockCount);
882 		phm_copy_clock_limits_array(hwmgr,
883 				&pptable_information->power_saving_clock_max,
884 				powerplay_table->PowerSavingClockTable.PowerSavingClockMax,
885 				power_saving_clock_count);
886 		phm_copy_clock_limits_array(hwmgr,
887 				&pptable_information->power_saving_clock_min,
888 				powerplay_table->PowerSavingClockTable.PowerSavingClockMin,
889 				power_saving_clock_count);
890 	}
891 
892 	pptable_information->smc_pptable = kmemdup(&(powerplay_table->smcPPTable),
893 						   sizeof(PPTable_t),
894 						   GFP_KERNEL);
895 	if (pptable_information->smc_pptable == NULL)
896 		return -ENOMEM;
897 
898 
899 	result = append_vbios_pptable(hwmgr, (pptable_information->smc_pptable));
900 	if (result)
901 		return result;
902 
903 	result = override_powerplay_table_fantargettemperature(hwmgr);
904 
905 	return result;
906 }
907 
908 static int vega20_pp_tables_initialize(struct pp_hwmgr *hwmgr)
909 {
910 	int result = 0;
911 	const ATOM_Vega20_POWERPLAYTABLE *powerplay_table;
912 
913 	hwmgr->pptable = kzalloc(sizeof(struct phm_ppt_v3_information), GFP_KERNEL);
914 	PP_ASSERT_WITH_CODE((hwmgr->pptable != NULL),
915 		"Failed to allocate hwmgr->pptable!", return -ENOMEM);
916 
917 	powerplay_table = get_powerplay_table(hwmgr);
918 	PP_ASSERT_WITH_CODE((powerplay_table != NULL),
919 		"Missing PowerPlay Table!", return -1);
920 
921 	result = check_powerplay_tables(hwmgr, powerplay_table);
922 	PP_ASSERT_WITH_CODE((result == 0),
923 		"check_powerplay_tables failed", return result);
924 
925 	result = set_platform_caps(hwmgr,
926 			le32_to_cpu(powerplay_table->ulPlatformCaps));
927 	PP_ASSERT_WITH_CODE((result == 0),
928 		"set_platform_caps failed", return result);
929 
930 	result = init_powerplay_table_information(hwmgr, powerplay_table);
931 	PP_ASSERT_WITH_CODE((result == 0),
932 		"init_powerplay_table_information failed", return result);
933 
934 	return result;
935 }
936 
937 static int vega20_pp_tables_uninitialize(struct pp_hwmgr *hwmgr)
938 {
939 	struct phm_ppt_v3_information *pp_table_info =
940 			(struct phm_ppt_v3_information *)(hwmgr->pptable);
941 
942 	kfree(pp_table_info->power_saving_clock_max);
943 	pp_table_info->power_saving_clock_max = NULL;
944 
945 	kfree(pp_table_info->power_saving_clock_min);
946 	pp_table_info->power_saving_clock_min = NULL;
947 
948 	kfree(pp_table_info->od_feature_capabilities);
949 	pp_table_info->od_feature_capabilities = NULL;
950 
951 	kfree(pp_table_info->od_settings_max);
952 	pp_table_info->od_settings_max = NULL;
953 
954 	kfree(pp_table_info->od_settings_min);
955 	pp_table_info->od_settings_min = NULL;
956 
957 	kfree(pp_table_info->smc_pptable);
958 	pp_table_info->smc_pptable = NULL;
959 
960 	kfree(hwmgr->pptable);
961 	hwmgr->pptable = NULL;
962 
963 	return 0;
964 }
965 
966 const struct pp_table_func vega20_pptable_funcs = {
967 	.pptable_init = vega20_pp_tables_initialize,
968 	.pptable_fini = vega20_pp_tables_uninitialize,
969 };
970