1e098bc96SEvan Quan /*
2e098bc96SEvan Quan  * Copyright 2016 Advanced Micro Devices, Inc.
3e098bc96SEvan Quan  *
4e098bc96SEvan Quan  * Permission is hereby granted, free of charge, to any person obtaining a
5e098bc96SEvan Quan  * copy of this software and associated documentation files (the "Software"),
6e098bc96SEvan Quan  * to deal in the Software without restriction, including without limitation
7e098bc96SEvan Quan  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8e098bc96SEvan Quan  * and/or sell copies of the Software, and to permit persons to whom the
9e098bc96SEvan Quan  * Software is furnished to do so, subject to the following conditions:
10e098bc96SEvan Quan  *
11e098bc96SEvan Quan  * The above copyright notice and this permission notice shall be included in
12e098bc96SEvan Quan  * all copies or substantial portions of the Software.
13e098bc96SEvan Quan  *
14e098bc96SEvan Quan  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15e098bc96SEvan Quan  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16e098bc96SEvan Quan  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
17e098bc96SEvan Quan  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18e098bc96SEvan Quan  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19e098bc96SEvan Quan  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20e098bc96SEvan Quan  * OTHER DEALINGS IN THE SOFTWARE.
21e098bc96SEvan Quan  *
22e098bc96SEvan Quan  */
23e098bc96SEvan Quan 
24e098bc96SEvan Quan #ifndef SMU10_INC_H
25e098bc96SEvan Quan #define SMU10_INC_H
26e098bc96SEvan Quan 
27e098bc96SEvan Quan 
28e098bc96SEvan Quan #include "asic_reg/mp/mp_10_0_default.h"
29e098bc96SEvan Quan #include "asic_reg/mp/mp_10_0_offset.h"
30e098bc96SEvan Quan #include "asic_reg/mp/mp_10_0_sh_mask.h"
31e098bc96SEvan Quan 
32e098bc96SEvan Quan #include "asic_reg/nbio/nbio_7_0_default.h"
33e098bc96SEvan Quan #include "asic_reg/nbio/nbio_7_0_offset.h"
34e098bc96SEvan Quan #include "asic_reg/nbio/nbio_7_0_sh_mask.h"
35e098bc96SEvan Quan 
36e098bc96SEvan Quan #include "asic_reg/thm/thm_10_0_default.h"
37e098bc96SEvan Quan #include "asic_reg/thm/thm_10_0_offset.h"
38e098bc96SEvan Quan #include "asic_reg/thm/thm_10_0_sh_mask.h"
39e098bc96SEvan Quan 
40e098bc96SEvan Quan 
41e098bc96SEvan Quan #define ixDDI_PHY_GEN_STATUS                       0x3FCE8
42e098bc96SEvan Quan 
43e098bc96SEvan Quan #endif
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