1e098bc96SEvan Quan /*
2e098bc96SEvan Quan * Copyright 2015 Advanced Micro Devices, Inc.
3e098bc96SEvan Quan *
4e098bc96SEvan Quan * Permission is hereby granted, free of charge, to any person obtaining a
5e098bc96SEvan Quan * copy of this software and associated documentation files (the "Software"),
6e098bc96SEvan Quan * to deal in the Software without restriction, including without limitation
7e098bc96SEvan Quan * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8e098bc96SEvan Quan * and/or sell copies of the Software, and to permit persons to whom the
9e098bc96SEvan Quan * Software is furnished to do so, subject to the following conditions:
10e098bc96SEvan Quan *
11e098bc96SEvan Quan * The above copyright notice and this permission notice shall be included in
12e098bc96SEvan Quan * all copies or substantial portions of the Software.
13e098bc96SEvan Quan *
14e098bc96SEvan Quan * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15e098bc96SEvan Quan * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16e098bc96SEvan Quan * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17e098bc96SEvan Quan * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18e098bc96SEvan Quan * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19e098bc96SEvan Quan * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20e098bc96SEvan Quan * OTHER DEALINGS IN THE SOFTWARE.
21e098bc96SEvan Quan *
22e098bc96SEvan Quan */
23e098bc96SEvan Quan
24e098bc96SEvan Quan #include <linux/types.h>
25e098bc96SEvan Quan #include "atom-types.h"
26e098bc96SEvan Quan #include "atombios.h"
27e098bc96SEvan Quan #include "pppcielanes.h"
28e098bc96SEvan Quan
29e098bc96SEvan Quan /** \file
30e098bc96SEvan Quan * Functions related to PCIe lane changes.
31e098bc96SEvan Quan */
32e098bc96SEvan Quan
33e098bc96SEvan Quan /* For converting from number of lanes to lane bits. */
34e098bc96SEvan Quan static const unsigned char pp_r600_encode_lanes[] = {
35e098bc96SEvan Quan 0, /* 0 Not Supported */
36e098bc96SEvan Quan 1, /* 1 Lane */
37e098bc96SEvan Quan 2, /* 2 Lanes */
38e098bc96SEvan Quan 0, /* 3 Not Supported */
39e098bc96SEvan Quan 3, /* 4 Lanes */
40e098bc96SEvan Quan 0, /* 5 Not Supported */
41e098bc96SEvan Quan 0, /* 6 Not Supported */
42e098bc96SEvan Quan 0, /* 7 Not Supported */
43e098bc96SEvan Quan 4, /* 8 Lanes */
44e098bc96SEvan Quan 0, /* 9 Not Supported */
45e098bc96SEvan Quan 0, /* 10 Not Supported */
46e098bc96SEvan Quan 0, /* 11 Not Supported */
47e098bc96SEvan Quan 5, /* 12 Lanes (Not actually supported) */
48e098bc96SEvan Quan 0, /* 13 Not Supported */
49e098bc96SEvan Quan 0, /* 14 Not Supported */
50e098bc96SEvan Quan 0, /* 15 Not Supported */
51e098bc96SEvan Quan 6 /* 16 Lanes */
52e098bc96SEvan Quan };
53e098bc96SEvan Quan
54e098bc96SEvan Quan static const unsigned char pp_r600_decoded_lanes[8] = { 16, 1, 2, 4, 8, 12, 16, };
55e098bc96SEvan Quan
encode_pcie_lane_width(uint32_t num_lanes)56e098bc96SEvan Quan uint8_t encode_pcie_lane_width(uint32_t num_lanes)
57e098bc96SEvan Quan {
58e098bc96SEvan Quan return pp_r600_encode_lanes[num_lanes];
59e098bc96SEvan Quan }
60e098bc96SEvan Quan
decode_pcie_lane_width(uint32_t num_lanes)61e098bc96SEvan Quan uint8_t decode_pcie_lane_width(uint32_t num_lanes)
62e098bc96SEvan Quan {
63e098bc96SEvan Quan return pp_r600_decoded_lanes[num_lanes];
64e098bc96SEvan Quan }
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