1*d71093aaSHawking Zhang /* 2*d71093aaSHawking Zhang * Copyright 2021 Advanced Micro Devices, Inc. 3*d71093aaSHawking Zhang * 4*d71093aaSHawking Zhang * Permission is hereby granted, free of charge, to any person obtaining a 5*d71093aaSHawking Zhang * copy of this software and associated documentation files (the "Software"), 6*d71093aaSHawking Zhang * to deal in the Software without restriction, including without limitation 7*d71093aaSHawking Zhang * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8*d71093aaSHawking Zhang * and/or sell copies of the Software, and to permit persons to whom the 9*d71093aaSHawking Zhang * Software is furnished to do so, subject to the following conditions: 10*d71093aaSHawking Zhang * 11*d71093aaSHawking Zhang * The above copyright notice and this permission notice shall be included in 12*d71093aaSHawking Zhang * all copies or substantial portions of the Software. 13*d71093aaSHawking Zhang * 14*d71093aaSHawking Zhang * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 15*d71093aaSHawking Zhang * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16*d71093aaSHawking Zhang * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17*d71093aaSHawking Zhang * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 18*d71093aaSHawking Zhang * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 19*d71093aaSHawking Zhang * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 20*d71093aaSHawking Zhang * OTHER DEALINGS IN THE SOFTWARE. 21*d71093aaSHawking Zhang * 22*d71093aaSHawking Zhang */ 23*d71093aaSHawking Zhang #ifndef _osssys_6_0_0_OFFSET_HEADER 24*d71093aaSHawking Zhang #define _osssys_6_0_0_OFFSET_HEADER 25*d71093aaSHawking Zhang 26*d71093aaSHawking Zhang 27*d71093aaSHawking Zhang 28*d71093aaSHawking Zhang // addressBlock: osssys_osssysdec 29*d71093aaSHawking Zhang // base address: 0x4280 30*d71093aaSHawking Zhang #define regIH_VMID_0_LUT 0x0000 31*d71093aaSHawking Zhang #define regIH_VMID_0_LUT_BASE_IDX 0 32*d71093aaSHawking Zhang #define regIH_VMID_1_LUT 0x0001 33*d71093aaSHawking Zhang #define regIH_VMID_1_LUT_BASE_IDX 0 34*d71093aaSHawking Zhang #define regIH_VMID_2_LUT 0x0002 35*d71093aaSHawking Zhang #define regIH_VMID_2_LUT_BASE_IDX 0 36*d71093aaSHawking Zhang #define regIH_VMID_3_LUT 0x0003 37*d71093aaSHawking Zhang #define regIH_VMID_3_LUT_BASE_IDX 0 38*d71093aaSHawking Zhang #define regIH_VMID_4_LUT 0x0004 39*d71093aaSHawking Zhang #define regIH_VMID_4_LUT_BASE_IDX 0 40*d71093aaSHawking Zhang #define regIH_VMID_5_LUT 0x0005 41*d71093aaSHawking Zhang #define regIH_VMID_5_LUT_BASE_IDX 0 42*d71093aaSHawking Zhang #define regIH_VMID_6_LUT 0x0006 43*d71093aaSHawking Zhang #define regIH_VMID_6_LUT_BASE_IDX 0 44*d71093aaSHawking Zhang #define regIH_VMID_7_LUT 0x0007 45*d71093aaSHawking Zhang #define regIH_VMID_7_LUT_BASE_IDX 0 46*d71093aaSHawking Zhang #define regIH_VMID_8_LUT 0x0008 47*d71093aaSHawking Zhang #define regIH_VMID_8_LUT_BASE_IDX 0 48*d71093aaSHawking Zhang #define regIH_VMID_9_LUT 0x0009 49*d71093aaSHawking Zhang #define regIH_VMID_9_LUT_BASE_IDX 0 50*d71093aaSHawking Zhang #define regIH_VMID_10_LUT 0x000a 51*d71093aaSHawking Zhang #define regIH_VMID_10_LUT_BASE_IDX 0 52*d71093aaSHawking Zhang #define regIH_VMID_11_LUT 0x000b 53*d71093aaSHawking Zhang #define regIH_VMID_11_LUT_BASE_IDX 0 54*d71093aaSHawking Zhang #define regIH_VMID_12_LUT 0x000c 55*d71093aaSHawking Zhang #define regIH_VMID_12_LUT_BASE_IDX 0 56*d71093aaSHawking Zhang #define regIH_VMID_13_LUT 0x000d 57*d71093aaSHawking Zhang #define regIH_VMID_13_LUT_BASE_IDX 0 58*d71093aaSHawking Zhang #define regIH_VMID_14_LUT 0x000e 59*d71093aaSHawking Zhang #define regIH_VMID_14_LUT_BASE_IDX 0 60*d71093aaSHawking Zhang #define regIH_VMID_15_LUT 0x000f 61*d71093aaSHawking Zhang #define regIH_VMID_15_LUT_BASE_IDX 0 62*d71093aaSHawking Zhang #define regIH_VMID_0_LUT_MM 0x0010 63*d71093aaSHawking Zhang #define regIH_VMID_0_LUT_MM_BASE_IDX 0 64*d71093aaSHawking Zhang #define regIH_VMID_1_LUT_MM 0x0011 65*d71093aaSHawking Zhang #define regIH_VMID_1_LUT_MM_BASE_IDX 0 66*d71093aaSHawking Zhang #define regIH_VMID_2_LUT_MM 0x0012 67*d71093aaSHawking Zhang #define regIH_VMID_2_LUT_MM_BASE_IDX 0 68*d71093aaSHawking Zhang #define regIH_VMID_3_LUT_MM 0x0013 69*d71093aaSHawking Zhang #define regIH_VMID_3_LUT_MM_BASE_IDX 0 70*d71093aaSHawking Zhang #define regIH_VMID_4_LUT_MM 0x0014 71*d71093aaSHawking Zhang #define regIH_VMID_4_LUT_MM_BASE_IDX 0 72*d71093aaSHawking Zhang #define regIH_VMID_5_LUT_MM 0x0015 73*d71093aaSHawking Zhang #define regIH_VMID_5_LUT_MM_BASE_IDX 0 74*d71093aaSHawking Zhang #define regIH_VMID_6_LUT_MM 0x0016 75*d71093aaSHawking Zhang #define regIH_VMID_6_LUT_MM_BASE_IDX 0 76*d71093aaSHawking Zhang #define regIH_VMID_7_LUT_MM 0x0017 77*d71093aaSHawking Zhang #define regIH_VMID_7_LUT_MM_BASE_IDX 0 78*d71093aaSHawking Zhang #define regIH_VMID_8_LUT_MM 0x0018 79*d71093aaSHawking Zhang #define regIH_VMID_8_LUT_MM_BASE_IDX 0 80*d71093aaSHawking Zhang #define regIH_VMID_9_LUT_MM 0x0019 81*d71093aaSHawking Zhang #define regIH_VMID_9_LUT_MM_BASE_IDX 0 82*d71093aaSHawking Zhang #define regIH_VMID_10_LUT_MM 0x001a 83*d71093aaSHawking Zhang #define regIH_VMID_10_LUT_MM_BASE_IDX 0 84*d71093aaSHawking Zhang #define regIH_VMID_11_LUT_MM 0x001b 85*d71093aaSHawking Zhang #define regIH_VMID_11_LUT_MM_BASE_IDX 0 86*d71093aaSHawking Zhang #define regIH_VMID_12_LUT_MM 0x001c 87*d71093aaSHawking Zhang #define regIH_VMID_12_LUT_MM_BASE_IDX 0 88*d71093aaSHawking Zhang #define regIH_VMID_13_LUT_MM 0x001d 89*d71093aaSHawking Zhang #define regIH_VMID_13_LUT_MM_BASE_IDX 0 90*d71093aaSHawking Zhang #define regIH_VMID_14_LUT_MM 0x001e 91*d71093aaSHawking Zhang #define regIH_VMID_14_LUT_MM_BASE_IDX 0 92*d71093aaSHawking Zhang #define regIH_VMID_15_LUT_MM 0x001f 93*d71093aaSHawking Zhang #define regIH_VMID_15_LUT_MM_BASE_IDX 0 94*d71093aaSHawking Zhang #define regIH_COOKIE_0 0x0020 95*d71093aaSHawking Zhang #define regIH_COOKIE_0_BASE_IDX 0 96*d71093aaSHawking Zhang #define regIH_COOKIE_1 0x0021 97*d71093aaSHawking Zhang #define regIH_COOKIE_1_BASE_IDX 0 98*d71093aaSHawking Zhang #define regIH_COOKIE_2 0x0022 99*d71093aaSHawking Zhang #define regIH_COOKIE_2_BASE_IDX 0 100*d71093aaSHawking Zhang #define regIH_COOKIE_3 0x0023 101*d71093aaSHawking Zhang #define regIH_COOKIE_3_BASE_IDX 0 102*d71093aaSHawking Zhang #define regIH_COOKIE_4 0x0024 103*d71093aaSHawking Zhang #define regIH_COOKIE_4_BASE_IDX 0 104*d71093aaSHawking Zhang #define regIH_COOKIE_5 0x0025 105*d71093aaSHawking Zhang #define regIH_COOKIE_5_BASE_IDX 0 106*d71093aaSHawking Zhang #define regIH_COOKIE_6 0x0026 107*d71093aaSHawking Zhang #define regIH_COOKIE_6_BASE_IDX 0 108*d71093aaSHawking Zhang #define regIH_COOKIE_7 0x0027 109*d71093aaSHawking Zhang #define regIH_COOKIE_7_BASE_IDX 0 110*d71093aaSHawking Zhang #define regIH_REGISTER_LAST_PART0 0x003f 111*d71093aaSHawking Zhang #define regIH_REGISTER_LAST_PART0_BASE_IDX 0 112*d71093aaSHawking Zhang #define regIH_RB_CNTL 0x0080 113*d71093aaSHawking Zhang #define regIH_RB_CNTL_BASE_IDX 0 114*d71093aaSHawking Zhang #define regIH_RB_BASE 0x0081 115*d71093aaSHawking Zhang #define regIH_RB_BASE_BASE_IDX 0 116*d71093aaSHawking Zhang #define regIH_RB_BASE_HI 0x0082 117*d71093aaSHawking Zhang #define regIH_RB_BASE_HI_BASE_IDX 0 118*d71093aaSHawking Zhang #define regIH_RB_RPTR 0x0083 119*d71093aaSHawking Zhang #define regIH_RB_RPTR_BASE_IDX 0 120*d71093aaSHawking Zhang #define regIH_RB_WPTR 0x0084 121*d71093aaSHawking Zhang #define regIH_RB_WPTR_BASE_IDX 0 122*d71093aaSHawking Zhang #define regIH_RB_WPTR_ADDR_HI 0x0085 123*d71093aaSHawking Zhang #define regIH_RB_WPTR_ADDR_HI_BASE_IDX 0 124*d71093aaSHawking Zhang #define regIH_RB_WPTR_ADDR_LO 0x0086 125*d71093aaSHawking Zhang #define regIH_RB_WPTR_ADDR_LO_BASE_IDX 0 126*d71093aaSHawking Zhang #define regIH_DOORBELL_RPTR 0x0087 127*d71093aaSHawking Zhang #define regIH_DOORBELL_RPTR_BASE_IDX 0 128*d71093aaSHawking Zhang #define regIH_DOORBELL_RETRY_CAM 0x0088 129*d71093aaSHawking Zhang #define regIH_DOORBELL_RETRY_CAM_BASE_IDX 0 130*d71093aaSHawking Zhang #define regIH_RB_CNTL_RING1 0x008c 131*d71093aaSHawking Zhang #define regIH_RB_CNTL_RING1_BASE_IDX 0 132*d71093aaSHawking Zhang #define regIH_RB_BASE_RING1 0x008d 133*d71093aaSHawking Zhang #define regIH_RB_BASE_RING1_BASE_IDX 0 134*d71093aaSHawking Zhang #define regIH_RB_BASE_HI_RING1 0x008e 135*d71093aaSHawking Zhang #define regIH_RB_BASE_HI_RING1_BASE_IDX 0 136*d71093aaSHawking Zhang #define regIH_RB_RPTR_RING1 0x008f 137*d71093aaSHawking Zhang #define regIH_RB_RPTR_RING1_BASE_IDX 0 138*d71093aaSHawking Zhang #define regIH_RB_WPTR_RING1 0x0090 139*d71093aaSHawking Zhang #define regIH_RB_WPTR_RING1_BASE_IDX 0 140*d71093aaSHawking Zhang #define regIH_DOORBELL_RPTR_RING1 0x0093 141*d71093aaSHawking Zhang #define regIH_DOORBELL_RPTR_RING1_BASE_IDX 0 142*d71093aaSHawking Zhang #define regIH_RETRY_CAM_ACK 0x00a4 143*d71093aaSHawking Zhang #define regIH_RETRY_CAM_ACK_BASE_IDX 0 144*d71093aaSHawking Zhang #define regIH_VERSION 0x00a5 145*d71093aaSHawking Zhang #define regIH_VERSION_BASE_IDX 0 146*d71093aaSHawking Zhang #define regIH_CNTL 0x00c0 147*d71093aaSHawking Zhang #define regIH_CNTL_BASE_IDX 0 148*d71093aaSHawking Zhang #define regIH_CNTL2 0x00c1 149*d71093aaSHawking Zhang #define regIH_CNTL2_BASE_IDX 0 150*d71093aaSHawking Zhang #define regIH_STATUS 0x00c2 151*d71093aaSHawking Zhang #define regIH_STATUS_BASE_IDX 0 152*d71093aaSHawking Zhang #define regIH_PERFMON_CNTL 0x00c3 153*d71093aaSHawking Zhang #define regIH_PERFMON_CNTL_BASE_IDX 0 154*d71093aaSHawking Zhang #define regIH_PERFCOUNTER0_RESULT 0x00c4 155*d71093aaSHawking Zhang #define regIH_PERFCOUNTER0_RESULT_BASE_IDX 0 156*d71093aaSHawking Zhang #define regIH_PERFCOUNTER1_RESULT 0x00c5 157*d71093aaSHawking Zhang #define regIH_PERFCOUNTER1_RESULT_BASE_IDX 0 158*d71093aaSHawking Zhang #define regIH_DSM_MATCH_VALUE_BIT_31_0 0x00c7 159*d71093aaSHawking Zhang #define regIH_DSM_MATCH_VALUE_BIT_31_0_BASE_IDX 0 160*d71093aaSHawking Zhang #define regIH_DSM_MATCH_VALUE_BIT_63_32 0x00c8 161*d71093aaSHawking Zhang #define regIH_DSM_MATCH_VALUE_BIT_63_32_BASE_IDX 0 162*d71093aaSHawking Zhang #define regIH_DSM_MATCH_VALUE_BIT_95_64 0x00c9 163*d71093aaSHawking Zhang #define regIH_DSM_MATCH_VALUE_BIT_95_64_BASE_IDX 0 164*d71093aaSHawking Zhang #define regIH_DSM_MATCH_FIELD_CONTROL 0x00ca 165*d71093aaSHawking Zhang #define regIH_DSM_MATCH_FIELD_CONTROL_BASE_IDX 0 166*d71093aaSHawking Zhang #define regIH_DSM_MATCH_DATA_CONTROL 0x00cb 167*d71093aaSHawking Zhang #define regIH_DSM_MATCH_DATA_CONTROL_BASE_IDX 0 168*d71093aaSHawking Zhang #define regIH_DSM_MATCH_FCN_ID 0x00cc 169*d71093aaSHawking Zhang #define regIH_DSM_MATCH_FCN_ID_BASE_IDX 0 170*d71093aaSHawking Zhang #define regIH_LIMIT_INT_RATE_CNTL 0x00cd 171*d71093aaSHawking Zhang #define regIH_LIMIT_INT_RATE_CNTL_BASE_IDX 0 172*d71093aaSHawking Zhang #define regIH_VF_RB_STATUS 0x00ce 173*d71093aaSHawking Zhang #define regIH_VF_RB_STATUS_BASE_IDX 0 174*d71093aaSHawking Zhang #define regIH_VF_RB_STATUS2 0x00cf 175*d71093aaSHawking Zhang #define regIH_VF_RB_STATUS2_BASE_IDX 0 176*d71093aaSHawking Zhang #define regIH_VF_RB1_STATUS 0x00d0 177*d71093aaSHawking Zhang #define regIH_VF_RB1_STATUS_BASE_IDX 0 178*d71093aaSHawking Zhang #define regIH_VF_RB1_STATUS2 0x00d1 179*d71093aaSHawking Zhang #define regIH_VF_RB1_STATUS2_BASE_IDX 0 180*d71093aaSHawking Zhang #define regIH_RB_STATUS 0x00d4 181*d71093aaSHawking Zhang #define regIH_RB_STATUS_BASE_IDX 0 182*d71093aaSHawking Zhang #define regIH_INT_FLOOD_CNTL 0x00d5 183*d71093aaSHawking Zhang #define regIH_INT_FLOOD_CNTL_BASE_IDX 0 184*d71093aaSHawking Zhang #define regIH_RB0_INT_FLOOD_STATUS 0x00d6 185*d71093aaSHawking Zhang #define regIH_RB0_INT_FLOOD_STATUS_BASE_IDX 0 186*d71093aaSHawking Zhang #define regIH_RB1_INT_FLOOD_STATUS 0x00d7 187*d71093aaSHawking Zhang #define regIH_RB1_INT_FLOOD_STATUS_BASE_IDX 0 188*d71093aaSHawking Zhang #define regIH_INT_FLOOD_STATUS 0x00d9 189*d71093aaSHawking Zhang #define regIH_INT_FLOOD_STATUS_BASE_IDX 0 190*d71093aaSHawking Zhang #define regIH_STORM_CLIENT_LIST_CNTL 0x00da 191*d71093aaSHawking Zhang #define regIH_STORM_CLIENT_LIST_CNTL_BASE_IDX 0 192*d71093aaSHawking Zhang #define regIH_CLK_CTRL 0x00db 193*d71093aaSHawking Zhang #define regIH_CLK_CTRL_BASE_IDX 0 194*d71093aaSHawking Zhang #define regIH_INT_FLAGS 0x00dc 195*d71093aaSHawking Zhang #define regIH_INT_FLAGS_BASE_IDX 0 196*d71093aaSHawking Zhang #define regIH_LAST_INT_INFO0 0x00dd 197*d71093aaSHawking Zhang #define regIH_LAST_INT_INFO0_BASE_IDX 0 198*d71093aaSHawking Zhang #define regIH_LAST_INT_INFO1 0x00de 199*d71093aaSHawking Zhang #define regIH_LAST_INT_INFO1_BASE_IDX 0 200*d71093aaSHawking Zhang #define regIH_LAST_INT_INFO2 0x00df 201*d71093aaSHawking Zhang #define regIH_LAST_INT_INFO2_BASE_IDX 0 202*d71093aaSHawking Zhang #define regIH_SCRATCH 0x00e0 203*d71093aaSHawking Zhang #define regIH_SCRATCH_BASE_IDX 0 204*d71093aaSHawking Zhang #define regIH_CLIENT_CREDIT_ERROR 0x00e1 205*d71093aaSHawking Zhang #define regIH_CLIENT_CREDIT_ERROR_BASE_IDX 0 206*d71093aaSHawking Zhang #define regIH_COOKIE_REC_VIOLATION_LOG 0x00e4 207*d71093aaSHawking Zhang #define regIH_COOKIE_REC_VIOLATION_LOG_BASE_IDX 0 208*d71093aaSHawking Zhang #define regIH_CREDIT_STATUS 0x00e5 209*d71093aaSHawking Zhang #define regIH_CREDIT_STATUS_BASE_IDX 0 210*d71093aaSHawking Zhang #define regIH_MMHUB_ERROR 0x00e6 211*d71093aaSHawking Zhang #define regIH_MMHUB_ERROR_BASE_IDX 0 212*d71093aaSHawking Zhang #define regIH_MEM_POWER_CTRL 0x00e9 213*d71093aaSHawking Zhang #define regIH_MEM_POWER_CTRL_BASE_IDX 0 214*d71093aaSHawking Zhang #define regIH_VF_RB_STATUS3 0x00ea 215*d71093aaSHawking Zhang #define regIH_VF_RB_STATUS3_BASE_IDX 0 216*d71093aaSHawking Zhang #define regIH_VF_RB_STATUS4 0x00eb 217*d71093aaSHawking Zhang #define regIH_VF_RB_STATUS4_BASE_IDX 0 218*d71093aaSHawking Zhang #define regIH_VF_RB1_STATUS3 0x00ec 219*d71093aaSHawking Zhang #define regIH_VF_RB1_STATUS3_BASE_IDX 0 220*d71093aaSHawking Zhang #define regIH_RETRY_INT_CAM_CNTL 0x00ef 221*d71093aaSHawking Zhang #define regIH_RETRY_INT_CAM_CNTL_BASE_IDX 0 222*d71093aaSHawking Zhang #define regIH_MEM_POWER_CTRL2 0x00f0 223*d71093aaSHawking Zhang #define regIH_MEM_POWER_CTRL2_BASE_IDX 0 224*d71093aaSHawking Zhang #define regIH_MSI_STORM_CTRL 0x00f1 225*d71093aaSHawking Zhang #define regIH_MSI_STORM_CTRL_BASE_IDX 0 226*d71093aaSHawking Zhang #define regIH_MSI_STORM_CLIENT_INDEX 0x00f2 227*d71093aaSHawking Zhang #define regIH_MSI_STORM_CLIENT_INDEX_BASE_IDX 0 228*d71093aaSHawking Zhang #define regIH_MSI_STORM_CLIENT_DATA 0x00f3 229*d71093aaSHawking Zhang #define regIH_MSI_STORM_CLIENT_DATA_BASE_IDX 0 230*d71093aaSHawking Zhang #define regIH_REGISTER_LAST_PART2 0x00ff 231*d71093aaSHawking Zhang #define regIH_REGISTER_LAST_PART2_BASE_IDX 0 232*d71093aaSHawking Zhang #define regSEM_MAILBOX 0x010a 233*d71093aaSHawking Zhang #define regSEM_MAILBOX_BASE_IDX 0 234*d71093aaSHawking Zhang #define regSEM_MAILBOX_CLEAR 0x010b 235*d71093aaSHawking Zhang #define regSEM_MAILBOX_CLEAR_BASE_IDX 0 236*d71093aaSHawking Zhang #define regSEM_REGISTER_LAST_PART2 0x017f 237*d71093aaSHawking Zhang #define regSEM_REGISTER_LAST_PART2_BASE_IDX 0 238*d71093aaSHawking Zhang #define regIH_CLIENT_CFG 0x0184 239*d71093aaSHawking Zhang #define regIH_CLIENT_CFG_BASE_IDX 0 240*d71093aaSHawking Zhang #define regIH_CLIENT_CFG_INDEX 0x0188 241*d71093aaSHawking Zhang #define regIH_CLIENT_CFG_INDEX_BASE_IDX 0 242*d71093aaSHawking Zhang #define regIH_CLIENT_CFG_DATA 0x0189 243*d71093aaSHawking Zhang #define regIH_CLIENT_CFG_DATA_BASE_IDX 0 244*d71093aaSHawking Zhang #define regIH_CID_REMAP_INDEX 0x018b 245*d71093aaSHawking Zhang #define regIH_CID_REMAP_INDEX_BASE_IDX 0 246*d71093aaSHawking Zhang #define regIH_CID_REMAP_DATA 0x018c 247*d71093aaSHawking Zhang #define regIH_CID_REMAP_DATA_BASE_IDX 0 248*d71093aaSHawking Zhang #define regIH_CHICKEN 0x018d 249*d71093aaSHawking Zhang #define regIH_CHICKEN_BASE_IDX 0 250*d71093aaSHawking Zhang #define regIH_INT_DROP_CNTL 0x018f 251*d71093aaSHawking Zhang #define regIH_INT_DROP_CNTL_BASE_IDX 0 252*d71093aaSHawking Zhang #define regIH_INT_DROP_MATCH_VALUE0 0x0190 253*d71093aaSHawking Zhang #define regIH_INT_DROP_MATCH_VALUE0_BASE_IDX 0 254*d71093aaSHawking Zhang #define regIH_INT_DROP_MATCH_VALUE1 0x0191 255*d71093aaSHawking Zhang #define regIH_INT_DROP_MATCH_VALUE1_BASE_IDX 0 256*d71093aaSHawking Zhang #define regIH_INT_DROP_MATCH_MASK0 0x0192 257*d71093aaSHawking Zhang #define regIH_INT_DROP_MATCH_MASK0_BASE_IDX 0 258*d71093aaSHawking Zhang #define regIH_INT_DROP_MATCH_MASK1 0x0193 259*d71093aaSHawking Zhang #define regIH_INT_DROP_MATCH_MASK1_BASE_IDX 0 260*d71093aaSHawking Zhang #define regIH_REGISTER_LAST_PART1 0x019f 261*d71093aaSHawking Zhang #define regIH_REGISTER_LAST_PART1_BASE_IDX 0 262*d71093aaSHawking Zhang 263*d71093aaSHawking Zhang #endif 264