1 /* 2 * Copyright (C) 2021 Advanced Micro Devices, Inc. 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice shall be included 12 * in all copies or substantial portions of the Software. 13 * 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS 15 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17 * THE COPYRIGHT HOLDER(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN 18 * AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN 19 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. 20 */ 21 #ifndef _mp_11_0_8_SH_MASK_HEADER 22 #define _mp_11_0_8_SH_MASK_HEADER 23 24 #define MP0_SMN_C2PMSG_100__CONTENT_MASK 0xFFFFFFFFL 25 #define MP0_SMN_C2PMSG_100__CONTENT__SHIFT 0x0 26 #define MP0_SMN_C2PMSG_101__CONTENT_MASK 0xFFFFFFFFL 27 #define MP0_SMN_C2PMSG_101__CONTENT__SHIFT 0x0 28 #define MP0_SMN_C2PMSG_102__CONTENT_MASK 0xFFFFFFFFL 29 #define MP0_SMN_C2PMSG_102__CONTENT__SHIFT 0x0 30 #define MP0_SMN_C2PMSG_103__CONTENT_MASK 0xFFFFFFFFL 31 #define MP0_SMN_C2PMSG_103__CONTENT__SHIFT 0x0 32 #define MP0_SMN_C2PMSG_32__CONTENT_MASK 0xFFFFFFFFL 33 #define MP0_SMN_C2PMSG_32__CONTENT__SHIFT 0x0 34 #define MP0_SMN_C2PMSG_33__CONTENT_MASK 0xFFFFFFFFL 35 #define MP0_SMN_C2PMSG_33__CONTENT__SHIFT 0x0 36 #define MP0_SMN_C2PMSG_34__CONTENT_MASK 0xFFFFFFFFL 37 #define MP0_SMN_C2PMSG_34__CONTENT__SHIFT 0x0 38 #define MP0_SMN_C2PMSG_35__CONTENT_MASK 0xFFFFFFFFL 39 #define MP0_SMN_C2PMSG_35__CONTENT__SHIFT 0x0 40 #define MP0_SMN_C2PMSG_36__CONTENT_MASK 0xFFFFFFFFL 41 #define MP0_SMN_C2PMSG_36__CONTENT__SHIFT 0x0 42 #define MP0_SMN_C2PMSG_37__CONTENT_MASK 0xFFFFFFFFL 43 #define MP0_SMN_C2PMSG_37__CONTENT__SHIFT 0x0 44 #define MP0_SMN_C2PMSG_38__CONTENT_MASK 0xFFFFFFFFL 45 #define MP0_SMN_C2PMSG_38__CONTENT__SHIFT 0x0 46 #define MP0_SMN_C2PMSG_39__CONTENT_MASK 0xFFFFFFFFL 47 #define MP0_SMN_C2PMSG_39__CONTENT__SHIFT 0x0 48 #define MP0_SMN_C2PMSG_40__CONTENT_MASK 0xFFFFFFFFL 49 #define MP0_SMN_C2PMSG_40__CONTENT__SHIFT 0x0 50 #define MP0_SMN_C2PMSG_41__CONTENT_MASK 0xFFFFFFFFL 51 #define MP0_SMN_C2PMSG_41__CONTENT__SHIFT 0x0 52 #define MP0_SMN_C2PMSG_42__CONTENT_MASK 0xFFFFFFFFL 53 #define MP0_SMN_C2PMSG_42__CONTENT__SHIFT 0x0 54 #define MP0_SMN_C2PMSG_43__CONTENT_MASK 0xFFFFFFFFL 55 #define MP0_SMN_C2PMSG_43__CONTENT__SHIFT 0x0 56 #define MP0_SMN_C2PMSG_44__CONTENT_MASK 0xFFFFFFFFL 57 #define MP0_SMN_C2PMSG_44__CONTENT__SHIFT 0x0 58 #define MP0_SMN_C2PMSG_45__CONTENT_MASK 0xFFFFFFFFL 59 #define MP0_SMN_C2PMSG_45__CONTENT__SHIFT 0x0 60 #define MP0_SMN_C2PMSG_46__CONTENT_MASK 0xFFFFFFFFL 61 #define MP0_SMN_C2PMSG_46__CONTENT__SHIFT 0x0 62 #define MP0_SMN_C2PMSG_47__CONTENT_MASK 0xFFFFFFFFL 63 #define MP0_SMN_C2PMSG_47__CONTENT__SHIFT 0x0 64 #define MP0_SMN_C2PMSG_48__CONTENT_MASK 0xFFFFFFFFL 65 #define MP0_SMN_C2PMSG_48__CONTENT__SHIFT 0x0 66 #define MP0_SMN_C2PMSG_49__CONTENT_MASK 0xFFFFFFFFL 67 #define MP0_SMN_C2PMSG_49__CONTENT__SHIFT 0x0 68 #define MP0_SMN_C2PMSG_50__CONTENT_MASK 0xFFFFFFFFL 69 #define MP0_SMN_C2PMSG_50__CONTENT__SHIFT 0x0 70 #define MP0_SMN_C2PMSG_51__CONTENT_MASK 0xFFFFFFFFL 71 #define MP0_SMN_C2PMSG_51__CONTENT__SHIFT 0x0 72 #define MP0_SMN_C2PMSG_52__CONTENT_MASK 0xFFFFFFFFL 73 #define MP0_SMN_C2PMSG_52__CONTENT__SHIFT 0x0 74 #define MP0_SMN_C2PMSG_53__CONTENT_MASK 0xFFFFFFFFL 75 #define MP0_SMN_C2PMSG_53__CONTENT__SHIFT 0x0 76 #define MP0_SMN_C2PMSG_54__CONTENT_MASK 0xFFFFFFFFL 77 #define MP0_SMN_C2PMSG_54__CONTENT__SHIFT 0x0 78 #define MP0_SMN_C2PMSG_55__CONTENT_MASK 0xFFFFFFFFL 79 #define MP0_SMN_C2PMSG_55__CONTENT__SHIFT 0x0 80 #define MP0_SMN_C2PMSG_56__CONTENT_MASK 0xFFFFFFFFL 81 #define MP0_SMN_C2PMSG_56__CONTENT__SHIFT 0x0 82 #define MP0_SMN_C2PMSG_57__CONTENT_MASK 0xFFFFFFFFL 83 #define MP0_SMN_C2PMSG_57__CONTENT__SHIFT 0x0 84 #define MP0_SMN_C2PMSG_58__CONTENT_MASK 0xFFFFFFFFL 85 #define MP0_SMN_C2PMSG_58__CONTENT__SHIFT 0x0 86 #define MP0_SMN_C2PMSG_59__CONTENT_MASK 0xFFFFFFFFL 87 #define MP0_SMN_C2PMSG_59__CONTENT__SHIFT 0x0 88 #define MP0_SMN_C2PMSG_60__CONTENT_MASK 0xFFFFFFFFL 89 #define MP0_SMN_C2PMSG_60__CONTENT__SHIFT 0x0 90 #define MP0_SMN_C2PMSG_61__CONTENT_MASK 0xFFFFFFFFL 91 #define MP0_SMN_C2PMSG_61__CONTENT__SHIFT 0x0 92 #define MP0_SMN_C2PMSG_62__CONTENT_MASK 0xFFFFFFFFL 93 #define MP0_SMN_C2PMSG_62__CONTENT__SHIFT 0x0 94 #define MP0_SMN_C2PMSG_63__CONTENT_MASK 0xFFFFFFFFL 95 #define MP0_SMN_C2PMSG_63__CONTENT__SHIFT 0x0 96 #define MP0_SMN_C2PMSG_64__CONTENT_MASK 0xFFFFFFFFL 97 #define MP0_SMN_C2PMSG_64__CONTENT__SHIFT 0x0 98 #define MP0_SMN_C2PMSG_65__CONTENT_MASK 0xFFFFFFFFL 99 #define MP0_SMN_C2PMSG_65__CONTENT__SHIFT 0x0 100 #define MP0_SMN_C2PMSG_66__CONTENT_MASK 0xFFFFFFFFL 101 #define MP0_SMN_C2PMSG_66__CONTENT__SHIFT 0x0 102 #define MP0_SMN_C2PMSG_67__CONTENT_MASK 0xFFFFFFFFL 103 #define MP0_SMN_C2PMSG_67__CONTENT__SHIFT 0x0 104 #define MP0_SMN_C2PMSG_68__CONTENT_MASK 0xFFFFFFFFL 105 #define MP0_SMN_C2PMSG_68__CONTENT__SHIFT 0x0 106 #define MP0_SMN_C2PMSG_69__CONTENT_MASK 0xFFFFFFFFL 107 #define MP0_SMN_C2PMSG_69__CONTENT__SHIFT 0x0 108 #define MP0_SMN_C2PMSG_70__CONTENT_MASK 0xFFFFFFFFL 109 #define MP0_SMN_C2PMSG_70__CONTENT__SHIFT 0x0 110 #define MP0_SMN_C2PMSG_71__CONTENT_MASK 0xFFFFFFFFL 111 #define MP0_SMN_C2PMSG_71__CONTENT__SHIFT 0x0 112 #define MP0_SMN_C2PMSG_72__CONTENT_MASK 0xFFFFFFFFL 113 #define MP0_SMN_C2PMSG_72__CONTENT__SHIFT 0x0 114 #define MP0_SMN_C2PMSG_73__CONTENT_MASK 0xFFFFFFFFL 115 #define MP0_SMN_C2PMSG_73__CONTENT__SHIFT 0x0 116 #define MP0_SMN_C2PMSG_74__CONTENT_MASK 0xFFFFFFFFL 117 #define MP0_SMN_C2PMSG_74__CONTENT__SHIFT 0x0 118 #define MP0_SMN_C2PMSG_75__CONTENT_MASK 0xFFFFFFFFL 119 #define MP0_SMN_C2PMSG_75__CONTENT__SHIFT 0x0 120 #define MP0_SMN_C2PMSG_76__CONTENT_MASK 0xFFFFFFFFL 121 #define MP0_SMN_C2PMSG_76__CONTENT__SHIFT 0x0 122 #define MP0_SMN_C2PMSG_77__CONTENT_MASK 0xFFFFFFFFL 123 #define MP0_SMN_C2PMSG_77__CONTENT__SHIFT 0x0 124 #define MP0_SMN_C2PMSG_78__CONTENT_MASK 0xFFFFFFFFL 125 #define MP0_SMN_C2PMSG_78__CONTENT__SHIFT 0x0 126 #define MP0_SMN_C2PMSG_79__CONTENT_MASK 0xFFFFFFFFL 127 #define MP0_SMN_C2PMSG_79__CONTENT__SHIFT 0x0 128 #define MP0_SMN_C2PMSG_80__CONTENT_MASK 0xFFFFFFFFL 129 #define MP0_SMN_C2PMSG_80__CONTENT__SHIFT 0x0 130 #define MP0_SMN_C2PMSG_81__CONTENT_MASK 0xFFFFFFFFL 131 #define MP0_SMN_C2PMSG_81__CONTENT__SHIFT 0x0 132 #define MP0_SMN_C2PMSG_82__CONTENT_MASK 0xFFFFFFFFL 133 #define MP0_SMN_C2PMSG_82__CONTENT__SHIFT 0x0 134 #define MP0_SMN_C2PMSG_83__CONTENT_MASK 0xFFFFFFFFL 135 #define MP0_SMN_C2PMSG_83__CONTENT__SHIFT 0x0 136 #define MP0_SMN_C2PMSG_84__CONTENT_MASK 0xFFFFFFFFL 137 #define MP0_SMN_C2PMSG_84__CONTENT__SHIFT 0x0 138 #define MP0_SMN_C2PMSG_85__CONTENT_MASK 0xFFFFFFFFL 139 #define MP0_SMN_C2PMSG_85__CONTENT__SHIFT 0x0 140 #define MP0_SMN_C2PMSG_86__CONTENT_MASK 0xFFFFFFFFL 141 #define MP0_SMN_C2PMSG_86__CONTENT__SHIFT 0x0 142 #define MP0_SMN_C2PMSG_87__CONTENT_MASK 0xFFFFFFFFL 143 #define MP0_SMN_C2PMSG_87__CONTENT__SHIFT 0x0 144 #define MP0_SMN_C2PMSG_88__CONTENT_MASK 0xFFFFFFFFL 145 #define MP0_SMN_C2PMSG_88__CONTENT__SHIFT 0x0 146 #define MP0_SMN_C2PMSG_89__CONTENT_MASK 0xFFFFFFFFL 147 #define MP0_SMN_C2PMSG_89__CONTENT__SHIFT 0x0 148 #define MP0_SMN_C2PMSG_90__CONTENT_MASK 0xFFFFFFFFL 149 #define MP0_SMN_C2PMSG_90__CONTENT__SHIFT 0x0 150 #define MP0_SMN_C2PMSG_91__CONTENT_MASK 0xFFFFFFFFL 151 #define MP0_SMN_C2PMSG_91__CONTENT__SHIFT 0x0 152 #define MP0_SMN_C2PMSG_92__CONTENT_MASK 0xFFFFFFFFL 153 #define MP0_SMN_C2PMSG_92__CONTENT__SHIFT 0x0 154 #define MP0_SMN_C2PMSG_93__CONTENT_MASK 0xFFFFFFFFL 155 #define MP0_SMN_C2PMSG_93__CONTENT__SHIFT 0x0 156 #define MP0_SMN_C2PMSG_94__CONTENT_MASK 0xFFFFFFFFL 157 #define MP0_SMN_C2PMSG_94__CONTENT__SHIFT 0x0 158 #define MP0_SMN_C2PMSG_95__CONTENT_MASK 0xFFFFFFFFL 159 #define MP0_SMN_C2PMSG_95__CONTENT__SHIFT 0x0 160 #define MP0_SMN_C2PMSG_96__CONTENT_MASK 0xFFFFFFFFL 161 #define MP0_SMN_C2PMSG_96__CONTENT__SHIFT 0x0 162 #define MP0_SMN_C2PMSG_97__CONTENT_MASK 0xFFFFFFFFL 163 #define MP0_SMN_C2PMSG_97__CONTENT__SHIFT 0x0 164 #define MP0_SMN_C2PMSG_98__CONTENT_MASK 0xFFFFFFFFL 165 #define MP0_SMN_C2PMSG_98__CONTENT__SHIFT 0x0 166 #define MP0_SMN_C2PMSG_99__CONTENT_MASK 0xFFFFFFFFL 167 #define MP0_SMN_C2PMSG_99__CONTENT__SHIFT 0x0 168 #define MP0_SMN_IH_CREDIT__CLIENT_ID_MASK 0x00FF0000L 169 #define MP0_SMN_IH_CREDIT__CLIENT_ID__SHIFT 0x10 170 #define MP0_SMN_IH_CREDIT__CREDIT_VALUE_MASK 0x00000003L 171 #define MP0_SMN_IH_CREDIT__CREDIT_VALUE__SHIFT 0x0 172 #define MP0_SMN_IH_SW_INT_CTRL__INT_ACK_MASK 0x00000100L 173 #define MP0_SMN_IH_SW_INT_CTRL__INT_ACK__SHIFT 0x8 174 #define MP0_SMN_IH_SW_INT_CTRL__INT_MASK_MASK 0x00000001L 175 #define MP0_SMN_IH_SW_INT_CTRL__INT_MASK__SHIFT 0x0 176 #define MP0_SMN_IH_SW_INT__ID_MASK 0x000000FFL 177 #define MP0_SMN_IH_SW_INT__ID__SHIFT 0x0 178 #define MP0_SMN_IH_SW_INT__VALID_MASK 0x00000100L 179 #define MP0_SMN_IH_SW_INT__VALID__SHIFT 0x8 180 #define MP1_SMN_C2PMSG_100__CONTENT_MASK 0xFFFFFFFFL 181 #define MP1_SMN_C2PMSG_100__CONTENT__SHIFT 0x0 182 #define MP1_SMN_C2PMSG_101__CONTENT_MASK 0xFFFFFFFFL 183 #define MP1_SMN_C2PMSG_101__CONTENT__SHIFT 0x0 184 #define MP1_SMN_C2PMSG_102__CONTENT_MASK 0xFFFFFFFFL 185 #define MP1_SMN_C2PMSG_102__CONTENT__SHIFT 0x0 186 #define MP1_SMN_C2PMSG_103__CONTENT_MASK 0xFFFFFFFFL 187 #define MP1_SMN_C2PMSG_103__CONTENT__SHIFT 0x0 188 #define MP1_SMN_C2PMSG_32__CONTENT_MASK 0xFFFFFFFFL 189 #define MP1_SMN_C2PMSG_32__CONTENT__SHIFT 0x0 190 #define MP1_SMN_C2PMSG_33__CONTENT_MASK 0xFFFFFFFFL 191 #define MP1_SMN_C2PMSG_33__CONTENT__SHIFT 0x0 192 #define MP1_SMN_C2PMSG_34__CONTENT_MASK 0xFFFFFFFFL 193 #define MP1_SMN_C2PMSG_34__CONTENT__SHIFT 0x0 194 #define MP1_SMN_C2PMSG_35__CONTENT_MASK 0xFFFFFFFFL 195 #define MP1_SMN_C2PMSG_35__CONTENT__SHIFT 0x0 196 #define MP1_SMN_C2PMSG_36__CONTENT_MASK 0xFFFFFFFFL 197 #define MP1_SMN_C2PMSG_36__CONTENT__SHIFT 0x0 198 #define MP1_SMN_C2PMSG_37__CONTENT_MASK 0xFFFFFFFFL 199 #define MP1_SMN_C2PMSG_37__CONTENT__SHIFT 0x0 200 #define MP1_SMN_C2PMSG_38__CONTENT_MASK 0xFFFFFFFFL 201 #define MP1_SMN_C2PMSG_38__CONTENT__SHIFT 0x0 202 #define MP1_SMN_C2PMSG_39__CONTENT_MASK 0xFFFFFFFFL 203 #define MP1_SMN_C2PMSG_39__CONTENT__SHIFT 0x0 204 #define MP1_SMN_C2PMSG_40__CONTENT_MASK 0xFFFFFFFFL 205 #define MP1_SMN_C2PMSG_40__CONTENT__SHIFT 0x0 206 #define MP1_SMN_C2PMSG_41__CONTENT_MASK 0xFFFFFFFFL 207 #define MP1_SMN_C2PMSG_41__CONTENT__SHIFT 0x0 208 #define MP1_SMN_C2PMSG_42__CONTENT_MASK 0xFFFFFFFFL 209 #define MP1_SMN_C2PMSG_42__CONTENT__SHIFT 0x0 210 #define MP1_SMN_C2PMSG_43__CONTENT_MASK 0xFFFFFFFFL 211 #define MP1_SMN_C2PMSG_43__CONTENT__SHIFT 0x0 212 #define MP1_SMN_C2PMSG_44__CONTENT_MASK 0xFFFFFFFFL 213 #define MP1_SMN_C2PMSG_44__CONTENT__SHIFT 0x0 214 #define MP1_SMN_C2PMSG_45__CONTENT_MASK 0xFFFFFFFFL 215 #define MP1_SMN_C2PMSG_45__CONTENT__SHIFT 0x0 216 #define MP1_SMN_C2PMSG_46__CONTENT_MASK 0xFFFFFFFFL 217 #define MP1_SMN_C2PMSG_46__CONTENT__SHIFT 0x0 218 #define MP1_SMN_C2PMSG_47__CONTENT_MASK 0xFFFFFFFFL 219 #define MP1_SMN_C2PMSG_47__CONTENT__SHIFT 0x0 220 #define MP1_SMN_C2PMSG_48__CONTENT_MASK 0xFFFFFFFFL 221 #define MP1_SMN_C2PMSG_48__CONTENT__SHIFT 0x0 222 #define MP1_SMN_C2PMSG_49__CONTENT_MASK 0xFFFFFFFFL 223 #define MP1_SMN_C2PMSG_49__CONTENT__SHIFT 0x0 224 #define MP1_SMN_C2PMSG_50__CONTENT_MASK 0xFFFFFFFFL 225 #define MP1_SMN_C2PMSG_50__CONTENT__SHIFT 0x0 226 #define MP1_SMN_C2PMSG_51__CONTENT_MASK 0xFFFFFFFFL 227 #define MP1_SMN_C2PMSG_51__CONTENT__SHIFT 0x0 228 #define MP1_SMN_C2PMSG_52__CONTENT_MASK 0xFFFFFFFFL 229 #define MP1_SMN_C2PMSG_52__CONTENT__SHIFT 0x0 230 #define MP1_SMN_C2PMSG_53__CONTENT_MASK 0xFFFFFFFFL 231 #define MP1_SMN_C2PMSG_53__CONTENT__SHIFT 0x0 232 #define MP1_SMN_C2PMSG_54__CONTENT_MASK 0xFFFFFFFFL 233 #define MP1_SMN_C2PMSG_54__CONTENT__SHIFT 0x0 234 #define MP1_SMN_C2PMSG_55__CONTENT_MASK 0xFFFFFFFFL 235 #define MP1_SMN_C2PMSG_55__CONTENT__SHIFT 0x0 236 #define MP1_SMN_C2PMSG_56__CONTENT_MASK 0xFFFFFFFFL 237 #define MP1_SMN_C2PMSG_56__CONTENT__SHIFT 0x0 238 #define MP1_SMN_C2PMSG_57__CONTENT_MASK 0xFFFFFFFFL 239 #define MP1_SMN_C2PMSG_57__CONTENT__SHIFT 0x0 240 #define MP1_SMN_C2PMSG_58__CONTENT_MASK 0xFFFFFFFFL 241 #define MP1_SMN_C2PMSG_58__CONTENT__SHIFT 0x0 242 #define MP1_SMN_C2PMSG_59__CONTENT_MASK 0xFFFFFFFFL 243 #define MP1_SMN_C2PMSG_59__CONTENT__SHIFT 0x0 244 #define MP1_SMN_C2PMSG_60__CONTENT_MASK 0xFFFFFFFFL 245 #define MP1_SMN_C2PMSG_60__CONTENT__SHIFT 0x0 246 #define MP1_SMN_C2PMSG_61__CONTENT_MASK 0xFFFFFFFFL 247 #define MP1_SMN_C2PMSG_61__CONTENT__SHIFT 0x0 248 #define MP1_SMN_C2PMSG_62__CONTENT_MASK 0xFFFFFFFFL 249 #define MP1_SMN_C2PMSG_62__CONTENT__SHIFT 0x0 250 #define MP1_SMN_C2PMSG_63__CONTENT_MASK 0xFFFFFFFFL 251 #define MP1_SMN_C2PMSG_63__CONTENT__SHIFT 0x0 252 #define MP1_SMN_C2PMSG_64__CONTENT_MASK 0xFFFFFFFFL 253 #define MP1_SMN_C2PMSG_64__CONTENT__SHIFT 0x0 254 #define MP1_SMN_C2PMSG_65__CONTENT_MASK 0xFFFFFFFFL 255 #define MP1_SMN_C2PMSG_65__CONTENT__SHIFT 0x0 256 #define MP1_SMN_C2PMSG_66__CONTENT_MASK 0xFFFFFFFFL 257 #define MP1_SMN_C2PMSG_66__CONTENT__SHIFT 0x0 258 #define MP1_SMN_C2PMSG_67__CONTENT_MASK 0xFFFFFFFFL 259 #define MP1_SMN_C2PMSG_67__CONTENT__SHIFT 0x0 260 #define MP1_SMN_C2PMSG_68__CONTENT_MASK 0xFFFFFFFFL 261 #define MP1_SMN_C2PMSG_68__CONTENT__SHIFT 0x0 262 #define MP1_SMN_C2PMSG_69__CONTENT_MASK 0xFFFFFFFFL 263 #define MP1_SMN_C2PMSG_69__CONTENT__SHIFT 0x0 264 #define MP1_SMN_C2PMSG_70__CONTENT_MASK 0xFFFFFFFFL 265 #define MP1_SMN_C2PMSG_70__CONTENT__SHIFT 0x0 266 #define MP1_SMN_C2PMSG_71__CONTENT_MASK 0xFFFFFFFFL 267 #define MP1_SMN_C2PMSG_71__CONTENT__SHIFT 0x0 268 #define MP1_SMN_C2PMSG_72__CONTENT_MASK 0xFFFFFFFFL 269 #define MP1_SMN_C2PMSG_72__CONTENT__SHIFT 0x0 270 #define MP1_SMN_C2PMSG_73__CONTENT_MASK 0xFFFFFFFFL 271 #define MP1_SMN_C2PMSG_73__CONTENT__SHIFT 0x0 272 #define MP1_SMN_C2PMSG_74__CONTENT_MASK 0xFFFFFFFFL 273 #define MP1_SMN_C2PMSG_74__CONTENT__SHIFT 0x0 274 #define MP1_SMN_C2PMSG_75__CONTENT_MASK 0xFFFFFFFFL 275 #define MP1_SMN_C2PMSG_75__CONTENT__SHIFT 0x0 276 #define MP1_SMN_C2PMSG_76__CONTENT_MASK 0xFFFFFFFFL 277 #define MP1_SMN_C2PMSG_76__CONTENT__SHIFT 0x0 278 #define MP1_SMN_C2PMSG_77__CONTENT_MASK 0xFFFFFFFFL 279 #define MP1_SMN_C2PMSG_77__CONTENT__SHIFT 0x0 280 #define MP1_SMN_C2PMSG_78__CONTENT_MASK 0xFFFFFFFFL 281 #define MP1_SMN_C2PMSG_78__CONTENT__SHIFT 0x0 282 #define MP1_SMN_C2PMSG_79__CONTENT_MASK 0xFFFFFFFFL 283 #define MP1_SMN_C2PMSG_79__CONTENT__SHIFT 0x0 284 #define MP1_SMN_C2PMSG_80__CONTENT_MASK 0xFFFFFFFFL 285 #define MP1_SMN_C2PMSG_80__CONTENT__SHIFT 0x0 286 #define MP1_SMN_C2PMSG_81__CONTENT_MASK 0xFFFFFFFFL 287 #define MP1_SMN_C2PMSG_81__CONTENT__SHIFT 0x0 288 #define MP1_SMN_C2PMSG_82__CONTENT_MASK 0xFFFFFFFFL 289 #define MP1_SMN_C2PMSG_82__CONTENT__SHIFT 0x0 290 #define MP1_SMN_C2PMSG_83__CONTENT_MASK 0xFFFFFFFFL 291 #define MP1_SMN_C2PMSG_83__CONTENT__SHIFT 0x0 292 #define MP1_SMN_C2PMSG_84__CONTENT_MASK 0xFFFFFFFFL 293 #define MP1_SMN_C2PMSG_84__CONTENT__SHIFT 0x0 294 #define MP1_SMN_C2PMSG_85__CONTENT_MASK 0xFFFFFFFFL 295 #define MP1_SMN_C2PMSG_85__CONTENT__SHIFT 0x0 296 #define MP1_SMN_C2PMSG_86__CONTENT_MASK 0xFFFFFFFFL 297 #define MP1_SMN_C2PMSG_86__CONTENT__SHIFT 0x0 298 #define MP1_SMN_C2PMSG_87__CONTENT_MASK 0xFFFFFFFFL 299 #define MP1_SMN_C2PMSG_87__CONTENT__SHIFT 0x0 300 #define MP1_SMN_C2PMSG_88__CONTENT_MASK 0xFFFFFFFFL 301 #define MP1_SMN_C2PMSG_88__CONTENT__SHIFT 0x0 302 #define MP1_SMN_C2PMSG_89__CONTENT_MASK 0xFFFFFFFFL 303 #define MP1_SMN_C2PMSG_89__CONTENT__SHIFT 0x0 304 #define MP1_SMN_C2PMSG_90__CONTENT_MASK 0xFFFFFFFFL 305 #define MP1_SMN_C2PMSG_90__CONTENT__SHIFT 0x0 306 #define MP1_SMN_C2PMSG_91__CONTENT_MASK 0xFFFFFFFFL 307 #define MP1_SMN_C2PMSG_91__CONTENT__SHIFT 0x0 308 #define MP1_SMN_C2PMSG_92__CONTENT_MASK 0xFFFFFFFFL 309 #define MP1_SMN_C2PMSG_92__CONTENT__SHIFT 0x0 310 #define MP1_SMN_C2PMSG_93__CONTENT_MASK 0xFFFFFFFFL 311 #define MP1_SMN_C2PMSG_93__CONTENT__SHIFT 0x0 312 #define MP1_SMN_C2PMSG_94__CONTENT_MASK 0xFFFFFFFFL 313 #define MP1_SMN_C2PMSG_94__CONTENT__SHIFT 0x0 314 #define MP1_SMN_C2PMSG_95__CONTENT_MASK 0xFFFFFFFFL 315 #define MP1_SMN_C2PMSG_95__CONTENT__SHIFT 0x0 316 #define MP1_SMN_C2PMSG_96__CONTENT_MASK 0xFFFFFFFFL 317 #define MP1_SMN_C2PMSG_96__CONTENT__SHIFT 0x0 318 #define MP1_SMN_C2PMSG_97__CONTENT_MASK 0xFFFFFFFFL 319 #define MP1_SMN_C2PMSG_97__CONTENT__SHIFT 0x0 320 #define MP1_SMN_C2PMSG_98__CONTENT_MASK 0xFFFFFFFFL 321 #define MP1_SMN_C2PMSG_98__CONTENT__SHIFT 0x0 322 #define MP1_SMN_C2PMSG_99__CONTENT_MASK 0xFFFFFFFFL 323 #define MP1_SMN_C2PMSG_99__CONTENT__SHIFT 0x0 324 #define MP1_SMN_EXT_SCRATCH0__DATA_MASK 0xFFFFFFFFL 325 #define MP1_SMN_EXT_SCRATCH0__DATA__SHIFT 0x0 326 #define MP1_SMN_EXT_SCRATCH1__DATA_MASK 0xFFFFFFFFL 327 #define MP1_SMN_EXT_SCRATCH1__DATA__SHIFT 0x0 328 #define MP1_SMN_EXT_SCRATCH2__DATA_MASK 0xFFFFFFFFL 329 #define MP1_SMN_EXT_SCRATCH2__DATA__SHIFT 0x0 330 #define MP1_SMN_EXT_SCRATCH3__DATA_MASK 0xFFFFFFFFL 331 #define MP1_SMN_EXT_SCRATCH3__DATA__SHIFT 0x0 332 #define MP1_SMN_EXT_SCRATCH4__DATA_MASK 0xFFFFFFFFL 333 #define MP1_SMN_EXT_SCRATCH4__DATA__SHIFT 0x0 334 #define MP1_SMN_EXT_SCRATCH5__DATA_MASK 0xFFFFFFFFL 335 #define MP1_SMN_EXT_SCRATCH5__DATA__SHIFT 0x0 336 #define MP1_SMN_EXT_SCRATCH6__DATA_MASK 0xFFFFFFFFL 337 #define MP1_SMN_EXT_SCRATCH6__DATA__SHIFT 0x0 338 #define MP1_SMN_EXT_SCRATCH7__DATA_MASK 0xFFFFFFFFL 339 #define MP1_SMN_EXT_SCRATCH7__DATA__SHIFT 0x0 340 #define MP1_SMN_FPS_CNT__COUNT_MASK 0xFFFFFFFFL 341 #define MP1_SMN_FPS_CNT__COUNT__SHIFT 0x0 342 #define MP1_SMN_IH_CREDIT__CLIENT_ID_MASK 0x00FF0000L 343 #define MP1_SMN_IH_CREDIT__CLIENT_ID__SHIFT 0x10 344 #define MP1_SMN_IH_CREDIT__CREDIT_VALUE_MASK 0x00000003L 345 #define MP1_SMN_IH_CREDIT__CREDIT_VALUE__SHIFT 0x0 346 #define MP1_SMN_IH_SW_INT_CTRL__INT_ACK_MASK 0x00000100L 347 #define MP1_SMN_IH_SW_INT_CTRL__INT_ACK__SHIFT 0x8 348 #define MP1_SMN_IH_SW_INT_CTRL__INT_MASK_MASK 0x00000001L 349 #define MP1_SMN_IH_SW_INT_CTRL__INT_MASK__SHIFT 0x0 350 #define MP1_SMN_IH_SW_INT__ID_MASK 0x000000FFL 351 #define MP1_SMN_IH_SW_INT__ID__SHIFT 0x0 352 #define MP1_SMN_IH_SW_INT__VALID_MASK 0x00000100L 353 #define MP1_SMN_IH_SW_INT__VALID__SHIFT 0x8 354 355 #endif 356