175199b8cSFeifei Xu /*
275199b8cSFeifei Xu  * Copyright (C) 2017  Advanced Micro Devices, Inc.
375199b8cSFeifei Xu  *
475199b8cSFeifei Xu  * Permission is hereby granted, free of charge, to any person obtaining a
575199b8cSFeifei Xu  * copy of this software and associated documentation files (the "Software"),
675199b8cSFeifei Xu  * to deal in the Software without restriction, including without limitation
775199b8cSFeifei Xu  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
875199b8cSFeifei Xu  * and/or sell copies of the Software, and to permit persons to whom the
975199b8cSFeifei Xu  * Software is furnished to do so, subject to the following conditions:
1075199b8cSFeifei Xu  *
1175199b8cSFeifei Xu  * The above copyright notice and this permission notice shall be included
1275199b8cSFeifei Xu  * in all copies or substantial portions of the Software.
1375199b8cSFeifei Xu  *
1475199b8cSFeifei Xu  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
1575199b8cSFeifei Xu  * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
1675199b8cSFeifei Xu  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
1775199b8cSFeifei Xu  * THE COPYRIGHT HOLDER(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN
1875199b8cSFeifei Xu  * AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
1975199b8cSFeifei Xu  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
2075199b8cSFeifei Xu  */
2175199b8cSFeifei Xu #ifndef _hdp_4_0_OFFSET_HEADER
2275199b8cSFeifei Xu #define _hdp_4_0_OFFSET_HEADER
2375199b8cSFeifei Xu 
2475199b8cSFeifei Xu 
2575199b8cSFeifei Xu 
2675199b8cSFeifei Xu // addressBlock: hdp_hdpdec
2775199b8cSFeifei Xu // base address:	0x3c80
2875199b8cSFeifei Xu #define mmHDP_MMHUB_TLVL	0x0000
2975199b8cSFeifei Xu #define mmHDP_MMHUB_TLVL_BASE_IDX	0
3075199b8cSFeifei Xu #define mmHDP_MMHUB_UNITID	0x0001
3175199b8cSFeifei Xu #define mmHDP_MMHUB_UNITID_BASE_IDX	0
3275199b8cSFeifei Xu #define mmHDP_NONSURFACE_BASE	0x0040
3375199b8cSFeifei Xu #define mmHDP_NONSURFACE_BASE_BASE_IDX	0
3475199b8cSFeifei Xu #define mmHDP_NONSURFACE_INFO	0x0041
3575199b8cSFeifei Xu #define mmHDP_NONSURFACE_INFO_BASE_IDX	0
3675199b8cSFeifei Xu #define mmHDP_NONSURFACE_BASE_HI	0x0042
3775199b8cSFeifei Xu #define mmHDP_NONSURFACE_BASE_HI_BASE_IDX	0
3875199b8cSFeifei Xu #define mmHDP_NONSURF_FLAGS	0x00c8
3975199b8cSFeifei Xu #define mmHDP_NONSURF_FLAGS_BASE_IDX	0
4075199b8cSFeifei Xu #define mmHDP_NONSURF_FLAGS_CLR	0x00c9
4175199b8cSFeifei Xu #define mmHDP_NONSURF_FLAGS_CLR_BASE_IDX	0
4275199b8cSFeifei Xu #define mmHDP_HOST_PATH_CNTL	0x00cc
4375199b8cSFeifei Xu #define mmHDP_HOST_PATH_CNTL_BASE_IDX	0
4475199b8cSFeifei Xu #define mmHDP_SW_SEMAPHORE	0x00cd
4575199b8cSFeifei Xu #define mmHDP_SW_SEMAPHORE_BASE_IDX	0
4675199b8cSFeifei Xu #define mmHDP_DEBUG0	0x00ce
4775199b8cSFeifei Xu #define mmHDP_DEBUG0_BASE_IDX	0
4875199b8cSFeifei Xu #define mmHDP_LAST_SURFACE_HIT	0x00d0
4975199b8cSFeifei Xu #define mmHDP_LAST_SURFACE_HIT_BASE_IDX	0
5075199b8cSFeifei Xu #define mmHDP_READ_CACHE_INVALIDATE	0x00d1
5175199b8cSFeifei Xu #define mmHDP_READ_CACHE_INVALIDATE_BASE_IDX	0
5275199b8cSFeifei Xu #define mmHDP_OUTSTANDING_REQ	0x00d2
5375199b8cSFeifei Xu #define mmHDP_OUTSTANDING_REQ_BASE_IDX	0
5475199b8cSFeifei Xu #define mmHDP_MISC_CNTL	0x00d3
5575199b8cSFeifei Xu #define mmHDP_MISC_CNTL_BASE_IDX	0
5675199b8cSFeifei Xu #define mmHDP_MEM_POWER_LS	0x00d4
5775199b8cSFeifei Xu #define mmHDP_MEM_POWER_LS_BASE_IDX	0
5875199b8cSFeifei Xu #define mmHDP_MMHUB_CNTL	0x00d5
5975199b8cSFeifei Xu #define mmHDP_MMHUB_CNTL_BASE_IDX	0
6075199b8cSFeifei Xu #define mmHDP_EDC_CNT	0x00d6
6175199b8cSFeifei Xu #define mmHDP_EDC_CNT_BASE_IDX	0
6275199b8cSFeifei Xu #define mmHDP_VERSION	0x00d7
6375199b8cSFeifei Xu #define mmHDP_VERSION_BASE_IDX	0
6475199b8cSFeifei Xu #define mmHDP_CLK_CNTL	0x00d8
6575199b8cSFeifei Xu #define mmHDP_CLK_CNTL_BASE_IDX	0
6675199b8cSFeifei Xu #define mmHDP_MEMIO_CNTL	0x00f6
6775199b8cSFeifei Xu #define mmHDP_MEMIO_CNTL_BASE_IDX	0
6875199b8cSFeifei Xu #define mmHDP_MEMIO_ADDR	0x00f7
6975199b8cSFeifei Xu #define mmHDP_MEMIO_ADDR_BASE_IDX	0
7075199b8cSFeifei Xu #define mmHDP_MEMIO_STATUS	0x00f8
7175199b8cSFeifei Xu #define mmHDP_MEMIO_STATUS_BASE_IDX	0
7275199b8cSFeifei Xu #define mmHDP_MEMIO_WR_DATA	0x00f9
7375199b8cSFeifei Xu #define mmHDP_MEMIO_WR_DATA_BASE_IDX	0
7475199b8cSFeifei Xu #define mmHDP_MEMIO_RD_DATA	0x00fa
7575199b8cSFeifei Xu #define mmHDP_MEMIO_RD_DATA_BASE_IDX	0
7675199b8cSFeifei Xu #define mmHDP_XDP_DIRECT2HDP_FIRST	0x0100
7775199b8cSFeifei Xu #define mmHDP_XDP_DIRECT2HDP_FIRST_BASE_IDX	0
7875199b8cSFeifei Xu #define mmHDP_XDP_D2H_FLUSH	0x0101
7975199b8cSFeifei Xu #define mmHDP_XDP_D2H_FLUSH_BASE_IDX	0
8075199b8cSFeifei Xu #define mmHDP_XDP_D2H_BAR_UPDATE	0x0102
8175199b8cSFeifei Xu #define mmHDP_XDP_D2H_BAR_UPDATE_BASE_IDX	0
8275199b8cSFeifei Xu #define mmHDP_XDP_D2H_RSVD_3	0x0103
8375199b8cSFeifei Xu #define mmHDP_XDP_D2H_RSVD_3_BASE_IDX	0
8475199b8cSFeifei Xu #define mmHDP_XDP_D2H_RSVD_4	0x0104
8575199b8cSFeifei Xu #define mmHDP_XDP_D2H_RSVD_4_BASE_IDX	0
8675199b8cSFeifei Xu #define mmHDP_XDP_D2H_RSVD_5	0x0105
8775199b8cSFeifei Xu #define mmHDP_XDP_D2H_RSVD_5_BASE_IDX	0
8875199b8cSFeifei Xu #define mmHDP_XDP_D2H_RSVD_6	0x0106
8975199b8cSFeifei Xu #define mmHDP_XDP_D2H_RSVD_6_BASE_IDX	0
9075199b8cSFeifei Xu #define mmHDP_XDP_D2H_RSVD_7	0x0107
9175199b8cSFeifei Xu #define mmHDP_XDP_D2H_RSVD_7_BASE_IDX	0
9275199b8cSFeifei Xu #define mmHDP_XDP_D2H_RSVD_8	0x0108
9375199b8cSFeifei Xu #define mmHDP_XDP_D2H_RSVD_8_BASE_IDX	0
9475199b8cSFeifei Xu #define mmHDP_XDP_D2H_RSVD_9	0x0109
9575199b8cSFeifei Xu #define mmHDP_XDP_D2H_RSVD_9_BASE_IDX	0
9675199b8cSFeifei Xu #define mmHDP_XDP_D2H_RSVD_10	0x010a
9775199b8cSFeifei Xu #define mmHDP_XDP_D2H_RSVD_10_BASE_IDX	0
9875199b8cSFeifei Xu #define mmHDP_XDP_D2H_RSVD_11	0x010b
9975199b8cSFeifei Xu #define mmHDP_XDP_D2H_RSVD_11_BASE_IDX	0
10075199b8cSFeifei Xu #define mmHDP_XDP_D2H_RSVD_12	0x010c
10175199b8cSFeifei Xu #define mmHDP_XDP_D2H_RSVD_12_BASE_IDX	0
10275199b8cSFeifei Xu #define mmHDP_XDP_D2H_RSVD_13	0x010d
10375199b8cSFeifei Xu #define mmHDP_XDP_D2H_RSVD_13_BASE_IDX	0
10475199b8cSFeifei Xu #define mmHDP_XDP_D2H_RSVD_14	0x010e
10575199b8cSFeifei Xu #define mmHDP_XDP_D2H_RSVD_14_BASE_IDX	0
10675199b8cSFeifei Xu #define mmHDP_XDP_D2H_RSVD_15	0x010f
10775199b8cSFeifei Xu #define mmHDP_XDP_D2H_RSVD_15_BASE_IDX	0
10875199b8cSFeifei Xu #define mmHDP_XDP_D2H_RSVD_16	0x0110
10975199b8cSFeifei Xu #define mmHDP_XDP_D2H_RSVD_16_BASE_IDX	0
11075199b8cSFeifei Xu #define mmHDP_XDP_D2H_RSVD_17	0x0111
11175199b8cSFeifei Xu #define mmHDP_XDP_D2H_RSVD_17_BASE_IDX	0
11275199b8cSFeifei Xu #define mmHDP_XDP_D2H_RSVD_18	0x0112
11375199b8cSFeifei Xu #define mmHDP_XDP_D2H_RSVD_18_BASE_IDX	0
11475199b8cSFeifei Xu #define mmHDP_XDP_D2H_RSVD_19	0x0113
11575199b8cSFeifei Xu #define mmHDP_XDP_D2H_RSVD_19_BASE_IDX	0
11675199b8cSFeifei Xu #define mmHDP_XDP_D2H_RSVD_20	0x0114
11775199b8cSFeifei Xu #define mmHDP_XDP_D2H_RSVD_20_BASE_IDX	0
11875199b8cSFeifei Xu #define mmHDP_XDP_D2H_RSVD_21	0x0115
11975199b8cSFeifei Xu #define mmHDP_XDP_D2H_RSVD_21_BASE_IDX	0
12075199b8cSFeifei Xu #define mmHDP_XDP_D2H_RSVD_22	0x0116
12175199b8cSFeifei Xu #define mmHDP_XDP_D2H_RSVD_22_BASE_IDX	0
12275199b8cSFeifei Xu #define mmHDP_XDP_D2H_RSVD_23	0x0117
12375199b8cSFeifei Xu #define mmHDP_XDP_D2H_RSVD_23_BASE_IDX	0
12475199b8cSFeifei Xu #define mmHDP_XDP_D2H_RSVD_24	0x0118
12575199b8cSFeifei Xu #define mmHDP_XDP_D2H_RSVD_24_BASE_IDX	0
12675199b8cSFeifei Xu #define mmHDP_XDP_D2H_RSVD_25	0x0119
12775199b8cSFeifei Xu #define mmHDP_XDP_D2H_RSVD_25_BASE_IDX	0
12875199b8cSFeifei Xu #define mmHDP_XDP_D2H_RSVD_26	0x011a
12975199b8cSFeifei Xu #define mmHDP_XDP_D2H_RSVD_26_BASE_IDX	0
13075199b8cSFeifei Xu #define mmHDP_XDP_D2H_RSVD_27	0x011b
13175199b8cSFeifei Xu #define mmHDP_XDP_D2H_RSVD_27_BASE_IDX	0
13275199b8cSFeifei Xu #define mmHDP_XDP_D2H_RSVD_28	0x011c
13375199b8cSFeifei Xu #define mmHDP_XDP_D2H_RSVD_28_BASE_IDX	0
13475199b8cSFeifei Xu #define mmHDP_XDP_D2H_RSVD_29	0x011d
13575199b8cSFeifei Xu #define mmHDP_XDP_D2H_RSVD_29_BASE_IDX	0
13675199b8cSFeifei Xu #define mmHDP_XDP_D2H_RSVD_30	0x011e
13775199b8cSFeifei Xu #define mmHDP_XDP_D2H_RSVD_30_BASE_IDX	0
13875199b8cSFeifei Xu #define mmHDP_XDP_D2H_RSVD_31	0x011f
13975199b8cSFeifei Xu #define mmHDP_XDP_D2H_RSVD_31_BASE_IDX	0
14075199b8cSFeifei Xu #define mmHDP_XDP_D2H_RSVD_32	0x0120
14175199b8cSFeifei Xu #define mmHDP_XDP_D2H_RSVD_32_BASE_IDX	0
14275199b8cSFeifei Xu #define mmHDP_XDP_D2H_RSVD_33	0x0121
14375199b8cSFeifei Xu #define mmHDP_XDP_D2H_RSVD_33_BASE_IDX	0
14475199b8cSFeifei Xu #define mmHDP_XDP_D2H_RSVD_34	0x0122
14575199b8cSFeifei Xu #define mmHDP_XDP_D2H_RSVD_34_BASE_IDX	0
14675199b8cSFeifei Xu #define mmHDP_XDP_DIRECT2HDP_LAST	0x0123
14775199b8cSFeifei Xu #define mmHDP_XDP_DIRECT2HDP_LAST_BASE_IDX	0
14875199b8cSFeifei Xu #define mmHDP_XDP_P2P_BAR_CFG	0x0124
14975199b8cSFeifei Xu #define mmHDP_XDP_P2P_BAR_CFG_BASE_IDX	0
15075199b8cSFeifei Xu #define mmHDP_XDP_P2P_MBX_OFFSET	0x0125
15175199b8cSFeifei Xu #define mmHDP_XDP_P2P_MBX_OFFSET_BASE_IDX	0
15275199b8cSFeifei Xu #define mmHDP_XDP_P2P_MBX_ADDR0	0x0126
15375199b8cSFeifei Xu #define mmHDP_XDP_P2P_MBX_ADDR0_BASE_IDX	0
15475199b8cSFeifei Xu #define mmHDP_XDP_P2P_MBX_ADDR1	0x0127
15575199b8cSFeifei Xu #define mmHDP_XDP_P2P_MBX_ADDR1_BASE_IDX	0
15675199b8cSFeifei Xu #define mmHDP_XDP_P2P_MBX_ADDR2	0x0128
15775199b8cSFeifei Xu #define mmHDP_XDP_P2P_MBX_ADDR2_BASE_IDX	0
15875199b8cSFeifei Xu #define mmHDP_XDP_P2P_MBX_ADDR3	0x0129
15975199b8cSFeifei Xu #define mmHDP_XDP_P2P_MBX_ADDR3_BASE_IDX	0
16075199b8cSFeifei Xu #define mmHDP_XDP_P2P_MBX_ADDR4	0x012a
16175199b8cSFeifei Xu #define mmHDP_XDP_P2P_MBX_ADDR4_BASE_IDX	0
16275199b8cSFeifei Xu #define mmHDP_XDP_P2P_MBX_ADDR5	0x012b
16375199b8cSFeifei Xu #define mmHDP_XDP_P2P_MBX_ADDR5_BASE_IDX	0
16475199b8cSFeifei Xu #define mmHDP_XDP_P2P_MBX_ADDR6	0x012c
16575199b8cSFeifei Xu #define mmHDP_XDP_P2P_MBX_ADDR6_BASE_IDX	0
16675199b8cSFeifei Xu #define mmHDP_XDP_HDP_MBX_MC_CFG	0x012d
16775199b8cSFeifei Xu #define mmHDP_XDP_HDP_MBX_MC_CFG_BASE_IDX	0
16875199b8cSFeifei Xu #define mmHDP_XDP_HDP_MC_CFG	0x012e
16975199b8cSFeifei Xu #define mmHDP_XDP_HDP_MC_CFG_BASE_IDX	0
17075199b8cSFeifei Xu #define mmHDP_XDP_HST_CFG	0x012f
17175199b8cSFeifei Xu #define mmHDP_XDP_HST_CFG_BASE_IDX	0
17275199b8cSFeifei Xu #define mmHDP_XDP_HDP_IPH_CFG	0x0131
17375199b8cSFeifei Xu #define mmHDP_XDP_HDP_IPH_CFG_BASE_IDX	0
17475199b8cSFeifei Xu #define mmHDP_XDP_P2P_BAR0	0x0134
17575199b8cSFeifei Xu #define mmHDP_XDP_P2P_BAR0_BASE_IDX	0
17675199b8cSFeifei Xu #define mmHDP_XDP_P2P_BAR1	0x0135
17775199b8cSFeifei Xu #define mmHDP_XDP_P2P_BAR1_BASE_IDX	0
17875199b8cSFeifei Xu #define mmHDP_XDP_P2P_BAR2	0x0136
17975199b8cSFeifei Xu #define mmHDP_XDP_P2P_BAR2_BASE_IDX	0
18075199b8cSFeifei Xu #define mmHDP_XDP_P2P_BAR3	0x0137
18175199b8cSFeifei Xu #define mmHDP_XDP_P2P_BAR3_BASE_IDX	0
18275199b8cSFeifei Xu #define mmHDP_XDP_P2P_BAR4	0x0138
18375199b8cSFeifei Xu #define mmHDP_XDP_P2P_BAR4_BASE_IDX	0
18475199b8cSFeifei Xu #define mmHDP_XDP_P2P_BAR5	0x0139
18575199b8cSFeifei Xu #define mmHDP_XDP_P2P_BAR5_BASE_IDX	0
18675199b8cSFeifei Xu #define mmHDP_XDP_P2P_BAR6	0x013a
18775199b8cSFeifei Xu #define mmHDP_XDP_P2P_BAR6_BASE_IDX	0
18875199b8cSFeifei Xu #define mmHDP_XDP_P2P_BAR7	0x013b
18975199b8cSFeifei Xu #define mmHDP_XDP_P2P_BAR7_BASE_IDX	0
19075199b8cSFeifei Xu #define mmHDP_XDP_FLUSH_ARMED_STS	0x013c
19175199b8cSFeifei Xu #define mmHDP_XDP_FLUSH_ARMED_STS_BASE_IDX	0
19275199b8cSFeifei Xu #define mmHDP_XDP_FLUSH_CNTR0_STS	0x013d
19375199b8cSFeifei Xu #define mmHDP_XDP_FLUSH_CNTR0_STS_BASE_IDX	0
19475199b8cSFeifei Xu #define mmHDP_XDP_BUSY_STS	0x013e
19575199b8cSFeifei Xu #define mmHDP_XDP_BUSY_STS_BASE_IDX	0
19675199b8cSFeifei Xu #define mmHDP_XDP_STICKY	0x013f
19775199b8cSFeifei Xu #define mmHDP_XDP_STICKY_BASE_IDX	0
19875199b8cSFeifei Xu #define mmHDP_XDP_CHKN	0x0140
19975199b8cSFeifei Xu #define mmHDP_XDP_CHKN_BASE_IDX	0
20075199b8cSFeifei Xu #define mmHDP_XDP_BARS_ADDR_39_36	0x0144
20175199b8cSFeifei Xu #define mmHDP_XDP_BARS_ADDR_39_36_BASE_IDX	0
20275199b8cSFeifei Xu #define mmHDP_XDP_MC_VM_FB_LOCATION_BASE	0x0145
20375199b8cSFeifei Xu #define mmHDP_XDP_MC_VM_FB_LOCATION_BASE_BASE_IDX	0
20475199b8cSFeifei Xu #define mmHDP_XDP_GPU_IOV_VIOLATION_LOG	0x0148
20575199b8cSFeifei Xu #define mmHDP_XDP_GPU_IOV_VIOLATION_LOG_BASE_IDX	0
20675199b8cSFeifei Xu #define mmHDP_XDP_MMHUB_ERROR	0x0149
20775199b8cSFeifei Xu #define mmHDP_XDP_MMHUB_ERROR_BASE_IDX	0
20875199b8cSFeifei Xu 
20975199b8cSFeifei Xu #endif
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