1e54294d6SYong Zhao /* 2e54294d6SYong Zhao * Copyright (C) 2019 Advanced Micro Devices, Inc. 3e54294d6SYong Zhao * 4e54294d6SYong Zhao * Permission is hereby granted, free of charge, to any person obtaining a 5e54294d6SYong Zhao * copy of this software and associated documentation files (the "Software"), 6e54294d6SYong Zhao * to deal in the Software without restriction, including without limitation 7e54294d6SYong Zhao * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8e54294d6SYong Zhao * and/or sell copies of the Software, and to permit persons to whom the 9e54294d6SYong Zhao * Software is furnished to do so, subject to the following conditions: 10e54294d6SYong Zhao * 11e54294d6SYong Zhao * The above copyright notice and this permission notice shall be included 12e54294d6SYong Zhao * in all copies or substantial portions of the Software. 13e54294d6SYong Zhao * 14e54294d6SYong Zhao * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS 15e54294d6SYong Zhao * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16e54294d6SYong Zhao * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17e54294d6SYong Zhao * THE COPYRIGHT HOLDER(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN 18e54294d6SYong Zhao * AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN 19e54294d6SYong Zhao * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. 20e54294d6SYong Zhao */ 21e54294d6SYong Zhao #ifndef _athub_2_1_0_SH_MASK_HEADER 22e54294d6SYong Zhao #define _athub_2_1_0_SH_MASK_HEADER 23e54294d6SYong Zhao 24e54294d6SYong Zhao 25e54294d6SYong Zhao // addressBlock: athub_atsdec 26e54294d6SYong Zhao //ATHUB_ATS_MODE_CNTL 27e54294d6SYong Zhao #define ATHUB_ATS_MODE_CNTL__HOST_TRANS_ENABLE__SHIFT 0x0 28e54294d6SYong Zhao #define ATHUB_ATS_MODE_CNTL__CONSOLE_IOV_ENABLE__SHIFT 0x1 29e54294d6SYong Zhao #define ATHUB_ATS_MODE_CNTL__HOST_TRANS_ENABLE_MASK 0x00000001L 30e54294d6SYong Zhao #define ATHUB_ATS_MODE_CNTL__CONSOLE_IOV_ENABLE_MASK 0x00000002L 31e54294d6SYong Zhao //ATHUB_SHARED_VIRT_RESET_REQ 32e54294d6SYong Zhao #define ATHUB_SHARED_VIRT_RESET_REQ__VF__SHIFT 0x0 33e54294d6SYong Zhao #define ATHUB_SHARED_VIRT_RESET_REQ__PF__SHIFT 0x1f 34e54294d6SYong Zhao #define ATHUB_SHARED_VIRT_RESET_REQ__VF_MASK 0x7FFFFFFFL 35e54294d6SYong Zhao #define ATHUB_SHARED_VIRT_RESET_REQ__PF_MASK 0x80000000L 36e54294d6SYong Zhao //ATHUB_SHARED_ACTIVE_FCN_ID 37e54294d6SYong Zhao #define ATHUB_SHARED_ACTIVE_FCN_ID__VFID__SHIFT 0x0 38e54294d6SYong Zhao #define ATHUB_SHARED_ACTIVE_FCN_ID__VF__SHIFT 0x1f 39e54294d6SYong Zhao #define ATHUB_SHARED_ACTIVE_FCN_ID__VFID_MASK 0x0000001FL 40e54294d6SYong Zhao #define ATHUB_SHARED_ACTIVE_FCN_ID__VF_MASK 0x80000000L 41e54294d6SYong Zhao //ATC_ATS_CNTL 42e54294d6SYong Zhao #define ATC_ATS_CNTL__DISABLE_ATC__SHIFT 0x0 43e54294d6SYong Zhao #define ATC_ATS_CNTL__DISABLE_PRI__SHIFT 0x1 44e54294d6SYong Zhao #define ATC_ATS_CNTL__DISABLE_PASID__SHIFT 0x2 45e54294d6SYong Zhao #define ATC_ATS_CNTL__CREDITS_ATS_RPB__SHIFT 0x8 46e54294d6SYong Zhao #define ATC_ATS_CNTL__INVALIDATION_LOG_KEEP_ORDER__SHIFT 0x14 47e54294d6SYong Zhao #define ATC_ATS_CNTL__TRANS_LOG_KEEP_ORDER__SHIFT 0x15 48e54294d6SYong Zhao #define ATC_ATS_CNTL__TRANS_EXE_RETURN__SHIFT 0x16 49e54294d6SYong Zhao #define ATC_ATS_CNTL__GUEST_TRANS_MISS_MODE__SHIFT 0x18 50e54294d6SYong Zhao #define ATC_ATS_CNTL__KEEP_VMID_BUSY_BY_INTR__SHIFT 0x19 51e54294d6SYong Zhao #define ATC_ATS_CNTL__DISABLE_ATC_MASK 0x00000001L 52e54294d6SYong Zhao #define ATC_ATS_CNTL__DISABLE_PRI_MASK 0x00000002L 53e54294d6SYong Zhao #define ATC_ATS_CNTL__DISABLE_PASID_MASK 0x00000004L 54e54294d6SYong Zhao #define ATC_ATS_CNTL__CREDITS_ATS_RPB_MASK 0x00003F00L 55e54294d6SYong Zhao #define ATC_ATS_CNTL__INVALIDATION_LOG_KEEP_ORDER_MASK 0x00100000L 56e54294d6SYong Zhao #define ATC_ATS_CNTL__TRANS_LOG_KEEP_ORDER_MASK 0x00200000L 57e54294d6SYong Zhao #define ATC_ATS_CNTL__TRANS_EXE_RETURN_MASK 0x00C00000L 58e54294d6SYong Zhao #define ATC_ATS_CNTL__GUEST_TRANS_MISS_MODE_MASK 0x01000000L 59e54294d6SYong Zhao #define ATC_ATS_CNTL__KEEP_VMID_BUSY_BY_INTR_MASK 0x02000000L 60e54294d6SYong Zhao //ATC_ATS_FAULT_CNTL 61e54294d6SYong Zhao #define ATC_ATS_FAULT_CNTL__FAULT_REGISTER_LOG__SHIFT 0x0 62e54294d6SYong Zhao #define ATC_ATS_FAULT_CNTL__FAULT_INTERRUPT_TABLE__SHIFT 0xa 63e54294d6SYong Zhao #define ATC_ATS_FAULT_CNTL__FAULT_CRASH_TABLE__SHIFT 0x14 64e54294d6SYong Zhao #define ATC_ATS_FAULT_CNTL__FAULT_REGISTER_LOG_MASK 0x000001FFL 65e54294d6SYong Zhao #define ATC_ATS_FAULT_CNTL__FAULT_INTERRUPT_TABLE_MASK 0x0007FC00L 66e54294d6SYong Zhao #define ATC_ATS_FAULT_CNTL__FAULT_CRASH_TABLE_MASK 0x1FF00000L 67e54294d6SYong Zhao //ATC_ATS_DEFAULT_PAGE_LOW 68e54294d6SYong Zhao #define ATC_ATS_DEFAULT_PAGE_LOW__DEFAULT_PAGE__SHIFT 0x0 69e54294d6SYong Zhao #define ATC_ATS_DEFAULT_PAGE_LOW__DEFAULT_PAGE_MASK 0xFFFFFFFFL 70e54294d6SYong Zhao //ATC_TRANS_FAULT_RSPCNTRL 71e54294d6SYong Zhao #define ATC_TRANS_FAULT_RSPCNTRL__VMID0__SHIFT 0x0 72e54294d6SYong Zhao #define ATC_TRANS_FAULT_RSPCNTRL__VMID1__SHIFT 0x1 73e54294d6SYong Zhao #define ATC_TRANS_FAULT_RSPCNTRL__VMID2__SHIFT 0x2 74e54294d6SYong Zhao #define ATC_TRANS_FAULT_RSPCNTRL__VMID3__SHIFT 0x3 75e54294d6SYong Zhao #define ATC_TRANS_FAULT_RSPCNTRL__VMID4__SHIFT 0x4 76e54294d6SYong Zhao #define ATC_TRANS_FAULT_RSPCNTRL__VMID5__SHIFT 0x5 77e54294d6SYong Zhao #define ATC_TRANS_FAULT_RSPCNTRL__VMID6__SHIFT 0x6 78e54294d6SYong Zhao #define ATC_TRANS_FAULT_RSPCNTRL__VMID7__SHIFT 0x7 79e54294d6SYong Zhao #define ATC_TRANS_FAULT_RSPCNTRL__VMID8__SHIFT 0x8 80e54294d6SYong Zhao #define ATC_TRANS_FAULT_RSPCNTRL__VMID9__SHIFT 0x9 81e54294d6SYong Zhao #define ATC_TRANS_FAULT_RSPCNTRL__VMID10__SHIFT 0xa 82e54294d6SYong Zhao #define ATC_TRANS_FAULT_RSPCNTRL__VMID11__SHIFT 0xb 83e54294d6SYong Zhao #define ATC_TRANS_FAULT_RSPCNTRL__VMID12__SHIFT 0xc 84e54294d6SYong Zhao #define ATC_TRANS_FAULT_RSPCNTRL__VMID13__SHIFT 0xd 85e54294d6SYong Zhao #define ATC_TRANS_FAULT_RSPCNTRL__VMID14__SHIFT 0xe 86e54294d6SYong Zhao #define ATC_TRANS_FAULT_RSPCNTRL__VMID15__SHIFT 0xf 87e54294d6SYong Zhao #define ATC_TRANS_FAULT_RSPCNTRL__VMID16__SHIFT 0x10 88e54294d6SYong Zhao #define ATC_TRANS_FAULT_RSPCNTRL__VMID17__SHIFT 0x11 89e54294d6SYong Zhao #define ATC_TRANS_FAULT_RSPCNTRL__VMID18__SHIFT 0x12 90e54294d6SYong Zhao #define ATC_TRANS_FAULT_RSPCNTRL__VMID19__SHIFT 0x13 91e54294d6SYong Zhao #define ATC_TRANS_FAULT_RSPCNTRL__VMID20__SHIFT 0x14 92e54294d6SYong Zhao #define ATC_TRANS_FAULT_RSPCNTRL__VMID21__SHIFT 0x15 93e54294d6SYong Zhao #define ATC_TRANS_FAULT_RSPCNTRL__VMID22__SHIFT 0x16 94e54294d6SYong Zhao #define ATC_TRANS_FAULT_RSPCNTRL__VMID23__SHIFT 0x17 95e54294d6SYong Zhao #define ATC_TRANS_FAULT_RSPCNTRL__VMID24__SHIFT 0x18 96e54294d6SYong Zhao #define ATC_TRANS_FAULT_RSPCNTRL__VMID25__SHIFT 0x19 97e54294d6SYong Zhao #define ATC_TRANS_FAULT_RSPCNTRL__VMID26__SHIFT 0x1a 98e54294d6SYong Zhao #define ATC_TRANS_FAULT_RSPCNTRL__VMID27__SHIFT 0x1b 99e54294d6SYong Zhao #define ATC_TRANS_FAULT_RSPCNTRL__VMID28__SHIFT 0x1c 100e54294d6SYong Zhao #define ATC_TRANS_FAULT_RSPCNTRL__VMID29__SHIFT 0x1d 101e54294d6SYong Zhao #define ATC_TRANS_FAULT_RSPCNTRL__VMID30__SHIFT 0x1e 102e54294d6SYong Zhao #define ATC_TRANS_FAULT_RSPCNTRL__VMID31__SHIFT 0x1f 103e54294d6SYong Zhao #define ATC_TRANS_FAULT_RSPCNTRL__VMID0_MASK 0x00000001L 104e54294d6SYong Zhao #define ATC_TRANS_FAULT_RSPCNTRL__VMID1_MASK 0x00000002L 105e54294d6SYong Zhao #define ATC_TRANS_FAULT_RSPCNTRL__VMID2_MASK 0x00000004L 106e54294d6SYong Zhao #define ATC_TRANS_FAULT_RSPCNTRL__VMID3_MASK 0x00000008L 107e54294d6SYong Zhao #define ATC_TRANS_FAULT_RSPCNTRL__VMID4_MASK 0x00000010L 108e54294d6SYong Zhao #define ATC_TRANS_FAULT_RSPCNTRL__VMID5_MASK 0x00000020L 109e54294d6SYong Zhao #define ATC_TRANS_FAULT_RSPCNTRL__VMID6_MASK 0x00000040L 110e54294d6SYong Zhao #define ATC_TRANS_FAULT_RSPCNTRL__VMID7_MASK 0x00000080L 111e54294d6SYong Zhao #define ATC_TRANS_FAULT_RSPCNTRL__VMID8_MASK 0x00000100L 112e54294d6SYong Zhao #define ATC_TRANS_FAULT_RSPCNTRL__VMID9_MASK 0x00000200L 113e54294d6SYong Zhao #define ATC_TRANS_FAULT_RSPCNTRL__VMID10_MASK 0x00000400L 114e54294d6SYong Zhao #define ATC_TRANS_FAULT_RSPCNTRL__VMID11_MASK 0x00000800L 115e54294d6SYong Zhao #define ATC_TRANS_FAULT_RSPCNTRL__VMID12_MASK 0x00001000L 116e54294d6SYong Zhao #define ATC_TRANS_FAULT_RSPCNTRL__VMID13_MASK 0x00002000L 117e54294d6SYong Zhao #define ATC_TRANS_FAULT_RSPCNTRL__VMID14_MASK 0x00004000L 118e54294d6SYong Zhao #define ATC_TRANS_FAULT_RSPCNTRL__VMID15_MASK 0x00008000L 119e54294d6SYong Zhao #define ATC_TRANS_FAULT_RSPCNTRL__VMID16_MASK 0x00010000L 120e54294d6SYong Zhao #define ATC_TRANS_FAULT_RSPCNTRL__VMID17_MASK 0x00020000L 121e54294d6SYong Zhao #define ATC_TRANS_FAULT_RSPCNTRL__VMID18_MASK 0x00040000L 122e54294d6SYong Zhao #define ATC_TRANS_FAULT_RSPCNTRL__VMID19_MASK 0x00080000L 123e54294d6SYong Zhao #define ATC_TRANS_FAULT_RSPCNTRL__VMID20_MASK 0x00100000L 124e54294d6SYong Zhao #define ATC_TRANS_FAULT_RSPCNTRL__VMID21_MASK 0x00200000L 125e54294d6SYong Zhao #define ATC_TRANS_FAULT_RSPCNTRL__VMID22_MASK 0x00400000L 126e54294d6SYong Zhao #define ATC_TRANS_FAULT_RSPCNTRL__VMID23_MASK 0x00800000L 127e54294d6SYong Zhao #define ATC_TRANS_FAULT_RSPCNTRL__VMID24_MASK 0x01000000L 128e54294d6SYong Zhao #define ATC_TRANS_FAULT_RSPCNTRL__VMID25_MASK 0x02000000L 129e54294d6SYong Zhao #define ATC_TRANS_FAULT_RSPCNTRL__VMID26_MASK 0x04000000L 130e54294d6SYong Zhao #define ATC_TRANS_FAULT_RSPCNTRL__VMID27_MASK 0x08000000L 131e54294d6SYong Zhao #define ATC_TRANS_FAULT_RSPCNTRL__VMID28_MASK 0x10000000L 132e54294d6SYong Zhao #define ATC_TRANS_FAULT_RSPCNTRL__VMID29_MASK 0x20000000L 133e54294d6SYong Zhao #define ATC_TRANS_FAULT_RSPCNTRL__VMID30_MASK 0x40000000L 134e54294d6SYong Zhao #define ATC_TRANS_FAULT_RSPCNTRL__VMID31_MASK 0x80000000L 135e54294d6SYong Zhao //ATHUB_MISC_CNTL 136e54294d6SYong Zhao #define ATHUB_MISC_CNTL__CG_OFFDLY__SHIFT 0x0 137e54294d6SYong Zhao #define ATHUB_MISC_CNTL__CG_ENABLE__SHIFT 0x6 138e54294d6SYong Zhao #define ATHUB_MISC_CNTL__CG_MEM_LS_ENABLE__SHIFT 0x7 139e54294d6SYong Zhao #define ATHUB_MISC_CNTL__PG_ENABLE__SHIFT 0x8 140e54294d6SYong Zhao #define ATHUB_MISC_CNTL__PG_OFFDLY__SHIFT 0x9 141e54294d6SYong Zhao #define ATHUB_MISC_CNTL__ALWAYS_BUSY__SHIFT 0xf 142e54294d6SYong Zhao #define ATHUB_MISC_CNTL__CG_STATUS__SHIFT 0x10 143e54294d6SYong Zhao #define ATHUB_MISC_CNTL__PG_STATUS__SHIFT 0x11 144e54294d6SYong Zhao #define ATHUB_MISC_CNTL__RPB_BUSY__SHIFT 0x12 145e54294d6SYong Zhao #define ATHUB_MISC_CNTL__XPB_BUSY__SHIFT 0x13 146e54294d6SYong Zhao #define ATHUB_MISC_CNTL__ATS_BUSY__SHIFT 0x14 147e54294d6SYong Zhao #define ATHUB_MISC_CNTL__SDPNCS_BUSY__SHIFT 0x15 148e54294d6SYong Zhao #define ATHUB_MISC_CNTL__DFPORT_BUSY__SHIFT 0x16 149e54294d6SYong Zhao #define ATHUB_MISC_CNTL__SWITCH_CNTL__SHIFT 0x17 150e54294d6SYong Zhao #define ATHUB_MISC_CNTL__CG_OFFDLY_MASK 0x0000003FL 151e54294d6SYong Zhao #define ATHUB_MISC_CNTL__CG_ENABLE_MASK 0x00000040L 152e54294d6SYong Zhao #define ATHUB_MISC_CNTL__CG_MEM_LS_ENABLE_MASK 0x00000080L 153e54294d6SYong Zhao #define ATHUB_MISC_CNTL__PG_ENABLE_MASK 0x00000100L 154e54294d6SYong Zhao #define ATHUB_MISC_CNTL__PG_OFFDLY_MASK 0x00007E00L 155e54294d6SYong Zhao #define ATHUB_MISC_CNTL__ALWAYS_BUSY_MASK 0x00008000L 156e54294d6SYong Zhao #define ATHUB_MISC_CNTL__CG_STATUS_MASK 0x00010000L 157e54294d6SYong Zhao #define ATHUB_MISC_CNTL__PG_STATUS_MASK 0x00020000L 158e54294d6SYong Zhao #define ATHUB_MISC_CNTL__RPB_BUSY_MASK 0x00040000L 159e54294d6SYong Zhao #define ATHUB_MISC_CNTL__XPB_BUSY_MASK 0x00080000L 160e54294d6SYong Zhao #define ATHUB_MISC_CNTL__ATS_BUSY_MASK 0x00100000L 161e54294d6SYong Zhao #define ATHUB_MISC_CNTL__SDPNCS_BUSY_MASK 0x00200000L 162e54294d6SYong Zhao #define ATHUB_MISC_CNTL__DFPORT_BUSY_MASK 0x00400000L 163e54294d6SYong Zhao #define ATHUB_MISC_CNTL__SWITCH_CNTL_MASK 0x00800000L 164e54294d6SYong Zhao //ATHUB_MEM_POWER_LS 165e54294d6SYong Zhao #define ATHUB_MEM_POWER_LS__LS_SETUP__SHIFT 0x0 166e54294d6SYong Zhao #define ATHUB_MEM_POWER_LS__LS_HOLD__SHIFT 0x6 167e54294d6SYong Zhao #define ATHUB_MEM_POWER_LS__LS_SETUP_MASK 0x0000003FL 168e54294d6SYong Zhao #define ATHUB_MEM_POWER_LS__LS_HOLD_MASK 0x00000FC0L 169e54294d6SYong Zhao //ATC_ATS_SDPPORT_CNTL 170e54294d6SYong Zhao #define ATC_ATS_SDPPORT_CNTL__ATS_INV_SELF_ACTIVATE__SHIFT 0x0 171e54294d6SYong Zhao #define ATC_ATS_SDPPORT_CNTL__ATS_INV_CFG_MODE__SHIFT 0x1 172e54294d6SYong Zhao #define ATC_ATS_SDPPORT_CNTL__ATS_INV_HALT_THRESHOLD__SHIFT 0x3 173e54294d6SYong Zhao #define ATC_ATS_SDPPORT_CNTL__UTCL2_TRANS_SELF_ACTIVATE__SHIFT 0x7 174e54294d6SYong Zhao #define ATC_ATS_SDPPORT_CNTL__UTCL2_TRANS_QUICK_COMACK__SHIFT 0x8 175e54294d6SYong Zhao #define ATC_ATS_SDPPORT_CNTL__UTCL2_TRANS_HALT_THRESHOLD__SHIFT 0x9 176e54294d6SYong Zhao #define ATC_ATS_SDPPORT_CNTL__UTCL2_TRANS_PASSIVE_MODE__SHIFT 0xd 177e54294d6SYong Zhao #define ATC_ATS_SDPPORT_CNTL__UTCL2_GFX_RDY_MODE__SHIFT 0xe 178e54294d6SYong Zhao #define ATC_ATS_SDPPORT_CNTL__UTCL2_MMHUB_RDY_MODE__SHIFT 0xf 179e54294d6SYong Zhao #define ATC_ATS_SDPPORT_CNTL__UTCL2_GFX_SDPVDCI_RDRSPCKEN__SHIFT 0x10 180e54294d6SYong Zhao #define ATC_ATS_SDPPORT_CNTL__UTCL2_GFX_SDPVDCI_RDRSPCKENRCV__SHIFT 0x11 181e54294d6SYong Zhao #define ATC_ATS_SDPPORT_CNTL__UTCL2_GFX_SDPVDCI_RDRSPDATACKEN__SHIFT 0x12 182e54294d6SYong Zhao #define ATC_ATS_SDPPORT_CNTL__UTCL2_GFX_SDPVDCI_RDRSPDATACKENRCV__SHIFT 0x13 183e54294d6SYong Zhao #define ATC_ATS_SDPPORT_CNTL__UTCL2_GFX_SDPVDCI_WRRSPCKEN__SHIFT 0x14 184e54294d6SYong Zhao #define ATC_ATS_SDPPORT_CNTL__UTCL2_GFX_SDPVDCI_WRRSPCKENRCV__SHIFT 0x15 185e54294d6SYong Zhao #define ATC_ATS_SDPPORT_CNTL__UTCL2_GFX_SDPVDCI_REQCKEN__SHIFT 0x16 186e54294d6SYong Zhao #define ATC_ATS_SDPPORT_CNTL__UTCL2_GFX_SDPVDCI_REQCKENRCV__SHIFT 0x17 187e54294d6SYong Zhao #define ATC_ATS_SDPPORT_CNTL__UTCL2_GFX_SDPVDCI_ORIGDATACKEN__SHIFT 0x18 188e54294d6SYong Zhao #define ATC_ATS_SDPPORT_CNTL__UTCL2_GFX_SDPVDCI_ORIGDATACKENRCV__SHIFT 0x19 189e54294d6SYong Zhao #define ATC_ATS_SDPPORT_CNTL__ATS_INV_SELF_ACTIVATE_MASK 0x00000001L 190e54294d6SYong Zhao #define ATC_ATS_SDPPORT_CNTL__ATS_INV_CFG_MODE_MASK 0x00000006L 191e54294d6SYong Zhao #define ATC_ATS_SDPPORT_CNTL__ATS_INV_HALT_THRESHOLD_MASK 0x00000078L 192e54294d6SYong Zhao #define ATC_ATS_SDPPORT_CNTL__UTCL2_TRANS_SELF_ACTIVATE_MASK 0x00000080L 193e54294d6SYong Zhao #define ATC_ATS_SDPPORT_CNTL__UTCL2_TRANS_QUICK_COMACK_MASK 0x00000100L 194e54294d6SYong Zhao #define ATC_ATS_SDPPORT_CNTL__UTCL2_TRANS_HALT_THRESHOLD_MASK 0x00001E00L 195e54294d6SYong Zhao #define ATC_ATS_SDPPORT_CNTL__UTCL2_TRANS_PASSIVE_MODE_MASK 0x00002000L 196e54294d6SYong Zhao #define ATC_ATS_SDPPORT_CNTL__UTCL2_GFX_RDY_MODE_MASK 0x00004000L 197e54294d6SYong Zhao #define ATC_ATS_SDPPORT_CNTL__UTCL2_MMHUB_RDY_MODE_MASK 0x00008000L 198e54294d6SYong Zhao #define ATC_ATS_SDPPORT_CNTL__UTCL2_GFX_SDPVDCI_RDRSPCKEN_MASK 0x00010000L 199e54294d6SYong Zhao #define ATC_ATS_SDPPORT_CNTL__UTCL2_GFX_SDPVDCI_RDRSPCKENRCV_MASK 0x00020000L 200e54294d6SYong Zhao #define ATC_ATS_SDPPORT_CNTL__UTCL2_GFX_SDPVDCI_RDRSPDATACKEN_MASK 0x00040000L 201e54294d6SYong Zhao #define ATC_ATS_SDPPORT_CNTL__UTCL2_GFX_SDPVDCI_RDRSPDATACKENRCV_MASK 0x00080000L 202e54294d6SYong Zhao #define ATC_ATS_SDPPORT_CNTL__UTCL2_GFX_SDPVDCI_WRRSPCKEN_MASK 0x00100000L 203e54294d6SYong Zhao #define ATC_ATS_SDPPORT_CNTL__UTCL2_GFX_SDPVDCI_WRRSPCKENRCV_MASK 0x00200000L 204e54294d6SYong Zhao #define ATC_ATS_SDPPORT_CNTL__UTCL2_GFX_SDPVDCI_REQCKEN_MASK 0x00400000L 205e54294d6SYong Zhao #define ATC_ATS_SDPPORT_CNTL__UTCL2_GFX_SDPVDCI_REQCKENRCV_MASK 0x00800000L 206e54294d6SYong Zhao #define ATC_ATS_SDPPORT_CNTL__UTCL2_GFX_SDPVDCI_ORIGDATACKEN_MASK 0x01000000L 207e54294d6SYong Zhao #define ATC_ATS_SDPPORT_CNTL__UTCL2_GFX_SDPVDCI_ORIGDATACKENRCV_MASK 0x02000000L 208e54294d6SYong Zhao //ATC_ATS_CNTL2 209e54294d6SYong Zhao #define ATC_ATS_CNTL2__CREDITS_ATS_RPB_MMTR__SHIFT 0x0 210e54294d6SYong Zhao #define ATC_ATS_CNTL2__CREDITS_ATS_RPB_GFXTR__SHIFT 0x8 211e54294d6SYong Zhao #define ATC_ATS_CNTL2__CREDITS_ATS_RPB_PRINV__SHIFT 0x10 212e54294d6SYong Zhao #define ATC_ATS_CNTL2__TRANSLATION_STALL__SHIFT 0x18 213e54294d6SYong Zhao #define ATC_ATS_CNTL2__INV_PASID_CONSOLE_IOV__SHIFT 0x19 214e54294d6SYong Zhao #define ATC_ATS_CNTL2__GC_MM_TRANS_SWITCH__SHIFT 0x1a 215e54294d6SYong Zhao #define ATC_ATS_CNTL2__GC_TRANS_CONTROL__SHIFT 0x1b 216e54294d6SYong Zhao #define ATC_ATS_CNTL2__MM_TRANS_CONTROL__SHIFT 0x1c 217e54294d6SYong Zhao #define ATC_ATS_CNTL2__RESERVED__SHIFT 0x1d 218e54294d6SYong Zhao #define ATC_ATS_CNTL2__CREDITS_ATS_RPB_MMTR_MASK 0x000000FFL 219e54294d6SYong Zhao #define ATC_ATS_CNTL2__CREDITS_ATS_RPB_GFXTR_MASK 0x0000FF00L 220e54294d6SYong Zhao #define ATC_ATS_CNTL2__CREDITS_ATS_RPB_PRINV_MASK 0x00FF0000L 221e54294d6SYong Zhao #define ATC_ATS_CNTL2__TRANSLATION_STALL_MASK 0x01000000L 222e54294d6SYong Zhao #define ATC_ATS_CNTL2__INV_PASID_CONSOLE_IOV_MASK 0x02000000L 223e54294d6SYong Zhao #define ATC_ATS_CNTL2__GC_MM_TRANS_SWITCH_MASK 0x04000000L 224e54294d6SYong Zhao #define ATC_ATS_CNTL2__GC_TRANS_CONTROL_MASK 0x08000000L 225e54294d6SYong Zhao #define ATC_ATS_CNTL2__MM_TRANS_CONTROL_MASK 0x10000000L 226e54294d6SYong Zhao #define ATC_ATS_CNTL2__RESERVED_MASK 0xE0000000L 227e54294d6SYong Zhao //ATC_ATS_TR_QOS_CNTL 228e54294d6SYong Zhao #define ATC_ATS_TR_QOS_CNTL__MM_TR_WQ_CREDITS__SHIFT 0x0 229e54294d6SYong Zhao #define ATC_ATS_TR_QOS_CNTL__GFX_TR_WQ_CREDITS__SHIFT 0x8 230e54294d6SYong Zhao #define ATC_ATS_TR_QOS_CNTL__GFX_MM_TR_ARB_MODE_AGGR__SHIFT 0x10 231e54294d6SYong Zhao #define ATC_ATS_TR_QOS_CNTL__GFX_MM_TR_RATIO_AGGR__SHIFT 0x12 232e54294d6SYong Zhao #define ATC_ATS_TR_QOS_CNTL__GFX_MM_TR_ARB_MODE_WQ__SHIFT 0x18 233e54294d6SYong Zhao #define ATC_ATS_TR_QOS_CNTL__GFX_MM_TR_RATIO_WQ__SHIFT 0x1a 234e54294d6SYong Zhao #define ATC_ATS_TR_QOS_CNTL__MM_TR_WQ_CREDITS_MASK 0x000000FFL 235e54294d6SYong Zhao #define ATC_ATS_TR_QOS_CNTL__GFX_TR_WQ_CREDITS_MASK 0x0000FF00L 236e54294d6SYong Zhao #define ATC_ATS_TR_QOS_CNTL__GFX_MM_TR_ARB_MODE_AGGR_MASK 0x00030000L 237e54294d6SYong Zhao #define ATC_ATS_TR_QOS_CNTL__GFX_MM_TR_RATIO_AGGR_MASK 0x00FC0000L 238e54294d6SYong Zhao #define ATC_ATS_TR_QOS_CNTL__GFX_MM_TR_ARB_MODE_WQ_MASK 0x03000000L 239e54294d6SYong Zhao #define ATC_ATS_TR_QOS_CNTL__GFX_MM_TR_RATIO_WQ_MASK 0xFC000000L 240e54294d6SYong Zhao //ATC_ATS_MISC_CNTL 241e54294d6SYong Zhao #define ATC_ATS_MISC_CNTL__MM_32K_GROUPING_EN_HOST__SHIFT 0x0 242e54294d6SYong Zhao #define ATC_ATS_MISC_CNTL__GFX_32K_GROUPING_EN_HOST__SHIFT 0x1 243e54294d6SYong Zhao #define ATC_ATS_MISC_CNTL__MM_32K_GROUPING_EN_GUEST__SHIFT 0x2 244e54294d6SYong Zhao #define ATC_ATS_MISC_CNTL__GFX_32K_GROUPING_EN_GUEST__SHIFT 0x3 245e54294d6SYong Zhao #define ATC_ATS_MISC_CNTL__RESERVED__SHIFT 0x4 246e54294d6SYong Zhao #define ATC_ATS_MISC_CNTL__MM_32K_GROUPING_EN_HOST_MASK 0x00000001L 247e54294d6SYong Zhao #define ATC_ATS_MISC_CNTL__GFX_32K_GROUPING_EN_HOST_MASK 0x00000002L 248e54294d6SYong Zhao #define ATC_ATS_MISC_CNTL__MM_32K_GROUPING_EN_GUEST_MASK 0x00000004L 249e54294d6SYong Zhao #define ATC_ATS_MISC_CNTL__GFX_32K_GROUPING_EN_GUEST_MASK 0x00000008L 250e54294d6SYong Zhao #define ATC_ATS_MISC_CNTL__RESERVED_MASK 0xFFFFFFF0L 251e54294d6SYong Zhao //ATC_PERFCOUNTER0_CFG 252e54294d6SYong Zhao #define ATC_PERFCOUNTER0_CFG__PERF_SEL__SHIFT 0x0 253e54294d6SYong Zhao #define ATC_PERFCOUNTER0_CFG__PERF_SEL_END__SHIFT 0x8 254e54294d6SYong Zhao #define ATC_PERFCOUNTER0_CFG__PERF_MODE__SHIFT 0x18 255e54294d6SYong Zhao #define ATC_PERFCOUNTER0_CFG__ENABLE__SHIFT 0x1c 256e54294d6SYong Zhao #define ATC_PERFCOUNTER0_CFG__CLEAR__SHIFT 0x1d 257e54294d6SYong Zhao #define ATC_PERFCOUNTER0_CFG__PERF_SEL_MASK 0x000000FFL 258e54294d6SYong Zhao #define ATC_PERFCOUNTER0_CFG__PERF_SEL_END_MASK 0x0000FF00L 259e54294d6SYong Zhao #define ATC_PERFCOUNTER0_CFG__PERF_MODE_MASK 0x0F000000L 260e54294d6SYong Zhao #define ATC_PERFCOUNTER0_CFG__ENABLE_MASK 0x10000000L 261e54294d6SYong Zhao #define ATC_PERFCOUNTER0_CFG__CLEAR_MASK 0x20000000L 262e54294d6SYong Zhao //ATC_PERFCOUNTER1_CFG 263e54294d6SYong Zhao #define ATC_PERFCOUNTER1_CFG__PERF_SEL__SHIFT 0x0 264e54294d6SYong Zhao #define ATC_PERFCOUNTER1_CFG__PERF_SEL_END__SHIFT 0x8 265e54294d6SYong Zhao #define ATC_PERFCOUNTER1_CFG__PERF_MODE__SHIFT 0x18 266e54294d6SYong Zhao #define ATC_PERFCOUNTER1_CFG__ENABLE__SHIFT 0x1c 267e54294d6SYong Zhao #define ATC_PERFCOUNTER1_CFG__CLEAR__SHIFT 0x1d 268e54294d6SYong Zhao #define ATC_PERFCOUNTER1_CFG__PERF_SEL_MASK 0x000000FFL 269e54294d6SYong Zhao #define ATC_PERFCOUNTER1_CFG__PERF_SEL_END_MASK 0x0000FF00L 270e54294d6SYong Zhao #define ATC_PERFCOUNTER1_CFG__PERF_MODE_MASK 0x0F000000L 271e54294d6SYong Zhao #define ATC_PERFCOUNTER1_CFG__ENABLE_MASK 0x10000000L 272e54294d6SYong Zhao #define ATC_PERFCOUNTER1_CFG__CLEAR_MASK 0x20000000L 273e54294d6SYong Zhao //ATC_PERFCOUNTER2_CFG 274e54294d6SYong Zhao #define ATC_PERFCOUNTER2_CFG__PERF_SEL__SHIFT 0x0 275e54294d6SYong Zhao #define ATC_PERFCOUNTER2_CFG__PERF_SEL_END__SHIFT 0x8 276e54294d6SYong Zhao #define ATC_PERFCOUNTER2_CFG__PERF_MODE__SHIFT 0x18 277e54294d6SYong Zhao #define ATC_PERFCOUNTER2_CFG__ENABLE__SHIFT 0x1c 278e54294d6SYong Zhao #define ATC_PERFCOUNTER2_CFG__CLEAR__SHIFT 0x1d 279e54294d6SYong Zhao #define ATC_PERFCOUNTER2_CFG__PERF_SEL_MASK 0x000000FFL 280e54294d6SYong Zhao #define ATC_PERFCOUNTER2_CFG__PERF_SEL_END_MASK 0x0000FF00L 281e54294d6SYong Zhao #define ATC_PERFCOUNTER2_CFG__PERF_MODE_MASK 0x0F000000L 282e54294d6SYong Zhao #define ATC_PERFCOUNTER2_CFG__ENABLE_MASK 0x10000000L 283e54294d6SYong Zhao #define ATC_PERFCOUNTER2_CFG__CLEAR_MASK 0x20000000L 284e54294d6SYong Zhao //ATC_PERFCOUNTER3_CFG 285e54294d6SYong Zhao #define ATC_PERFCOUNTER3_CFG__PERF_SEL__SHIFT 0x0 286e54294d6SYong Zhao #define ATC_PERFCOUNTER3_CFG__PERF_SEL_END__SHIFT 0x8 287e54294d6SYong Zhao #define ATC_PERFCOUNTER3_CFG__PERF_MODE__SHIFT 0x18 288e54294d6SYong Zhao #define ATC_PERFCOUNTER3_CFG__ENABLE__SHIFT 0x1c 289e54294d6SYong Zhao #define ATC_PERFCOUNTER3_CFG__CLEAR__SHIFT 0x1d 290e54294d6SYong Zhao #define ATC_PERFCOUNTER3_CFG__PERF_SEL_MASK 0x000000FFL 291e54294d6SYong Zhao #define ATC_PERFCOUNTER3_CFG__PERF_SEL_END_MASK 0x0000FF00L 292e54294d6SYong Zhao #define ATC_PERFCOUNTER3_CFG__PERF_MODE_MASK 0x0F000000L 293e54294d6SYong Zhao #define ATC_PERFCOUNTER3_CFG__ENABLE_MASK 0x10000000L 294e54294d6SYong Zhao #define ATC_PERFCOUNTER3_CFG__CLEAR_MASK 0x20000000L 295e54294d6SYong Zhao //ATC_PERFCOUNTER_RSLT_CNTL 296e54294d6SYong Zhao #define ATC_PERFCOUNTER_RSLT_CNTL__PERF_COUNTER_SELECT__SHIFT 0x0 297e54294d6SYong Zhao #define ATC_PERFCOUNTER_RSLT_CNTL__START_TRIGGER__SHIFT 0x8 298e54294d6SYong Zhao #define ATC_PERFCOUNTER_RSLT_CNTL__STOP_TRIGGER__SHIFT 0x10 299e54294d6SYong Zhao #define ATC_PERFCOUNTER_RSLT_CNTL__ENABLE_ANY__SHIFT 0x18 300e54294d6SYong Zhao #define ATC_PERFCOUNTER_RSLT_CNTL__CLEAR_ALL__SHIFT 0x19 301e54294d6SYong Zhao #define ATC_PERFCOUNTER_RSLT_CNTL__STOP_ALL_ON_SATURATE__SHIFT 0x1a 302e54294d6SYong Zhao #define ATC_PERFCOUNTER_RSLT_CNTL__PERF_COUNTER_SELECT_MASK 0x0000000FL 303e54294d6SYong Zhao #define ATC_PERFCOUNTER_RSLT_CNTL__START_TRIGGER_MASK 0x0000FF00L 304e54294d6SYong Zhao #define ATC_PERFCOUNTER_RSLT_CNTL__STOP_TRIGGER_MASK 0x00FF0000L 305e54294d6SYong Zhao #define ATC_PERFCOUNTER_RSLT_CNTL__ENABLE_ANY_MASK 0x01000000L 306e54294d6SYong Zhao #define ATC_PERFCOUNTER_RSLT_CNTL__CLEAR_ALL_MASK 0x02000000L 307e54294d6SYong Zhao #define ATC_PERFCOUNTER_RSLT_CNTL__STOP_ALL_ON_SATURATE_MASK 0x04000000L 308e54294d6SYong Zhao //ATC_PERFCOUNTER_LO 309e54294d6SYong Zhao #define ATC_PERFCOUNTER_LO__COUNTER_LO__SHIFT 0x0 310e54294d6SYong Zhao #define ATC_PERFCOUNTER_LO__COUNTER_LO_MASK 0xFFFFFFFFL 311e54294d6SYong Zhao //ATC_PERFCOUNTER_HI 312e54294d6SYong Zhao #define ATC_PERFCOUNTER_HI__COUNTER_HI__SHIFT 0x0 313e54294d6SYong Zhao #define ATC_PERFCOUNTER_HI__COMPARE_VALUE__SHIFT 0x10 314e54294d6SYong Zhao #define ATC_PERFCOUNTER_HI__COUNTER_HI_MASK 0x0000FFFFL 315e54294d6SYong Zhao #define ATC_PERFCOUNTER_HI__COMPARE_VALUE_MASK 0xFFFF0000L 316e54294d6SYong Zhao //ATS_IH_CREDIT 317e54294d6SYong Zhao #define ATS_IH_CREDIT__CREDIT_VALUE__SHIFT 0x0 318e54294d6SYong Zhao #define ATS_IH_CREDIT__IH_CLIENT_ID__SHIFT 0x10 319e54294d6SYong Zhao #define ATS_IH_CREDIT__CREDIT_VALUE_MASK 0x00000003L 320e54294d6SYong Zhao #define ATS_IH_CREDIT__IH_CLIENT_ID_MASK 0x00FF0000L 321e54294d6SYong Zhao //ATHUB_IH_CREDIT 322e54294d6SYong Zhao #define ATHUB_IH_CREDIT__CREDIT_VALUE__SHIFT 0x0 323e54294d6SYong Zhao #define ATHUB_IH_CREDIT__IH_CLIENT_ID__SHIFT 0x10 324e54294d6SYong Zhao #define ATHUB_IH_CREDIT__CREDIT_VALUE_MASK 0x00000003L 325e54294d6SYong Zhao #define ATHUB_IH_CREDIT__IH_CLIENT_ID_MASK 0x00FF0000L 326e54294d6SYong Zhao //ATC_ATS_GFX_ATCL2_STATUS 327e54294d6SYong Zhao #define ATC_ATS_GFX_ATCL2_STATUS__POWERED_DOWN__SHIFT 0x0 328e54294d6SYong Zhao #define ATC_ATS_GFX_ATCL2_STATUS__POWERED_DOWN_MASK 0x00000001L 329e54294d6SYong Zhao //ATC_ATS_MMHUB_ATCL2_STATUS 330e54294d6SYong Zhao #define ATC_ATS_MMHUB_ATCL2_STATUS__POWERED_DOWN__SHIFT 0x0 331e54294d6SYong Zhao #define ATC_ATS_MMHUB_ATCL2_STATUS__POWERED_DOWN_MASK 0x00000001L 332e54294d6SYong Zhao //ATC_ATS_FAULT_STATUS_INFO 333e54294d6SYong Zhao #define ATC_ATS_FAULT_STATUS_INFO__FAULT_TYPE__SHIFT 0x0 334e54294d6SYong Zhao #define ATC_ATS_FAULT_STATUS_INFO__VMID__SHIFT 0xa 335e54294d6SYong Zhao #define ATC_ATS_FAULT_STATUS_INFO__EXTRA_INFO__SHIFT 0xf 336e54294d6SYong Zhao #define ATC_ATS_FAULT_STATUS_INFO__EXTRA_INFO2__SHIFT 0x10 337e54294d6SYong Zhao #define ATC_ATS_FAULT_STATUS_INFO__INVALIDATION__SHIFT 0x11 338e54294d6SYong Zhao #define ATC_ATS_FAULT_STATUS_INFO__PAGE_REQUEST__SHIFT 0x12 339e54294d6SYong Zhao #define ATC_ATS_FAULT_STATUS_INFO__STATUS__SHIFT 0x13 340e54294d6SYong Zhao #define ATC_ATS_FAULT_STATUS_INFO__PAGE_ADDR_HIGH__SHIFT 0x18 341e54294d6SYong Zhao #define ATC_ATS_FAULT_STATUS_INFO__FAULT_TYPE_MASK 0x000001FFL 342e54294d6SYong Zhao #define ATC_ATS_FAULT_STATUS_INFO__VMID_MASK 0x00007C00L 343e54294d6SYong Zhao #define ATC_ATS_FAULT_STATUS_INFO__EXTRA_INFO_MASK 0x00008000L 344e54294d6SYong Zhao #define ATC_ATS_FAULT_STATUS_INFO__EXTRA_INFO2_MASK 0x00010000L 345e54294d6SYong Zhao #define ATC_ATS_FAULT_STATUS_INFO__INVALIDATION_MASK 0x00020000L 346e54294d6SYong Zhao #define ATC_ATS_FAULT_STATUS_INFO__PAGE_REQUEST_MASK 0x00040000L 347e54294d6SYong Zhao #define ATC_ATS_FAULT_STATUS_INFO__STATUS_MASK 0x00F80000L 348e54294d6SYong Zhao #define ATC_ATS_FAULT_STATUS_INFO__PAGE_ADDR_HIGH_MASK 0x0F000000L 349e54294d6SYong Zhao //ATC_ATS_FAULT_STATUS_ADDR 350e54294d6SYong Zhao #define ATC_ATS_FAULT_STATUS_ADDR__PAGE_ADDR__SHIFT 0x0 351e54294d6SYong Zhao #define ATC_ATS_FAULT_STATUS_ADDR__PAGE_ADDR_MASK 0xFFFFFFFFL 352e54294d6SYong Zhao //ATC_ATS_FAULT_STATUS_INFO2 353e54294d6SYong Zhao #define ATC_ATS_FAULT_STATUS_INFO2__VF__SHIFT 0x0 354e54294d6SYong Zhao #define ATC_ATS_FAULT_STATUS_INFO2__VFID__SHIFT 0x1 355e54294d6SYong Zhao #define ATC_ATS_FAULT_STATUS_INFO2__MMHUB_INV_VMID__SHIFT 0x9 356e54294d6SYong Zhao #define ATC_ATS_FAULT_STATUS_INFO2__VF_MASK 0x00000001L 357e54294d6SYong Zhao #define ATC_ATS_FAULT_STATUS_INFO2__VFID_MASK 0x0000003EL 358e54294d6SYong Zhao #define ATC_ATS_FAULT_STATUS_INFO2__MMHUB_INV_VMID_MASK 0x00003E00L 359e54294d6SYong Zhao //ATHUB_PCIE_ATS_CNTL 360e54294d6SYong Zhao #define ATHUB_PCIE_ATS_CNTL__STU__SHIFT 0x10 361e54294d6SYong Zhao #define ATHUB_PCIE_ATS_CNTL__ATC_ENABLE__SHIFT 0x1f 362e54294d6SYong Zhao #define ATHUB_PCIE_ATS_CNTL__STU_MASK 0x001F0000L 363e54294d6SYong Zhao #define ATHUB_PCIE_ATS_CNTL__ATC_ENABLE_MASK 0x80000000L 364e54294d6SYong Zhao //ATHUB_PCIE_PASID_CNTL 365e54294d6SYong Zhao #define ATHUB_PCIE_PASID_CNTL__PASID_EN__SHIFT 0x10 366e54294d6SYong Zhao #define ATHUB_PCIE_PASID_CNTL__PASID_EXE_PERMISSION_ENABLE__SHIFT 0x11 367e54294d6SYong Zhao #define ATHUB_PCIE_PASID_CNTL__PASID_PRIV_MODE_SUPPORTED_ENABLE__SHIFT 0x12 368e54294d6SYong Zhao #define ATHUB_PCIE_PASID_CNTL__PASID_EN_MASK 0x00010000L 369e54294d6SYong Zhao #define ATHUB_PCIE_PASID_CNTL__PASID_EXE_PERMISSION_ENABLE_MASK 0x00020000L 370e54294d6SYong Zhao #define ATHUB_PCIE_PASID_CNTL__PASID_PRIV_MODE_SUPPORTED_ENABLE_MASK 0x00040000L 371e54294d6SYong Zhao //ATHUB_PCIE_PAGE_REQ_CNTL 372e54294d6SYong Zhao #define ATHUB_PCIE_PAGE_REQ_CNTL__PRI_ENABLE__SHIFT 0x0 373e54294d6SYong Zhao #define ATHUB_PCIE_PAGE_REQ_CNTL__PRI_RESET__SHIFT 0x1 374e54294d6SYong Zhao #define ATHUB_PCIE_PAGE_REQ_CNTL__PRI_ENABLE_MASK 0x00000001L 375e54294d6SYong Zhao #define ATHUB_PCIE_PAGE_REQ_CNTL__PRI_RESET_MASK 0x00000002L 376e54294d6SYong Zhao //ATHUB_PCIE_OUTSTAND_PAGE_REQ_ALLOC 377e54294d6SYong Zhao #define ATHUB_PCIE_OUTSTAND_PAGE_REQ_ALLOC__OUTSTAND_PAGE_REQ_ALLOC__SHIFT 0x0 378e54294d6SYong Zhao #define ATHUB_PCIE_OUTSTAND_PAGE_REQ_ALLOC__OUTSTAND_PAGE_REQ_ALLOC_MASK 0xFFFFFFFFL 379e54294d6SYong Zhao //ATHUB_COMMAND 380e54294d6SYong Zhao #define ATHUB_COMMAND__BUS_MASTER_EN__SHIFT 0x2 381e54294d6SYong Zhao #define ATHUB_COMMAND__BUS_MASTER_EN_MASK 0x00000004L 382e54294d6SYong Zhao //ATHUB_PCIE_ATS_CNTL_VF_0 383e54294d6SYong Zhao #define ATHUB_PCIE_ATS_CNTL_VF_0__ATC_ENABLE__SHIFT 0x1f 384e54294d6SYong Zhao #define ATHUB_PCIE_ATS_CNTL_VF_0__ATC_ENABLE_MASK 0x80000000L 385e54294d6SYong Zhao //ATHUB_PCIE_ATS_CNTL_VF_1 386e54294d6SYong Zhao #define ATHUB_PCIE_ATS_CNTL_VF_1__ATC_ENABLE__SHIFT 0x1f 387e54294d6SYong Zhao #define ATHUB_PCIE_ATS_CNTL_VF_1__ATC_ENABLE_MASK 0x80000000L 388e54294d6SYong Zhao //ATHUB_PCIE_ATS_CNTL_VF_2 389e54294d6SYong Zhao #define ATHUB_PCIE_ATS_CNTL_VF_2__ATC_ENABLE__SHIFT 0x1f 390e54294d6SYong Zhao #define ATHUB_PCIE_ATS_CNTL_VF_2__ATC_ENABLE_MASK 0x80000000L 391e54294d6SYong Zhao //ATHUB_PCIE_ATS_CNTL_VF_3 392e54294d6SYong Zhao #define ATHUB_PCIE_ATS_CNTL_VF_3__ATC_ENABLE__SHIFT 0x1f 393e54294d6SYong Zhao #define ATHUB_PCIE_ATS_CNTL_VF_3__ATC_ENABLE_MASK 0x80000000L 394e54294d6SYong Zhao //ATHUB_PCIE_ATS_CNTL_VF_4 395e54294d6SYong Zhao #define ATHUB_PCIE_ATS_CNTL_VF_4__ATC_ENABLE__SHIFT 0x1f 396e54294d6SYong Zhao #define ATHUB_PCIE_ATS_CNTL_VF_4__ATC_ENABLE_MASK 0x80000000L 397e54294d6SYong Zhao //ATHUB_PCIE_ATS_CNTL_VF_5 398e54294d6SYong Zhao #define ATHUB_PCIE_ATS_CNTL_VF_5__ATC_ENABLE__SHIFT 0x1f 399e54294d6SYong Zhao #define ATHUB_PCIE_ATS_CNTL_VF_5__ATC_ENABLE_MASK 0x80000000L 400e54294d6SYong Zhao //ATHUB_PCIE_ATS_CNTL_VF_6 401e54294d6SYong Zhao #define ATHUB_PCIE_ATS_CNTL_VF_6__ATC_ENABLE__SHIFT 0x1f 402e54294d6SYong Zhao #define ATHUB_PCIE_ATS_CNTL_VF_6__ATC_ENABLE_MASK 0x80000000L 403e54294d6SYong Zhao //ATHUB_PCIE_ATS_CNTL_VF_7 404e54294d6SYong Zhao #define ATHUB_PCIE_ATS_CNTL_VF_7__ATC_ENABLE__SHIFT 0x1f 405e54294d6SYong Zhao #define ATHUB_PCIE_ATS_CNTL_VF_7__ATC_ENABLE_MASK 0x80000000L 406e54294d6SYong Zhao //ATHUB_PCIE_ATS_CNTL_VF_8 407e54294d6SYong Zhao #define ATHUB_PCIE_ATS_CNTL_VF_8__ATC_ENABLE__SHIFT 0x1f 408e54294d6SYong Zhao #define ATHUB_PCIE_ATS_CNTL_VF_8__ATC_ENABLE_MASK 0x80000000L 409e54294d6SYong Zhao //ATHUB_PCIE_ATS_CNTL_VF_9 410e54294d6SYong Zhao #define ATHUB_PCIE_ATS_CNTL_VF_9__ATC_ENABLE__SHIFT 0x1f 411e54294d6SYong Zhao #define ATHUB_PCIE_ATS_CNTL_VF_9__ATC_ENABLE_MASK 0x80000000L 412e54294d6SYong Zhao //ATHUB_PCIE_ATS_CNTL_VF_10 413e54294d6SYong Zhao #define ATHUB_PCIE_ATS_CNTL_VF_10__ATC_ENABLE__SHIFT 0x1f 414e54294d6SYong Zhao #define ATHUB_PCIE_ATS_CNTL_VF_10__ATC_ENABLE_MASK 0x80000000L 415e54294d6SYong Zhao //ATHUB_PCIE_ATS_CNTL_VF_11 416e54294d6SYong Zhao #define ATHUB_PCIE_ATS_CNTL_VF_11__ATC_ENABLE__SHIFT 0x1f 417e54294d6SYong Zhao #define ATHUB_PCIE_ATS_CNTL_VF_11__ATC_ENABLE_MASK 0x80000000L 418e54294d6SYong Zhao //ATHUB_PCIE_ATS_CNTL_VF_12 419e54294d6SYong Zhao #define ATHUB_PCIE_ATS_CNTL_VF_12__ATC_ENABLE__SHIFT 0x1f 420e54294d6SYong Zhao #define ATHUB_PCIE_ATS_CNTL_VF_12__ATC_ENABLE_MASK 0x80000000L 421e54294d6SYong Zhao //ATHUB_PCIE_ATS_CNTL_VF_13 422e54294d6SYong Zhao #define ATHUB_PCIE_ATS_CNTL_VF_13__ATC_ENABLE__SHIFT 0x1f 423e54294d6SYong Zhao #define ATHUB_PCIE_ATS_CNTL_VF_13__ATC_ENABLE_MASK 0x80000000L 424e54294d6SYong Zhao //ATHUB_PCIE_ATS_CNTL_VF_14 425e54294d6SYong Zhao #define ATHUB_PCIE_ATS_CNTL_VF_14__ATC_ENABLE__SHIFT 0x1f 426e54294d6SYong Zhao #define ATHUB_PCIE_ATS_CNTL_VF_14__ATC_ENABLE_MASK 0x80000000L 427e54294d6SYong Zhao //ATHUB_PCIE_ATS_CNTL_VF_15 428e54294d6SYong Zhao #define ATHUB_PCIE_ATS_CNTL_VF_15__ATC_ENABLE__SHIFT 0x1f 429e54294d6SYong Zhao #define ATHUB_PCIE_ATS_CNTL_VF_15__ATC_ENABLE_MASK 0x80000000L 430e54294d6SYong Zhao //ATHUB_PCIE_ATS_CNTL_VF_16 431e54294d6SYong Zhao #define ATHUB_PCIE_ATS_CNTL_VF_16__ATC_ENABLE__SHIFT 0x1f 432e54294d6SYong Zhao #define ATHUB_PCIE_ATS_CNTL_VF_16__ATC_ENABLE_MASK 0x80000000L 433e54294d6SYong Zhao //ATHUB_PCIE_ATS_CNTL_VF_17 434e54294d6SYong Zhao #define ATHUB_PCIE_ATS_CNTL_VF_17__ATC_ENABLE__SHIFT 0x1f 435e54294d6SYong Zhao #define ATHUB_PCIE_ATS_CNTL_VF_17__ATC_ENABLE_MASK 0x80000000L 436e54294d6SYong Zhao //ATHUB_PCIE_ATS_CNTL_VF_18 437e54294d6SYong Zhao #define ATHUB_PCIE_ATS_CNTL_VF_18__ATC_ENABLE__SHIFT 0x1f 438e54294d6SYong Zhao #define ATHUB_PCIE_ATS_CNTL_VF_18__ATC_ENABLE_MASK 0x80000000L 439e54294d6SYong Zhao //ATHUB_PCIE_ATS_CNTL_VF_19 440e54294d6SYong Zhao #define ATHUB_PCIE_ATS_CNTL_VF_19__ATC_ENABLE__SHIFT 0x1f 441e54294d6SYong Zhao #define ATHUB_PCIE_ATS_CNTL_VF_19__ATC_ENABLE_MASK 0x80000000L 442e54294d6SYong Zhao //ATHUB_PCIE_ATS_CNTL_VF_20 443e54294d6SYong Zhao #define ATHUB_PCIE_ATS_CNTL_VF_20__ATC_ENABLE__SHIFT 0x1f 444e54294d6SYong Zhao #define ATHUB_PCIE_ATS_CNTL_VF_20__ATC_ENABLE_MASK 0x80000000L 445e54294d6SYong Zhao //ATHUB_PCIE_ATS_CNTL_VF_21 446e54294d6SYong Zhao #define ATHUB_PCIE_ATS_CNTL_VF_21__ATC_ENABLE__SHIFT 0x1f 447e54294d6SYong Zhao #define ATHUB_PCIE_ATS_CNTL_VF_21__ATC_ENABLE_MASK 0x80000000L 448e54294d6SYong Zhao //ATHUB_PCIE_ATS_CNTL_VF_22 449e54294d6SYong Zhao #define ATHUB_PCIE_ATS_CNTL_VF_22__ATC_ENABLE__SHIFT 0x1f 450e54294d6SYong Zhao #define ATHUB_PCIE_ATS_CNTL_VF_22__ATC_ENABLE_MASK 0x80000000L 451e54294d6SYong Zhao //ATHUB_PCIE_ATS_CNTL_VF_23 452e54294d6SYong Zhao #define ATHUB_PCIE_ATS_CNTL_VF_23__ATC_ENABLE__SHIFT 0x1f 453e54294d6SYong Zhao #define ATHUB_PCIE_ATS_CNTL_VF_23__ATC_ENABLE_MASK 0x80000000L 454e54294d6SYong Zhao //ATHUB_PCIE_ATS_CNTL_VF_24 455e54294d6SYong Zhao #define ATHUB_PCIE_ATS_CNTL_VF_24__ATC_ENABLE__SHIFT 0x1f 456e54294d6SYong Zhao #define ATHUB_PCIE_ATS_CNTL_VF_24__ATC_ENABLE_MASK 0x80000000L 457e54294d6SYong Zhao //ATHUB_PCIE_ATS_CNTL_VF_25 458e54294d6SYong Zhao #define ATHUB_PCIE_ATS_CNTL_VF_25__ATC_ENABLE__SHIFT 0x1f 459e54294d6SYong Zhao #define ATHUB_PCIE_ATS_CNTL_VF_25__ATC_ENABLE_MASK 0x80000000L 460e54294d6SYong Zhao //ATHUB_PCIE_ATS_CNTL_VF_26 461e54294d6SYong Zhao #define ATHUB_PCIE_ATS_CNTL_VF_26__ATC_ENABLE__SHIFT 0x1f 462e54294d6SYong Zhao #define ATHUB_PCIE_ATS_CNTL_VF_26__ATC_ENABLE_MASK 0x80000000L 463e54294d6SYong Zhao //ATHUB_PCIE_ATS_CNTL_VF_27 464e54294d6SYong Zhao #define ATHUB_PCIE_ATS_CNTL_VF_27__ATC_ENABLE__SHIFT 0x1f 465e54294d6SYong Zhao #define ATHUB_PCIE_ATS_CNTL_VF_27__ATC_ENABLE_MASK 0x80000000L 466e54294d6SYong Zhao //ATHUB_PCIE_ATS_CNTL_VF_28 467e54294d6SYong Zhao #define ATHUB_PCIE_ATS_CNTL_VF_28__ATC_ENABLE__SHIFT 0x1f 468e54294d6SYong Zhao #define ATHUB_PCIE_ATS_CNTL_VF_28__ATC_ENABLE_MASK 0x80000000L 469e54294d6SYong Zhao //ATHUB_PCIE_ATS_CNTL_VF_29 470e54294d6SYong Zhao #define ATHUB_PCIE_ATS_CNTL_VF_29__ATC_ENABLE__SHIFT 0x1f 471e54294d6SYong Zhao #define ATHUB_PCIE_ATS_CNTL_VF_29__ATC_ENABLE_MASK 0x80000000L 472e54294d6SYong Zhao //ATHUB_PCIE_ATS_CNTL_VF_30 473e54294d6SYong Zhao #define ATHUB_PCIE_ATS_CNTL_VF_30__ATC_ENABLE__SHIFT 0x1f 474e54294d6SYong Zhao #define ATHUB_PCIE_ATS_CNTL_VF_30__ATC_ENABLE_MASK 0x80000000L 475e54294d6SYong Zhao //ATC_VMID_PASID_MAPPING_UPDATE_STATUS 476e54294d6SYong Zhao #define ATC_VMID_PASID_MAPPING_UPDATE_STATUS__VMID0_REMAPPING_FINISHED__SHIFT 0x0 477e54294d6SYong Zhao #define ATC_VMID_PASID_MAPPING_UPDATE_STATUS__VMID1_REMAPPING_FINISHED__SHIFT 0x1 478e54294d6SYong Zhao #define ATC_VMID_PASID_MAPPING_UPDATE_STATUS__VMID2_REMAPPING_FINISHED__SHIFT 0x2 479e54294d6SYong Zhao #define ATC_VMID_PASID_MAPPING_UPDATE_STATUS__VMID3_REMAPPING_FINISHED__SHIFT 0x3 480e54294d6SYong Zhao #define ATC_VMID_PASID_MAPPING_UPDATE_STATUS__VMID4_REMAPPING_FINISHED__SHIFT 0x4 481e54294d6SYong Zhao #define ATC_VMID_PASID_MAPPING_UPDATE_STATUS__VMID5_REMAPPING_FINISHED__SHIFT 0x5 482e54294d6SYong Zhao #define ATC_VMID_PASID_MAPPING_UPDATE_STATUS__VMID6_REMAPPING_FINISHED__SHIFT 0x6 483e54294d6SYong Zhao #define ATC_VMID_PASID_MAPPING_UPDATE_STATUS__VMID7_REMAPPING_FINISHED__SHIFT 0x7 484e54294d6SYong Zhao #define ATC_VMID_PASID_MAPPING_UPDATE_STATUS__VMID8_REMAPPING_FINISHED__SHIFT 0x8 485e54294d6SYong Zhao #define ATC_VMID_PASID_MAPPING_UPDATE_STATUS__VMID9_REMAPPING_FINISHED__SHIFT 0x9 486e54294d6SYong Zhao #define ATC_VMID_PASID_MAPPING_UPDATE_STATUS__VMID10_REMAPPING_FINISHED__SHIFT 0xa 487e54294d6SYong Zhao #define ATC_VMID_PASID_MAPPING_UPDATE_STATUS__VMID11_REMAPPING_FINISHED__SHIFT 0xb 488e54294d6SYong Zhao #define ATC_VMID_PASID_MAPPING_UPDATE_STATUS__VMID12_REMAPPING_FINISHED__SHIFT 0xc 489e54294d6SYong Zhao #define ATC_VMID_PASID_MAPPING_UPDATE_STATUS__VMID13_REMAPPING_FINISHED__SHIFT 0xd 490e54294d6SYong Zhao #define ATC_VMID_PASID_MAPPING_UPDATE_STATUS__VMID14_REMAPPING_FINISHED__SHIFT 0xe 491e54294d6SYong Zhao #define ATC_VMID_PASID_MAPPING_UPDATE_STATUS__VMID15_REMAPPING_FINISHED__SHIFT 0xf 492e54294d6SYong Zhao #define ATC_VMID_PASID_MAPPING_UPDATE_STATUS__VMID16_REMAPPING_FINISHED__SHIFT 0x10 493e54294d6SYong Zhao #define ATC_VMID_PASID_MAPPING_UPDATE_STATUS__VMID17_REMAPPING_FINISHED__SHIFT 0x11 494e54294d6SYong Zhao #define ATC_VMID_PASID_MAPPING_UPDATE_STATUS__VMID18_REMAPPING_FINISHED__SHIFT 0x12 495e54294d6SYong Zhao #define ATC_VMID_PASID_MAPPING_UPDATE_STATUS__VMID19_REMAPPING_FINISHED__SHIFT 0x13 496e54294d6SYong Zhao #define ATC_VMID_PASID_MAPPING_UPDATE_STATUS__VMID20_REMAPPING_FINISHED__SHIFT 0x14 497e54294d6SYong Zhao #define ATC_VMID_PASID_MAPPING_UPDATE_STATUS__VMID21_REMAPPING_FINISHED__SHIFT 0x15 498e54294d6SYong Zhao #define ATC_VMID_PASID_MAPPING_UPDATE_STATUS__VMID22_REMAPPING_FINISHED__SHIFT 0x16 499e54294d6SYong Zhao #define ATC_VMID_PASID_MAPPING_UPDATE_STATUS__VMID23_REMAPPING_FINISHED__SHIFT 0x17 500e54294d6SYong Zhao #define ATC_VMID_PASID_MAPPING_UPDATE_STATUS__VMID24_REMAPPING_FINISHED__SHIFT 0x18 501e54294d6SYong Zhao #define ATC_VMID_PASID_MAPPING_UPDATE_STATUS__VMID25_REMAPPING_FINISHED__SHIFT 0x19 502e54294d6SYong Zhao #define ATC_VMID_PASID_MAPPING_UPDATE_STATUS__VMID26_REMAPPING_FINISHED__SHIFT 0x1a 503e54294d6SYong Zhao #define ATC_VMID_PASID_MAPPING_UPDATE_STATUS__VMID27_REMAPPING_FINISHED__SHIFT 0x1b 504e54294d6SYong Zhao #define ATC_VMID_PASID_MAPPING_UPDATE_STATUS__VMID28_REMAPPING_FINISHED__SHIFT 0x1c 505e54294d6SYong Zhao #define ATC_VMID_PASID_MAPPING_UPDATE_STATUS__VMID29_REMAPPING_FINISHED__SHIFT 0x1d 506e54294d6SYong Zhao #define ATC_VMID_PASID_MAPPING_UPDATE_STATUS__VMID30_REMAPPING_FINISHED__SHIFT 0x1e 507e54294d6SYong Zhao #define ATC_VMID_PASID_MAPPING_UPDATE_STATUS__VMID31_REMAPPING_FINISHED__SHIFT 0x1f 508e54294d6SYong Zhao #define ATC_VMID_PASID_MAPPING_UPDATE_STATUS__VMID0_REMAPPING_FINISHED_MASK 0x00000001L 509e54294d6SYong Zhao #define ATC_VMID_PASID_MAPPING_UPDATE_STATUS__VMID1_REMAPPING_FINISHED_MASK 0x00000002L 510e54294d6SYong Zhao #define ATC_VMID_PASID_MAPPING_UPDATE_STATUS__VMID2_REMAPPING_FINISHED_MASK 0x00000004L 511e54294d6SYong Zhao #define ATC_VMID_PASID_MAPPING_UPDATE_STATUS__VMID3_REMAPPING_FINISHED_MASK 0x00000008L 512e54294d6SYong Zhao #define ATC_VMID_PASID_MAPPING_UPDATE_STATUS__VMID4_REMAPPING_FINISHED_MASK 0x00000010L 513e54294d6SYong Zhao #define ATC_VMID_PASID_MAPPING_UPDATE_STATUS__VMID5_REMAPPING_FINISHED_MASK 0x00000020L 514e54294d6SYong Zhao #define ATC_VMID_PASID_MAPPING_UPDATE_STATUS__VMID6_REMAPPING_FINISHED_MASK 0x00000040L 515e54294d6SYong Zhao #define ATC_VMID_PASID_MAPPING_UPDATE_STATUS__VMID7_REMAPPING_FINISHED_MASK 0x00000080L 516e54294d6SYong Zhao #define ATC_VMID_PASID_MAPPING_UPDATE_STATUS__VMID8_REMAPPING_FINISHED_MASK 0x00000100L 517e54294d6SYong Zhao #define ATC_VMID_PASID_MAPPING_UPDATE_STATUS__VMID9_REMAPPING_FINISHED_MASK 0x00000200L 518e54294d6SYong Zhao #define ATC_VMID_PASID_MAPPING_UPDATE_STATUS__VMID10_REMAPPING_FINISHED_MASK 0x00000400L 519e54294d6SYong Zhao #define ATC_VMID_PASID_MAPPING_UPDATE_STATUS__VMID11_REMAPPING_FINISHED_MASK 0x00000800L 520e54294d6SYong Zhao #define ATC_VMID_PASID_MAPPING_UPDATE_STATUS__VMID12_REMAPPING_FINISHED_MASK 0x00001000L 521e54294d6SYong Zhao #define ATC_VMID_PASID_MAPPING_UPDATE_STATUS__VMID13_REMAPPING_FINISHED_MASK 0x00002000L 522e54294d6SYong Zhao #define ATC_VMID_PASID_MAPPING_UPDATE_STATUS__VMID14_REMAPPING_FINISHED_MASK 0x00004000L 523e54294d6SYong Zhao #define ATC_VMID_PASID_MAPPING_UPDATE_STATUS__VMID15_REMAPPING_FINISHED_MASK 0x00008000L 524e54294d6SYong Zhao #define ATC_VMID_PASID_MAPPING_UPDATE_STATUS__VMID16_REMAPPING_FINISHED_MASK 0x00010000L 525e54294d6SYong Zhao #define ATC_VMID_PASID_MAPPING_UPDATE_STATUS__VMID17_REMAPPING_FINISHED_MASK 0x00020000L 526e54294d6SYong Zhao #define ATC_VMID_PASID_MAPPING_UPDATE_STATUS__VMID18_REMAPPING_FINISHED_MASK 0x00040000L 527e54294d6SYong Zhao #define ATC_VMID_PASID_MAPPING_UPDATE_STATUS__VMID19_REMAPPING_FINISHED_MASK 0x00080000L 528e54294d6SYong Zhao #define ATC_VMID_PASID_MAPPING_UPDATE_STATUS__VMID20_REMAPPING_FINISHED_MASK 0x00100000L 529e54294d6SYong Zhao #define ATC_VMID_PASID_MAPPING_UPDATE_STATUS__VMID21_REMAPPING_FINISHED_MASK 0x00200000L 530e54294d6SYong Zhao #define ATC_VMID_PASID_MAPPING_UPDATE_STATUS__VMID22_REMAPPING_FINISHED_MASK 0x00400000L 531e54294d6SYong Zhao #define ATC_VMID_PASID_MAPPING_UPDATE_STATUS__VMID23_REMAPPING_FINISHED_MASK 0x00800000L 532e54294d6SYong Zhao #define ATC_VMID_PASID_MAPPING_UPDATE_STATUS__VMID24_REMAPPING_FINISHED_MASK 0x01000000L 533e54294d6SYong Zhao #define ATC_VMID_PASID_MAPPING_UPDATE_STATUS__VMID25_REMAPPING_FINISHED_MASK 0x02000000L 534e54294d6SYong Zhao #define ATC_VMID_PASID_MAPPING_UPDATE_STATUS__VMID26_REMAPPING_FINISHED_MASK 0x04000000L 535e54294d6SYong Zhao #define ATC_VMID_PASID_MAPPING_UPDATE_STATUS__VMID27_REMAPPING_FINISHED_MASK 0x08000000L 536e54294d6SYong Zhao #define ATC_VMID_PASID_MAPPING_UPDATE_STATUS__VMID28_REMAPPING_FINISHED_MASK 0x10000000L 537e54294d6SYong Zhao #define ATC_VMID_PASID_MAPPING_UPDATE_STATUS__VMID29_REMAPPING_FINISHED_MASK 0x20000000L 538e54294d6SYong Zhao #define ATC_VMID_PASID_MAPPING_UPDATE_STATUS__VMID30_REMAPPING_FINISHED_MASK 0x40000000L 539e54294d6SYong Zhao #define ATC_VMID_PASID_MAPPING_UPDATE_STATUS__VMID31_REMAPPING_FINISHED_MASK 0x80000000L 540e54294d6SYong Zhao //ATC_ATS_VMID_STATUS 541e54294d6SYong Zhao #define ATC_ATS_VMID_STATUS__VMID0_OUTSTANDING__SHIFT 0x0 542e54294d6SYong Zhao #define ATC_ATS_VMID_STATUS__VMID1_OUTSTANDING__SHIFT 0x1 543e54294d6SYong Zhao #define ATC_ATS_VMID_STATUS__VMID2_OUTSTANDING__SHIFT 0x2 544e54294d6SYong Zhao #define ATC_ATS_VMID_STATUS__VMID3_OUTSTANDING__SHIFT 0x3 545e54294d6SYong Zhao #define ATC_ATS_VMID_STATUS__VMID4_OUTSTANDING__SHIFT 0x4 546e54294d6SYong Zhao #define ATC_ATS_VMID_STATUS__VMID5_OUTSTANDING__SHIFT 0x5 547e54294d6SYong Zhao #define ATC_ATS_VMID_STATUS__VMID6_OUTSTANDING__SHIFT 0x6 548e54294d6SYong Zhao #define ATC_ATS_VMID_STATUS__VMID7_OUTSTANDING__SHIFT 0x7 549e54294d6SYong Zhao #define ATC_ATS_VMID_STATUS__VMID8_OUTSTANDING__SHIFT 0x8 550e54294d6SYong Zhao #define ATC_ATS_VMID_STATUS__VMID9_OUTSTANDING__SHIFT 0x9 551e54294d6SYong Zhao #define ATC_ATS_VMID_STATUS__VMID10_OUTSTANDING__SHIFT 0xa 552e54294d6SYong Zhao #define ATC_ATS_VMID_STATUS__VMID11_OUTSTANDING__SHIFT 0xb 553e54294d6SYong Zhao #define ATC_ATS_VMID_STATUS__VMID12_OUTSTANDING__SHIFT 0xc 554e54294d6SYong Zhao #define ATC_ATS_VMID_STATUS__VMID13_OUTSTANDING__SHIFT 0xd 555e54294d6SYong Zhao #define ATC_ATS_VMID_STATUS__VMID14_OUTSTANDING__SHIFT 0xe 556e54294d6SYong Zhao #define ATC_ATS_VMID_STATUS__VMID15_OUTSTANDING__SHIFT 0xf 557e54294d6SYong Zhao #define ATC_ATS_VMID_STATUS__VMID16_OUTSTANDING__SHIFT 0x10 558e54294d6SYong Zhao #define ATC_ATS_VMID_STATUS__VMID17_OUTSTANDING__SHIFT 0x11 559e54294d6SYong Zhao #define ATC_ATS_VMID_STATUS__VMID18_OUTSTANDING__SHIFT 0x12 560e54294d6SYong Zhao #define ATC_ATS_VMID_STATUS__VMID19_OUTSTANDING__SHIFT 0x13 561e54294d6SYong Zhao #define ATC_ATS_VMID_STATUS__VMID20_OUTSTANDING__SHIFT 0x14 562e54294d6SYong Zhao #define ATC_ATS_VMID_STATUS__VMID21_OUTSTANDING__SHIFT 0x15 563e54294d6SYong Zhao #define ATC_ATS_VMID_STATUS__VMID22_OUTSTANDING__SHIFT 0x16 564e54294d6SYong Zhao #define ATC_ATS_VMID_STATUS__VMID23_OUTSTANDING__SHIFT 0x17 565e54294d6SYong Zhao #define ATC_ATS_VMID_STATUS__VMID24_OUTSTANDING__SHIFT 0x18 566e54294d6SYong Zhao #define ATC_ATS_VMID_STATUS__VMID25_OUTSTANDING__SHIFT 0x19 567e54294d6SYong Zhao #define ATC_ATS_VMID_STATUS__VMID26_OUTSTANDING__SHIFT 0x1a 568e54294d6SYong Zhao #define ATC_ATS_VMID_STATUS__VMID27_OUTSTANDING__SHIFT 0x1b 569e54294d6SYong Zhao #define ATC_ATS_VMID_STATUS__VMID28_OUTSTANDING__SHIFT 0x1c 570e54294d6SYong Zhao #define ATC_ATS_VMID_STATUS__VMID29_OUTSTANDING__SHIFT 0x1d 571e54294d6SYong Zhao #define ATC_ATS_VMID_STATUS__VMID30_OUTSTANDING__SHIFT 0x1e 572e54294d6SYong Zhao #define ATC_ATS_VMID_STATUS__VMID31_OUTSTANDING__SHIFT 0x1f 573e54294d6SYong Zhao #define ATC_ATS_VMID_STATUS__VMID0_OUTSTANDING_MASK 0x00000001L 574e54294d6SYong Zhao #define ATC_ATS_VMID_STATUS__VMID1_OUTSTANDING_MASK 0x00000002L 575e54294d6SYong Zhao #define ATC_ATS_VMID_STATUS__VMID2_OUTSTANDING_MASK 0x00000004L 576e54294d6SYong Zhao #define ATC_ATS_VMID_STATUS__VMID3_OUTSTANDING_MASK 0x00000008L 577e54294d6SYong Zhao #define ATC_ATS_VMID_STATUS__VMID4_OUTSTANDING_MASK 0x00000010L 578e54294d6SYong Zhao #define ATC_ATS_VMID_STATUS__VMID5_OUTSTANDING_MASK 0x00000020L 579e54294d6SYong Zhao #define ATC_ATS_VMID_STATUS__VMID6_OUTSTANDING_MASK 0x00000040L 580e54294d6SYong Zhao #define ATC_ATS_VMID_STATUS__VMID7_OUTSTANDING_MASK 0x00000080L 581e54294d6SYong Zhao #define ATC_ATS_VMID_STATUS__VMID8_OUTSTANDING_MASK 0x00000100L 582e54294d6SYong Zhao #define ATC_ATS_VMID_STATUS__VMID9_OUTSTANDING_MASK 0x00000200L 583e54294d6SYong Zhao #define ATC_ATS_VMID_STATUS__VMID10_OUTSTANDING_MASK 0x00000400L 584e54294d6SYong Zhao #define ATC_ATS_VMID_STATUS__VMID11_OUTSTANDING_MASK 0x00000800L 585e54294d6SYong Zhao #define ATC_ATS_VMID_STATUS__VMID12_OUTSTANDING_MASK 0x00001000L 586e54294d6SYong Zhao #define ATC_ATS_VMID_STATUS__VMID13_OUTSTANDING_MASK 0x00002000L 587e54294d6SYong Zhao #define ATC_ATS_VMID_STATUS__VMID14_OUTSTANDING_MASK 0x00004000L 588e54294d6SYong Zhao #define ATC_ATS_VMID_STATUS__VMID15_OUTSTANDING_MASK 0x00008000L 589e54294d6SYong Zhao #define ATC_ATS_VMID_STATUS__VMID16_OUTSTANDING_MASK 0x00010000L 590e54294d6SYong Zhao #define ATC_ATS_VMID_STATUS__VMID17_OUTSTANDING_MASK 0x00020000L 591e54294d6SYong Zhao #define ATC_ATS_VMID_STATUS__VMID18_OUTSTANDING_MASK 0x00040000L 592e54294d6SYong Zhao #define ATC_ATS_VMID_STATUS__VMID19_OUTSTANDING_MASK 0x00080000L 593e54294d6SYong Zhao #define ATC_ATS_VMID_STATUS__VMID20_OUTSTANDING_MASK 0x00100000L 594e54294d6SYong Zhao #define ATC_ATS_VMID_STATUS__VMID21_OUTSTANDING_MASK 0x00200000L 595e54294d6SYong Zhao #define ATC_ATS_VMID_STATUS__VMID22_OUTSTANDING_MASK 0x00400000L 596e54294d6SYong Zhao #define ATC_ATS_VMID_STATUS__VMID23_OUTSTANDING_MASK 0x00800000L 597e54294d6SYong Zhao #define ATC_ATS_VMID_STATUS__VMID24_OUTSTANDING_MASK 0x01000000L 598e54294d6SYong Zhao #define ATC_ATS_VMID_STATUS__VMID25_OUTSTANDING_MASK 0x02000000L 599e54294d6SYong Zhao #define ATC_ATS_VMID_STATUS__VMID26_OUTSTANDING_MASK 0x04000000L 600e54294d6SYong Zhao #define ATC_ATS_VMID_STATUS__VMID27_OUTSTANDING_MASK 0x08000000L 601e54294d6SYong Zhao #define ATC_ATS_VMID_STATUS__VMID28_OUTSTANDING_MASK 0x10000000L 602e54294d6SYong Zhao #define ATC_ATS_VMID_STATUS__VMID29_OUTSTANDING_MASK 0x20000000L 603e54294d6SYong Zhao #define ATC_ATS_VMID_STATUS__VMID30_OUTSTANDING_MASK 0x40000000L 604e54294d6SYong Zhao #define ATC_ATS_VMID_STATUS__VMID31_OUTSTANDING_MASK 0x80000000L 605e54294d6SYong Zhao //ATC_ATS_STATUS 606e54294d6SYong Zhao #define ATC_ATS_STATUS__BUSY__SHIFT 0x0 607e54294d6SYong Zhao #define ATC_ATS_STATUS__CRASHED__SHIFT 0x1 608e54294d6SYong Zhao #define ATC_ATS_STATUS__DEADLOCK_DETECTION__SHIFT 0x2 609e54294d6SYong Zhao #define ATC_ATS_STATUS__FLUSH_INVALIDATION_OUTSTANDING__SHIFT 0x3 610e54294d6SYong Zhao #define ATC_ATS_STATUS__NONFLUSH_INVALIDATION_OUTSTANDING__SHIFT 0x6 611e54294d6SYong Zhao #define ATC_ATS_STATUS__BUSY_MASK 0x00000001L 612e54294d6SYong Zhao #define ATC_ATS_STATUS__CRASHED_MASK 0x00000002L 613e54294d6SYong Zhao #define ATC_ATS_STATUS__DEADLOCK_DETECTION_MASK 0x00000004L 614e54294d6SYong Zhao #define ATC_ATS_STATUS__FLUSH_INVALIDATION_OUTSTANDING_MASK 0x00000038L 615e54294d6SYong Zhao #define ATC_ATS_STATUS__NONFLUSH_INVALIDATION_OUTSTANDING_MASK 0x000001C0L 616e54294d6SYong Zhao //ATC_ATS_VMID_SNAPSHOT_GFX_STAT 617e54294d6SYong Zhao #define ATC_ATS_VMID_SNAPSHOT_GFX_STAT__VMID0__SHIFT 0x0 618e54294d6SYong Zhao #define ATC_ATS_VMID_SNAPSHOT_GFX_STAT__VMID1__SHIFT 0x1 619e54294d6SYong Zhao #define ATC_ATS_VMID_SNAPSHOT_GFX_STAT__VMID2__SHIFT 0x2 620e54294d6SYong Zhao #define ATC_ATS_VMID_SNAPSHOT_GFX_STAT__VMID3__SHIFT 0x3 621e54294d6SYong Zhao #define ATC_ATS_VMID_SNAPSHOT_GFX_STAT__VMID4__SHIFT 0x4 622e54294d6SYong Zhao #define ATC_ATS_VMID_SNAPSHOT_GFX_STAT__VMID5__SHIFT 0x5 623e54294d6SYong Zhao #define ATC_ATS_VMID_SNAPSHOT_GFX_STAT__VMID6__SHIFT 0x6 624e54294d6SYong Zhao #define ATC_ATS_VMID_SNAPSHOT_GFX_STAT__VMID7__SHIFT 0x7 625e54294d6SYong Zhao #define ATC_ATS_VMID_SNAPSHOT_GFX_STAT__VMID8__SHIFT 0x8 626e54294d6SYong Zhao #define ATC_ATS_VMID_SNAPSHOT_GFX_STAT__VMID9__SHIFT 0x9 627e54294d6SYong Zhao #define ATC_ATS_VMID_SNAPSHOT_GFX_STAT__VMID10__SHIFT 0xa 628e54294d6SYong Zhao #define ATC_ATS_VMID_SNAPSHOT_GFX_STAT__VMID11__SHIFT 0xb 629e54294d6SYong Zhao #define ATC_ATS_VMID_SNAPSHOT_GFX_STAT__VMID12__SHIFT 0xc 630e54294d6SYong Zhao #define ATC_ATS_VMID_SNAPSHOT_GFX_STAT__VMID13__SHIFT 0xd 631e54294d6SYong Zhao #define ATC_ATS_VMID_SNAPSHOT_GFX_STAT__VMID14__SHIFT 0xe 632e54294d6SYong Zhao #define ATC_ATS_VMID_SNAPSHOT_GFX_STAT__VMID15__SHIFT 0xf 633e54294d6SYong Zhao #define ATC_ATS_VMID_SNAPSHOT_GFX_STAT__VMID0_MASK 0x00000001L 634e54294d6SYong Zhao #define ATC_ATS_VMID_SNAPSHOT_GFX_STAT__VMID1_MASK 0x00000002L 635e54294d6SYong Zhao #define ATC_ATS_VMID_SNAPSHOT_GFX_STAT__VMID2_MASK 0x00000004L 636e54294d6SYong Zhao #define ATC_ATS_VMID_SNAPSHOT_GFX_STAT__VMID3_MASK 0x00000008L 637e54294d6SYong Zhao #define ATC_ATS_VMID_SNAPSHOT_GFX_STAT__VMID4_MASK 0x00000010L 638e54294d6SYong Zhao #define ATC_ATS_VMID_SNAPSHOT_GFX_STAT__VMID5_MASK 0x00000020L 639e54294d6SYong Zhao #define ATC_ATS_VMID_SNAPSHOT_GFX_STAT__VMID6_MASK 0x00000040L 640e54294d6SYong Zhao #define ATC_ATS_VMID_SNAPSHOT_GFX_STAT__VMID7_MASK 0x00000080L 641e54294d6SYong Zhao #define ATC_ATS_VMID_SNAPSHOT_GFX_STAT__VMID8_MASK 0x00000100L 642e54294d6SYong Zhao #define ATC_ATS_VMID_SNAPSHOT_GFX_STAT__VMID9_MASK 0x00000200L 643e54294d6SYong Zhao #define ATC_ATS_VMID_SNAPSHOT_GFX_STAT__VMID10_MASK 0x00000400L 644e54294d6SYong Zhao #define ATC_ATS_VMID_SNAPSHOT_GFX_STAT__VMID11_MASK 0x00000800L 645e54294d6SYong Zhao #define ATC_ATS_VMID_SNAPSHOT_GFX_STAT__VMID12_MASK 0x00001000L 646e54294d6SYong Zhao #define ATC_ATS_VMID_SNAPSHOT_GFX_STAT__VMID13_MASK 0x00002000L 647e54294d6SYong Zhao #define ATC_ATS_VMID_SNAPSHOT_GFX_STAT__VMID14_MASK 0x00004000L 648e54294d6SYong Zhao #define ATC_ATS_VMID_SNAPSHOT_GFX_STAT__VMID15_MASK 0x00008000L 649e54294d6SYong Zhao //ATC_ATS_VMID_SNAPSHOT_MMHUB_STAT 650e54294d6SYong Zhao #define ATC_ATS_VMID_SNAPSHOT_MMHUB_STAT__VMID0__SHIFT 0x0 651e54294d6SYong Zhao #define ATC_ATS_VMID_SNAPSHOT_MMHUB_STAT__VMID1__SHIFT 0x1 652e54294d6SYong Zhao #define ATC_ATS_VMID_SNAPSHOT_MMHUB_STAT__VMID2__SHIFT 0x2 653e54294d6SYong Zhao #define ATC_ATS_VMID_SNAPSHOT_MMHUB_STAT__VMID3__SHIFT 0x3 654e54294d6SYong Zhao #define ATC_ATS_VMID_SNAPSHOT_MMHUB_STAT__VMID4__SHIFT 0x4 655e54294d6SYong Zhao #define ATC_ATS_VMID_SNAPSHOT_MMHUB_STAT__VMID5__SHIFT 0x5 656e54294d6SYong Zhao #define ATC_ATS_VMID_SNAPSHOT_MMHUB_STAT__VMID6__SHIFT 0x6 657e54294d6SYong Zhao #define ATC_ATS_VMID_SNAPSHOT_MMHUB_STAT__VMID7__SHIFT 0x7 658e54294d6SYong Zhao #define ATC_ATS_VMID_SNAPSHOT_MMHUB_STAT__VMID8__SHIFT 0x8 659e54294d6SYong Zhao #define ATC_ATS_VMID_SNAPSHOT_MMHUB_STAT__VMID9__SHIFT 0x9 660e54294d6SYong Zhao #define ATC_ATS_VMID_SNAPSHOT_MMHUB_STAT__VMID10__SHIFT 0xa 661e54294d6SYong Zhao #define ATC_ATS_VMID_SNAPSHOT_MMHUB_STAT__VMID11__SHIFT 0xb 662e54294d6SYong Zhao #define ATC_ATS_VMID_SNAPSHOT_MMHUB_STAT__VMID12__SHIFT 0xc 663e54294d6SYong Zhao #define ATC_ATS_VMID_SNAPSHOT_MMHUB_STAT__VMID13__SHIFT 0xd 664e54294d6SYong Zhao #define ATC_ATS_VMID_SNAPSHOT_MMHUB_STAT__VMID14__SHIFT 0xe 665e54294d6SYong Zhao #define ATC_ATS_VMID_SNAPSHOT_MMHUB_STAT__VMID15__SHIFT 0xf 666e54294d6SYong Zhao #define ATC_ATS_VMID_SNAPSHOT_MMHUB_STAT__VMID0_MASK 0x00000001L 667e54294d6SYong Zhao #define ATC_ATS_VMID_SNAPSHOT_MMHUB_STAT__VMID1_MASK 0x00000002L 668e54294d6SYong Zhao #define ATC_ATS_VMID_SNAPSHOT_MMHUB_STAT__VMID2_MASK 0x00000004L 669e54294d6SYong Zhao #define ATC_ATS_VMID_SNAPSHOT_MMHUB_STAT__VMID3_MASK 0x00000008L 670e54294d6SYong Zhao #define ATC_ATS_VMID_SNAPSHOT_MMHUB_STAT__VMID4_MASK 0x00000010L 671e54294d6SYong Zhao #define ATC_ATS_VMID_SNAPSHOT_MMHUB_STAT__VMID5_MASK 0x00000020L 672e54294d6SYong Zhao #define ATC_ATS_VMID_SNAPSHOT_MMHUB_STAT__VMID6_MASK 0x00000040L 673e54294d6SYong Zhao #define ATC_ATS_VMID_SNAPSHOT_MMHUB_STAT__VMID7_MASK 0x00000080L 674e54294d6SYong Zhao #define ATC_ATS_VMID_SNAPSHOT_MMHUB_STAT__VMID8_MASK 0x00000100L 675e54294d6SYong Zhao #define ATC_ATS_VMID_SNAPSHOT_MMHUB_STAT__VMID9_MASK 0x00000200L 676e54294d6SYong Zhao #define ATC_ATS_VMID_SNAPSHOT_MMHUB_STAT__VMID10_MASK 0x00000400L 677e54294d6SYong Zhao #define ATC_ATS_VMID_SNAPSHOT_MMHUB_STAT__VMID11_MASK 0x00000800L 678e54294d6SYong Zhao #define ATC_ATS_VMID_SNAPSHOT_MMHUB_STAT__VMID12_MASK 0x00001000L 679e54294d6SYong Zhao #define ATC_ATS_VMID_SNAPSHOT_MMHUB_STAT__VMID13_MASK 0x00002000L 680e54294d6SYong Zhao #define ATC_ATS_VMID_SNAPSHOT_MMHUB_STAT__VMID14_MASK 0x00004000L 681e54294d6SYong Zhao #define ATC_ATS_VMID_SNAPSHOT_MMHUB_STAT__VMID15_MASK 0x00008000L 682e54294d6SYong Zhao //ATC_VMID0_PASID_MAPPING 683e54294d6SYong Zhao #define ATC_VMID0_PASID_MAPPING__PASID__SHIFT 0x0 684e54294d6SYong Zhao #define ATC_VMID0_PASID_MAPPING__NO_INVALIDATION__SHIFT 0x1e 685e54294d6SYong Zhao #define ATC_VMID0_PASID_MAPPING__VALID__SHIFT 0x1f 686e54294d6SYong Zhao #define ATC_VMID0_PASID_MAPPING__PASID_MASK 0x0000FFFFL 687e54294d6SYong Zhao #define ATC_VMID0_PASID_MAPPING__NO_INVALIDATION_MASK 0x40000000L 688e54294d6SYong Zhao #define ATC_VMID0_PASID_MAPPING__VALID_MASK 0x80000000L 689e54294d6SYong Zhao //ATC_VMID1_PASID_MAPPING 690e54294d6SYong Zhao #define ATC_VMID1_PASID_MAPPING__PASID__SHIFT 0x0 691e54294d6SYong Zhao #define ATC_VMID1_PASID_MAPPING__NO_INVALIDATION__SHIFT 0x1e 692e54294d6SYong Zhao #define ATC_VMID1_PASID_MAPPING__VALID__SHIFT 0x1f 693e54294d6SYong Zhao #define ATC_VMID1_PASID_MAPPING__PASID_MASK 0x0000FFFFL 694e54294d6SYong Zhao #define ATC_VMID1_PASID_MAPPING__NO_INVALIDATION_MASK 0x40000000L 695e54294d6SYong Zhao #define ATC_VMID1_PASID_MAPPING__VALID_MASK 0x80000000L 696e54294d6SYong Zhao //ATC_VMID2_PASID_MAPPING 697e54294d6SYong Zhao #define ATC_VMID2_PASID_MAPPING__PASID__SHIFT 0x0 698e54294d6SYong Zhao #define ATC_VMID2_PASID_MAPPING__NO_INVALIDATION__SHIFT 0x1e 699e54294d6SYong Zhao #define ATC_VMID2_PASID_MAPPING__VALID__SHIFT 0x1f 700e54294d6SYong Zhao #define ATC_VMID2_PASID_MAPPING__PASID_MASK 0x0000FFFFL 701e54294d6SYong Zhao #define ATC_VMID2_PASID_MAPPING__NO_INVALIDATION_MASK 0x40000000L 702e54294d6SYong Zhao #define ATC_VMID2_PASID_MAPPING__VALID_MASK 0x80000000L 703e54294d6SYong Zhao //ATC_VMID3_PASID_MAPPING 704e54294d6SYong Zhao #define ATC_VMID3_PASID_MAPPING__PASID__SHIFT 0x0 705e54294d6SYong Zhao #define ATC_VMID3_PASID_MAPPING__NO_INVALIDATION__SHIFT 0x1e 706e54294d6SYong Zhao #define ATC_VMID3_PASID_MAPPING__VALID__SHIFT 0x1f 707e54294d6SYong Zhao #define ATC_VMID3_PASID_MAPPING__PASID_MASK 0x0000FFFFL 708e54294d6SYong Zhao #define ATC_VMID3_PASID_MAPPING__NO_INVALIDATION_MASK 0x40000000L 709e54294d6SYong Zhao #define ATC_VMID3_PASID_MAPPING__VALID_MASK 0x80000000L 710e54294d6SYong Zhao //ATC_VMID4_PASID_MAPPING 711e54294d6SYong Zhao #define ATC_VMID4_PASID_MAPPING__PASID__SHIFT 0x0 712e54294d6SYong Zhao #define ATC_VMID4_PASID_MAPPING__NO_INVALIDATION__SHIFT 0x1e 713e54294d6SYong Zhao #define ATC_VMID4_PASID_MAPPING__VALID__SHIFT 0x1f 714e54294d6SYong Zhao #define ATC_VMID4_PASID_MAPPING__PASID_MASK 0x0000FFFFL 715e54294d6SYong Zhao #define ATC_VMID4_PASID_MAPPING__NO_INVALIDATION_MASK 0x40000000L 716e54294d6SYong Zhao #define ATC_VMID4_PASID_MAPPING__VALID_MASK 0x80000000L 717e54294d6SYong Zhao //ATC_VMID5_PASID_MAPPING 718e54294d6SYong Zhao #define ATC_VMID5_PASID_MAPPING__PASID__SHIFT 0x0 719e54294d6SYong Zhao #define ATC_VMID5_PASID_MAPPING__NO_INVALIDATION__SHIFT 0x1e 720e54294d6SYong Zhao #define ATC_VMID5_PASID_MAPPING__VALID__SHIFT 0x1f 721e54294d6SYong Zhao #define ATC_VMID5_PASID_MAPPING__PASID_MASK 0x0000FFFFL 722e54294d6SYong Zhao #define ATC_VMID5_PASID_MAPPING__NO_INVALIDATION_MASK 0x40000000L 723e54294d6SYong Zhao #define ATC_VMID5_PASID_MAPPING__VALID_MASK 0x80000000L 724e54294d6SYong Zhao //ATC_VMID6_PASID_MAPPING 725e54294d6SYong Zhao #define ATC_VMID6_PASID_MAPPING__PASID__SHIFT 0x0 726e54294d6SYong Zhao #define ATC_VMID6_PASID_MAPPING__NO_INVALIDATION__SHIFT 0x1e 727e54294d6SYong Zhao #define ATC_VMID6_PASID_MAPPING__VALID__SHIFT 0x1f 728e54294d6SYong Zhao #define ATC_VMID6_PASID_MAPPING__PASID_MASK 0x0000FFFFL 729e54294d6SYong Zhao #define ATC_VMID6_PASID_MAPPING__NO_INVALIDATION_MASK 0x40000000L 730e54294d6SYong Zhao #define ATC_VMID6_PASID_MAPPING__VALID_MASK 0x80000000L 731e54294d6SYong Zhao //ATC_VMID7_PASID_MAPPING 732e54294d6SYong Zhao #define ATC_VMID7_PASID_MAPPING__PASID__SHIFT 0x0 733e54294d6SYong Zhao #define ATC_VMID7_PASID_MAPPING__NO_INVALIDATION__SHIFT 0x1e 734e54294d6SYong Zhao #define ATC_VMID7_PASID_MAPPING__VALID__SHIFT 0x1f 735e54294d6SYong Zhao #define ATC_VMID7_PASID_MAPPING__PASID_MASK 0x0000FFFFL 736e54294d6SYong Zhao #define ATC_VMID7_PASID_MAPPING__NO_INVALIDATION_MASK 0x40000000L 737e54294d6SYong Zhao #define ATC_VMID7_PASID_MAPPING__VALID_MASK 0x80000000L 738e54294d6SYong Zhao //ATC_VMID8_PASID_MAPPING 739e54294d6SYong Zhao #define ATC_VMID8_PASID_MAPPING__PASID__SHIFT 0x0 740e54294d6SYong Zhao #define ATC_VMID8_PASID_MAPPING__NO_INVALIDATION__SHIFT 0x1e 741e54294d6SYong Zhao #define ATC_VMID8_PASID_MAPPING__VALID__SHIFT 0x1f 742e54294d6SYong Zhao #define ATC_VMID8_PASID_MAPPING__PASID_MASK 0x0000FFFFL 743e54294d6SYong Zhao #define ATC_VMID8_PASID_MAPPING__NO_INVALIDATION_MASK 0x40000000L 744e54294d6SYong Zhao #define ATC_VMID8_PASID_MAPPING__VALID_MASK 0x80000000L 745e54294d6SYong Zhao //ATC_VMID9_PASID_MAPPING 746e54294d6SYong Zhao #define ATC_VMID9_PASID_MAPPING__PASID__SHIFT 0x0 747e54294d6SYong Zhao #define ATC_VMID9_PASID_MAPPING__NO_INVALIDATION__SHIFT 0x1e 748e54294d6SYong Zhao #define ATC_VMID9_PASID_MAPPING__VALID__SHIFT 0x1f 749e54294d6SYong Zhao #define ATC_VMID9_PASID_MAPPING__PASID_MASK 0x0000FFFFL 750e54294d6SYong Zhao #define ATC_VMID9_PASID_MAPPING__NO_INVALIDATION_MASK 0x40000000L 751e54294d6SYong Zhao #define ATC_VMID9_PASID_MAPPING__VALID_MASK 0x80000000L 752e54294d6SYong Zhao //ATC_VMID10_PASID_MAPPING 753e54294d6SYong Zhao #define ATC_VMID10_PASID_MAPPING__PASID__SHIFT 0x0 754e54294d6SYong Zhao #define ATC_VMID10_PASID_MAPPING__NO_INVALIDATION__SHIFT 0x1e 755e54294d6SYong Zhao #define ATC_VMID10_PASID_MAPPING__VALID__SHIFT 0x1f 756e54294d6SYong Zhao #define ATC_VMID10_PASID_MAPPING__PASID_MASK 0x0000FFFFL 757e54294d6SYong Zhao #define ATC_VMID10_PASID_MAPPING__NO_INVALIDATION_MASK 0x40000000L 758e54294d6SYong Zhao #define ATC_VMID10_PASID_MAPPING__VALID_MASK 0x80000000L 759e54294d6SYong Zhao //ATC_VMID11_PASID_MAPPING 760e54294d6SYong Zhao #define ATC_VMID11_PASID_MAPPING__PASID__SHIFT 0x0 761e54294d6SYong Zhao #define ATC_VMID11_PASID_MAPPING__NO_INVALIDATION__SHIFT 0x1e 762e54294d6SYong Zhao #define ATC_VMID11_PASID_MAPPING__VALID__SHIFT 0x1f 763e54294d6SYong Zhao #define ATC_VMID11_PASID_MAPPING__PASID_MASK 0x0000FFFFL 764e54294d6SYong Zhao #define ATC_VMID11_PASID_MAPPING__NO_INVALIDATION_MASK 0x40000000L 765e54294d6SYong Zhao #define ATC_VMID11_PASID_MAPPING__VALID_MASK 0x80000000L 766e54294d6SYong Zhao //ATC_VMID12_PASID_MAPPING 767e54294d6SYong Zhao #define ATC_VMID12_PASID_MAPPING__PASID__SHIFT 0x0 768e54294d6SYong Zhao #define ATC_VMID12_PASID_MAPPING__NO_INVALIDATION__SHIFT 0x1e 769e54294d6SYong Zhao #define ATC_VMID12_PASID_MAPPING__VALID__SHIFT 0x1f 770e54294d6SYong Zhao #define ATC_VMID12_PASID_MAPPING__PASID_MASK 0x0000FFFFL 771e54294d6SYong Zhao #define ATC_VMID12_PASID_MAPPING__NO_INVALIDATION_MASK 0x40000000L 772e54294d6SYong Zhao #define ATC_VMID12_PASID_MAPPING__VALID_MASK 0x80000000L 773e54294d6SYong Zhao //ATC_VMID13_PASID_MAPPING 774e54294d6SYong Zhao #define ATC_VMID13_PASID_MAPPING__PASID__SHIFT 0x0 775e54294d6SYong Zhao #define ATC_VMID13_PASID_MAPPING__NO_INVALIDATION__SHIFT 0x1e 776e54294d6SYong Zhao #define ATC_VMID13_PASID_MAPPING__VALID__SHIFT 0x1f 777e54294d6SYong Zhao #define ATC_VMID13_PASID_MAPPING__PASID_MASK 0x0000FFFFL 778e54294d6SYong Zhao #define ATC_VMID13_PASID_MAPPING__NO_INVALIDATION_MASK 0x40000000L 779e54294d6SYong Zhao #define ATC_VMID13_PASID_MAPPING__VALID_MASK 0x80000000L 780e54294d6SYong Zhao //ATC_VMID14_PASID_MAPPING 781e54294d6SYong Zhao #define ATC_VMID14_PASID_MAPPING__PASID__SHIFT 0x0 782e54294d6SYong Zhao #define ATC_VMID14_PASID_MAPPING__NO_INVALIDATION__SHIFT 0x1e 783e54294d6SYong Zhao #define ATC_VMID14_PASID_MAPPING__VALID__SHIFT 0x1f 784e54294d6SYong Zhao #define ATC_VMID14_PASID_MAPPING__PASID_MASK 0x0000FFFFL 785e54294d6SYong Zhao #define ATC_VMID14_PASID_MAPPING__NO_INVALIDATION_MASK 0x40000000L 786e54294d6SYong Zhao #define ATC_VMID14_PASID_MAPPING__VALID_MASK 0x80000000L 787e54294d6SYong Zhao //ATC_VMID15_PASID_MAPPING 788e54294d6SYong Zhao #define ATC_VMID15_PASID_MAPPING__PASID__SHIFT 0x0 789e54294d6SYong Zhao #define ATC_VMID15_PASID_MAPPING__NO_INVALIDATION__SHIFT 0x1e 790e54294d6SYong Zhao #define ATC_VMID15_PASID_MAPPING__VALID__SHIFT 0x1f 791e54294d6SYong Zhao #define ATC_VMID15_PASID_MAPPING__PASID_MASK 0x0000FFFFL 792e54294d6SYong Zhao #define ATC_VMID15_PASID_MAPPING__NO_INVALIDATION_MASK 0x40000000L 793e54294d6SYong Zhao #define ATC_VMID15_PASID_MAPPING__VALID_MASK 0x80000000L 794e54294d6SYong Zhao //ATC_VMID16_PASID_MAPPING 795e54294d6SYong Zhao #define ATC_VMID16_PASID_MAPPING__PASID__SHIFT 0x0 796e54294d6SYong Zhao #define ATC_VMID16_PASID_MAPPING__NO_INVALIDATION__SHIFT 0x1e 797e54294d6SYong Zhao #define ATC_VMID16_PASID_MAPPING__VALID__SHIFT 0x1f 798e54294d6SYong Zhao #define ATC_VMID16_PASID_MAPPING__PASID_MASK 0x0000FFFFL 799e54294d6SYong Zhao #define ATC_VMID16_PASID_MAPPING__NO_INVALIDATION_MASK 0x40000000L 800e54294d6SYong Zhao #define ATC_VMID16_PASID_MAPPING__VALID_MASK 0x80000000L 801e54294d6SYong Zhao //ATC_VMID17_PASID_MAPPING 802e54294d6SYong Zhao #define ATC_VMID17_PASID_MAPPING__PASID__SHIFT 0x0 803e54294d6SYong Zhao #define ATC_VMID17_PASID_MAPPING__NO_INVALIDATION__SHIFT 0x1e 804e54294d6SYong Zhao #define ATC_VMID17_PASID_MAPPING__VALID__SHIFT 0x1f 805e54294d6SYong Zhao #define ATC_VMID17_PASID_MAPPING__PASID_MASK 0x0000FFFFL 806e54294d6SYong Zhao #define ATC_VMID17_PASID_MAPPING__NO_INVALIDATION_MASK 0x40000000L 807e54294d6SYong Zhao #define ATC_VMID17_PASID_MAPPING__VALID_MASK 0x80000000L 808e54294d6SYong Zhao //ATC_VMID18_PASID_MAPPING 809e54294d6SYong Zhao #define ATC_VMID18_PASID_MAPPING__PASID__SHIFT 0x0 810e54294d6SYong Zhao #define ATC_VMID18_PASID_MAPPING__NO_INVALIDATION__SHIFT 0x1e 811e54294d6SYong Zhao #define ATC_VMID18_PASID_MAPPING__VALID__SHIFT 0x1f 812e54294d6SYong Zhao #define ATC_VMID18_PASID_MAPPING__PASID_MASK 0x0000FFFFL 813e54294d6SYong Zhao #define ATC_VMID18_PASID_MAPPING__NO_INVALIDATION_MASK 0x40000000L 814e54294d6SYong Zhao #define ATC_VMID18_PASID_MAPPING__VALID_MASK 0x80000000L 815e54294d6SYong Zhao //ATC_VMID19_PASID_MAPPING 816e54294d6SYong Zhao #define ATC_VMID19_PASID_MAPPING__PASID__SHIFT 0x0 817e54294d6SYong Zhao #define ATC_VMID19_PASID_MAPPING__NO_INVALIDATION__SHIFT 0x1e 818e54294d6SYong Zhao #define ATC_VMID19_PASID_MAPPING__VALID__SHIFT 0x1f 819e54294d6SYong Zhao #define ATC_VMID19_PASID_MAPPING__PASID_MASK 0x0000FFFFL 820e54294d6SYong Zhao #define ATC_VMID19_PASID_MAPPING__NO_INVALIDATION_MASK 0x40000000L 821e54294d6SYong Zhao #define ATC_VMID19_PASID_MAPPING__VALID_MASK 0x80000000L 822e54294d6SYong Zhao //ATC_VMID20_PASID_MAPPING 823e54294d6SYong Zhao #define ATC_VMID20_PASID_MAPPING__PASID__SHIFT 0x0 824e54294d6SYong Zhao #define ATC_VMID20_PASID_MAPPING__NO_INVALIDATION__SHIFT 0x1e 825e54294d6SYong Zhao #define ATC_VMID20_PASID_MAPPING__VALID__SHIFT 0x1f 826e54294d6SYong Zhao #define ATC_VMID20_PASID_MAPPING__PASID_MASK 0x0000FFFFL 827e54294d6SYong Zhao #define ATC_VMID20_PASID_MAPPING__NO_INVALIDATION_MASK 0x40000000L 828e54294d6SYong Zhao #define ATC_VMID20_PASID_MAPPING__VALID_MASK 0x80000000L 829e54294d6SYong Zhao //ATC_VMID21_PASID_MAPPING 830e54294d6SYong Zhao #define ATC_VMID21_PASID_MAPPING__PASID__SHIFT 0x0 831e54294d6SYong Zhao #define ATC_VMID21_PASID_MAPPING__NO_INVALIDATION__SHIFT 0x1e 832e54294d6SYong Zhao #define ATC_VMID21_PASID_MAPPING__VALID__SHIFT 0x1f 833e54294d6SYong Zhao #define ATC_VMID21_PASID_MAPPING__PASID_MASK 0x0000FFFFL 834e54294d6SYong Zhao #define ATC_VMID21_PASID_MAPPING__NO_INVALIDATION_MASK 0x40000000L 835e54294d6SYong Zhao #define ATC_VMID21_PASID_MAPPING__VALID_MASK 0x80000000L 836e54294d6SYong Zhao //ATC_VMID22_PASID_MAPPING 837e54294d6SYong Zhao #define ATC_VMID22_PASID_MAPPING__PASID__SHIFT 0x0 838e54294d6SYong Zhao #define ATC_VMID22_PASID_MAPPING__NO_INVALIDATION__SHIFT 0x1e 839e54294d6SYong Zhao #define ATC_VMID22_PASID_MAPPING__VALID__SHIFT 0x1f 840e54294d6SYong Zhao #define ATC_VMID22_PASID_MAPPING__PASID_MASK 0x0000FFFFL 841e54294d6SYong Zhao #define ATC_VMID22_PASID_MAPPING__NO_INVALIDATION_MASK 0x40000000L 842e54294d6SYong Zhao #define ATC_VMID22_PASID_MAPPING__VALID_MASK 0x80000000L 843e54294d6SYong Zhao //ATC_VMID23_PASID_MAPPING 844e54294d6SYong Zhao #define ATC_VMID23_PASID_MAPPING__PASID__SHIFT 0x0 845e54294d6SYong Zhao #define ATC_VMID23_PASID_MAPPING__NO_INVALIDATION__SHIFT 0x1e 846e54294d6SYong Zhao #define ATC_VMID23_PASID_MAPPING__VALID__SHIFT 0x1f 847e54294d6SYong Zhao #define ATC_VMID23_PASID_MAPPING__PASID_MASK 0x0000FFFFL 848e54294d6SYong Zhao #define ATC_VMID23_PASID_MAPPING__NO_INVALIDATION_MASK 0x40000000L 849e54294d6SYong Zhao #define ATC_VMID23_PASID_MAPPING__VALID_MASK 0x80000000L 850e54294d6SYong Zhao //ATC_VMID24_PASID_MAPPING 851e54294d6SYong Zhao #define ATC_VMID24_PASID_MAPPING__PASID__SHIFT 0x0 852e54294d6SYong Zhao #define ATC_VMID24_PASID_MAPPING__NO_INVALIDATION__SHIFT 0x1e 853e54294d6SYong Zhao #define ATC_VMID24_PASID_MAPPING__VALID__SHIFT 0x1f 854e54294d6SYong Zhao #define ATC_VMID24_PASID_MAPPING__PASID_MASK 0x0000FFFFL 855e54294d6SYong Zhao #define ATC_VMID24_PASID_MAPPING__NO_INVALIDATION_MASK 0x40000000L 856e54294d6SYong Zhao #define ATC_VMID24_PASID_MAPPING__VALID_MASK 0x80000000L 857e54294d6SYong Zhao //ATC_VMID25_PASID_MAPPING 858e54294d6SYong Zhao #define ATC_VMID25_PASID_MAPPING__PASID__SHIFT 0x0 859e54294d6SYong Zhao #define ATC_VMID25_PASID_MAPPING__NO_INVALIDATION__SHIFT 0x1e 860e54294d6SYong Zhao #define ATC_VMID25_PASID_MAPPING__VALID__SHIFT 0x1f 861e54294d6SYong Zhao #define ATC_VMID25_PASID_MAPPING__PASID_MASK 0x0000FFFFL 862e54294d6SYong Zhao #define ATC_VMID25_PASID_MAPPING__NO_INVALIDATION_MASK 0x40000000L 863e54294d6SYong Zhao #define ATC_VMID25_PASID_MAPPING__VALID_MASK 0x80000000L 864e54294d6SYong Zhao //ATC_VMID26_PASID_MAPPING 865e54294d6SYong Zhao #define ATC_VMID26_PASID_MAPPING__PASID__SHIFT 0x0 866e54294d6SYong Zhao #define ATC_VMID26_PASID_MAPPING__NO_INVALIDATION__SHIFT 0x1e 867e54294d6SYong Zhao #define ATC_VMID26_PASID_MAPPING__VALID__SHIFT 0x1f 868e54294d6SYong Zhao #define ATC_VMID26_PASID_MAPPING__PASID_MASK 0x0000FFFFL 869e54294d6SYong Zhao #define ATC_VMID26_PASID_MAPPING__NO_INVALIDATION_MASK 0x40000000L 870e54294d6SYong Zhao #define ATC_VMID26_PASID_MAPPING__VALID_MASK 0x80000000L 871e54294d6SYong Zhao //ATC_VMID27_PASID_MAPPING 872e54294d6SYong Zhao #define ATC_VMID27_PASID_MAPPING__PASID__SHIFT 0x0 873e54294d6SYong Zhao #define ATC_VMID27_PASID_MAPPING__NO_INVALIDATION__SHIFT 0x1e 874e54294d6SYong Zhao #define ATC_VMID27_PASID_MAPPING__VALID__SHIFT 0x1f 875e54294d6SYong Zhao #define ATC_VMID27_PASID_MAPPING__PASID_MASK 0x0000FFFFL 876e54294d6SYong Zhao #define ATC_VMID27_PASID_MAPPING__NO_INVALIDATION_MASK 0x40000000L 877e54294d6SYong Zhao #define ATC_VMID27_PASID_MAPPING__VALID_MASK 0x80000000L 878e54294d6SYong Zhao //ATC_VMID28_PASID_MAPPING 879e54294d6SYong Zhao #define ATC_VMID28_PASID_MAPPING__PASID__SHIFT 0x0 880e54294d6SYong Zhao #define ATC_VMID28_PASID_MAPPING__NO_INVALIDATION__SHIFT 0x1e 881e54294d6SYong Zhao #define ATC_VMID28_PASID_MAPPING__VALID__SHIFT 0x1f 882e54294d6SYong Zhao #define ATC_VMID28_PASID_MAPPING__PASID_MASK 0x0000FFFFL 883e54294d6SYong Zhao #define ATC_VMID28_PASID_MAPPING__NO_INVALIDATION_MASK 0x40000000L 884e54294d6SYong Zhao #define ATC_VMID28_PASID_MAPPING__VALID_MASK 0x80000000L 885e54294d6SYong Zhao //ATC_VMID29_PASID_MAPPING 886e54294d6SYong Zhao #define ATC_VMID29_PASID_MAPPING__PASID__SHIFT 0x0 887e54294d6SYong Zhao #define ATC_VMID29_PASID_MAPPING__NO_INVALIDATION__SHIFT 0x1e 888e54294d6SYong Zhao #define ATC_VMID29_PASID_MAPPING__VALID__SHIFT 0x1f 889e54294d6SYong Zhao #define ATC_VMID29_PASID_MAPPING__PASID_MASK 0x0000FFFFL 890e54294d6SYong Zhao #define ATC_VMID29_PASID_MAPPING__NO_INVALIDATION_MASK 0x40000000L 891e54294d6SYong Zhao #define ATC_VMID29_PASID_MAPPING__VALID_MASK 0x80000000L 892e54294d6SYong Zhao //ATC_VMID30_PASID_MAPPING 893e54294d6SYong Zhao #define ATC_VMID30_PASID_MAPPING__PASID__SHIFT 0x0 894e54294d6SYong Zhao #define ATC_VMID30_PASID_MAPPING__NO_INVALIDATION__SHIFT 0x1e 895e54294d6SYong Zhao #define ATC_VMID30_PASID_MAPPING__VALID__SHIFT 0x1f 896e54294d6SYong Zhao #define ATC_VMID30_PASID_MAPPING__PASID_MASK 0x0000FFFFL 897e54294d6SYong Zhao #define ATC_VMID30_PASID_MAPPING__NO_INVALIDATION_MASK 0x40000000L 898e54294d6SYong Zhao #define ATC_VMID30_PASID_MAPPING__VALID_MASK 0x80000000L 899e54294d6SYong Zhao //ATC_VMID31_PASID_MAPPING 900e54294d6SYong Zhao #define ATC_VMID31_PASID_MAPPING__PASID__SHIFT 0x0 901e54294d6SYong Zhao #define ATC_VMID31_PASID_MAPPING__NO_INVALIDATION__SHIFT 0x1e 902e54294d6SYong Zhao #define ATC_VMID31_PASID_MAPPING__VALID__SHIFT 0x1f 903e54294d6SYong Zhao #define ATC_VMID31_PASID_MAPPING__PASID_MASK 0x0000FFFFL 904e54294d6SYong Zhao #define ATC_VMID31_PASID_MAPPING__NO_INVALIDATION_MASK 0x40000000L 905e54294d6SYong Zhao #define ATC_VMID31_PASID_MAPPING__VALID_MASK 0x80000000L 906e54294d6SYong Zhao 907e54294d6SYong Zhao 908e54294d6SYong Zhao // addressBlock: athub_xpbdec 909e54294d6SYong Zhao //XPB_RTR_SRC_APRTR0 910e54294d6SYong Zhao #define XPB_RTR_SRC_APRTR0__BASE_ADDR__SHIFT 0x0 911e54294d6SYong Zhao #define XPB_RTR_SRC_APRTR0__BASE_ADDR_MASK 0x7FFFFFFFL 912e54294d6SYong Zhao //XPB_RTR_SRC_APRTR1 913e54294d6SYong Zhao #define XPB_RTR_SRC_APRTR1__BASE_ADDR__SHIFT 0x0 914e54294d6SYong Zhao #define XPB_RTR_SRC_APRTR1__BASE_ADDR_MASK 0x7FFFFFFFL 915e54294d6SYong Zhao //XPB_RTR_SRC_APRTR2 916e54294d6SYong Zhao #define XPB_RTR_SRC_APRTR2__BASE_ADDR__SHIFT 0x0 917e54294d6SYong Zhao #define XPB_RTR_SRC_APRTR2__BASE_ADDR_MASK 0x7FFFFFFFL 918e54294d6SYong Zhao //XPB_RTR_SRC_APRTR3 919e54294d6SYong Zhao #define XPB_RTR_SRC_APRTR3__BASE_ADDR__SHIFT 0x0 920e54294d6SYong Zhao #define XPB_RTR_SRC_APRTR3__BASE_ADDR_MASK 0x7FFFFFFFL 921e54294d6SYong Zhao //XPB_RTR_SRC_APRTR4 922e54294d6SYong Zhao #define XPB_RTR_SRC_APRTR4__BASE_ADDR__SHIFT 0x0 923e54294d6SYong Zhao #define XPB_RTR_SRC_APRTR4__BASE_ADDR_MASK 0x7FFFFFFFL 924e54294d6SYong Zhao //XPB_RTR_SRC_APRTR5 925e54294d6SYong Zhao #define XPB_RTR_SRC_APRTR5__BASE_ADDR__SHIFT 0x0 926e54294d6SYong Zhao #define XPB_RTR_SRC_APRTR5__BASE_ADDR_MASK 0x7FFFFFFFL 927e54294d6SYong Zhao //XPB_RTR_SRC_APRTR6 928e54294d6SYong Zhao #define XPB_RTR_SRC_APRTR6__BASE_ADDR__SHIFT 0x0 929e54294d6SYong Zhao #define XPB_RTR_SRC_APRTR6__BASE_ADDR_MASK 0x7FFFFFFFL 930e54294d6SYong Zhao //XPB_RTR_SRC_APRTR7 931e54294d6SYong Zhao #define XPB_RTR_SRC_APRTR7__BASE_ADDR__SHIFT 0x0 932e54294d6SYong Zhao #define XPB_RTR_SRC_APRTR7__BASE_ADDR_MASK 0x7FFFFFFFL 933e54294d6SYong Zhao //XPB_RTR_SRC_APRTR8 934e54294d6SYong Zhao #define XPB_RTR_SRC_APRTR8__BASE_ADDR__SHIFT 0x0 935e54294d6SYong Zhao #define XPB_RTR_SRC_APRTR8__BASE_ADDR_MASK 0x7FFFFFFFL 936e54294d6SYong Zhao //XPB_RTR_SRC_APRTR9 937e54294d6SYong Zhao #define XPB_RTR_SRC_APRTR9__BASE_ADDR__SHIFT 0x0 938e54294d6SYong Zhao #define XPB_RTR_SRC_APRTR9__BASE_ADDR_MASK 0x7FFFFFFFL 939e54294d6SYong Zhao //XPB_RTR_SRC_APRTR10 940e54294d6SYong Zhao #define XPB_RTR_SRC_APRTR10__BASE_ADDR__SHIFT 0x0 941e54294d6SYong Zhao #define XPB_RTR_SRC_APRTR10__BASE_ADDR_MASK 0x7FFFFFFFL 942e54294d6SYong Zhao //XPB_RTR_SRC_APRTR11 943e54294d6SYong Zhao #define XPB_RTR_SRC_APRTR11__BASE_ADDR__SHIFT 0x0 944e54294d6SYong Zhao #define XPB_RTR_SRC_APRTR11__BASE_ADDR_MASK 0x7FFFFFFFL 945e54294d6SYong Zhao //XPB_RTR_SRC_APRTR12 946e54294d6SYong Zhao #define XPB_RTR_SRC_APRTR12__BASE_ADDR__SHIFT 0x0 947e54294d6SYong Zhao #define XPB_RTR_SRC_APRTR12__BASE_ADDR_MASK 0x7FFFFFFFL 948e54294d6SYong Zhao //XPB_RTR_SRC_APRTR13 949e54294d6SYong Zhao #define XPB_RTR_SRC_APRTR13__BASE_ADDR__SHIFT 0x0 950e54294d6SYong Zhao #define XPB_RTR_SRC_APRTR13__BASE_ADDR_MASK 0x7FFFFFFFL 951e54294d6SYong Zhao //XPB_RTR_DEST_MAP0 952e54294d6SYong Zhao #define XPB_RTR_DEST_MAP0__NMR__SHIFT 0x0 953e54294d6SYong Zhao #define XPB_RTR_DEST_MAP0__DEST_OFFSET__SHIFT 0x1 954e54294d6SYong Zhao #define XPB_RTR_DEST_MAP0__DEST_SEL__SHIFT 0x14 955e54294d6SYong Zhao #define XPB_RTR_DEST_MAP0__DEST_SEL_RPB__SHIFT 0x18 956e54294d6SYong Zhao #define XPB_RTR_DEST_MAP0__SIDE_OK__SHIFT 0x19 957e54294d6SYong Zhao #define XPB_RTR_DEST_MAP0__APRTR_SIZE__SHIFT 0x1a 958e54294d6SYong Zhao #define XPB_RTR_DEST_MAP0__NMR_MASK 0x00000001L 959e54294d6SYong Zhao #define XPB_RTR_DEST_MAP0__DEST_OFFSET_MASK 0x000FFFFEL 960e54294d6SYong Zhao #define XPB_RTR_DEST_MAP0__DEST_SEL_MASK 0x00F00000L 961e54294d6SYong Zhao #define XPB_RTR_DEST_MAP0__DEST_SEL_RPB_MASK 0x01000000L 962e54294d6SYong Zhao #define XPB_RTR_DEST_MAP0__SIDE_OK_MASK 0x02000000L 963e54294d6SYong Zhao #define XPB_RTR_DEST_MAP0__APRTR_SIZE_MASK 0x7C000000L 964e54294d6SYong Zhao //XPB_RTR_DEST_MAP1 965e54294d6SYong Zhao #define XPB_RTR_DEST_MAP1__NMR__SHIFT 0x0 966e54294d6SYong Zhao #define XPB_RTR_DEST_MAP1__DEST_OFFSET__SHIFT 0x1 967e54294d6SYong Zhao #define XPB_RTR_DEST_MAP1__DEST_SEL__SHIFT 0x14 968e54294d6SYong Zhao #define XPB_RTR_DEST_MAP1__DEST_SEL_RPB__SHIFT 0x18 969e54294d6SYong Zhao #define XPB_RTR_DEST_MAP1__SIDE_OK__SHIFT 0x19 970e54294d6SYong Zhao #define XPB_RTR_DEST_MAP1__APRTR_SIZE__SHIFT 0x1a 971e54294d6SYong Zhao #define XPB_RTR_DEST_MAP1__NMR_MASK 0x00000001L 972e54294d6SYong Zhao #define XPB_RTR_DEST_MAP1__DEST_OFFSET_MASK 0x000FFFFEL 973e54294d6SYong Zhao #define XPB_RTR_DEST_MAP1__DEST_SEL_MASK 0x00F00000L 974e54294d6SYong Zhao #define XPB_RTR_DEST_MAP1__DEST_SEL_RPB_MASK 0x01000000L 975e54294d6SYong Zhao #define XPB_RTR_DEST_MAP1__SIDE_OK_MASK 0x02000000L 976e54294d6SYong Zhao #define XPB_RTR_DEST_MAP1__APRTR_SIZE_MASK 0x7C000000L 977e54294d6SYong Zhao //XPB_RTR_DEST_MAP2 978e54294d6SYong Zhao #define XPB_RTR_DEST_MAP2__NMR__SHIFT 0x0 979e54294d6SYong Zhao #define XPB_RTR_DEST_MAP2__DEST_OFFSET__SHIFT 0x1 980e54294d6SYong Zhao #define XPB_RTR_DEST_MAP2__DEST_SEL__SHIFT 0x14 981e54294d6SYong Zhao #define XPB_RTR_DEST_MAP2__DEST_SEL_RPB__SHIFT 0x18 982e54294d6SYong Zhao #define XPB_RTR_DEST_MAP2__SIDE_OK__SHIFT 0x19 983e54294d6SYong Zhao #define XPB_RTR_DEST_MAP2__APRTR_SIZE__SHIFT 0x1a 984e54294d6SYong Zhao #define XPB_RTR_DEST_MAP2__NMR_MASK 0x00000001L 985e54294d6SYong Zhao #define XPB_RTR_DEST_MAP2__DEST_OFFSET_MASK 0x000FFFFEL 986e54294d6SYong Zhao #define XPB_RTR_DEST_MAP2__DEST_SEL_MASK 0x00F00000L 987e54294d6SYong Zhao #define XPB_RTR_DEST_MAP2__DEST_SEL_RPB_MASK 0x01000000L 988e54294d6SYong Zhao #define XPB_RTR_DEST_MAP2__SIDE_OK_MASK 0x02000000L 989e54294d6SYong Zhao #define XPB_RTR_DEST_MAP2__APRTR_SIZE_MASK 0x7C000000L 990e54294d6SYong Zhao //XPB_RTR_DEST_MAP3 991e54294d6SYong Zhao #define XPB_RTR_DEST_MAP3__NMR__SHIFT 0x0 992e54294d6SYong Zhao #define XPB_RTR_DEST_MAP3__DEST_OFFSET__SHIFT 0x1 993e54294d6SYong Zhao #define XPB_RTR_DEST_MAP3__DEST_SEL__SHIFT 0x14 994e54294d6SYong Zhao #define XPB_RTR_DEST_MAP3__DEST_SEL_RPB__SHIFT 0x18 995e54294d6SYong Zhao #define XPB_RTR_DEST_MAP3__SIDE_OK__SHIFT 0x19 996e54294d6SYong Zhao #define XPB_RTR_DEST_MAP3__APRTR_SIZE__SHIFT 0x1a 997e54294d6SYong Zhao #define XPB_RTR_DEST_MAP3__NMR_MASK 0x00000001L 998e54294d6SYong Zhao #define XPB_RTR_DEST_MAP3__DEST_OFFSET_MASK 0x000FFFFEL 999e54294d6SYong Zhao #define XPB_RTR_DEST_MAP3__DEST_SEL_MASK 0x00F00000L 1000e54294d6SYong Zhao #define XPB_RTR_DEST_MAP3__DEST_SEL_RPB_MASK 0x01000000L 1001e54294d6SYong Zhao #define XPB_RTR_DEST_MAP3__SIDE_OK_MASK 0x02000000L 1002e54294d6SYong Zhao #define XPB_RTR_DEST_MAP3__APRTR_SIZE_MASK 0x7C000000L 1003e54294d6SYong Zhao //XPB_RTR_DEST_MAP4 1004e54294d6SYong Zhao #define XPB_RTR_DEST_MAP4__NMR__SHIFT 0x0 1005e54294d6SYong Zhao #define XPB_RTR_DEST_MAP4__DEST_OFFSET__SHIFT 0x1 1006e54294d6SYong Zhao #define XPB_RTR_DEST_MAP4__DEST_SEL__SHIFT 0x14 1007e54294d6SYong Zhao #define XPB_RTR_DEST_MAP4__DEST_SEL_RPB__SHIFT 0x18 1008e54294d6SYong Zhao #define XPB_RTR_DEST_MAP4__SIDE_OK__SHIFT 0x19 1009e54294d6SYong Zhao #define XPB_RTR_DEST_MAP4__APRTR_SIZE__SHIFT 0x1a 1010e54294d6SYong Zhao #define XPB_RTR_DEST_MAP4__NMR_MASK 0x00000001L 1011e54294d6SYong Zhao #define XPB_RTR_DEST_MAP4__DEST_OFFSET_MASK 0x000FFFFEL 1012e54294d6SYong Zhao #define XPB_RTR_DEST_MAP4__DEST_SEL_MASK 0x00F00000L 1013e54294d6SYong Zhao #define XPB_RTR_DEST_MAP4__DEST_SEL_RPB_MASK 0x01000000L 1014e54294d6SYong Zhao #define XPB_RTR_DEST_MAP4__SIDE_OK_MASK 0x02000000L 1015e54294d6SYong Zhao #define XPB_RTR_DEST_MAP4__APRTR_SIZE_MASK 0x7C000000L 1016e54294d6SYong Zhao //XPB_RTR_DEST_MAP5 1017e54294d6SYong Zhao #define XPB_RTR_DEST_MAP5__NMR__SHIFT 0x0 1018e54294d6SYong Zhao #define XPB_RTR_DEST_MAP5__DEST_OFFSET__SHIFT 0x1 1019e54294d6SYong Zhao #define XPB_RTR_DEST_MAP5__DEST_SEL__SHIFT 0x14 1020e54294d6SYong Zhao #define XPB_RTR_DEST_MAP5__DEST_SEL_RPB__SHIFT 0x18 1021e54294d6SYong Zhao #define XPB_RTR_DEST_MAP5__SIDE_OK__SHIFT 0x19 1022e54294d6SYong Zhao #define XPB_RTR_DEST_MAP5__APRTR_SIZE__SHIFT 0x1a 1023e54294d6SYong Zhao #define XPB_RTR_DEST_MAP5__NMR_MASK 0x00000001L 1024e54294d6SYong Zhao #define XPB_RTR_DEST_MAP5__DEST_OFFSET_MASK 0x000FFFFEL 1025e54294d6SYong Zhao #define XPB_RTR_DEST_MAP5__DEST_SEL_MASK 0x00F00000L 1026e54294d6SYong Zhao #define XPB_RTR_DEST_MAP5__DEST_SEL_RPB_MASK 0x01000000L 1027e54294d6SYong Zhao #define XPB_RTR_DEST_MAP5__SIDE_OK_MASK 0x02000000L 1028e54294d6SYong Zhao #define XPB_RTR_DEST_MAP5__APRTR_SIZE_MASK 0x7C000000L 1029e54294d6SYong Zhao //XPB_RTR_DEST_MAP6 1030e54294d6SYong Zhao #define XPB_RTR_DEST_MAP6__NMR__SHIFT 0x0 1031e54294d6SYong Zhao #define XPB_RTR_DEST_MAP6__DEST_OFFSET__SHIFT 0x1 1032e54294d6SYong Zhao #define XPB_RTR_DEST_MAP6__DEST_SEL__SHIFT 0x14 1033e54294d6SYong Zhao #define XPB_RTR_DEST_MAP6__DEST_SEL_RPB__SHIFT 0x18 1034e54294d6SYong Zhao #define XPB_RTR_DEST_MAP6__SIDE_OK__SHIFT 0x19 1035e54294d6SYong Zhao #define XPB_RTR_DEST_MAP6__APRTR_SIZE__SHIFT 0x1a 1036e54294d6SYong Zhao #define XPB_RTR_DEST_MAP6__NMR_MASK 0x00000001L 1037e54294d6SYong Zhao #define XPB_RTR_DEST_MAP6__DEST_OFFSET_MASK 0x000FFFFEL 1038e54294d6SYong Zhao #define XPB_RTR_DEST_MAP6__DEST_SEL_MASK 0x00F00000L 1039e54294d6SYong Zhao #define XPB_RTR_DEST_MAP6__DEST_SEL_RPB_MASK 0x01000000L 1040e54294d6SYong Zhao #define XPB_RTR_DEST_MAP6__SIDE_OK_MASK 0x02000000L 1041e54294d6SYong Zhao #define XPB_RTR_DEST_MAP6__APRTR_SIZE_MASK 0x7C000000L 1042e54294d6SYong Zhao //XPB_RTR_DEST_MAP7 1043e54294d6SYong Zhao #define XPB_RTR_DEST_MAP7__NMR__SHIFT 0x0 1044e54294d6SYong Zhao #define XPB_RTR_DEST_MAP7__DEST_OFFSET__SHIFT 0x1 1045e54294d6SYong Zhao #define XPB_RTR_DEST_MAP7__DEST_SEL__SHIFT 0x14 1046e54294d6SYong Zhao #define XPB_RTR_DEST_MAP7__DEST_SEL_RPB__SHIFT 0x18 1047e54294d6SYong Zhao #define XPB_RTR_DEST_MAP7__SIDE_OK__SHIFT 0x19 1048e54294d6SYong Zhao #define XPB_RTR_DEST_MAP7__APRTR_SIZE__SHIFT 0x1a 1049e54294d6SYong Zhao #define XPB_RTR_DEST_MAP7__NMR_MASK 0x00000001L 1050e54294d6SYong Zhao #define XPB_RTR_DEST_MAP7__DEST_OFFSET_MASK 0x000FFFFEL 1051e54294d6SYong Zhao #define XPB_RTR_DEST_MAP7__DEST_SEL_MASK 0x00F00000L 1052e54294d6SYong Zhao #define XPB_RTR_DEST_MAP7__DEST_SEL_RPB_MASK 0x01000000L 1053e54294d6SYong Zhao #define XPB_RTR_DEST_MAP7__SIDE_OK_MASK 0x02000000L 1054e54294d6SYong Zhao #define XPB_RTR_DEST_MAP7__APRTR_SIZE_MASK 0x7C000000L 1055e54294d6SYong Zhao //XPB_RTR_DEST_MAP8 1056e54294d6SYong Zhao #define XPB_RTR_DEST_MAP8__NMR__SHIFT 0x0 1057e54294d6SYong Zhao #define XPB_RTR_DEST_MAP8__DEST_OFFSET__SHIFT 0x1 1058e54294d6SYong Zhao #define XPB_RTR_DEST_MAP8__DEST_SEL__SHIFT 0x14 1059e54294d6SYong Zhao #define XPB_RTR_DEST_MAP8__DEST_SEL_RPB__SHIFT 0x18 1060e54294d6SYong Zhao #define XPB_RTR_DEST_MAP8__SIDE_OK__SHIFT 0x19 1061e54294d6SYong Zhao #define XPB_RTR_DEST_MAP8__APRTR_SIZE__SHIFT 0x1a 1062e54294d6SYong Zhao #define XPB_RTR_DEST_MAP8__NMR_MASK 0x00000001L 1063e54294d6SYong Zhao #define XPB_RTR_DEST_MAP8__DEST_OFFSET_MASK 0x000FFFFEL 1064e54294d6SYong Zhao #define XPB_RTR_DEST_MAP8__DEST_SEL_MASK 0x00F00000L 1065e54294d6SYong Zhao #define XPB_RTR_DEST_MAP8__DEST_SEL_RPB_MASK 0x01000000L 1066e54294d6SYong Zhao #define XPB_RTR_DEST_MAP8__SIDE_OK_MASK 0x02000000L 1067e54294d6SYong Zhao #define XPB_RTR_DEST_MAP8__APRTR_SIZE_MASK 0x7C000000L 1068e54294d6SYong Zhao //XPB_RTR_DEST_MAP9 1069e54294d6SYong Zhao #define XPB_RTR_DEST_MAP9__NMR__SHIFT 0x0 1070e54294d6SYong Zhao #define XPB_RTR_DEST_MAP9__DEST_OFFSET__SHIFT 0x1 1071e54294d6SYong Zhao #define XPB_RTR_DEST_MAP9__DEST_SEL__SHIFT 0x14 1072e54294d6SYong Zhao #define XPB_RTR_DEST_MAP9__DEST_SEL_RPB__SHIFT 0x18 1073e54294d6SYong Zhao #define XPB_RTR_DEST_MAP9__SIDE_OK__SHIFT 0x19 1074e54294d6SYong Zhao #define XPB_RTR_DEST_MAP9__APRTR_SIZE__SHIFT 0x1a 1075e54294d6SYong Zhao #define XPB_RTR_DEST_MAP9__NMR_MASK 0x00000001L 1076e54294d6SYong Zhao #define XPB_RTR_DEST_MAP9__DEST_OFFSET_MASK 0x000FFFFEL 1077e54294d6SYong Zhao #define XPB_RTR_DEST_MAP9__DEST_SEL_MASK 0x00F00000L 1078e54294d6SYong Zhao #define XPB_RTR_DEST_MAP9__DEST_SEL_RPB_MASK 0x01000000L 1079e54294d6SYong Zhao #define XPB_RTR_DEST_MAP9__SIDE_OK_MASK 0x02000000L 1080e54294d6SYong Zhao #define XPB_RTR_DEST_MAP9__APRTR_SIZE_MASK 0x7C000000L 1081e54294d6SYong Zhao //XPB_RTR_DEST_MAP10 1082e54294d6SYong Zhao #define XPB_RTR_DEST_MAP10__NMR__SHIFT 0x0 1083e54294d6SYong Zhao #define XPB_RTR_DEST_MAP10__DEST_OFFSET__SHIFT 0x1 1084e54294d6SYong Zhao #define XPB_RTR_DEST_MAP10__DEST_SEL__SHIFT 0x14 1085e54294d6SYong Zhao #define XPB_RTR_DEST_MAP10__DEST_SEL_RPB__SHIFT 0x18 1086e54294d6SYong Zhao #define XPB_RTR_DEST_MAP10__SIDE_OK__SHIFT 0x19 1087e54294d6SYong Zhao #define XPB_RTR_DEST_MAP10__APRTR_SIZE__SHIFT 0x1a 1088e54294d6SYong Zhao #define XPB_RTR_DEST_MAP10__NMR_MASK 0x00000001L 1089e54294d6SYong Zhao #define XPB_RTR_DEST_MAP10__DEST_OFFSET_MASK 0x000FFFFEL 1090e54294d6SYong Zhao #define XPB_RTR_DEST_MAP10__DEST_SEL_MASK 0x00F00000L 1091e54294d6SYong Zhao #define XPB_RTR_DEST_MAP10__DEST_SEL_RPB_MASK 0x01000000L 1092e54294d6SYong Zhao #define XPB_RTR_DEST_MAP10__SIDE_OK_MASK 0x02000000L 1093e54294d6SYong Zhao #define XPB_RTR_DEST_MAP10__APRTR_SIZE_MASK 0x7C000000L 1094e54294d6SYong Zhao //XPB_RTR_DEST_MAP11 1095e54294d6SYong Zhao #define XPB_RTR_DEST_MAP11__NMR__SHIFT 0x0 1096e54294d6SYong Zhao #define XPB_RTR_DEST_MAP11__DEST_OFFSET__SHIFT 0x1 1097e54294d6SYong Zhao #define XPB_RTR_DEST_MAP11__DEST_SEL__SHIFT 0x14 1098e54294d6SYong Zhao #define XPB_RTR_DEST_MAP11__DEST_SEL_RPB__SHIFT 0x18 1099e54294d6SYong Zhao #define XPB_RTR_DEST_MAP11__SIDE_OK__SHIFT 0x19 1100e54294d6SYong Zhao #define XPB_RTR_DEST_MAP11__APRTR_SIZE__SHIFT 0x1a 1101e54294d6SYong Zhao #define XPB_RTR_DEST_MAP11__NMR_MASK 0x00000001L 1102e54294d6SYong Zhao #define XPB_RTR_DEST_MAP11__DEST_OFFSET_MASK 0x000FFFFEL 1103e54294d6SYong Zhao #define XPB_RTR_DEST_MAP11__DEST_SEL_MASK 0x00F00000L 1104e54294d6SYong Zhao #define XPB_RTR_DEST_MAP11__DEST_SEL_RPB_MASK 0x01000000L 1105e54294d6SYong Zhao #define XPB_RTR_DEST_MAP11__SIDE_OK_MASK 0x02000000L 1106e54294d6SYong Zhao #define XPB_RTR_DEST_MAP11__APRTR_SIZE_MASK 0x7C000000L 1107e54294d6SYong Zhao //XPB_RTR_DEST_MAP12 1108e54294d6SYong Zhao #define XPB_RTR_DEST_MAP12__NMR__SHIFT 0x0 1109e54294d6SYong Zhao #define XPB_RTR_DEST_MAP12__DEST_OFFSET__SHIFT 0x1 1110e54294d6SYong Zhao #define XPB_RTR_DEST_MAP12__DEST_SEL__SHIFT 0x14 1111e54294d6SYong Zhao #define XPB_RTR_DEST_MAP12__DEST_SEL_RPB__SHIFT 0x18 1112e54294d6SYong Zhao #define XPB_RTR_DEST_MAP12__SIDE_OK__SHIFT 0x19 1113e54294d6SYong Zhao #define XPB_RTR_DEST_MAP12__APRTR_SIZE__SHIFT 0x1a 1114e54294d6SYong Zhao #define XPB_RTR_DEST_MAP12__NMR_MASK 0x00000001L 1115e54294d6SYong Zhao #define XPB_RTR_DEST_MAP12__DEST_OFFSET_MASK 0x000FFFFEL 1116e54294d6SYong Zhao #define XPB_RTR_DEST_MAP12__DEST_SEL_MASK 0x00F00000L 1117e54294d6SYong Zhao #define XPB_RTR_DEST_MAP12__DEST_SEL_RPB_MASK 0x01000000L 1118e54294d6SYong Zhao #define XPB_RTR_DEST_MAP12__SIDE_OK_MASK 0x02000000L 1119e54294d6SYong Zhao #define XPB_RTR_DEST_MAP12__APRTR_SIZE_MASK 0x7C000000L 1120e54294d6SYong Zhao //XPB_RTR_DEST_MAP13 1121e54294d6SYong Zhao #define XPB_RTR_DEST_MAP13__NMR__SHIFT 0x0 1122e54294d6SYong Zhao #define XPB_RTR_DEST_MAP13__DEST_OFFSET__SHIFT 0x1 1123e54294d6SYong Zhao #define XPB_RTR_DEST_MAP13__DEST_SEL__SHIFT 0x14 1124e54294d6SYong Zhao #define XPB_RTR_DEST_MAP13__DEST_SEL_RPB__SHIFT 0x18 1125e54294d6SYong Zhao #define XPB_RTR_DEST_MAP13__SIDE_OK__SHIFT 0x19 1126e54294d6SYong Zhao #define XPB_RTR_DEST_MAP13__APRTR_SIZE__SHIFT 0x1a 1127e54294d6SYong Zhao #define XPB_RTR_DEST_MAP13__NMR_MASK 0x00000001L 1128e54294d6SYong Zhao #define XPB_RTR_DEST_MAP13__DEST_OFFSET_MASK 0x000FFFFEL 1129e54294d6SYong Zhao #define XPB_RTR_DEST_MAP13__DEST_SEL_MASK 0x00F00000L 1130e54294d6SYong Zhao #define XPB_RTR_DEST_MAP13__DEST_SEL_RPB_MASK 0x01000000L 1131e54294d6SYong Zhao #define XPB_RTR_DEST_MAP13__SIDE_OK_MASK 0x02000000L 1132e54294d6SYong Zhao #define XPB_RTR_DEST_MAP13__APRTR_SIZE_MASK 0x7C000000L 1133e54294d6SYong Zhao //XPB_CLG_CFG0 1134e54294d6SYong Zhao #define XPB_CLG_CFG0__WCB_NUM__SHIFT 0x0 1135e54294d6SYong Zhao #define XPB_CLG_CFG0__LB_TYPE__SHIFT 0x4 1136e54294d6SYong Zhao #define XPB_CLG_CFG0__P2P_BAR__SHIFT 0x7 1137e54294d6SYong Zhao #define XPB_CLG_CFG0__HOST_FLUSH__SHIFT 0xa 1138e54294d6SYong Zhao #define XPB_CLG_CFG0__SIDE_FLUSH__SHIFT 0xe 1139e54294d6SYong Zhao #define XPB_CLG_CFG0__WCB_NUM_MASK 0x0000000FL 1140e54294d6SYong Zhao #define XPB_CLG_CFG0__LB_TYPE_MASK 0x00000070L 1141e54294d6SYong Zhao #define XPB_CLG_CFG0__P2P_BAR_MASK 0x00000380L 1142e54294d6SYong Zhao #define XPB_CLG_CFG0__HOST_FLUSH_MASK 0x00003C00L 1143e54294d6SYong Zhao #define XPB_CLG_CFG0__SIDE_FLUSH_MASK 0x0003C000L 1144e54294d6SYong Zhao //XPB_CLG_CFG1 1145e54294d6SYong Zhao #define XPB_CLG_CFG1__WCB_NUM__SHIFT 0x0 1146e54294d6SYong Zhao #define XPB_CLG_CFG1__LB_TYPE__SHIFT 0x4 1147e54294d6SYong Zhao #define XPB_CLG_CFG1__P2P_BAR__SHIFT 0x7 1148e54294d6SYong Zhao #define XPB_CLG_CFG1__HOST_FLUSH__SHIFT 0xa 1149e54294d6SYong Zhao #define XPB_CLG_CFG1__SIDE_FLUSH__SHIFT 0xe 1150e54294d6SYong Zhao #define XPB_CLG_CFG1__WCB_NUM_MASK 0x0000000FL 1151e54294d6SYong Zhao #define XPB_CLG_CFG1__LB_TYPE_MASK 0x00000070L 1152e54294d6SYong Zhao #define XPB_CLG_CFG1__P2P_BAR_MASK 0x00000380L 1153e54294d6SYong Zhao #define XPB_CLG_CFG1__HOST_FLUSH_MASK 0x00003C00L 1154e54294d6SYong Zhao #define XPB_CLG_CFG1__SIDE_FLUSH_MASK 0x0003C000L 1155e54294d6SYong Zhao //XPB_CLG_CFG2 1156e54294d6SYong Zhao #define XPB_CLG_CFG2__WCB_NUM__SHIFT 0x0 1157e54294d6SYong Zhao #define XPB_CLG_CFG2__LB_TYPE__SHIFT 0x4 1158e54294d6SYong Zhao #define XPB_CLG_CFG2__P2P_BAR__SHIFT 0x7 1159e54294d6SYong Zhao #define XPB_CLG_CFG2__HOST_FLUSH__SHIFT 0xa 1160e54294d6SYong Zhao #define XPB_CLG_CFG2__SIDE_FLUSH__SHIFT 0xe 1161e54294d6SYong Zhao #define XPB_CLG_CFG2__WCB_NUM_MASK 0x0000000FL 1162e54294d6SYong Zhao #define XPB_CLG_CFG2__LB_TYPE_MASK 0x00000070L 1163e54294d6SYong Zhao #define XPB_CLG_CFG2__P2P_BAR_MASK 0x00000380L 1164e54294d6SYong Zhao #define XPB_CLG_CFG2__HOST_FLUSH_MASK 0x00003C00L 1165e54294d6SYong Zhao #define XPB_CLG_CFG2__SIDE_FLUSH_MASK 0x0003C000L 1166e54294d6SYong Zhao //XPB_CLG_CFG3 1167e54294d6SYong Zhao #define XPB_CLG_CFG3__WCB_NUM__SHIFT 0x0 1168e54294d6SYong Zhao #define XPB_CLG_CFG3__LB_TYPE__SHIFT 0x4 1169e54294d6SYong Zhao #define XPB_CLG_CFG3__P2P_BAR__SHIFT 0x7 1170e54294d6SYong Zhao #define XPB_CLG_CFG3__HOST_FLUSH__SHIFT 0xa 1171e54294d6SYong Zhao #define XPB_CLG_CFG3__SIDE_FLUSH__SHIFT 0xe 1172e54294d6SYong Zhao #define XPB_CLG_CFG3__WCB_NUM_MASK 0x0000000FL 1173e54294d6SYong Zhao #define XPB_CLG_CFG3__LB_TYPE_MASK 0x00000070L 1174e54294d6SYong Zhao #define XPB_CLG_CFG3__P2P_BAR_MASK 0x00000380L 1175e54294d6SYong Zhao #define XPB_CLG_CFG3__HOST_FLUSH_MASK 0x00003C00L 1176e54294d6SYong Zhao #define XPB_CLG_CFG3__SIDE_FLUSH_MASK 0x0003C000L 1177e54294d6SYong Zhao //XPB_CLG_CFG4 1178e54294d6SYong Zhao #define XPB_CLG_CFG4__WCB_NUM__SHIFT 0x0 1179e54294d6SYong Zhao #define XPB_CLG_CFG4__LB_TYPE__SHIFT 0x4 1180e54294d6SYong Zhao #define XPB_CLG_CFG4__P2P_BAR__SHIFT 0x7 1181e54294d6SYong Zhao #define XPB_CLG_CFG4__HOST_FLUSH__SHIFT 0xa 1182e54294d6SYong Zhao #define XPB_CLG_CFG4__SIDE_FLUSH__SHIFT 0xe 1183e54294d6SYong Zhao #define XPB_CLG_CFG4__WCB_NUM_MASK 0x0000000FL 1184e54294d6SYong Zhao #define XPB_CLG_CFG4__LB_TYPE_MASK 0x00000070L 1185e54294d6SYong Zhao #define XPB_CLG_CFG4__P2P_BAR_MASK 0x00000380L 1186e54294d6SYong Zhao #define XPB_CLG_CFG4__HOST_FLUSH_MASK 0x00003C00L 1187e54294d6SYong Zhao #define XPB_CLG_CFG4__SIDE_FLUSH_MASK 0x0003C000L 1188e54294d6SYong Zhao //XPB_CLG_CFG5 1189e54294d6SYong Zhao #define XPB_CLG_CFG5__WCB_NUM__SHIFT 0x0 1190e54294d6SYong Zhao #define XPB_CLG_CFG5__LB_TYPE__SHIFT 0x4 1191e54294d6SYong Zhao #define XPB_CLG_CFG5__P2P_BAR__SHIFT 0x7 1192e54294d6SYong Zhao #define XPB_CLG_CFG5__HOST_FLUSH__SHIFT 0xa 1193e54294d6SYong Zhao #define XPB_CLG_CFG5__SIDE_FLUSH__SHIFT 0xe 1194e54294d6SYong Zhao #define XPB_CLG_CFG5__WCB_NUM_MASK 0x0000000FL 1195e54294d6SYong Zhao #define XPB_CLG_CFG5__LB_TYPE_MASK 0x00000070L 1196e54294d6SYong Zhao #define XPB_CLG_CFG5__P2P_BAR_MASK 0x00000380L 1197e54294d6SYong Zhao #define XPB_CLG_CFG5__HOST_FLUSH_MASK 0x00003C00L 1198e54294d6SYong Zhao #define XPB_CLG_CFG5__SIDE_FLUSH_MASK 0x0003C000L 1199e54294d6SYong Zhao //XPB_CLG_CFG6 1200e54294d6SYong Zhao #define XPB_CLG_CFG6__WCB_NUM__SHIFT 0x0 1201e54294d6SYong Zhao #define XPB_CLG_CFG6__LB_TYPE__SHIFT 0x4 1202e54294d6SYong Zhao #define XPB_CLG_CFG6__P2P_BAR__SHIFT 0x7 1203e54294d6SYong Zhao #define XPB_CLG_CFG6__HOST_FLUSH__SHIFT 0xa 1204e54294d6SYong Zhao #define XPB_CLG_CFG6__SIDE_FLUSH__SHIFT 0xe 1205e54294d6SYong Zhao #define XPB_CLG_CFG6__WCB_NUM_MASK 0x0000000FL 1206e54294d6SYong Zhao #define XPB_CLG_CFG6__LB_TYPE_MASK 0x00000070L 1207e54294d6SYong Zhao #define XPB_CLG_CFG6__P2P_BAR_MASK 0x00000380L 1208e54294d6SYong Zhao #define XPB_CLG_CFG6__HOST_FLUSH_MASK 0x00003C00L 1209e54294d6SYong Zhao #define XPB_CLG_CFG6__SIDE_FLUSH_MASK 0x0003C000L 1210e54294d6SYong Zhao //XPB_CLG_CFG7 1211e54294d6SYong Zhao #define XPB_CLG_CFG7__WCB_NUM__SHIFT 0x0 1212e54294d6SYong Zhao #define XPB_CLG_CFG7__LB_TYPE__SHIFT 0x4 1213e54294d6SYong Zhao #define XPB_CLG_CFG7__P2P_BAR__SHIFT 0x7 1214e54294d6SYong Zhao #define XPB_CLG_CFG7__HOST_FLUSH__SHIFT 0xa 1215e54294d6SYong Zhao #define XPB_CLG_CFG7__SIDE_FLUSH__SHIFT 0xe 1216e54294d6SYong Zhao #define XPB_CLG_CFG7__WCB_NUM_MASK 0x0000000FL 1217e54294d6SYong Zhao #define XPB_CLG_CFG7__LB_TYPE_MASK 0x00000070L 1218e54294d6SYong Zhao #define XPB_CLG_CFG7__P2P_BAR_MASK 0x00000380L 1219e54294d6SYong Zhao #define XPB_CLG_CFG7__HOST_FLUSH_MASK 0x00003C00L 1220e54294d6SYong Zhao #define XPB_CLG_CFG7__SIDE_FLUSH_MASK 0x0003C000L 1221e54294d6SYong Zhao //XPB_CLG_EXTRA 1222e54294d6SYong Zhao #define XPB_CLG_EXTRA__CMP0_HIGH__SHIFT 0x0 1223e54294d6SYong Zhao #define XPB_CLG_EXTRA__CMP0_LOW__SHIFT 0x6 1224e54294d6SYong Zhao #define XPB_CLG_EXTRA__VLD0__SHIFT 0xb 1225e54294d6SYong Zhao #define XPB_CLG_EXTRA__CLG0_NUM__SHIFT 0xc 1226e54294d6SYong Zhao #define XPB_CLG_EXTRA__CMP1_HIGH__SHIFT 0xf 1227e54294d6SYong Zhao #define XPB_CLG_EXTRA__CMP1_LOW__SHIFT 0x15 1228e54294d6SYong Zhao #define XPB_CLG_EXTRA__VLD1__SHIFT 0x1a 1229e54294d6SYong Zhao #define XPB_CLG_EXTRA__CLG1_NUM__SHIFT 0x1b 1230e54294d6SYong Zhao #define XPB_CLG_EXTRA__CMP0_HIGH_MASK 0x0000003FL 1231e54294d6SYong Zhao #define XPB_CLG_EXTRA__CMP0_LOW_MASK 0x000007C0L 1232e54294d6SYong Zhao #define XPB_CLG_EXTRA__VLD0_MASK 0x00000800L 1233e54294d6SYong Zhao #define XPB_CLG_EXTRA__CLG0_NUM_MASK 0x00007000L 1234e54294d6SYong Zhao #define XPB_CLG_EXTRA__CMP1_HIGH_MASK 0x001F8000L 1235e54294d6SYong Zhao #define XPB_CLG_EXTRA__CMP1_LOW_MASK 0x03E00000L 1236e54294d6SYong Zhao #define XPB_CLG_EXTRA__VLD1_MASK 0x04000000L 1237e54294d6SYong Zhao #define XPB_CLG_EXTRA__CLG1_NUM_MASK 0x38000000L 1238e54294d6SYong Zhao //XPB_CLG_EXTRA_MSK 1239e54294d6SYong Zhao #define XPB_CLG_EXTRA_MSK__MSK0_HIGH__SHIFT 0x0 1240e54294d6SYong Zhao #define XPB_CLG_EXTRA_MSK__MSK0_LOW__SHIFT 0x6 1241e54294d6SYong Zhao #define XPB_CLG_EXTRA_MSK__MSK1_HIGH__SHIFT 0xb 1242e54294d6SYong Zhao #define XPB_CLG_EXTRA_MSK__MSK1_LOW__SHIFT 0x11 1243e54294d6SYong Zhao #define XPB_CLG_EXTRA_MSK__MSK0_HIGH_MASK 0x0000003FL 1244e54294d6SYong Zhao #define XPB_CLG_EXTRA_MSK__MSK0_LOW_MASK 0x000007C0L 1245e54294d6SYong Zhao #define XPB_CLG_EXTRA_MSK__MSK1_HIGH_MASK 0x0001F800L 1246e54294d6SYong Zhao #define XPB_CLG_EXTRA_MSK__MSK1_LOW_MASK 0x003E0000L 1247e54294d6SYong Zhao //XPB_LB_ADDR 1248e54294d6SYong Zhao #define XPB_LB_ADDR__CMP0__SHIFT 0x0 1249e54294d6SYong Zhao #define XPB_LB_ADDR__MASK0__SHIFT 0xa 1250e54294d6SYong Zhao #define XPB_LB_ADDR__CMP1__SHIFT 0x14 1251e54294d6SYong Zhao #define XPB_LB_ADDR__MASK1__SHIFT 0x1a 1252e54294d6SYong Zhao #define XPB_LB_ADDR__CMP0_MASK 0x000003FFL 1253e54294d6SYong Zhao #define XPB_LB_ADDR__MASK0_MASK 0x000FFC00L 1254e54294d6SYong Zhao #define XPB_LB_ADDR__CMP1_MASK 0x03F00000L 1255e54294d6SYong Zhao #define XPB_LB_ADDR__MASK1_MASK 0xFC000000L 1256e54294d6SYong Zhao //XPB_WCB_STS 1257e54294d6SYong Zhao #define XPB_WCB_STS__PBUF_VLD__SHIFT 0x0 1258e54294d6SYong Zhao #define XPB_WCB_STS__WCB_HST_DATA_BUF_CNT__SHIFT 0x10 1259e54294d6SYong Zhao #define XPB_WCB_STS__WCB_SID_DATA_BUF_CNT__SHIFT 0x17 1260e54294d6SYong Zhao #define XPB_WCB_STS__PBUF_VLD_MASK 0x0000FFFFL 1261e54294d6SYong Zhao #define XPB_WCB_STS__WCB_HST_DATA_BUF_CNT_MASK 0x007F0000L 1262e54294d6SYong Zhao #define XPB_WCB_STS__WCB_SID_DATA_BUF_CNT_MASK 0x3F800000L 1263e54294d6SYong Zhao //XPB_HST_CFG 1264e54294d6SYong Zhao #define XPB_HST_CFG__BAR_UP_WR_CMD__SHIFT 0x0 1265e54294d6SYong Zhao #define XPB_HST_CFG__BAR_UP_WR_CMD_MASK 0x00000001L 1266e54294d6SYong Zhao //XPB_P2P_BAR_CFG 1267e54294d6SYong Zhao #define XPB_P2P_BAR_CFG__ADDR_SIZE__SHIFT 0x0 1268e54294d6SYong Zhao #define XPB_P2P_BAR_CFG__SEND_BAR__SHIFT 0x4 1269e54294d6SYong Zhao #define XPB_P2P_BAR_CFG__SNOOP__SHIFT 0x6 1270e54294d6SYong Zhao #define XPB_P2P_BAR_CFG__SEND_DIS__SHIFT 0x7 1271e54294d6SYong Zhao #define XPB_P2P_BAR_CFG__COMPRESS_DIS__SHIFT 0x8 1272e54294d6SYong Zhao #define XPB_P2P_BAR_CFG__UPDATE_DIS__SHIFT 0x9 1273e54294d6SYong Zhao #define XPB_P2P_BAR_CFG__REGBAR_FROM_SYSBAR__SHIFT 0xa 1274e54294d6SYong Zhao #define XPB_P2P_BAR_CFG__RD_EN__SHIFT 0xb 1275e54294d6SYong Zhao #define XPB_P2P_BAR_CFG__ATC_TRANSLATED__SHIFT 0xc 1276e54294d6SYong Zhao #define XPB_P2P_BAR_CFG__ADDR_SIZE_MASK 0x0000000FL 1277e54294d6SYong Zhao #define XPB_P2P_BAR_CFG__SEND_BAR_MASK 0x00000030L 1278e54294d6SYong Zhao #define XPB_P2P_BAR_CFG__SNOOP_MASK 0x00000040L 1279e54294d6SYong Zhao #define XPB_P2P_BAR_CFG__SEND_DIS_MASK 0x00000080L 1280e54294d6SYong Zhao #define XPB_P2P_BAR_CFG__COMPRESS_DIS_MASK 0x00000100L 1281e54294d6SYong Zhao #define XPB_P2P_BAR_CFG__UPDATE_DIS_MASK 0x00000200L 1282e54294d6SYong Zhao #define XPB_P2P_BAR_CFG__REGBAR_FROM_SYSBAR_MASK 0x00000400L 1283e54294d6SYong Zhao #define XPB_P2P_BAR_CFG__RD_EN_MASK 0x00000800L 1284e54294d6SYong Zhao #define XPB_P2P_BAR_CFG__ATC_TRANSLATED_MASK 0x00001000L 1285e54294d6SYong Zhao //XPB_P2P_BAR0 1286e54294d6SYong Zhao #define XPB_P2P_BAR0__HOST_FLUSH__SHIFT 0x0 1287e54294d6SYong Zhao #define XPB_P2P_BAR0__REG_SYS_BAR__SHIFT 0x4 1288e54294d6SYong Zhao #define XPB_P2P_BAR0__MEM_SYS_BAR__SHIFT 0x8 1289e54294d6SYong Zhao #define XPB_P2P_BAR0__VALID__SHIFT 0xc 1290e54294d6SYong Zhao #define XPB_P2P_BAR0__SEND_DIS__SHIFT 0xd 1291e54294d6SYong Zhao #define XPB_P2P_BAR0__COMPRESS_DIS__SHIFT 0xe 1292e54294d6SYong Zhao #define XPB_P2P_BAR0__RESERVED__SHIFT 0xf 1293e54294d6SYong Zhao #define XPB_P2P_BAR0__ADDRESS__SHIFT 0x10 1294e54294d6SYong Zhao #define XPB_P2P_BAR0__HOST_FLUSH_MASK 0x0000000FL 1295e54294d6SYong Zhao #define XPB_P2P_BAR0__REG_SYS_BAR_MASK 0x000000F0L 1296e54294d6SYong Zhao #define XPB_P2P_BAR0__MEM_SYS_BAR_MASK 0x00000F00L 1297e54294d6SYong Zhao #define XPB_P2P_BAR0__VALID_MASK 0x00001000L 1298e54294d6SYong Zhao #define XPB_P2P_BAR0__SEND_DIS_MASK 0x00002000L 1299e54294d6SYong Zhao #define XPB_P2P_BAR0__COMPRESS_DIS_MASK 0x00004000L 1300e54294d6SYong Zhao #define XPB_P2P_BAR0__RESERVED_MASK 0x00008000L 1301e54294d6SYong Zhao #define XPB_P2P_BAR0__ADDRESS_MASK 0xFFFF0000L 1302e54294d6SYong Zhao //XPB_P2P_BAR1 1303e54294d6SYong Zhao #define XPB_P2P_BAR1__HOST_FLUSH__SHIFT 0x0 1304e54294d6SYong Zhao #define XPB_P2P_BAR1__REG_SYS_BAR__SHIFT 0x4 1305e54294d6SYong Zhao #define XPB_P2P_BAR1__MEM_SYS_BAR__SHIFT 0x8 1306e54294d6SYong Zhao #define XPB_P2P_BAR1__VALID__SHIFT 0xc 1307e54294d6SYong Zhao #define XPB_P2P_BAR1__SEND_DIS__SHIFT 0xd 1308e54294d6SYong Zhao #define XPB_P2P_BAR1__COMPRESS_DIS__SHIFT 0xe 1309e54294d6SYong Zhao #define XPB_P2P_BAR1__RESERVED__SHIFT 0xf 1310e54294d6SYong Zhao #define XPB_P2P_BAR1__ADDRESS__SHIFT 0x10 1311e54294d6SYong Zhao #define XPB_P2P_BAR1__HOST_FLUSH_MASK 0x0000000FL 1312e54294d6SYong Zhao #define XPB_P2P_BAR1__REG_SYS_BAR_MASK 0x000000F0L 1313e54294d6SYong Zhao #define XPB_P2P_BAR1__MEM_SYS_BAR_MASK 0x00000F00L 1314e54294d6SYong Zhao #define XPB_P2P_BAR1__VALID_MASK 0x00001000L 1315e54294d6SYong Zhao #define XPB_P2P_BAR1__SEND_DIS_MASK 0x00002000L 1316e54294d6SYong Zhao #define XPB_P2P_BAR1__COMPRESS_DIS_MASK 0x00004000L 1317e54294d6SYong Zhao #define XPB_P2P_BAR1__RESERVED_MASK 0x00008000L 1318e54294d6SYong Zhao #define XPB_P2P_BAR1__ADDRESS_MASK 0xFFFF0000L 1319e54294d6SYong Zhao //XPB_P2P_BAR2 1320e54294d6SYong Zhao #define XPB_P2P_BAR2__HOST_FLUSH__SHIFT 0x0 1321e54294d6SYong Zhao #define XPB_P2P_BAR2__REG_SYS_BAR__SHIFT 0x4 1322e54294d6SYong Zhao #define XPB_P2P_BAR2__MEM_SYS_BAR__SHIFT 0x8 1323e54294d6SYong Zhao #define XPB_P2P_BAR2__VALID__SHIFT 0xc 1324e54294d6SYong Zhao #define XPB_P2P_BAR2__SEND_DIS__SHIFT 0xd 1325e54294d6SYong Zhao #define XPB_P2P_BAR2__COMPRESS_DIS__SHIFT 0xe 1326e54294d6SYong Zhao #define XPB_P2P_BAR2__RESERVED__SHIFT 0xf 1327e54294d6SYong Zhao #define XPB_P2P_BAR2__ADDRESS__SHIFT 0x10 1328e54294d6SYong Zhao #define XPB_P2P_BAR2__HOST_FLUSH_MASK 0x0000000FL 1329e54294d6SYong Zhao #define XPB_P2P_BAR2__REG_SYS_BAR_MASK 0x000000F0L 1330e54294d6SYong Zhao #define XPB_P2P_BAR2__MEM_SYS_BAR_MASK 0x00000F00L 1331e54294d6SYong Zhao #define XPB_P2P_BAR2__VALID_MASK 0x00001000L 1332e54294d6SYong Zhao #define XPB_P2P_BAR2__SEND_DIS_MASK 0x00002000L 1333e54294d6SYong Zhao #define XPB_P2P_BAR2__COMPRESS_DIS_MASK 0x00004000L 1334e54294d6SYong Zhao #define XPB_P2P_BAR2__RESERVED_MASK 0x00008000L 1335e54294d6SYong Zhao #define XPB_P2P_BAR2__ADDRESS_MASK 0xFFFF0000L 1336e54294d6SYong Zhao //XPB_P2P_BAR3 1337e54294d6SYong Zhao #define XPB_P2P_BAR3__HOST_FLUSH__SHIFT 0x0 1338e54294d6SYong Zhao #define XPB_P2P_BAR3__REG_SYS_BAR__SHIFT 0x4 1339e54294d6SYong Zhao #define XPB_P2P_BAR3__MEM_SYS_BAR__SHIFT 0x8 1340e54294d6SYong Zhao #define XPB_P2P_BAR3__VALID__SHIFT 0xc 1341e54294d6SYong Zhao #define XPB_P2P_BAR3__SEND_DIS__SHIFT 0xd 1342e54294d6SYong Zhao #define XPB_P2P_BAR3__COMPRESS_DIS__SHIFT 0xe 1343e54294d6SYong Zhao #define XPB_P2P_BAR3__RESERVED__SHIFT 0xf 1344e54294d6SYong Zhao #define XPB_P2P_BAR3__ADDRESS__SHIFT 0x10 1345e54294d6SYong Zhao #define XPB_P2P_BAR3__HOST_FLUSH_MASK 0x0000000FL 1346e54294d6SYong Zhao #define XPB_P2P_BAR3__REG_SYS_BAR_MASK 0x000000F0L 1347e54294d6SYong Zhao #define XPB_P2P_BAR3__MEM_SYS_BAR_MASK 0x00000F00L 1348e54294d6SYong Zhao #define XPB_P2P_BAR3__VALID_MASK 0x00001000L 1349e54294d6SYong Zhao #define XPB_P2P_BAR3__SEND_DIS_MASK 0x00002000L 1350e54294d6SYong Zhao #define XPB_P2P_BAR3__COMPRESS_DIS_MASK 0x00004000L 1351e54294d6SYong Zhao #define XPB_P2P_BAR3__RESERVED_MASK 0x00008000L 1352e54294d6SYong Zhao #define XPB_P2P_BAR3__ADDRESS_MASK 0xFFFF0000L 1353e54294d6SYong Zhao //XPB_P2P_BAR4 1354e54294d6SYong Zhao #define XPB_P2P_BAR4__HOST_FLUSH__SHIFT 0x0 1355e54294d6SYong Zhao #define XPB_P2P_BAR4__REG_SYS_BAR__SHIFT 0x4 1356e54294d6SYong Zhao #define XPB_P2P_BAR4__MEM_SYS_BAR__SHIFT 0x8 1357e54294d6SYong Zhao #define XPB_P2P_BAR4__VALID__SHIFT 0xc 1358e54294d6SYong Zhao #define XPB_P2P_BAR4__SEND_DIS__SHIFT 0xd 1359e54294d6SYong Zhao #define XPB_P2P_BAR4__COMPRESS_DIS__SHIFT 0xe 1360e54294d6SYong Zhao #define XPB_P2P_BAR4__RESERVED__SHIFT 0xf 1361e54294d6SYong Zhao #define XPB_P2P_BAR4__ADDRESS__SHIFT 0x10 1362e54294d6SYong Zhao #define XPB_P2P_BAR4__HOST_FLUSH_MASK 0x0000000FL 1363e54294d6SYong Zhao #define XPB_P2P_BAR4__REG_SYS_BAR_MASK 0x000000F0L 1364e54294d6SYong Zhao #define XPB_P2P_BAR4__MEM_SYS_BAR_MASK 0x00000F00L 1365e54294d6SYong Zhao #define XPB_P2P_BAR4__VALID_MASK 0x00001000L 1366e54294d6SYong Zhao #define XPB_P2P_BAR4__SEND_DIS_MASK 0x00002000L 1367e54294d6SYong Zhao #define XPB_P2P_BAR4__COMPRESS_DIS_MASK 0x00004000L 1368e54294d6SYong Zhao #define XPB_P2P_BAR4__RESERVED_MASK 0x00008000L 1369e54294d6SYong Zhao #define XPB_P2P_BAR4__ADDRESS_MASK 0xFFFF0000L 1370e54294d6SYong Zhao //XPB_P2P_BAR5 1371e54294d6SYong Zhao #define XPB_P2P_BAR5__HOST_FLUSH__SHIFT 0x0 1372e54294d6SYong Zhao #define XPB_P2P_BAR5__REG_SYS_BAR__SHIFT 0x4 1373e54294d6SYong Zhao #define XPB_P2P_BAR5__MEM_SYS_BAR__SHIFT 0x8 1374e54294d6SYong Zhao #define XPB_P2P_BAR5__VALID__SHIFT 0xc 1375e54294d6SYong Zhao #define XPB_P2P_BAR5__SEND_DIS__SHIFT 0xd 1376e54294d6SYong Zhao #define XPB_P2P_BAR5__COMPRESS_DIS__SHIFT 0xe 1377e54294d6SYong Zhao #define XPB_P2P_BAR5__RESERVED__SHIFT 0xf 1378e54294d6SYong Zhao #define XPB_P2P_BAR5__ADDRESS__SHIFT 0x10 1379e54294d6SYong Zhao #define XPB_P2P_BAR5__HOST_FLUSH_MASK 0x0000000FL 1380e54294d6SYong Zhao #define XPB_P2P_BAR5__REG_SYS_BAR_MASK 0x000000F0L 1381e54294d6SYong Zhao #define XPB_P2P_BAR5__MEM_SYS_BAR_MASK 0x00000F00L 1382e54294d6SYong Zhao #define XPB_P2P_BAR5__VALID_MASK 0x00001000L 1383e54294d6SYong Zhao #define XPB_P2P_BAR5__SEND_DIS_MASK 0x00002000L 1384e54294d6SYong Zhao #define XPB_P2P_BAR5__COMPRESS_DIS_MASK 0x00004000L 1385e54294d6SYong Zhao #define XPB_P2P_BAR5__RESERVED_MASK 0x00008000L 1386e54294d6SYong Zhao #define XPB_P2P_BAR5__ADDRESS_MASK 0xFFFF0000L 1387e54294d6SYong Zhao //XPB_P2P_BAR6 1388e54294d6SYong Zhao #define XPB_P2P_BAR6__HOST_FLUSH__SHIFT 0x0 1389e54294d6SYong Zhao #define XPB_P2P_BAR6__REG_SYS_BAR__SHIFT 0x4 1390e54294d6SYong Zhao #define XPB_P2P_BAR6__MEM_SYS_BAR__SHIFT 0x8 1391e54294d6SYong Zhao #define XPB_P2P_BAR6__VALID__SHIFT 0xc 1392e54294d6SYong Zhao #define XPB_P2P_BAR6__SEND_DIS__SHIFT 0xd 1393e54294d6SYong Zhao #define XPB_P2P_BAR6__COMPRESS_DIS__SHIFT 0xe 1394e54294d6SYong Zhao #define XPB_P2P_BAR6__RESERVED__SHIFT 0xf 1395e54294d6SYong Zhao #define XPB_P2P_BAR6__ADDRESS__SHIFT 0x10 1396e54294d6SYong Zhao #define XPB_P2P_BAR6__HOST_FLUSH_MASK 0x0000000FL 1397e54294d6SYong Zhao #define XPB_P2P_BAR6__REG_SYS_BAR_MASK 0x000000F0L 1398e54294d6SYong Zhao #define XPB_P2P_BAR6__MEM_SYS_BAR_MASK 0x00000F00L 1399e54294d6SYong Zhao #define XPB_P2P_BAR6__VALID_MASK 0x00001000L 1400e54294d6SYong Zhao #define XPB_P2P_BAR6__SEND_DIS_MASK 0x00002000L 1401e54294d6SYong Zhao #define XPB_P2P_BAR6__COMPRESS_DIS_MASK 0x00004000L 1402e54294d6SYong Zhao #define XPB_P2P_BAR6__RESERVED_MASK 0x00008000L 1403e54294d6SYong Zhao #define XPB_P2P_BAR6__ADDRESS_MASK 0xFFFF0000L 1404e54294d6SYong Zhao //XPB_P2P_BAR7 1405e54294d6SYong Zhao #define XPB_P2P_BAR7__HOST_FLUSH__SHIFT 0x0 1406e54294d6SYong Zhao #define XPB_P2P_BAR7__REG_SYS_BAR__SHIFT 0x4 1407e54294d6SYong Zhao #define XPB_P2P_BAR7__MEM_SYS_BAR__SHIFT 0x8 1408e54294d6SYong Zhao #define XPB_P2P_BAR7__VALID__SHIFT 0xc 1409e54294d6SYong Zhao #define XPB_P2P_BAR7__SEND_DIS__SHIFT 0xd 1410e54294d6SYong Zhao #define XPB_P2P_BAR7__COMPRESS_DIS__SHIFT 0xe 1411e54294d6SYong Zhao #define XPB_P2P_BAR7__RESERVED__SHIFT 0xf 1412e54294d6SYong Zhao #define XPB_P2P_BAR7__ADDRESS__SHIFT 0x10 1413e54294d6SYong Zhao #define XPB_P2P_BAR7__HOST_FLUSH_MASK 0x0000000FL 1414e54294d6SYong Zhao #define XPB_P2P_BAR7__REG_SYS_BAR_MASK 0x000000F0L 1415e54294d6SYong Zhao #define XPB_P2P_BAR7__MEM_SYS_BAR_MASK 0x00000F00L 1416e54294d6SYong Zhao #define XPB_P2P_BAR7__VALID_MASK 0x00001000L 1417e54294d6SYong Zhao #define XPB_P2P_BAR7__SEND_DIS_MASK 0x00002000L 1418e54294d6SYong Zhao #define XPB_P2P_BAR7__COMPRESS_DIS_MASK 0x00004000L 1419e54294d6SYong Zhao #define XPB_P2P_BAR7__RESERVED_MASK 0x00008000L 1420e54294d6SYong Zhao #define XPB_P2P_BAR7__ADDRESS_MASK 0xFFFF0000L 1421e54294d6SYong Zhao //XPB_P2P_BAR_SETUP 1422e54294d6SYong Zhao #define XPB_P2P_BAR_SETUP__SEL__SHIFT 0x0 1423e54294d6SYong Zhao #define XPB_P2P_BAR_SETUP__REG_SYS_BAR__SHIFT 0x8 1424e54294d6SYong Zhao #define XPB_P2P_BAR_SETUP__VALID__SHIFT 0xc 1425e54294d6SYong Zhao #define XPB_P2P_BAR_SETUP__SEND_DIS__SHIFT 0xd 1426e54294d6SYong Zhao #define XPB_P2P_BAR_SETUP__COMPRESS_DIS__SHIFT 0xe 1427e54294d6SYong Zhao #define XPB_P2P_BAR_SETUP__RESERVED__SHIFT 0xf 1428e54294d6SYong Zhao #define XPB_P2P_BAR_SETUP__ADDRESS__SHIFT 0x10 1429e54294d6SYong Zhao #define XPB_P2P_BAR_SETUP__SEL_MASK 0x000000FFL 1430e54294d6SYong Zhao #define XPB_P2P_BAR_SETUP__REG_SYS_BAR_MASK 0x00000F00L 1431e54294d6SYong Zhao #define XPB_P2P_BAR_SETUP__VALID_MASK 0x00001000L 1432e54294d6SYong Zhao #define XPB_P2P_BAR_SETUP__SEND_DIS_MASK 0x00002000L 1433e54294d6SYong Zhao #define XPB_P2P_BAR_SETUP__COMPRESS_DIS_MASK 0x00004000L 1434e54294d6SYong Zhao #define XPB_P2P_BAR_SETUP__RESERVED_MASK 0x00008000L 1435e54294d6SYong Zhao #define XPB_P2P_BAR_SETUP__ADDRESS_MASK 0xFFFF0000L 1436e54294d6SYong Zhao //XPB_P2P_BAR_DELTA_ABOVE 1437e54294d6SYong Zhao #define XPB_P2P_BAR_DELTA_ABOVE__EN__SHIFT 0x0 1438e54294d6SYong Zhao #define XPB_P2P_BAR_DELTA_ABOVE__DELTA__SHIFT 0x8 1439e54294d6SYong Zhao #define XPB_P2P_BAR_DELTA_ABOVE__EN_MASK 0x000000FFL 1440e54294d6SYong Zhao #define XPB_P2P_BAR_DELTA_ABOVE__DELTA_MASK 0x0FFFFF00L 1441e54294d6SYong Zhao //XPB_P2P_BAR_DELTA_BELOW 1442e54294d6SYong Zhao #define XPB_P2P_BAR_DELTA_BELOW__EN__SHIFT 0x0 1443e54294d6SYong Zhao #define XPB_P2P_BAR_DELTA_BELOW__DELTA__SHIFT 0x8 1444e54294d6SYong Zhao #define XPB_P2P_BAR_DELTA_BELOW__EN_MASK 0x000000FFL 1445e54294d6SYong Zhao #define XPB_P2P_BAR_DELTA_BELOW__DELTA_MASK 0x0FFFFF00L 1446e54294d6SYong Zhao //XPB_PEER_SYS_BAR0 1447e54294d6SYong Zhao #define XPB_PEER_SYS_BAR0__VALID__SHIFT 0x0 1448e54294d6SYong Zhao #define XPB_PEER_SYS_BAR0__ADDR__SHIFT 0x1 1449e54294d6SYong Zhao #define XPB_PEER_SYS_BAR0__VALID_MASK 0x00000001L 1450e54294d6SYong Zhao #define XPB_PEER_SYS_BAR0__ADDR_MASK 0xFFFFFFFEL 1451e54294d6SYong Zhao //XPB_PEER_SYS_BAR1 1452e54294d6SYong Zhao #define XPB_PEER_SYS_BAR1__VALID__SHIFT 0x0 1453e54294d6SYong Zhao #define XPB_PEER_SYS_BAR1__ADDR__SHIFT 0x1 1454e54294d6SYong Zhao #define XPB_PEER_SYS_BAR1__VALID_MASK 0x00000001L 1455e54294d6SYong Zhao #define XPB_PEER_SYS_BAR1__ADDR_MASK 0xFFFFFFFEL 1456e54294d6SYong Zhao //XPB_PEER_SYS_BAR2 1457e54294d6SYong Zhao #define XPB_PEER_SYS_BAR2__VALID__SHIFT 0x0 1458e54294d6SYong Zhao #define XPB_PEER_SYS_BAR2__ADDR__SHIFT 0x1 1459e54294d6SYong Zhao #define XPB_PEER_SYS_BAR2__VALID_MASK 0x00000001L 1460e54294d6SYong Zhao #define XPB_PEER_SYS_BAR2__ADDR_MASK 0xFFFFFFFEL 1461e54294d6SYong Zhao //XPB_PEER_SYS_BAR3 1462e54294d6SYong Zhao #define XPB_PEER_SYS_BAR3__VALID__SHIFT 0x0 1463e54294d6SYong Zhao #define XPB_PEER_SYS_BAR3__ADDR__SHIFT 0x1 1464e54294d6SYong Zhao #define XPB_PEER_SYS_BAR3__VALID_MASK 0x00000001L 1465e54294d6SYong Zhao #define XPB_PEER_SYS_BAR3__ADDR_MASK 0xFFFFFFFEL 1466e54294d6SYong Zhao //XPB_PEER_SYS_BAR4 1467e54294d6SYong Zhao #define XPB_PEER_SYS_BAR4__VALID__SHIFT 0x0 1468e54294d6SYong Zhao #define XPB_PEER_SYS_BAR4__ADDR__SHIFT 0x1 1469e54294d6SYong Zhao #define XPB_PEER_SYS_BAR4__VALID_MASK 0x00000001L 1470e54294d6SYong Zhao #define XPB_PEER_SYS_BAR4__ADDR_MASK 0xFFFFFFFEL 1471e54294d6SYong Zhao //XPB_PEER_SYS_BAR5 1472e54294d6SYong Zhao #define XPB_PEER_SYS_BAR5__VALID__SHIFT 0x0 1473e54294d6SYong Zhao #define XPB_PEER_SYS_BAR5__ADDR__SHIFT 0x1 1474e54294d6SYong Zhao #define XPB_PEER_SYS_BAR5__VALID_MASK 0x00000001L 1475e54294d6SYong Zhao #define XPB_PEER_SYS_BAR5__ADDR_MASK 0xFFFFFFFEL 1476e54294d6SYong Zhao //XPB_PEER_SYS_BAR6 1477e54294d6SYong Zhao #define XPB_PEER_SYS_BAR6__VALID__SHIFT 0x0 1478e54294d6SYong Zhao #define XPB_PEER_SYS_BAR6__ADDR__SHIFT 0x1 1479e54294d6SYong Zhao #define XPB_PEER_SYS_BAR6__VALID_MASK 0x00000001L 1480e54294d6SYong Zhao #define XPB_PEER_SYS_BAR6__ADDR_MASK 0xFFFFFFFEL 1481e54294d6SYong Zhao //XPB_PEER_SYS_BAR7 1482e54294d6SYong Zhao #define XPB_PEER_SYS_BAR7__VALID__SHIFT 0x0 1483e54294d6SYong Zhao #define XPB_PEER_SYS_BAR7__ADDR__SHIFT 0x1 1484e54294d6SYong Zhao #define XPB_PEER_SYS_BAR7__VALID_MASK 0x00000001L 1485e54294d6SYong Zhao #define XPB_PEER_SYS_BAR7__ADDR_MASK 0xFFFFFFFEL 1486e54294d6SYong Zhao //XPB_PEER_SYS_BAR8 1487e54294d6SYong Zhao #define XPB_PEER_SYS_BAR8__VALID__SHIFT 0x0 1488e54294d6SYong Zhao #define XPB_PEER_SYS_BAR8__ADDR__SHIFT 0x1 1489e54294d6SYong Zhao #define XPB_PEER_SYS_BAR8__VALID_MASK 0x00000001L 1490e54294d6SYong Zhao #define XPB_PEER_SYS_BAR8__ADDR_MASK 0xFFFFFFFEL 1491e54294d6SYong Zhao //XPB_PEER_SYS_BAR9 1492e54294d6SYong Zhao #define XPB_PEER_SYS_BAR9__VALID__SHIFT 0x0 1493e54294d6SYong Zhao #define XPB_PEER_SYS_BAR9__ADDR__SHIFT 0x1 1494e54294d6SYong Zhao #define XPB_PEER_SYS_BAR9__VALID_MASK 0x00000001L 1495e54294d6SYong Zhao #define XPB_PEER_SYS_BAR9__ADDR_MASK 0xFFFFFFFEL 1496e54294d6SYong Zhao //XPB_PEER_SYS_BAR10 1497e54294d6SYong Zhao #define XPB_PEER_SYS_BAR10__VALID__SHIFT 0x0 1498e54294d6SYong Zhao #define XPB_PEER_SYS_BAR10__ADDR__SHIFT 0x1 1499e54294d6SYong Zhao #define XPB_PEER_SYS_BAR10__VALID_MASK 0x00000001L 1500e54294d6SYong Zhao #define XPB_PEER_SYS_BAR10__ADDR_MASK 0xFFFFFFFEL 1501e54294d6SYong Zhao //XPB_PEER_SYS_BAR11 1502e54294d6SYong Zhao #define XPB_PEER_SYS_BAR11__VALID__SHIFT 0x0 1503e54294d6SYong Zhao #define XPB_PEER_SYS_BAR11__ADDR__SHIFT 0x1 1504e54294d6SYong Zhao #define XPB_PEER_SYS_BAR11__VALID_MASK 0x00000001L 1505e54294d6SYong Zhao #define XPB_PEER_SYS_BAR11__ADDR_MASK 0xFFFFFFFEL 1506e54294d6SYong Zhao //XPB_PEER_SYS_BAR12 1507e54294d6SYong Zhao #define XPB_PEER_SYS_BAR12__VALID__SHIFT 0x0 1508e54294d6SYong Zhao #define XPB_PEER_SYS_BAR12__ADDR__SHIFT 0x1 1509e54294d6SYong Zhao #define XPB_PEER_SYS_BAR12__VALID_MASK 0x00000001L 1510e54294d6SYong Zhao #define XPB_PEER_SYS_BAR12__ADDR_MASK 0xFFFFFFFEL 1511e54294d6SYong Zhao //XPB_PEER_SYS_BAR13 1512e54294d6SYong Zhao #define XPB_PEER_SYS_BAR13__VALID__SHIFT 0x0 1513e54294d6SYong Zhao #define XPB_PEER_SYS_BAR13__ADDR__SHIFT 0x1 1514e54294d6SYong Zhao #define XPB_PEER_SYS_BAR13__VALID_MASK 0x00000001L 1515e54294d6SYong Zhao #define XPB_PEER_SYS_BAR13__ADDR_MASK 0xFFFFFFFEL 1516e54294d6SYong Zhao //XPB_CLK_GAT 1517e54294d6SYong Zhao #define XPB_CLK_GAT__ONDLY__SHIFT 0x0 1518e54294d6SYong Zhao #define XPB_CLK_GAT__OFFDLY__SHIFT 0x6 1519e54294d6SYong Zhao #define XPB_CLK_GAT__RDYDLY__SHIFT 0xc 1520e54294d6SYong Zhao #define XPB_CLK_GAT__ENABLE__SHIFT 0x12 1521e54294d6SYong Zhao #define XPB_CLK_GAT__MEM_LS_ENABLE__SHIFT 0x13 1522e54294d6SYong Zhao #define XPB_CLK_GAT__ONDLY_MASK 0x0000003FL 1523e54294d6SYong Zhao #define XPB_CLK_GAT__OFFDLY_MASK 0x00000FC0L 1524e54294d6SYong Zhao #define XPB_CLK_GAT__RDYDLY_MASK 0x0003F000L 1525e54294d6SYong Zhao #define XPB_CLK_GAT__ENABLE_MASK 0x00040000L 1526e54294d6SYong Zhao #define XPB_CLK_GAT__MEM_LS_ENABLE_MASK 0x00080000L 1527e54294d6SYong Zhao //XPB_INTF_CFG 1528e54294d6SYong Zhao #define XPB_INTF_CFG__RPB_WRREQ_CRD__SHIFT 0x0 1529e54294d6SYong Zhao #define XPB_INTF_CFG__MC_WRRET_ASK__SHIFT 0x8 1530e54294d6SYong Zhao #define XPB_INTF_CFG__XSP_REQ_CRD__SHIFT 0x10 1531e54294d6SYong Zhao #define XPB_INTF_CFG__P2P_WR_CHAIN_BREAK__SHIFT 0x17 1532e54294d6SYong Zhao #define XPB_INTF_CFG__XSP_SNOOP_SEL__SHIFT 0x1b 1533e54294d6SYong Zhao #define XPB_INTF_CFG__XSP_SNOOP_VAL__SHIFT 0x1d 1534e54294d6SYong Zhao #define XPB_INTF_CFG__XSP_ORDERING_SEL__SHIFT 0x1e 1535e54294d6SYong Zhao #define XPB_INTF_CFG__XSP_ORDERING_VAL__SHIFT 0x1f 1536e54294d6SYong Zhao #define XPB_INTF_CFG__RPB_WRREQ_CRD_MASK 0x000000FFL 1537e54294d6SYong Zhao #define XPB_INTF_CFG__MC_WRRET_ASK_MASK 0x0000FF00L 1538e54294d6SYong Zhao #define XPB_INTF_CFG__XSP_REQ_CRD_MASK 0x007F0000L 1539e54294d6SYong Zhao #define XPB_INTF_CFG__P2P_WR_CHAIN_BREAK_MASK 0x00800000L 1540e54294d6SYong Zhao #define XPB_INTF_CFG__XSP_SNOOP_SEL_MASK 0x18000000L 1541e54294d6SYong Zhao #define XPB_INTF_CFG__XSP_SNOOP_VAL_MASK 0x20000000L 1542e54294d6SYong Zhao #define XPB_INTF_CFG__XSP_ORDERING_SEL_MASK 0x40000000L 1543e54294d6SYong Zhao #define XPB_INTF_CFG__XSP_ORDERING_VAL_MASK 0x80000000L 1544e54294d6SYong Zhao //XPB_INTF_STS 1545e54294d6SYong Zhao #define XPB_INTF_STS__RPB_WRREQ_CRD__SHIFT 0x0 1546e54294d6SYong Zhao #define XPB_INTF_STS__XSP_REQ_CRD__SHIFT 0x8 1547e54294d6SYong Zhao #define XPB_INTF_STS__HOP_DATA_BUF_FULL__SHIFT 0xf 1548e54294d6SYong Zhao #define XPB_INTF_STS__HOP_ATTR_BUF_FULL__SHIFT 0x10 1549e54294d6SYong Zhao #define XPB_INTF_STS__CNS_BUF_FULL__SHIFT 0x11 1550e54294d6SYong Zhao #define XPB_INTF_STS__CNS_BUF_BUSY__SHIFT 0x12 1551e54294d6SYong Zhao #define XPB_INTF_STS__RPB_RDREQ_CRD__SHIFT 0x13 1552e54294d6SYong Zhao #define XPB_INTF_STS__RPB_WRREQ_CRD_MASK 0x000000FFL 1553e54294d6SYong Zhao #define XPB_INTF_STS__XSP_REQ_CRD_MASK 0x00007F00L 1554e54294d6SYong Zhao #define XPB_INTF_STS__HOP_DATA_BUF_FULL_MASK 0x00008000L 1555e54294d6SYong Zhao #define XPB_INTF_STS__HOP_ATTR_BUF_FULL_MASK 0x00010000L 1556e54294d6SYong Zhao #define XPB_INTF_STS__CNS_BUF_FULL_MASK 0x00020000L 1557e54294d6SYong Zhao #define XPB_INTF_STS__CNS_BUF_BUSY_MASK 0x00040000L 1558e54294d6SYong Zhao #define XPB_INTF_STS__RPB_RDREQ_CRD_MASK 0x07F80000L 1559e54294d6SYong Zhao //XPB_PIPE_STS 1560e54294d6SYong Zhao #define XPB_PIPE_STS__WCB_ANY_PBUF__SHIFT 0x0 1561e54294d6SYong Zhao #define XPB_PIPE_STS__WCB_HST_DATA_BUF_CNT__SHIFT 0x1 1562e54294d6SYong Zhao #define XPB_PIPE_STS__WCB_SID_DATA_BUF_CNT__SHIFT 0x8 1563e54294d6SYong Zhao #define XPB_PIPE_STS__WCB_HST_RD_PTR_BUF_FULL__SHIFT 0xf 1564e54294d6SYong Zhao #define XPB_PIPE_STS__WCB_SID_RD_PTR_BUF_FULL__SHIFT 0x10 1565e54294d6SYong Zhao #define XPB_PIPE_STS__WCB_HST_REQ_FIFO_FULL__SHIFT 0x11 1566e54294d6SYong Zhao #define XPB_PIPE_STS__WCB_SID_REQ_FIFO_FULL__SHIFT 0x12 1567e54294d6SYong Zhao #define XPB_PIPE_STS__WCB_HST_REQ_OBUF_FULL__SHIFT 0x13 1568e54294d6SYong Zhao #define XPB_PIPE_STS__WCB_SID_REQ_OBUF_FULL__SHIFT 0x14 1569e54294d6SYong Zhao #define XPB_PIPE_STS__WCB_HST_DATA_OBUF_FULL__SHIFT 0x15 1570e54294d6SYong Zhao #define XPB_PIPE_STS__WCB_SID_DATA_OBUF_FULL__SHIFT 0x16 1571e54294d6SYong Zhao #define XPB_PIPE_STS__RET_BUF_FULL__SHIFT 0x17 1572e54294d6SYong Zhao #define XPB_PIPE_STS__XPB_CLK_BUSY_BITS__SHIFT 0x18 1573e54294d6SYong Zhao #define XPB_PIPE_STS__WCB_ANY_PBUF_MASK 0x00000001L 1574e54294d6SYong Zhao #define XPB_PIPE_STS__WCB_HST_DATA_BUF_CNT_MASK 0x000000FEL 1575e54294d6SYong Zhao #define XPB_PIPE_STS__WCB_SID_DATA_BUF_CNT_MASK 0x00007F00L 1576e54294d6SYong Zhao #define XPB_PIPE_STS__WCB_HST_RD_PTR_BUF_FULL_MASK 0x00008000L 1577e54294d6SYong Zhao #define XPB_PIPE_STS__WCB_SID_RD_PTR_BUF_FULL_MASK 0x00010000L 1578e54294d6SYong Zhao #define XPB_PIPE_STS__WCB_HST_REQ_FIFO_FULL_MASK 0x00020000L 1579e54294d6SYong Zhao #define XPB_PIPE_STS__WCB_SID_REQ_FIFO_FULL_MASK 0x00040000L 1580e54294d6SYong Zhao #define XPB_PIPE_STS__WCB_HST_REQ_OBUF_FULL_MASK 0x00080000L 1581e54294d6SYong Zhao #define XPB_PIPE_STS__WCB_SID_REQ_OBUF_FULL_MASK 0x00100000L 1582e54294d6SYong Zhao #define XPB_PIPE_STS__WCB_HST_DATA_OBUF_FULL_MASK 0x00200000L 1583e54294d6SYong Zhao #define XPB_PIPE_STS__WCB_SID_DATA_OBUF_FULL_MASK 0x00400000L 1584e54294d6SYong Zhao #define XPB_PIPE_STS__RET_BUF_FULL_MASK 0x00800000L 1585e54294d6SYong Zhao #define XPB_PIPE_STS__XPB_CLK_BUSY_BITS_MASK 0xFF000000L 1586e54294d6SYong Zhao //XPB_SUB_CTRL 1587e54294d6SYong Zhao #define XPB_SUB_CTRL__WRREQ_BYPASS_XPB__SHIFT 0x0 1588e54294d6SYong Zhao #define XPB_SUB_CTRL__STALL_CNS_RTR_REQ__SHIFT 0x1 1589e54294d6SYong Zhao #define XPB_SUB_CTRL__STALL_RTR_RPB_WRREQ__SHIFT 0x2 1590e54294d6SYong Zhao #define XPB_SUB_CTRL__STALL_RTR_MAP_REQ__SHIFT 0x3 1591e54294d6SYong Zhao #define XPB_SUB_CTRL__STALL_MAP_WCB_REQ__SHIFT 0x4 1592e54294d6SYong Zhao #define XPB_SUB_CTRL__STALL_WCB_SID_REQ__SHIFT 0x5 1593e54294d6SYong Zhao #define XPB_SUB_CTRL__STALL_MC_XSP_REQ_SEND__SHIFT 0x6 1594e54294d6SYong Zhao #define XPB_SUB_CTRL__STALL_WCB_HST_REQ__SHIFT 0x7 1595e54294d6SYong Zhao #define XPB_SUB_CTRL__STALL_HST_HOP_REQ__SHIFT 0x8 1596e54294d6SYong Zhao #define XPB_SUB_CTRL__STALL_XPB_RPB_REQ_ATTR__SHIFT 0x9 1597e54294d6SYong Zhao #define XPB_SUB_CTRL__RESET_CNS__SHIFT 0xa 1598e54294d6SYong Zhao #define XPB_SUB_CTRL__RESET_RTR__SHIFT 0xb 1599e54294d6SYong Zhao #define XPB_SUB_CTRL__RESET_RET__SHIFT 0xc 1600e54294d6SYong Zhao #define XPB_SUB_CTRL__RESET_MAP__SHIFT 0xd 1601e54294d6SYong Zhao #define XPB_SUB_CTRL__RESET_WCB__SHIFT 0xe 1602e54294d6SYong Zhao #define XPB_SUB_CTRL__RESET_HST__SHIFT 0xf 1603e54294d6SYong Zhao #define XPB_SUB_CTRL__RESET_HOP__SHIFT 0x10 1604e54294d6SYong Zhao #define XPB_SUB_CTRL__RESET_SID__SHIFT 0x11 1605e54294d6SYong Zhao #define XPB_SUB_CTRL__RESET_SRB__SHIFT 0x12 1606e54294d6SYong Zhao #define XPB_SUB_CTRL__RESET_CGR__SHIFT 0x13 1607e54294d6SYong Zhao #define XPB_SUB_CTRL__WRREQ_BYPASS_XPB_MASK 0x00000001L 1608e54294d6SYong Zhao #define XPB_SUB_CTRL__STALL_CNS_RTR_REQ_MASK 0x00000002L 1609e54294d6SYong Zhao #define XPB_SUB_CTRL__STALL_RTR_RPB_WRREQ_MASK 0x00000004L 1610e54294d6SYong Zhao #define XPB_SUB_CTRL__STALL_RTR_MAP_REQ_MASK 0x00000008L 1611e54294d6SYong Zhao #define XPB_SUB_CTRL__STALL_MAP_WCB_REQ_MASK 0x00000010L 1612e54294d6SYong Zhao #define XPB_SUB_CTRL__STALL_WCB_SID_REQ_MASK 0x00000020L 1613e54294d6SYong Zhao #define XPB_SUB_CTRL__STALL_MC_XSP_REQ_SEND_MASK 0x00000040L 1614e54294d6SYong Zhao #define XPB_SUB_CTRL__STALL_WCB_HST_REQ_MASK 0x00000080L 1615e54294d6SYong Zhao #define XPB_SUB_CTRL__STALL_HST_HOP_REQ_MASK 0x00000100L 1616e54294d6SYong Zhao #define XPB_SUB_CTRL__STALL_XPB_RPB_REQ_ATTR_MASK 0x00000200L 1617e54294d6SYong Zhao #define XPB_SUB_CTRL__RESET_CNS_MASK 0x00000400L 1618e54294d6SYong Zhao #define XPB_SUB_CTRL__RESET_RTR_MASK 0x00000800L 1619e54294d6SYong Zhao #define XPB_SUB_CTRL__RESET_RET_MASK 0x00001000L 1620e54294d6SYong Zhao #define XPB_SUB_CTRL__RESET_MAP_MASK 0x00002000L 1621e54294d6SYong Zhao #define XPB_SUB_CTRL__RESET_WCB_MASK 0x00004000L 1622e54294d6SYong Zhao #define XPB_SUB_CTRL__RESET_HST_MASK 0x00008000L 1623e54294d6SYong Zhao #define XPB_SUB_CTRL__RESET_HOP_MASK 0x00010000L 1624e54294d6SYong Zhao #define XPB_SUB_CTRL__RESET_SID_MASK 0x00020000L 1625e54294d6SYong Zhao #define XPB_SUB_CTRL__RESET_SRB_MASK 0x00040000L 1626e54294d6SYong Zhao #define XPB_SUB_CTRL__RESET_CGR_MASK 0x00080000L 1627e54294d6SYong Zhao //XPB_MAP_INVERT_FLUSH_NUM_LSB 1628e54294d6SYong Zhao #define XPB_MAP_INVERT_FLUSH_NUM_LSB__ALTER_FLUSH_NUM__SHIFT 0x0 1629e54294d6SYong Zhao #define XPB_MAP_INVERT_FLUSH_NUM_LSB__ALTER_FLUSH_NUM_MASK 0x0000FFFFL 1630e54294d6SYong Zhao //XPB_PERF_KNOBS 1631e54294d6SYong Zhao #define XPB_PERF_KNOBS__CNS_FIFO_DEPTH__SHIFT 0x0 1632e54294d6SYong Zhao #define XPB_PERF_KNOBS__WCB_HST_FIFO_DEPTH__SHIFT 0x6 1633e54294d6SYong Zhao #define XPB_PERF_KNOBS__WCB_SID_FIFO_DEPTH__SHIFT 0xc 1634e54294d6SYong Zhao #define XPB_PERF_KNOBS__CNS_FIFO_DEPTH_MASK 0x0000003FL 1635e54294d6SYong Zhao #define XPB_PERF_KNOBS__WCB_HST_FIFO_DEPTH_MASK 0x00000FC0L 1636e54294d6SYong Zhao #define XPB_PERF_KNOBS__WCB_SID_FIFO_DEPTH_MASK 0x0003F000L 1637e54294d6SYong Zhao //XPB_STICKY 1638e54294d6SYong Zhao #define XPB_STICKY__BITS__SHIFT 0x0 1639e54294d6SYong Zhao #define XPB_STICKY__BITS_MASK 0xFFFFFFFFL 1640e54294d6SYong Zhao //XPB_STICKY_W1C 1641e54294d6SYong Zhao #define XPB_STICKY_W1C__BITS__SHIFT 0x0 1642e54294d6SYong Zhao #define XPB_STICKY_W1C__BITS_MASK 0xFFFFFFFFL 1643e54294d6SYong Zhao //XPB_MISC_CFG 1644e54294d6SYong Zhao #define XPB_MISC_CFG__FIELDNAME0__SHIFT 0x0 1645e54294d6SYong Zhao #define XPB_MISC_CFG__FIELDNAME1__SHIFT 0x8 1646e54294d6SYong Zhao #define XPB_MISC_CFG__FIELDNAME2__SHIFT 0x10 1647e54294d6SYong Zhao #define XPB_MISC_CFG__FIELDNAME3__SHIFT 0x18 1648e54294d6SYong Zhao #define XPB_MISC_CFG__TRIGGERNAME__SHIFT 0x1f 1649e54294d6SYong Zhao #define XPB_MISC_CFG__FIELDNAME0_MASK 0x000000FFL 1650e54294d6SYong Zhao #define XPB_MISC_CFG__FIELDNAME1_MASK 0x0000FF00L 1651e54294d6SYong Zhao #define XPB_MISC_CFG__FIELDNAME2_MASK 0x00FF0000L 1652e54294d6SYong Zhao #define XPB_MISC_CFG__FIELDNAME3_MASK 0x7F000000L 1653e54294d6SYong Zhao #define XPB_MISC_CFG__TRIGGERNAME_MASK 0x80000000L 1654e54294d6SYong Zhao //XPB_INTF_CFG2 1655e54294d6SYong Zhao #define XPB_INTF_CFG2__RPB_RDREQ_CRD__SHIFT 0x0 1656e54294d6SYong Zhao #define XPB_INTF_CFG2__RPB_RDREQ_CRD_MASK 0x000000FFL 1657e54294d6SYong Zhao //XPB_CLG_EXTRA_RD 1658e54294d6SYong Zhao #define XPB_CLG_EXTRA_RD__CMP0_HIGH__SHIFT 0x0 1659e54294d6SYong Zhao #define XPB_CLG_EXTRA_RD__CMP0_LOW__SHIFT 0x6 1660e54294d6SYong Zhao #define XPB_CLG_EXTRA_RD__VLD0__SHIFT 0xb 1661e54294d6SYong Zhao #define XPB_CLG_EXTRA_RD__CLG0_NUM__SHIFT 0xc 1662e54294d6SYong Zhao #define XPB_CLG_EXTRA_RD__CMP1_HIGH__SHIFT 0xf 1663e54294d6SYong Zhao #define XPB_CLG_EXTRA_RD__CMP1_LOW__SHIFT 0x15 1664e54294d6SYong Zhao #define XPB_CLG_EXTRA_RD__VLD1__SHIFT 0x1a 1665e54294d6SYong Zhao #define XPB_CLG_EXTRA_RD__CLG1_NUM__SHIFT 0x1b 1666e54294d6SYong Zhao #define XPB_CLG_EXTRA_RD__CMP0_HIGH_MASK 0x0000003FL 1667e54294d6SYong Zhao #define XPB_CLG_EXTRA_RD__CMP0_LOW_MASK 0x000007C0L 1668e54294d6SYong Zhao #define XPB_CLG_EXTRA_RD__VLD0_MASK 0x00000800L 1669e54294d6SYong Zhao #define XPB_CLG_EXTRA_RD__CLG0_NUM_MASK 0x00007000L 1670e54294d6SYong Zhao #define XPB_CLG_EXTRA_RD__CMP1_HIGH_MASK 0x001F8000L 1671e54294d6SYong Zhao #define XPB_CLG_EXTRA_RD__CMP1_LOW_MASK 0x03E00000L 1672e54294d6SYong Zhao #define XPB_CLG_EXTRA_RD__VLD1_MASK 0x04000000L 1673e54294d6SYong Zhao #define XPB_CLG_EXTRA_RD__CLG1_NUM_MASK 0x38000000L 1674e54294d6SYong Zhao //XPB_CLG_EXTRA_MSK_RD 1675e54294d6SYong Zhao #define XPB_CLG_EXTRA_MSK_RD__MSK0_HIGH__SHIFT 0x0 1676e54294d6SYong Zhao #define XPB_CLG_EXTRA_MSK_RD__MSK0_LOW__SHIFT 0x6 1677e54294d6SYong Zhao #define XPB_CLG_EXTRA_MSK_RD__MSK1_HIGH__SHIFT 0xb 1678e54294d6SYong Zhao #define XPB_CLG_EXTRA_MSK_RD__MSK1_LOW__SHIFT 0x11 1679e54294d6SYong Zhao #define XPB_CLG_EXTRA_MSK_RD__MSK0_HIGH_MASK 0x0000003FL 1680e54294d6SYong Zhao #define XPB_CLG_EXTRA_MSK_RD__MSK0_LOW_MASK 0x000007C0L 1681e54294d6SYong Zhao #define XPB_CLG_EXTRA_MSK_RD__MSK1_HIGH_MASK 0x0001F800L 1682e54294d6SYong Zhao #define XPB_CLG_EXTRA_MSK_RD__MSK1_LOW_MASK 0x003E0000L 1683e54294d6SYong Zhao //XPB_CLG_GFX_MATCH 1684e54294d6SYong Zhao #define XPB_CLG_GFX_MATCH__FARBIRC0_ID__SHIFT 0x0 1685e54294d6SYong Zhao #define XPB_CLG_GFX_MATCH__FARBIRC1_ID__SHIFT 0x6 1686e54294d6SYong Zhao #define XPB_CLG_GFX_MATCH__FARBIRC2_ID__SHIFT 0xc 1687e54294d6SYong Zhao #define XPB_CLG_GFX_MATCH__FARBIRC3_ID__SHIFT 0x12 1688e54294d6SYong Zhao #define XPB_CLG_GFX_MATCH__FARBIRC0_VLD__SHIFT 0x18 1689e54294d6SYong Zhao #define XPB_CLG_GFX_MATCH__FARBIRC1_VLD__SHIFT 0x19 1690e54294d6SYong Zhao #define XPB_CLG_GFX_MATCH__FARBIRC2_VLD__SHIFT 0x1a 1691e54294d6SYong Zhao #define XPB_CLG_GFX_MATCH__FARBIRC3_VLD__SHIFT 0x1b 1692e54294d6SYong Zhao #define XPB_CLG_GFX_MATCH__FARBIRC0_ID_MASK 0x0000003FL 1693e54294d6SYong Zhao #define XPB_CLG_GFX_MATCH__FARBIRC1_ID_MASK 0x00000FC0L 1694e54294d6SYong Zhao #define XPB_CLG_GFX_MATCH__FARBIRC2_ID_MASK 0x0003F000L 1695e54294d6SYong Zhao #define XPB_CLG_GFX_MATCH__FARBIRC3_ID_MASK 0x00FC0000L 1696e54294d6SYong Zhao #define XPB_CLG_GFX_MATCH__FARBIRC0_VLD_MASK 0x01000000L 1697e54294d6SYong Zhao #define XPB_CLG_GFX_MATCH__FARBIRC1_VLD_MASK 0x02000000L 1698e54294d6SYong Zhao #define XPB_CLG_GFX_MATCH__FARBIRC2_VLD_MASK 0x04000000L 1699e54294d6SYong Zhao #define XPB_CLG_GFX_MATCH__FARBIRC3_VLD_MASK 0x08000000L 1700e54294d6SYong Zhao //XPB_CLG_GFX_MATCH_MSK 1701e54294d6SYong Zhao #define XPB_CLG_GFX_MATCH_MSK__FARBIRC0_ID_MSK__SHIFT 0x0 1702e54294d6SYong Zhao #define XPB_CLG_GFX_MATCH_MSK__FARBIRC1_ID_MSK__SHIFT 0x6 1703e54294d6SYong Zhao #define XPB_CLG_GFX_MATCH_MSK__FARBIRC2_ID_MSK__SHIFT 0xc 1704e54294d6SYong Zhao #define XPB_CLG_GFX_MATCH_MSK__FARBIRC3_ID_MSK__SHIFT 0x12 1705e54294d6SYong Zhao #define XPB_CLG_GFX_MATCH_MSK__FARBIRC0_ID_MSK_MASK 0x0000003FL 1706e54294d6SYong Zhao #define XPB_CLG_GFX_MATCH_MSK__FARBIRC1_ID_MSK_MASK 0x00000FC0L 1707e54294d6SYong Zhao #define XPB_CLG_GFX_MATCH_MSK__FARBIRC2_ID_MSK_MASK 0x0003F000L 1708e54294d6SYong Zhao #define XPB_CLG_GFX_MATCH_MSK__FARBIRC3_ID_MSK_MASK 0x00FC0000L 1709e54294d6SYong Zhao //XPB_CLG_MM_MATCH 1710e54294d6SYong Zhao #define XPB_CLG_MM_MATCH__FARBIRC0_ID__SHIFT 0x0 1711e54294d6SYong Zhao #define XPB_CLG_MM_MATCH__FARBIRC1_ID__SHIFT 0x6 1712e54294d6SYong Zhao #define XPB_CLG_MM_MATCH__FARBIRC0_VLD__SHIFT 0xc 1713e54294d6SYong Zhao #define XPB_CLG_MM_MATCH__FARBIRC1_VLD__SHIFT 0xd 1714e54294d6SYong Zhao #define XPB_CLG_MM_MATCH__FARBIRC0_ID_MASK 0x0000003FL 1715e54294d6SYong Zhao #define XPB_CLG_MM_MATCH__FARBIRC1_ID_MASK 0x00000FC0L 1716e54294d6SYong Zhao #define XPB_CLG_MM_MATCH__FARBIRC0_VLD_MASK 0x00001000L 1717e54294d6SYong Zhao #define XPB_CLG_MM_MATCH__FARBIRC1_VLD_MASK 0x00002000L 1718e54294d6SYong Zhao //XPB_CLG_MM_MATCH_MSK 1719e54294d6SYong Zhao #define XPB_CLG_MM_MATCH_MSK__FARBIRC0_ID_MSK__SHIFT 0x0 1720e54294d6SYong Zhao #define XPB_CLG_MM_MATCH_MSK__FARBIRC1_ID_MSK__SHIFT 0x6 1721e54294d6SYong Zhao #define XPB_CLG_MM_MATCH_MSK__FARBIRC0_ID_MSK_MASK 0x0000003FL 1722e54294d6SYong Zhao #define XPB_CLG_MM_MATCH_MSK__FARBIRC1_ID_MSK_MASK 0x00000FC0L 1723e54294d6SYong Zhao //XPB_CLG_GUS_MATCH 1724e54294d6SYong Zhao #define XPB_CLG_GUS_MATCH__FARBIRC0_ID__SHIFT 0x0 1725e54294d6SYong Zhao #define XPB_CLG_GUS_MATCH__FARBIRC0_VLD__SHIFT 0x6 1726e54294d6SYong Zhao #define XPB_CLG_GUS_MATCH__FARBIRC0_ID_MASK 0x0000003FL 1727e54294d6SYong Zhao #define XPB_CLG_GUS_MATCH__FARBIRC0_VLD_MASK 0x00000040L 1728e54294d6SYong Zhao //XPB_CLG_GUS_MATCH_MSK 1729e54294d6SYong Zhao #define XPB_CLG_GUS_MATCH_MSK__FARBIRC0_ID_MSK__SHIFT 0x0 1730e54294d6SYong Zhao #define XPB_CLG_GUS_MATCH_MSK__FARBIRC0_ID_MSK_MASK 0x0000003FL 1731e54294d6SYong Zhao //XPB_CLG_GFX_UNITID_MAPPING0 1732e54294d6SYong Zhao #define XPB_CLG_GFX_UNITID_MAPPING0__UNITID_LOW__SHIFT 0x0 1733e54294d6SYong Zhao #define XPB_CLG_GFX_UNITID_MAPPING0__UNITID_VLD__SHIFT 0x5 1734e54294d6SYong Zhao #define XPB_CLG_GFX_UNITID_MAPPING0__DEST_CLG_NUM__SHIFT 0x6 1735e54294d6SYong Zhao #define XPB_CLG_GFX_UNITID_MAPPING0__UNITID_LOW_MASK 0x0000001FL 1736e54294d6SYong Zhao #define XPB_CLG_GFX_UNITID_MAPPING0__UNITID_VLD_MASK 0x00000020L 1737e54294d6SYong Zhao #define XPB_CLG_GFX_UNITID_MAPPING0__DEST_CLG_NUM_MASK 0x000001C0L 1738e54294d6SYong Zhao //XPB_CLG_GFX_UNITID_MAPPING1 1739e54294d6SYong Zhao #define XPB_CLG_GFX_UNITID_MAPPING1__UNITID_LOW__SHIFT 0x0 1740e54294d6SYong Zhao #define XPB_CLG_GFX_UNITID_MAPPING1__UNITID_VLD__SHIFT 0x5 1741e54294d6SYong Zhao #define XPB_CLG_GFX_UNITID_MAPPING1__DEST_CLG_NUM__SHIFT 0x6 1742e54294d6SYong Zhao #define XPB_CLG_GFX_UNITID_MAPPING1__UNITID_LOW_MASK 0x0000001FL 1743e54294d6SYong Zhao #define XPB_CLG_GFX_UNITID_MAPPING1__UNITID_VLD_MASK 0x00000020L 1744e54294d6SYong Zhao #define XPB_CLG_GFX_UNITID_MAPPING1__DEST_CLG_NUM_MASK 0x000001C0L 1745e54294d6SYong Zhao //XPB_CLG_GFX_UNITID_MAPPING2 1746e54294d6SYong Zhao #define XPB_CLG_GFX_UNITID_MAPPING2__UNITID_LOW__SHIFT 0x0 1747e54294d6SYong Zhao #define XPB_CLG_GFX_UNITID_MAPPING2__UNITID_VLD__SHIFT 0x5 1748e54294d6SYong Zhao #define XPB_CLG_GFX_UNITID_MAPPING2__DEST_CLG_NUM__SHIFT 0x6 1749e54294d6SYong Zhao #define XPB_CLG_GFX_UNITID_MAPPING2__UNITID_LOW_MASK 0x0000001FL 1750e54294d6SYong Zhao #define XPB_CLG_GFX_UNITID_MAPPING2__UNITID_VLD_MASK 0x00000020L 1751e54294d6SYong Zhao #define XPB_CLG_GFX_UNITID_MAPPING2__DEST_CLG_NUM_MASK 0x000001C0L 1752e54294d6SYong Zhao //XPB_CLG_GFX_UNITID_MAPPING3 1753e54294d6SYong Zhao #define XPB_CLG_GFX_UNITID_MAPPING3__UNITID_LOW__SHIFT 0x0 1754e54294d6SYong Zhao #define XPB_CLG_GFX_UNITID_MAPPING3__UNITID_VLD__SHIFT 0x5 1755e54294d6SYong Zhao #define XPB_CLG_GFX_UNITID_MAPPING3__DEST_CLG_NUM__SHIFT 0x6 1756e54294d6SYong Zhao #define XPB_CLG_GFX_UNITID_MAPPING3__UNITID_LOW_MASK 0x0000001FL 1757e54294d6SYong Zhao #define XPB_CLG_GFX_UNITID_MAPPING3__UNITID_VLD_MASK 0x00000020L 1758e54294d6SYong Zhao #define XPB_CLG_GFX_UNITID_MAPPING3__DEST_CLG_NUM_MASK 0x000001C0L 1759e54294d6SYong Zhao //XPB_CLG_GFX_UNITID_MAPPING4 1760e54294d6SYong Zhao #define XPB_CLG_GFX_UNITID_MAPPING4__UNITID_LOW__SHIFT 0x0 1761e54294d6SYong Zhao #define XPB_CLG_GFX_UNITID_MAPPING4__UNITID_VLD__SHIFT 0x5 1762e54294d6SYong Zhao #define XPB_CLG_GFX_UNITID_MAPPING4__DEST_CLG_NUM__SHIFT 0x6 1763e54294d6SYong Zhao #define XPB_CLG_GFX_UNITID_MAPPING4__UNITID_LOW_MASK 0x0000001FL 1764e54294d6SYong Zhao #define XPB_CLG_GFX_UNITID_MAPPING4__UNITID_VLD_MASK 0x00000020L 1765e54294d6SYong Zhao #define XPB_CLG_GFX_UNITID_MAPPING4__DEST_CLG_NUM_MASK 0x000001C0L 1766e54294d6SYong Zhao //XPB_CLG_GFX_UNITID_MAPPING5 1767e54294d6SYong Zhao #define XPB_CLG_GFX_UNITID_MAPPING5__UNITID_LOW__SHIFT 0x0 1768e54294d6SYong Zhao #define XPB_CLG_GFX_UNITID_MAPPING5__UNITID_VLD__SHIFT 0x5 1769e54294d6SYong Zhao #define XPB_CLG_GFX_UNITID_MAPPING5__DEST_CLG_NUM__SHIFT 0x6 1770e54294d6SYong Zhao #define XPB_CLG_GFX_UNITID_MAPPING5__UNITID_LOW_MASK 0x0000001FL 1771e54294d6SYong Zhao #define XPB_CLG_GFX_UNITID_MAPPING5__UNITID_VLD_MASK 0x00000020L 1772e54294d6SYong Zhao #define XPB_CLG_GFX_UNITID_MAPPING5__DEST_CLG_NUM_MASK 0x000001C0L 1773e54294d6SYong Zhao //XPB_CLG_GFX_UNITID_MAPPING6 1774e54294d6SYong Zhao #define XPB_CLG_GFX_UNITID_MAPPING6__UNITID_LOW__SHIFT 0x0 1775e54294d6SYong Zhao #define XPB_CLG_GFX_UNITID_MAPPING6__UNITID_VLD__SHIFT 0x5 1776e54294d6SYong Zhao #define XPB_CLG_GFX_UNITID_MAPPING6__DEST_CLG_NUM__SHIFT 0x6 1777e54294d6SYong Zhao #define XPB_CLG_GFX_UNITID_MAPPING6__UNITID_LOW_MASK 0x0000001FL 1778e54294d6SYong Zhao #define XPB_CLG_GFX_UNITID_MAPPING6__UNITID_VLD_MASK 0x00000020L 1779e54294d6SYong Zhao #define XPB_CLG_GFX_UNITID_MAPPING6__DEST_CLG_NUM_MASK 0x000001C0L 1780e54294d6SYong Zhao //XPB_CLG_GFX_UNITID_MAPPING7 1781e54294d6SYong Zhao #define XPB_CLG_GFX_UNITID_MAPPING7__UNITID_LOW__SHIFT 0x0 1782e54294d6SYong Zhao #define XPB_CLG_GFX_UNITID_MAPPING7__UNITID_VLD__SHIFT 0x5 1783e54294d6SYong Zhao #define XPB_CLG_GFX_UNITID_MAPPING7__DEST_CLG_NUM__SHIFT 0x6 1784e54294d6SYong Zhao #define XPB_CLG_GFX_UNITID_MAPPING7__UNITID_LOW_MASK 0x0000001FL 1785e54294d6SYong Zhao #define XPB_CLG_GFX_UNITID_MAPPING7__UNITID_VLD_MASK 0x00000020L 1786e54294d6SYong Zhao #define XPB_CLG_GFX_UNITID_MAPPING7__DEST_CLG_NUM_MASK 0x000001C0L 1787e54294d6SYong Zhao //XPB_CLG_MM_UNITID_MAPPING0 1788e54294d6SYong Zhao #define XPB_CLG_MM_UNITID_MAPPING0__UNITID_LOW__SHIFT 0x0 1789e54294d6SYong Zhao #define XPB_CLG_MM_UNITID_MAPPING0__UNITID_VLD__SHIFT 0x5 1790e54294d6SYong Zhao #define XPB_CLG_MM_UNITID_MAPPING0__DEST_CLG_NUM__SHIFT 0x6 1791e54294d6SYong Zhao #define XPB_CLG_MM_UNITID_MAPPING0__UNITID_LOW_MASK 0x0000001FL 1792e54294d6SYong Zhao #define XPB_CLG_MM_UNITID_MAPPING0__UNITID_VLD_MASK 0x00000020L 1793e54294d6SYong Zhao #define XPB_CLG_MM_UNITID_MAPPING0__DEST_CLG_NUM_MASK 0x000001C0L 1794e54294d6SYong Zhao //XPB_CLG_MM_UNITID_MAPPING1 1795e54294d6SYong Zhao #define XPB_CLG_MM_UNITID_MAPPING1__UNITID_LOW__SHIFT 0x0 1796e54294d6SYong Zhao #define XPB_CLG_MM_UNITID_MAPPING1__UNITID_VLD__SHIFT 0x5 1797e54294d6SYong Zhao #define XPB_CLG_MM_UNITID_MAPPING1__DEST_CLG_NUM__SHIFT 0x6 1798e54294d6SYong Zhao #define XPB_CLG_MM_UNITID_MAPPING1__UNITID_LOW_MASK 0x0000001FL 1799e54294d6SYong Zhao #define XPB_CLG_MM_UNITID_MAPPING1__UNITID_VLD_MASK 0x00000020L 1800e54294d6SYong Zhao #define XPB_CLG_MM_UNITID_MAPPING1__DEST_CLG_NUM_MASK 0x000001C0L 1801e54294d6SYong Zhao //XPB_CLG_MM_UNITID_MAPPING2 1802e54294d6SYong Zhao #define XPB_CLG_MM_UNITID_MAPPING2__UNITID_LOW__SHIFT 0x0 1803e54294d6SYong Zhao #define XPB_CLG_MM_UNITID_MAPPING2__UNITID_VLD__SHIFT 0x5 1804e54294d6SYong Zhao #define XPB_CLG_MM_UNITID_MAPPING2__DEST_CLG_NUM__SHIFT 0x6 1805e54294d6SYong Zhao #define XPB_CLG_MM_UNITID_MAPPING2__UNITID_LOW_MASK 0x0000001FL 1806e54294d6SYong Zhao #define XPB_CLG_MM_UNITID_MAPPING2__UNITID_VLD_MASK 0x00000020L 1807e54294d6SYong Zhao #define XPB_CLG_MM_UNITID_MAPPING2__DEST_CLG_NUM_MASK 0x000001C0L 1808e54294d6SYong Zhao //XPB_CLG_MM_UNITID_MAPPING3 1809e54294d6SYong Zhao #define XPB_CLG_MM_UNITID_MAPPING3__UNITID_LOW__SHIFT 0x0 1810e54294d6SYong Zhao #define XPB_CLG_MM_UNITID_MAPPING3__UNITID_VLD__SHIFT 0x5 1811e54294d6SYong Zhao #define XPB_CLG_MM_UNITID_MAPPING3__DEST_CLG_NUM__SHIFT 0x6 1812e54294d6SYong Zhao #define XPB_CLG_MM_UNITID_MAPPING3__UNITID_LOW_MASK 0x0000001FL 1813e54294d6SYong Zhao #define XPB_CLG_MM_UNITID_MAPPING3__UNITID_VLD_MASK 0x00000020L 1814e54294d6SYong Zhao #define XPB_CLG_MM_UNITID_MAPPING3__DEST_CLG_NUM_MASK 0x000001C0L 1815e54294d6SYong Zhao //XPB_CLG_GUS_UNITID_MAPPING0 1816e54294d6SYong Zhao #define XPB_CLG_GUS_UNITID_MAPPING0__UNITID_LOW__SHIFT 0x0 1817e54294d6SYong Zhao #define XPB_CLG_GUS_UNITID_MAPPING0__UNITID_VLD__SHIFT 0x5 1818e54294d6SYong Zhao #define XPB_CLG_GUS_UNITID_MAPPING0__DEST_CLG_NUM__SHIFT 0x6 1819e54294d6SYong Zhao #define XPB_CLG_GUS_UNITID_MAPPING0__UNITID_LOW_MASK 0x0000001FL 1820e54294d6SYong Zhao #define XPB_CLG_GUS_UNITID_MAPPING0__UNITID_VLD_MASK 0x00000020L 1821e54294d6SYong Zhao #define XPB_CLG_GUS_UNITID_MAPPING0__DEST_CLG_NUM_MASK 0x000001C0L 1822e54294d6SYong Zhao //XPB_CLG_GUS_UNITID_MAPPING1 1823e54294d6SYong Zhao #define XPB_CLG_GUS_UNITID_MAPPING1__UNITID_LOW__SHIFT 0x0 1824e54294d6SYong Zhao #define XPB_CLG_GUS_UNITID_MAPPING1__UNITID_VLD__SHIFT 0x5 1825e54294d6SYong Zhao #define XPB_CLG_GUS_UNITID_MAPPING1__DEST_CLG_NUM__SHIFT 0x6 1826e54294d6SYong Zhao #define XPB_CLG_GUS_UNITID_MAPPING1__UNITID_LOW_MASK 0x0000001FL 1827e54294d6SYong Zhao #define XPB_CLG_GUS_UNITID_MAPPING1__UNITID_VLD_MASK 0x00000020L 1828e54294d6SYong Zhao #define XPB_CLG_GUS_UNITID_MAPPING1__DEST_CLG_NUM_MASK 0x000001C0L 1829e54294d6SYong Zhao //XPB_CLG_GUS_UNITID_MAPPING2 1830e54294d6SYong Zhao #define XPB_CLG_GUS_UNITID_MAPPING2__UNITID_LOW__SHIFT 0x0 1831e54294d6SYong Zhao #define XPB_CLG_GUS_UNITID_MAPPING2__UNITID_VLD__SHIFT 0x5 1832e54294d6SYong Zhao #define XPB_CLG_GUS_UNITID_MAPPING2__DEST_CLG_NUM__SHIFT 0x6 1833e54294d6SYong Zhao #define XPB_CLG_GUS_UNITID_MAPPING2__UNITID_LOW_MASK 0x0000001FL 1834e54294d6SYong Zhao #define XPB_CLG_GUS_UNITID_MAPPING2__UNITID_VLD_MASK 0x00000020L 1835e54294d6SYong Zhao #define XPB_CLG_GUS_UNITID_MAPPING2__DEST_CLG_NUM_MASK 0x000001C0L 1836e54294d6SYong Zhao //XPB_CLG_GUS_UNITID_MAPPING3 1837e54294d6SYong Zhao #define XPB_CLG_GUS_UNITID_MAPPING3__UNITID_LOW__SHIFT 0x0 1838e54294d6SYong Zhao #define XPB_CLG_GUS_UNITID_MAPPING3__UNITID_VLD__SHIFT 0x5 1839e54294d6SYong Zhao #define XPB_CLG_GUS_UNITID_MAPPING3__DEST_CLG_NUM__SHIFT 0x6 1840e54294d6SYong Zhao #define XPB_CLG_GUS_UNITID_MAPPING3__UNITID_LOW_MASK 0x0000001FL 1841e54294d6SYong Zhao #define XPB_CLG_GUS_UNITID_MAPPING3__UNITID_VLD_MASK 0x00000020L 1842e54294d6SYong Zhao #define XPB_CLG_GUS_UNITID_MAPPING3__DEST_CLG_NUM_MASK 0x000001C0L 1843e54294d6SYong Zhao //XPB_CLG_GUS_UNITID_MAPPING4 1844e54294d6SYong Zhao #define XPB_CLG_GUS_UNITID_MAPPING4__UNITID_LOW__SHIFT 0x0 1845e54294d6SYong Zhao #define XPB_CLG_GUS_UNITID_MAPPING4__UNITID_VLD__SHIFT 0x5 1846e54294d6SYong Zhao #define XPB_CLG_GUS_UNITID_MAPPING4__DEST_CLG_NUM__SHIFT 0x6 1847e54294d6SYong Zhao #define XPB_CLG_GUS_UNITID_MAPPING4__UNITID_LOW_MASK 0x0000001FL 1848e54294d6SYong Zhao #define XPB_CLG_GUS_UNITID_MAPPING4__UNITID_VLD_MASK 0x00000020L 1849e54294d6SYong Zhao #define XPB_CLG_GUS_UNITID_MAPPING4__DEST_CLG_NUM_MASK 0x000001C0L 1850e54294d6SYong Zhao //XPB_CLG_GUS_UNITID_MAPPING5 1851e54294d6SYong Zhao #define XPB_CLG_GUS_UNITID_MAPPING5__UNITID_LOW__SHIFT 0x0 1852e54294d6SYong Zhao #define XPB_CLG_GUS_UNITID_MAPPING5__UNITID_VLD__SHIFT 0x5 1853e54294d6SYong Zhao #define XPB_CLG_GUS_UNITID_MAPPING5__DEST_CLG_NUM__SHIFT 0x6 1854e54294d6SYong Zhao #define XPB_CLG_GUS_UNITID_MAPPING5__UNITID_LOW_MASK 0x0000001FL 1855e54294d6SYong Zhao #define XPB_CLG_GUS_UNITID_MAPPING5__UNITID_VLD_MASK 0x00000020L 1856e54294d6SYong Zhao #define XPB_CLG_GUS_UNITID_MAPPING5__DEST_CLG_NUM_MASK 0x000001C0L 1857e54294d6SYong Zhao //XPB_CLG_GUS_UNITID_MAPPING6 1858e54294d6SYong Zhao #define XPB_CLG_GUS_UNITID_MAPPING6__UNITID_LOW__SHIFT 0x0 1859e54294d6SYong Zhao #define XPB_CLG_GUS_UNITID_MAPPING6__UNITID_VLD__SHIFT 0x5 1860e54294d6SYong Zhao #define XPB_CLG_GUS_UNITID_MAPPING6__DEST_CLG_NUM__SHIFT 0x6 1861e54294d6SYong Zhao #define XPB_CLG_GUS_UNITID_MAPPING6__UNITID_LOW_MASK 0x0000001FL 1862e54294d6SYong Zhao #define XPB_CLG_GUS_UNITID_MAPPING6__UNITID_VLD_MASK 0x00000020L 1863e54294d6SYong Zhao #define XPB_CLG_GUS_UNITID_MAPPING6__DEST_CLG_NUM_MASK 0x000001C0L 1864e54294d6SYong Zhao //XPB_CLG_GUS_UNITID_MAPPING7 1865e54294d6SYong Zhao #define XPB_CLG_GUS_UNITID_MAPPING7__UNITID_LOW__SHIFT 0x0 1866e54294d6SYong Zhao #define XPB_CLG_GUS_UNITID_MAPPING7__UNITID_VLD__SHIFT 0x5 1867e54294d6SYong Zhao #define XPB_CLG_GUS_UNITID_MAPPING7__DEST_CLG_NUM__SHIFT 0x6 1868e54294d6SYong Zhao #define XPB_CLG_GUS_UNITID_MAPPING7__UNITID_LOW_MASK 0x0000001FL 1869e54294d6SYong Zhao #define XPB_CLG_GUS_UNITID_MAPPING7__UNITID_VLD_MASK 0x00000020L 1870e54294d6SYong Zhao #define XPB_CLG_GUS_UNITID_MAPPING7__DEST_CLG_NUM_MASK 0x000001C0L 1871e54294d6SYong Zhao 1872e54294d6SYong Zhao 1873e54294d6SYong Zhao // addressBlock: athub_rpbdec 1874e54294d6SYong Zhao //RPB_PASSPW_CONF 1875e54294d6SYong Zhao #define RPB_PASSPW_CONF__XPB_PASSPW_OVERRIDE__SHIFT 0x0 1876e54294d6SYong Zhao #define RPB_PASSPW_CONF__XPB_RSPPASSPW_OVERRIDE__SHIFT 0x1 1877e54294d6SYong Zhao #define RPB_PASSPW_CONF__ATC_MM_TR_PASSPW_OVERRIDE__SHIFT 0x2 1878e54294d6SYong Zhao #define RPB_PASSPW_CONF__ATC_MM_TR_PASSPW_OVERRIDE_EN__SHIFT 0x3 1879e54294d6SYong Zhao #define RPB_PASSPW_CONF__ATC_MM_RSPPASSPW_OVERRIDE__SHIFT 0x4 1880e54294d6SYong Zhao #define RPB_PASSPW_CONF__ATC_MM_RSPPASSPW_OVERRIDE_EN__SHIFT 0x5 1881e54294d6SYong Zhao #define RPB_PASSPW_CONF__ATC_GFX_TR_PASSPW_OVERRIDE__SHIFT 0x6 1882e54294d6SYong Zhao #define RPB_PASSPW_CONF__ATC_GFX_TR_PASSPW_OVERRIDE_EN__SHIFT 0x7 1883e54294d6SYong Zhao #define RPB_PASSPW_CONF__ATC_GFX_RSPPASSPW_OVERRIDE__SHIFT 0x8 1884e54294d6SYong Zhao #define RPB_PASSPW_CONF__ATC_GFX_RSPPASSPW_OVERRIDE_EN__SHIFT 0x9 1885e54294d6SYong Zhao #define RPB_PASSPW_CONF__ATC_PAGE_PASSPW_OVERRIDE__SHIFT 0xa 1886e54294d6SYong Zhao #define RPB_PASSPW_CONF__ATC_PAGE_PASSPW_OVERRIDE_EN__SHIFT 0xb 1887e54294d6SYong Zhao #define RPB_PASSPW_CONF__ATC_PAGE_RSPPASSPW_OVERRIDE__SHIFT 0xc 1888e54294d6SYong Zhao #define RPB_PASSPW_CONF__ATC_PAGE_RSPPASSPW_OVERRIDE_EN__SHIFT 0xd 1889e54294d6SYong Zhao #define RPB_PASSPW_CONF__WR_PASSPW_OVERRIDE__SHIFT 0xe 1890e54294d6SYong Zhao #define RPB_PASSPW_CONF__WR_RSPPASSPW_OVERRIDE__SHIFT 0xf 1891e54294d6SYong Zhao #define RPB_PASSPW_CONF__RD_PASSPW_OVERRIDE__SHIFT 0x10 1892e54294d6SYong Zhao #define RPB_PASSPW_CONF__RD_RSPPASSPW_OVERRIDE__SHIFT 0x11 1893e54294d6SYong Zhao #define RPB_PASSPW_CONF__ATOMIC_PASSPW_OVERRIDE__SHIFT 0x12 1894e54294d6SYong Zhao #define RPB_PASSPW_CONF__ATOMIC_RSPPASSPW_OVERRIDE__SHIFT 0x13 1895e54294d6SYong Zhao #define RPB_PASSPW_CONF__WRRSP_PASSPW_OVERRIDE__SHIFT 0x14 1896e54294d6SYong Zhao #define RPB_PASSPW_CONF__WRRSP_PASSPW_OVERRIDE_EN__SHIFT 0x15 1897e54294d6SYong Zhao #define RPB_PASSPW_CONF__RDRSP_PASSPW_OVERRIDE__SHIFT 0x16 1898e54294d6SYong Zhao #define RPB_PASSPW_CONF__RDRSP_PASSPW_OVERRIDE_EN__SHIFT 0x17 1899e54294d6SYong Zhao #define RPB_PASSPW_CONF__XPB_PASSPW_OVERRIDE_MASK 0x00000001L 1900e54294d6SYong Zhao #define RPB_PASSPW_CONF__XPB_RSPPASSPW_OVERRIDE_MASK 0x00000002L 1901e54294d6SYong Zhao #define RPB_PASSPW_CONF__ATC_MM_TR_PASSPW_OVERRIDE_MASK 0x00000004L 1902e54294d6SYong Zhao #define RPB_PASSPW_CONF__ATC_MM_TR_PASSPW_OVERRIDE_EN_MASK 0x00000008L 1903e54294d6SYong Zhao #define RPB_PASSPW_CONF__ATC_MM_RSPPASSPW_OVERRIDE_MASK 0x00000010L 1904e54294d6SYong Zhao #define RPB_PASSPW_CONF__ATC_MM_RSPPASSPW_OVERRIDE_EN_MASK 0x00000020L 1905e54294d6SYong Zhao #define RPB_PASSPW_CONF__ATC_GFX_TR_PASSPW_OVERRIDE_MASK 0x00000040L 1906e54294d6SYong Zhao #define RPB_PASSPW_CONF__ATC_GFX_TR_PASSPW_OVERRIDE_EN_MASK 0x00000080L 1907e54294d6SYong Zhao #define RPB_PASSPW_CONF__ATC_GFX_RSPPASSPW_OVERRIDE_MASK 0x00000100L 1908e54294d6SYong Zhao #define RPB_PASSPW_CONF__ATC_GFX_RSPPASSPW_OVERRIDE_EN_MASK 0x00000200L 1909e54294d6SYong Zhao #define RPB_PASSPW_CONF__ATC_PAGE_PASSPW_OVERRIDE_MASK 0x00000400L 1910e54294d6SYong Zhao #define RPB_PASSPW_CONF__ATC_PAGE_PASSPW_OVERRIDE_EN_MASK 0x00000800L 1911e54294d6SYong Zhao #define RPB_PASSPW_CONF__ATC_PAGE_RSPPASSPW_OVERRIDE_MASK 0x00001000L 1912e54294d6SYong Zhao #define RPB_PASSPW_CONF__ATC_PAGE_RSPPASSPW_OVERRIDE_EN_MASK 0x00002000L 1913e54294d6SYong Zhao #define RPB_PASSPW_CONF__WR_PASSPW_OVERRIDE_MASK 0x00004000L 1914e54294d6SYong Zhao #define RPB_PASSPW_CONF__WR_RSPPASSPW_OVERRIDE_MASK 0x00008000L 1915e54294d6SYong Zhao #define RPB_PASSPW_CONF__RD_PASSPW_OVERRIDE_MASK 0x00010000L 1916e54294d6SYong Zhao #define RPB_PASSPW_CONF__RD_RSPPASSPW_OVERRIDE_MASK 0x00020000L 1917e54294d6SYong Zhao #define RPB_PASSPW_CONF__ATOMIC_PASSPW_OVERRIDE_MASK 0x00040000L 1918e54294d6SYong Zhao #define RPB_PASSPW_CONF__ATOMIC_RSPPASSPW_OVERRIDE_MASK 0x00080000L 1919e54294d6SYong Zhao #define RPB_PASSPW_CONF__WRRSP_PASSPW_OVERRIDE_MASK 0x00100000L 1920e54294d6SYong Zhao #define RPB_PASSPW_CONF__WRRSP_PASSPW_OVERRIDE_EN_MASK 0x00200000L 1921e54294d6SYong Zhao #define RPB_PASSPW_CONF__RDRSP_PASSPW_OVERRIDE_MASK 0x00400000L 1922e54294d6SYong Zhao #define RPB_PASSPW_CONF__RDRSP_PASSPW_OVERRIDE_EN_MASK 0x00800000L 1923e54294d6SYong Zhao //RPB_BLOCKLEVEL_CONF 1924e54294d6SYong Zhao #define RPB_BLOCKLEVEL_CONF__XPB_BLOCKLEVEL_OVERRIDE__SHIFT 0x0 1925e54294d6SYong Zhao #define RPB_BLOCKLEVEL_CONF__XPB_BLOCKLEVEL_OVERRIDE_EN__SHIFT 0x2 1926e54294d6SYong Zhao #define RPB_BLOCKLEVEL_CONF__ATC_MM_TR_BLOCKLEVEL__SHIFT 0x3 1927e54294d6SYong Zhao #define RPB_BLOCKLEVEL_CONF__ATC_GFX_TR_BLOCKLEVEL__SHIFT 0x5 1928e54294d6SYong Zhao #define RPB_BLOCKLEVEL_CONF__ATC_PAGE_BLOCKLEVEL__SHIFT 0x7 1929e54294d6SYong Zhao #define RPB_BLOCKLEVEL_CONF__ATC_INV_BLOCKLEVEL__SHIFT 0x9 1930e54294d6SYong Zhao #define RPB_BLOCKLEVEL_CONF__IO_WR_BLOCKLEVEL_OVERRIDE__SHIFT 0xb 1931e54294d6SYong Zhao #define RPB_BLOCKLEVEL_CONF__IO_WR_BLOCKLEVEL_OVERRIDE_EN__SHIFT 0xd 1932e54294d6SYong Zhao #define RPB_BLOCKLEVEL_CONF__IO_RD_BLOCKLEVEL_OVERRIDE__SHIFT 0xe 1933e54294d6SYong Zhao #define RPB_BLOCKLEVEL_CONF__IO_RD_BLOCKLEVEL_OVERRIDE_EN__SHIFT 0x10 1934e54294d6SYong Zhao #define RPB_BLOCKLEVEL_CONF__ATOMIC_BLOCKLEVEL_OVERRIDE__SHIFT 0x11 1935e54294d6SYong Zhao #define RPB_BLOCKLEVEL_CONF__ATOMIC_BLOCKLEVEL_OVERRIDE_EN__SHIFT 0x13 1936e54294d6SYong Zhao #define RPB_BLOCKLEVEL_CONF__XPB_BLOCKLEVEL_OVERRIDE_MASK 0x00000003L 1937e54294d6SYong Zhao #define RPB_BLOCKLEVEL_CONF__XPB_BLOCKLEVEL_OVERRIDE_EN_MASK 0x00000004L 1938e54294d6SYong Zhao #define RPB_BLOCKLEVEL_CONF__ATC_MM_TR_BLOCKLEVEL_MASK 0x00000018L 1939e54294d6SYong Zhao #define RPB_BLOCKLEVEL_CONF__ATC_GFX_TR_BLOCKLEVEL_MASK 0x00000060L 1940e54294d6SYong Zhao #define RPB_BLOCKLEVEL_CONF__ATC_PAGE_BLOCKLEVEL_MASK 0x00000180L 1941e54294d6SYong Zhao #define RPB_BLOCKLEVEL_CONF__ATC_INV_BLOCKLEVEL_MASK 0x00000600L 1942e54294d6SYong Zhao #define RPB_BLOCKLEVEL_CONF__IO_WR_BLOCKLEVEL_OVERRIDE_MASK 0x00001800L 1943e54294d6SYong Zhao #define RPB_BLOCKLEVEL_CONF__IO_WR_BLOCKLEVEL_OVERRIDE_EN_MASK 0x00002000L 1944e54294d6SYong Zhao #define RPB_BLOCKLEVEL_CONF__IO_RD_BLOCKLEVEL_OVERRIDE_MASK 0x0000C000L 1945e54294d6SYong Zhao #define RPB_BLOCKLEVEL_CONF__IO_RD_BLOCKLEVEL_OVERRIDE_EN_MASK 0x00010000L 1946e54294d6SYong Zhao #define RPB_BLOCKLEVEL_CONF__ATOMIC_BLOCKLEVEL_OVERRIDE_MASK 0x00060000L 1947e54294d6SYong Zhao #define RPB_BLOCKLEVEL_CONF__ATOMIC_BLOCKLEVEL_OVERRIDE_EN_MASK 0x00080000L 1948e54294d6SYong Zhao //RPB_TAG_CONF 1949e54294d6SYong Zhao #define RPB_TAG_CONF__RPB_IO_RD__SHIFT 0x0 1950e54294d6SYong Zhao #define RPB_TAG_CONF__RPB_IO_WR__SHIFT 0xa 1951e54294d6SYong Zhao #define RPB_TAG_CONF__RPB_IO_RD_MASK 0x000003FFL 1952e54294d6SYong Zhao #define RPB_TAG_CONF__RPB_IO_WR_MASK 0x000FFC00L 1953e54294d6SYong Zhao //RPB_EFF_CNTL 1954e54294d6SYong Zhao #define RPB_EFF_CNTL__WR_LAZY_TIMER__SHIFT 0x0 1955e54294d6SYong Zhao #define RPB_EFF_CNTL__RD_LAZY_TIMER__SHIFT 0x8 1956e54294d6SYong Zhao #define RPB_EFF_CNTL__WR_LAZY_TIMER_MASK 0x000000FFL 1957e54294d6SYong Zhao #define RPB_EFF_CNTL__RD_LAZY_TIMER_MASK 0x0000FF00L 1958e54294d6SYong Zhao //RPB_ARB_CNTL 1959e54294d6SYong Zhao #define RPB_ARB_CNTL__RD_SWITCH_NUM__SHIFT 0x0 1960e54294d6SYong Zhao #define RPB_ARB_CNTL__WR_SWITCH_NUM__SHIFT 0x8 1961e54294d6SYong Zhao #define RPB_ARB_CNTL__ATC_TR_SWITCH_NUM__SHIFT 0x10 1962e54294d6SYong Zhao #define RPB_ARB_CNTL__ARB_MODE__SHIFT 0x18 1963e54294d6SYong Zhao #define RPB_ARB_CNTL__SWITCH_NUM_MODE__SHIFT 0x19 1964e54294d6SYong Zhao #define RPB_ARB_CNTL__RPB_VC0_CRD__SHIFT 0x1a 1965e54294d6SYong Zhao #define RPB_ARB_CNTL__DISABLE_FED__SHIFT 0x1f 1966e54294d6SYong Zhao #define RPB_ARB_CNTL__RD_SWITCH_NUM_MASK 0x000000FFL 1967e54294d6SYong Zhao #define RPB_ARB_CNTL__WR_SWITCH_NUM_MASK 0x0000FF00L 1968e54294d6SYong Zhao #define RPB_ARB_CNTL__ATC_TR_SWITCH_NUM_MASK 0x00FF0000L 1969e54294d6SYong Zhao #define RPB_ARB_CNTL__ARB_MODE_MASK 0x01000000L 1970e54294d6SYong Zhao #define RPB_ARB_CNTL__SWITCH_NUM_MODE_MASK 0x02000000L 1971e54294d6SYong Zhao #define RPB_ARB_CNTL__RPB_VC0_CRD_MASK 0x7C000000L 1972e54294d6SYong Zhao #define RPB_ARB_CNTL__DISABLE_FED_MASK 0x80000000L 1973e54294d6SYong Zhao //RPB_ARB_CNTL2 1974e54294d6SYong Zhao #define RPB_ARB_CNTL2__P2P_SWITCH_NUM__SHIFT 0x0 1975e54294d6SYong Zhao #define RPB_ARB_CNTL2__ATOMIC_SWITCH_NUM__SHIFT 0x8 1976e54294d6SYong Zhao #define RPB_ARB_CNTL2__ATC_PAGE_SWITCH_NUM__SHIFT 0x10 1977e54294d6SYong Zhao #define RPB_ARB_CNTL2__RPB_VC1_CRD__SHIFT 0x18 1978e54294d6SYong Zhao #define RPB_ARB_CNTL2__P2P_SWITCH_NUM_MASK 0x000000FFL 1979e54294d6SYong Zhao #define RPB_ARB_CNTL2__ATOMIC_SWITCH_NUM_MASK 0x0000FF00L 1980e54294d6SYong Zhao #define RPB_ARB_CNTL2__ATC_PAGE_SWITCH_NUM_MASK 0x00FF0000L 1981e54294d6SYong Zhao #define RPB_ARB_CNTL2__RPB_VC1_CRD_MASK 0x1F000000L 1982e54294d6SYong Zhao //RPB_BIF_CNTL 1983e54294d6SYong Zhao #define RPB_BIF_CNTL__VC0_SWITCH_NUM__SHIFT 0x0 1984e54294d6SYong Zhao #define RPB_BIF_CNTL__VC1_SWITCH_NUM__SHIFT 0x8 1985e54294d6SYong Zhao #define RPB_BIF_CNTL__VC2_SWITCH_NUM__SHIFT 0x10 1986e54294d6SYong Zhao #define RPB_BIF_CNTL__NBIF_DMA_ORIGCLKCTL_EN__SHIFT 0x18 1987e54294d6SYong Zhao #define RPB_BIF_CNTL__TR_QOS_VC__SHIFT 0x19 1988e54294d6SYong Zhao #define RPB_BIF_CNTL__RESERVED__SHIFT 0x1c 1989e54294d6SYong Zhao #define RPB_BIF_CNTL__VC0_SWITCH_NUM_MASK 0x000000FFL 1990e54294d6SYong Zhao #define RPB_BIF_CNTL__VC1_SWITCH_NUM_MASK 0x0000FF00L 1991e54294d6SYong Zhao #define RPB_BIF_CNTL__VC2_SWITCH_NUM_MASK 0x00FF0000L 1992e54294d6SYong Zhao #define RPB_BIF_CNTL__NBIF_DMA_ORIGCLKCTL_EN_MASK 0x01000000L 1993e54294d6SYong Zhao #define RPB_BIF_CNTL__TR_QOS_VC_MASK 0x0E000000L 1994e54294d6SYong Zhao #define RPB_BIF_CNTL__RESERVED_MASK 0xF0000000L 1995e54294d6SYong Zhao //RPB_BIF_CNTL2 1996e54294d6SYong Zhao #define RPB_BIF_CNTL2__ARB_MODE__SHIFT 0x0 1997e54294d6SYong Zhao #define RPB_BIF_CNTL2__DRAIN_VC_NUM__SHIFT 0x1 1998e54294d6SYong Zhao #define RPB_BIF_CNTL2__SWITCH_ENABLE__SHIFT 0x3 1999e54294d6SYong Zhao #define RPB_BIF_CNTL2__SWITCH_THRESHOLD__SHIFT 0x4 2000e54294d6SYong Zhao #define RPB_BIF_CNTL2__PAGE_PRI_EN__SHIFT 0xc 2001e54294d6SYong Zhao #define RPB_BIF_CNTL2__MM_TR_PRI_EN__SHIFT 0xd 2002e54294d6SYong Zhao #define RPB_BIF_CNTL2__GFX_TR_PRI_EN__SHIFT 0xe 2003e54294d6SYong Zhao #define RPB_BIF_CNTL2__VC0_CHAINED_OVERRIDE__SHIFT 0xf 2004e54294d6SYong Zhao #define RPB_BIF_CNTL2__PARITY_CHECK_EN__SHIFT 0x10 2005e54294d6SYong Zhao #define RPB_BIF_CNTL2__NBIF_HST_COMPCLKCTL_EN__SHIFT 0x11 2006e54294d6SYong Zhao #define RPB_BIF_CNTL2__RESERVED__SHIFT 0x12 2007e54294d6SYong Zhao #define RPB_BIF_CNTL2__ARB_MODE_MASK 0x00000001L 2008e54294d6SYong Zhao #define RPB_BIF_CNTL2__DRAIN_VC_NUM_MASK 0x00000006L 2009e54294d6SYong Zhao #define RPB_BIF_CNTL2__SWITCH_ENABLE_MASK 0x00000008L 2010e54294d6SYong Zhao #define RPB_BIF_CNTL2__SWITCH_THRESHOLD_MASK 0x00000FF0L 2011e54294d6SYong Zhao #define RPB_BIF_CNTL2__PAGE_PRI_EN_MASK 0x00001000L 2012e54294d6SYong Zhao #define RPB_BIF_CNTL2__MM_TR_PRI_EN_MASK 0x00002000L 2013e54294d6SYong Zhao #define RPB_BIF_CNTL2__GFX_TR_PRI_EN_MASK 0x00004000L 2014e54294d6SYong Zhao #define RPB_BIF_CNTL2__VC0_CHAINED_OVERRIDE_MASK 0x00008000L 2015e54294d6SYong Zhao #define RPB_BIF_CNTL2__PARITY_CHECK_EN_MASK 0x00010000L 2016e54294d6SYong Zhao #define RPB_BIF_CNTL2__NBIF_HST_COMPCLKCTL_EN_MASK 0x00020000L 2017e54294d6SYong Zhao #define RPB_BIF_CNTL2__RESERVED_MASK 0xFFFC0000L 2018e54294d6SYong Zhao //RPB_WR_SWITCH_CNTL 2019e54294d6SYong Zhao #define RPB_WR_SWITCH_CNTL__QUEUE0_SWITCH_NUM__SHIFT 0x0 2020e54294d6SYong Zhao #define RPB_WR_SWITCH_CNTL__QUEUE1_SWITCH_NUM__SHIFT 0x7 2021e54294d6SYong Zhao #define RPB_WR_SWITCH_CNTL__QUEUE2_SWITCH_NUM__SHIFT 0xe 2022e54294d6SYong Zhao #define RPB_WR_SWITCH_CNTL__QUEUE3_SWITCH_NUM__SHIFT 0x15 2023e54294d6SYong Zhao #define RPB_WR_SWITCH_CNTL__SWITCH_NUM_MODE__SHIFT 0x1c 2024e54294d6SYong Zhao #define RPB_WR_SWITCH_CNTL__WORKLOAD_ADJUST_EN__SHIFT 0x1d 2025e54294d6SYong Zhao #define RPB_WR_SWITCH_CNTL__WEIGHT_ADJUST_STEP__SHIFT 0x1e 2026e54294d6SYong Zhao #define RPB_WR_SWITCH_CNTL__QUEUE0_SWITCH_NUM_MASK 0x0000007FL 2027e54294d6SYong Zhao #define RPB_WR_SWITCH_CNTL__QUEUE1_SWITCH_NUM_MASK 0x00003F80L 2028e54294d6SYong Zhao #define RPB_WR_SWITCH_CNTL__QUEUE2_SWITCH_NUM_MASK 0x001FC000L 2029e54294d6SYong Zhao #define RPB_WR_SWITCH_CNTL__QUEUE3_SWITCH_NUM_MASK 0x0FE00000L 2030e54294d6SYong Zhao #define RPB_WR_SWITCH_CNTL__SWITCH_NUM_MODE_MASK 0x10000000L 2031e54294d6SYong Zhao #define RPB_WR_SWITCH_CNTL__WORKLOAD_ADJUST_EN_MASK 0x20000000L 2032e54294d6SYong Zhao #define RPB_WR_SWITCH_CNTL__WEIGHT_ADJUST_STEP_MASK 0xC0000000L 2033e54294d6SYong Zhao //RPB_RD_SWITCH_CNTL 2034e54294d6SYong Zhao #define RPB_RD_SWITCH_CNTL__QUEUE0_SWITCH_NUM__SHIFT 0x0 2035e54294d6SYong Zhao #define RPB_RD_SWITCH_CNTL__QUEUE1_SWITCH_NUM__SHIFT 0x7 2036e54294d6SYong Zhao #define RPB_RD_SWITCH_CNTL__QUEUE2_SWITCH_NUM__SHIFT 0xe 2037e54294d6SYong Zhao #define RPB_RD_SWITCH_CNTL__QUEUE3_SWITCH_NUM__SHIFT 0x15 2038e54294d6SYong Zhao #define RPB_RD_SWITCH_CNTL__SWITCH_NUM_MODE__SHIFT 0x1c 2039e54294d6SYong Zhao #define RPB_RD_SWITCH_CNTL__WORKLOAD_ADJUST_EN__SHIFT 0x1d 2040e54294d6SYong Zhao #define RPB_RD_SWITCH_CNTL__WEIGHT_ADJUST_STEP__SHIFT 0x1e 2041e54294d6SYong Zhao #define RPB_RD_SWITCH_CNTL__QUEUE0_SWITCH_NUM_MASK 0x0000007FL 2042e54294d6SYong Zhao #define RPB_RD_SWITCH_CNTL__QUEUE1_SWITCH_NUM_MASK 0x00003F80L 2043e54294d6SYong Zhao #define RPB_RD_SWITCH_CNTL__QUEUE2_SWITCH_NUM_MASK 0x001FC000L 2044e54294d6SYong Zhao #define RPB_RD_SWITCH_CNTL__QUEUE3_SWITCH_NUM_MASK 0x0FE00000L 2045e54294d6SYong Zhao #define RPB_RD_SWITCH_CNTL__SWITCH_NUM_MODE_MASK 0x10000000L 2046e54294d6SYong Zhao #define RPB_RD_SWITCH_CNTL__WORKLOAD_ADJUST_EN_MASK 0x20000000L 2047e54294d6SYong Zhao #define RPB_RD_SWITCH_CNTL__WEIGHT_ADJUST_STEP_MASK 0xC0000000L 2048e54294d6SYong Zhao //RPB_SWITCH_CNTL2 2049e54294d6SYong Zhao #define RPB_SWITCH_CNTL2__RD_QUEUE4_SWITCH_NUM__SHIFT 0x0 2050e54294d6SYong Zhao #define RPB_SWITCH_CNTL2__RD_QUEUE5_SWITCH_NUM__SHIFT 0x7 2051e54294d6SYong Zhao #define RPB_SWITCH_CNTL2__WR_QUEUE4_SWITCH_NUM__SHIFT 0xe 2052e54294d6SYong Zhao #define RPB_SWITCH_CNTL2__WR_QUEUE5_SWITCH_NUM__SHIFT 0x15 2053e54294d6SYong Zhao #define RPB_SWITCH_CNTL2__RD_QUEUE4_SWITCH_NUM_MASK 0x0000007FL 2054e54294d6SYong Zhao #define RPB_SWITCH_CNTL2__RD_QUEUE5_SWITCH_NUM_MASK 0x00003F80L 2055e54294d6SYong Zhao #define RPB_SWITCH_CNTL2__WR_QUEUE4_SWITCH_NUM_MASK 0x001FC000L 2056e54294d6SYong Zhao #define RPB_SWITCH_CNTL2__WR_QUEUE5_SWITCH_NUM_MASK 0x0FE00000L 2057e54294d6SYong Zhao //RPB_CID_QUEUE_WR 2058e54294d6SYong Zhao #define RPB_CID_QUEUE_WR__CLIENT_ID_LOW__SHIFT 0x0 2059e54294d6SYong Zhao #define RPB_CID_QUEUE_WR__CLIENT_ID_HIGH__SHIFT 0x5 2060e54294d6SYong Zhao #define RPB_CID_QUEUE_WR__UPDATE_MODE__SHIFT 0xb 2061e54294d6SYong Zhao #define RPB_CID_QUEUE_WR__WRITE_QUEUE__SHIFT 0xc 2062e54294d6SYong Zhao #define RPB_CID_QUEUE_WR__READ_QUEUE__SHIFT 0xf 2063e54294d6SYong Zhao #define RPB_CID_QUEUE_WR__UPDATE__SHIFT 0x12 2064e54294d6SYong Zhao #define RPB_CID_QUEUE_WR__CLIENT_ID_LOW_MASK 0x0000001FL 2065e54294d6SYong Zhao #define RPB_CID_QUEUE_WR__CLIENT_ID_HIGH_MASK 0x000007E0L 2066e54294d6SYong Zhao #define RPB_CID_QUEUE_WR__UPDATE_MODE_MASK 0x00000800L 2067e54294d6SYong Zhao #define RPB_CID_QUEUE_WR__WRITE_QUEUE_MASK 0x00007000L 2068e54294d6SYong Zhao #define RPB_CID_QUEUE_WR__READ_QUEUE_MASK 0x00038000L 2069e54294d6SYong Zhao #define RPB_CID_QUEUE_WR__UPDATE_MASK 0x00040000L 2070e54294d6SYong Zhao //RPB_EA_QUEUE_WR 2071e54294d6SYong Zhao #define RPB_EA_QUEUE_WR__EA_NUMBER__SHIFT 0x0 2072e54294d6SYong Zhao #define RPB_EA_QUEUE_WR__WRITE_QUEUE__SHIFT 0x5 2073e54294d6SYong Zhao #define RPB_EA_QUEUE_WR__READ_QUEUE__SHIFT 0x8 2074e54294d6SYong Zhao #define RPB_EA_QUEUE_WR__UPDATE__SHIFT 0xb 2075e54294d6SYong Zhao #define RPB_EA_QUEUE_WR__EA_NUMBER_MASK 0x0000001FL 2076e54294d6SYong Zhao #define RPB_EA_QUEUE_WR__WRITE_QUEUE_MASK 0x000000E0L 2077e54294d6SYong Zhao #define RPB_EA_QUEUE_WR__READ_QUEUE_MASK 0x00000700L 2078e54294d6SYong Zhao #define RPB_EA_QUEUE_WR__UPDATE_MASK 0x00000800L 2079e54294d6SYong Zhao //RPB_CID_QUEUE_RD 2080e54294d6SYong Zhao #define RPB_CID_QUEUE_RD__CLIENT_ID_LOW__SHIFT 0x0 2081e54294d6SYong Zhao #define RPB_CID_QUEUE_RD__CLIENT_ID_HIGH__SHIFT 0x5 2082e54294d6SYong Zhao #define RPB_CID_QUEUE_RD__WRITE_QUEUE__SHIFT 0xb 2083e54294d6SYong Zhao #define RPB_CID_QUEUE_RD__READ_QUEUE__SHIFT 0xe 2084e54294d6SYong Zhao #define RPB_CID_QUEUE_RD__CLIENT_ID_LOW_MASK 0x0000001FL 2085e54294d6SYong Zhao #define RPB_CID_QUEUE_RD__CLIENT_ID_HIGH_MASK 0x000007E0L 2086e54294d6SYong Zhao #define RPB_CID_QUEUE_RD__WRITE_QUEUE_MASK 0x00003800L 2087e54294d6SYong Zhao #define RPB_CID_QUEUE_RD__READ_QUEUE_MASK 0x0001C000L 2088e54294d6SYong Zhao //RPB_CID_QUEUE_EX 2089e54294d6SYong Zhao #define RPB_CID_QUEUE_EX__START__SHIFT 0x0 2090e54294d6SYong Zhao #define RPB_CID_QUEUE_EX__OFFSET__SHIFT 0x1 2091e54294d6SYong Zhao #define RPB_CID_QUEUE_EX__START_MASK 0x00000001L 2092e54294d6SYong Zhao #define RPB_CID_QUEUE_EX__OFFSET_MASK 0x000001FEL 2093e54294d6SYong Zhao //RPB_CID_QUEUE_EX_DATA 2094e54294d6SYong Zhao #define RPB_CID_QUEUE_EX_DATA__WRITE_ENTRIES__SHIFT 0x0 2095e54294d6SYong Zhao #define RPB_CID_QUEUE_EX_DATA__READ_ENTRIES__SHIFT 0x10 2096e54294d6SYong Zhao #define RPB_CID_QUEUE_EX_DATA__WRITE_ENTRIES_MASK 0x0000FFFFL 2097e54294d6SYong Zhao #define RPB_CID_QUEUE_EX_DATA__READ_ENTRIES_MASK 0xFFFF0000L 2098e54294d6SYong Zhao //RPB_DEINTRLV_COMBINE_CNTL 2099e54294d6SYong Zhao #define RPB_DEINTRLV_COMBINE_CNTL__WC_CHAINED_FLUSH_TIMER__SHIFT 0x0 2100e54294d6SYong Zhao #define RPB_DEINTRLV_COMBINE_CNTL__WC_CHAINED_BREAK_EN__SHIFT 0x4 2101e54294d6SYong Zhao #define RPB_DEINTRLV_COMBINE_CNTL__WC_HANDLE_CHECK_DISABLE__SHIFT 0x5 2102e54294d6SYong Zhao #define RPB_DEINTRLV_COMBINE_CNTL__XPB_WRREQ_CRD__SHIFT 0x6 2103e54294d6SYong Zhao #define RPB_DEINTRLV_COMBINE_CNTL__RESERVED__SHIFT 0xe 2104e54294d6SYong Zhao #define RPB_DEINTRLV_COMBINE_CNTL__WC_CHAINED_FLUSH_TIMER_MASK 0x0000000FL 2105e54294d6SYong Zhao #define RPB_DEINTRLV_COMBINE_CNTL__WC_CHAINED_BREAK_EN_MASK 0x00000010L 2106e54294d6SYong Zhao #define RPB_DEINTRLV_COMBINE_CNTL__WC_HANDLE_CHECK_DISABLE_MASK 0x00000020L 2107e54294d6SYong Zhao #define RPB_DEINTRLV_COMBINE_CNTL__XPB_WRREQ_CRD_MASK 0x00003FC0L 2108e54294d6SYong Zhao #define RPB_DEINTRLV_COMBINE_CNTL__RESERVED_MASK 0xFFFFC000L 2109e54294d6SYong Zhao //RPB_VC_SWITCH_RDWR 2110e54294d6SYong Zhao #define RPB_VC_SWITCH_RDWR__MODE__SHIFT 0x0 2111e54294d6SYong Zhao #define RPB_VC_SWITCH_RDWR__NUM_RD__SHIFT 0x2 2112e54294d6SYong Zhao #define RPB_VC_SWITCH_RDWR__NUM_WR__SHIFT 0xa 2113e54294d6SYong Zhao #define RPB_VC_SWITCH_RDWR__XPB_RDREQ_CRD__SHIFT 0x12 2114e54294d6SYong Zhao #define RPB_VC_SWITCH_RDWR__RESERVED__SHIFT 0x1a 2115e54294d6SYong Zhao #define RPB_VC_SWITCH_RDWR__MODE_MASK 0x00000003L 2116e54294d6SYong Zhao #define RPB_VC_SWITCH_RDWR__NUM_RD_MASK 0x000003FCL 2117e54294d6SYong Zhao #define RPB_VC_SWITCH_RDWR__NUM_WR_MASK 0x0003FC00L 2118e54294d6SYong Zhao #define RPB_VC_SWITCH_RDWR__XPB_RDREQ_CRD_MASK 0x03FC0000L 2119e54294d6SYong Zhao #define RPB_VC_SWITCH_RDWR__RESERVED_MASK 0xFC000000L 2120e54294d6SYong Zhao //RPB_PERF_COUNTER_CNTL 2121e54294d6SYong Zhao #define RPB_PERF_COUNTER_CNTL__PERF_COUNTER_SELECT__SHIFT 0x0 2122e54294d6SYong Zhao #define RPB_PERF_COUNTER_CNTL__CLEAR_SELECTED_PERF_COUNTER__SHIFT 0x2 2123e54294d6SYong Zhao #define RPB_PERF_COUNTER_CNTL__CLEAR_ALL_PERF_COUNTERS__SHIFT 0x3 2124e54294d6SYong Zhao #define RPB_PERF_COUNTER_CNTL__STOP_ON_COUNTER_SATURATION__SHIFT 0x4 2125e54294d6SYong Zhao #define RPB_PERF_COUNTER_CNTL__ENABLE_PERF_COUNTERS__SHIFT 0x5 2126e54294d6SYong Zhao #define RPB_PERF_COUNTER_CNTL__PERF_COUNTER_ASSIGN_0__SHIFT 0x9 2127e54294d6SYong Zhao #define RPB_PERF_COUNTER_CNTL__PERF_COUNTER_ASSIGN_1__SHIFT 0xe 2128e54294d6SYong Zhao #define RPB_PERF_COUNTER_CNTL__PERF_COUNTER_ASSIGN_2__SHIFT 0x13 2129e54294d6SYong Zhao #define RPB_PERF_COUNTER_CNTL__PERF_COUNTER_ASSIGN_3__SHIFT 0x18 2130e54294d6SYong Zhao #define RPB_PERF_COUNTER_CNTL__PERF_COUNTER_SELECT_MASK 0x00000003L 2131e54294d6SYong Zhao #define RPB_PERF_COUNTER_CNTL__CLEAR_SELECTED_PERF_COUNTER_MASK 0x00000004L 2132e54294d6SYong Zhao #define RPB_PERF_COUNTER_CNTL__CLEAR_ALL_PERF_COUNTERS_MASK 0x00000008L 2133e54294d6SYong Zhao #define RPB_PERF_COUNTER_CNTL__STOP_ON_COUNTER_SATURATION_MASK 0x00000010L 2134e54294d6SYong Zhao #define RPB_PERF_COUNTER_CNTL__ENABLE_PERF_COUNTERS_MASK 0x000001E0L 2135e54294d6SYong Zhao #define RPB_PERF_COUNTER_CNTL__PERF_COUNTER_ASSIGN_0_MASK 0x00003E00L 2136e54294d6SYong Zhao #define RPB_PERF_COUNTER_CNTL__PERF_COUNTER_ASSIGN_1_MASK 0x0007C000L 2137e54294d6SYong Zhao #define RPB_PERF_COUNTER_CNTL__PERF_COUNTER_ASSIGN_2_MASK 0x00F80000L 2138e54294d6SYong Zhao #define RPB_PERF_COUNTER_CNTL__PERF_COUNTER_ASSIGN_3_MASK 0x1F000000L 2139e54294d6SYong Zhao //RPB_PERF_COUNTER_STATUS 2140e54294d6SYong Zhao #define RPB_PERF_COUNTER_STATUS__PERFORMANCE_COUNTER_VALUE__SHIFT 0x0 2141e54294d6SYong Zhao #define RPB_PERF_COUNTER_STATUS__PERFORMANCE_COUNTER_VALUE_MASK 0xFFFFFFFFL 2142e54294d6SYong Zhao //RPB_PERFCOUNTER_LO 2143e54294d6SYong Zhao #define RPB_PERFCOUNTER_LO__COUNTER_LO__SHIFT 0x0 2144e54294d6SYong Zhao #define RPB_PERFCOUNTER_LO__COUNTER_LO_MASK 0xFFFFFFFFL 2145e54294d6SYong Zhao //RPB_PERFCOUNTER_HI 2146e54294d6SYong Zhao #define RPB_PERFCOUNTER_HI__COUNTER_HI__SHIFT 0x0 2147e54294d6SYong Zhao #define RPB_PERFCOUNTER_HI__COMPARE_VALUE__SHIFT 0x10 2148e54294d6SYong Zhao #define RPB_PERFCOUNTER_HI__COUNTER_HI_MASK 0x0000FFFFL 2149e54294d6SYong Zhao #define RPB_PERFCOUNTER_HI__COMPARE_VALUE_MASK 0xFFFF0000L 2150e54294d6SYong Zhao //RPB_PERFCOUNTER0_CFG 2151e54294d6SYong Zhao #define RPB_PERFCOUNTER0_CFG__PERF_SEL__SHIFT 0x0 2152e54294d6SYong Zhao #define RPB_PERFCOUNTER0_CFG__PERF_SEL_END__SHIFT 0x8 2153e54294d6SYong Zhao #define RPB_PERFCOUNTER0_CFG__PERF_MODE__SHIFT 0x18 2154e54294d6SYong Zhao #define RPB_PERFCOUNTER0_CFG__ENABLE__SHIFT 0x1c 2155e54294d6SYong Zhao #define RPB_PERFCOUNTER0_CFG__CLEAR__SHIFT 0x1d 2156e54294d6SYong Zhao #define RPB_PERFCOUNTER0_CFG__PERF_SEL_MASK 0x000000FFL 2157e54294d6SYong Zhao #define RPB_PERFCOUNTER0_CFG__PERF_SEL_END_MASK 0x0000FF00L 2158e54294d6SYong Zhao #define RPB_PERFCOUNTER0_CFG__PERF_MODE_MASK 0x0F000000L 2159e54294d6SYong Zhao #define RPB_PERFCOUNTER0_CFG__ENABLE_MASK 0x10000000L 2160e54294d6SYong Zhao #define RPB_PERFCOUNTER0_CFG__CLEAR_MASK 0x20000000L 2161e54294d6SYong Zhao //RPB_PERFCOUNTER1_CFG 2162e54294d6SYong Zhao #define RPB_PERFCOUNTER1_CFG__PERF_SEL__SHIFT 0x0 2163e54294d6SYong Zhao #define RPB_PERFCOUNTER1_CFG__PERF_SEL_END__SHIFT 0x8 2164e54294d6SYong Zhao #define RPB_PERFCOUNTER1_CFG__PERF_MODE__SHIFT 0x18 2165e54294d6SYong Zhao #define RPB_PERFCOUNTER1_CFG__ENABLE__SHIFT 0x1c 2166e54294d6SYong Zhao #define RPB_PERFCOUNTER1_CFG__CLEAR__SHIFT 0x1d 2167e54294d6SYong Zhao #define RPB_PERFCOUNTER1_CFG__PERF_SEL_MASK 0x000000FFL 2168e54294d6SYong Zhao #define RPB_PERFCOUNTER1_CFG__PERF_SEL_END_MASK 0x0000FF00L 2169e54294d6SYong Zhao #define RPB_PERFCOUNTER1_CFG__PERF_MODE_MASK 0x0F000000L 2170e54294d6SYong Zhao #define RPB_PERFCOUNTER1_CFG__ENABLE_MASK 0x10000000L 2171e54294d6SYong Zhao #define RPB_PERFCOUNTER1_CFG__CLEAR_MASK 0x20000000L 2172e54294d6SYong Zhao //RPB_PERFCOUNTER2_CFG 2173e54294d6SYong Zhao #define RPB_PERFCOUNTER2_CFG__PERF_SEL__SHIFT 0x0 2174e54294d6SYong Zhao #define RPB_PERFCOUNTER2_CFG__PERF_SEL_END__SHIFT 0x8 2175e54294d6SYong Zhao #define RPB_PERFCOUNTER2_CFG__PERF_MODE__SHIFT 0x18 2176e54294d6SYong Zhao #define RPB_PERFCOUNTER2_CFG__ENABLE__SHIFT 0x1c 2177e54294d6SYong Zhao #define RPB_PERFCOUNTER2_CFG__CLEAR__SHIFT 0x1d 2178e54294d6SYong Zhao #define RPB_PERFCOUNTER2_CFG__PERF_SEL_MASK 0x000000FFL 2179e54294d6SYong Zhao #define RPB_PERFCOUNTER2_CFG__PERF_SEL_END_MASK 0x0000FF00L 2180e54294d6SYong Zhao #define RPB_PERFCOUNTER2_CFG__PERF_MODE_MASK 0x0F000000L 2181e54294d6SYong Zhao #define RPB_PERFCOUNTER2_CFG__ENABLE_MASK 0x10000000L 2182e54294d6SYong Zhao #define RPB_PERFCOUNTER2_CFG__CLEAR_MASK 0x20000000L 2183e54294d6SYong Zhao //RPB_PERFCOUNTER3_CFG 2184e54294d6SYong Zhao #define RPB_PERFCOUNTER3_CFG__PERF_SEL__SHIFT 0x0 2185e54294d6SYong Zhao #define RPB_PERFCOUNTER3_CFG__PERF_SEL_END__SHIFT 0x8 2186e54294d6SYong Zhao #define RPB_PERFCOUNTER3_CFG__PERF_MODE__SHIFT 0x18 2187e54294d6SYong Zhao #define RPB_PERFCOUNTER3_CFG__ENABLE__SHIFT 0x1c 2188e54294d6SYong Zhao #define RPB_PERFCOUNTER3_CFG__CLEAR__SHIFT 0x1d 2189e54294d6SYong Zhao #define RPB_PERFCOUNTER3_CFG__PERF_SEL_MASK 0x000000FFL 2190e54294d6SYong Zhao #define RPB_PERFCOUNTER3_CFG__PERF_SEL_END_MASK 0x0000FF00L 2191e54294d6SYong Zhao #define RPB_PERFCOUNTER3_CFG__PERF_MODE_MASK 0x0F000000L 2192e54294d6SYong Zhao #define RPB_PERFCOUNTER3_CFG__ENABLE_MASK 0x10000000L 2193e54294d6SYong Zhao #define RPB_PERFCOUNTER3_CFG__CLEAR_MASK 0x20000000L 2194e54294d6SYong Zhao //RPB_PERFCOUNTER_RSLT_CNTL 2195e54294d6SYong Zhao #define RPB_PERFCOUNTER_RSLT_CNTL__PERF_COUNTER_SELECT__SHIFT 0x0 2196e54294d6SYong Zhao #define RPB_PERFCOUNTER_RSLT_CNTL__START_TRIGGER__SHIFT 0x8 2197e54294d6SYong Zhao #define RPB_PERFCOUNTER_RSLT_CNTL__STOP_TRIGGER__SHIFT 0x10 2198e54294d6SYong Zhao #define RPB_PERFCOUNTER_RSLT_CNTL__ENABLE_ANY__SHIFT 0x18 2199e54294d6SYong Zhao #define RPB_PERFCOUNTER_RSLT_CNTL__CLEAR_ALL__SHIFT 0x19 2200e54294d6SYong Zhao #define RPB_PERFCOUNTER_RSLT_CNTL__STOP_ALL_ON_SATURATE__SHIFT 0x1a 2201e54294d6SYong Zhao #define RPB_PERFCOUNTER_RSLT_CNTL__PERF_COUNTER_SELECT_MASK 0x0000000FL 2202e54294d6SYong Zhao #define RPB_PERFCOUNTER_RSLT_CNTL__START_TRIGGER_MASK 0x0000FF00L 2203e54294d6SYong Zhao #define RPB_PERFCOUNTER_RSLT_CNTL__STOP_TRIGGER_MASK 0x00FF0000L 2204e54294d6SYong Zhao #define RPB_PERFCOUNTER_RSLT_CNTL__ENABLE_ANY_MASK 0x01000000L 2205e54294d6SYong Zhao #define RPB_PERFCOUNTER_RSLT_CNTL__CLEAR_ALL_MASK 0x02000000L 2206e54294d6SYong Zhao #define RPB_PERFCOUNTER_RSLT_CNTL__STOP_ALL_ON_SATURATE_MASK 0x04000000L 2207e54294d6SYong Zhao //RPB_RD_QUEUE_CNTL 2208e54294d6SYong Zhao #define RPB_RD_QUEUE_CNTL__ARB_MODE__SHIFT 0x0 2209e54294d6SYong Zhao #define RPB_RD_QUEUE_CNTL__Q4_SHARED__SHIFT 0x1 2210e54294d6SYong Zhao #define RPB_RD_QUEUE_CNTL__Q5_SHARED__SHIFT 0x2 2211e54294d6SYong Zhao #define RPB_RD_QUEUE_CNTL__Q4_UNITID_EA_MODE__SHIFT 0x3 2212e54294d6SYong Zhao #define RPB_RD_QUEUE_CNTL__Q5_UNITID_EA_MODE__SHIFT 0x4 2213e54294d6SYong Zhao #define RPB_RD_QUEUE_CNTL__Q4_PATTERN_LOW__SHIFT 0x5 2214e54294d6SYong Zhao #define RPB_RD_QUEUE_CNTL__Q4_PATTERN_HIGH__SHIFT 0xa 2215e54294d6SYong Zhao #define RPB_RD_QUEUE_CNTL__Q5_PATTERN_LOW__SHIFT 0x10 2216e54294d6SYong Zhao #define RPB_RD_QUEUE_CNTL__Q5_PATTERN_HIGH__SHIFT 0x15 2217e54294d6SYong Zhao #define RPB_RD_QUEUE_CNTL__ARB_MODE_MASK 0x00000001L 2218e54294d6SYong Zhao #define RPB_RD_QUEUE_CNTL__Q4_SHARED_MASK 0x00000002L 2219e54294d6SYong Zhao #define RPB_RD_QUEUE_CNTL__Q5_SHARED_MASK 0x00000004L 2220e54294d6SYong Zhao #define RPB_RD_QUEUE_CNTL__Q4_UNITID_EA_MODE_MASK 0x00000008L 2221e54294d6SYong Zhao #define RPB_RD_QUEUE_CNTL__Q5_UNITID_EA_MODE_MASK 0x00000010L 2222e54294d6SYong Zhao #define RPB_RD_QUEUE_CNTL__Q4_PATTERN_LOW_MASK 0x000003E0L 2223e54294d6SYong Zhao #define RPB_RD_QUEUE_CNTL__Q4_PATTERN_HIGH_MASK 0x0000FC00L 2224e54294d6SYong Zhao #define RPB_RD_QUEUE_CNTL__Q5_PATTERN_LOW_MASK 0x001F0000L 2225e54294d6SYong Zhao #define RPB_RD_QUEUE_CNTL__Q5_PATTERN_HIGH_MASK 0x07E00000L 2226e54294d6SYong Zhao //RPB_RD_QUEUE_CNTL2 2227e54294d6SYong Zhao #define RPB_RD_QUEUE_CNTL2__Q4_PATTERN_MASK_LOW__SHIFT 0x0 2228e54294d6SYong Zhao #define RPB_RD_QUEUE_CNTL2__Q4_PATTERN_MASK_HIGH__SHIFT 0x5 2229e54294d6SYong Zhao #define RPB_RD_QUEUE_CNTL2__Q5_PATTERN_MASK_LOW__SHIFT 0xb 2230e54294d6SYong Zhao #define RPB_RD_QUEUE_CNTL2__Q5_PATTERN_MASK_HIGH__SHIFT 0x10 2231e54294d6SYong Zhao #define RPB_RD_QUEUE_CNTL2__Q4_PATTERN_MASK_LOW_MASK 0x0000001FL 2232e54294d6SYong Zhao #define RPB_RD_QUEUE_CNTL2__Q4_PATTERN_MASK_HIGH_MASK 0x000007E0L 2233e54294d6SYong Zhao #define RPB_RD_QUEUE_CNTL2__Q5_PATTERN_MASK_LOW_MASK 0x0000F800L 2234e54294d6SYong Zhao #define RPB_RD_QUEUE_CNTL2__Q5_PATTERN_MASK_HIGH_MASK 0x003F0000L 2235e54294d6SYong Zhao //RPB_WR_QUEUE_CNTL 2236e54294d6SYong Zhao #define RPB_WR_QUEUE_CNTL__ARB_MODE__SHIFT 0x0 2237e54294d6SYong Zhao #define RPB_WR_QUEUE_CNTL__Q4_SHARED__SHIFT 0x1 2238e54294d6SYong Zhao #define RPB_WR_QUEUE_CNTL__Q5_SHARED__SHIFT 0x2 2239e54294d6SYong Zhao #define RPB_WR_QUEUE_CNTL__Q4_UNITID_EA_MODE__SHIFT 0x3 2240e54294d6SYong Zhao #define RPB_WR_QUEUE_CNTL__Q5_UNITID_EA_MODE__SHIFT 0x4 2241e54294d6SYong Zhao #define RPB_WR_QUEUE_CNTL__Q4_PATTERN_LOW__SHIFT 0x5 2242e54294d6SYong Zhao #define RPB_WR_QUEUE_CNTL__Q4_PATTERN_HIGH__SHIFT 0xa 2243e54294d6SYong Zhao #define RPB_WR_QUEUE_CNTL__Q5_PATTERN_LOW__SHIFT 0x10 2244e54294d6SYong Zhao #define RPB_WR_QUEUE_CNTL__Q5_PATTERN_HIGH__SHIFT 0x15 2245e54294d6SYong Zhao #define RPB_WR_QUEUE_CNTL__ARB_MODE_MASK 0x00000001L 2246e54294d6SYong Zhao #define RPB_WR_QUEUE_CNTL__Q4_SHARED_MASK 0x00000002L 2247e54294d6SYong Zhao #define RPB_WR_QUEUE_CNTL__Q5_SHARED_MASK 0x00000004L 2248e54294d6SYong Zhao #define RPB_WR_QUEUE_CNTL__Q4_UNITID_EA_MODE_MASK 0x00000008L 2249e54294d6SYong Zhao #define RPB_WR_QUEUE_CNTL__Q5_UNITID_EA_MODE_MASK 0x00000010L 2250e54294d6SYong Zhao #define RPB_WR_QUEUE_CNTL__Q4_PATTERN_LOW_MASK 0x000003E0L 2251e54294d6SYong Zhao #define RPB_WR_QUEUE_CNTL__Q4_PATTERN_HIGH_MASK 0x0000FC00L 2252e54294d6SYong Zhao #define RPB_WR_QUEUE_CNTL__Q5_PATTERN_LOW_MASK 0x001F0000L 2253e54294d6SYong Zhao #define RPB_WR_QUEUE_CNTL__Q5_PATTERN_HIGH_MASK 0x07E00000L 2254e54294d6SYong Zhao //RPB_WR_QUEUE_CNTL2 2255e54294d6SYong Zhao #define RPB_WR_QUEUE_CNTL2__Q4_PATTERN_MASK_LOW__SHIFT 0x0 2256e54294d6SYong Zhao #define RPB_WR_QUEUE_CNTL2__Q4_PATTERN_MASK_HIGH__SHIFT 0x5 2257e54294d6SYong Zhao #define RPB_WR_QUEUE_CNTL2__Q5_PATTERN_MASK_LOW__SHIFT 0xb 2258e54294d6SYong Zhao #define RPB_WR_QUEUE_CNTL2__Q5_PATTERN_MASK_HIGH__SHIFT 0x10 2259e54294d6SYong Zhao #define RPB_WR_QUEUE_CNTL2__Q4_PATTERN_MASK_LOW_MASK 0x0000001FL 2260e54294d6SYong Zhao #define RPB_WR_QUEUE_CNTL2__Q4_PATTERN_MASK_HIGH_MASK 0x000007E0L 2261e54294d6SYong Zhao #define RPB_WR_QUEUE_CNTL2__Q5_PATTERN_MASK_LOW_MASK 0x0000F800L 2262e54294d6SYong Zhao #define RPB_WR_QUEUE_CNTL2__Q5_PATTERN_MASK_HIGH_MASK 0x003F0000L 2263e54294d6SYong Zhao //RPB_ATS_CNTL 2264e54294d6SYong Zhao #define RPB_ATS_CNTL__PAGE_MIN_LATENCY_ENABLE__SHIFT 0x0 2265e54294d6SYong Zhao #define RPB_ATS_CNTL__TR_MIN_LATENCY_ENABLE__SHIFT 0x1 2266e54294d6SYong Zhao #define RPB_ATS_CNTL__SWITCH_THRESHOLD__SHIFT 0x2 2267e54294d6SYong Zhao #define RPB_ATS_CNTL__TIME_SLICE__SHIFT 0x7 2268e54294d6SYong Zhao #define RPB_ATS_CNTL__ATCTR_GFX_SWITCH_NUM__SHIFT 0xf 2269e54294d6SYong Zhao #define RPB_ATS_CNTL__ATCPAGE_SWITCH_NUM__SHIFT 0x13 2270e54294d6SYong Zhao #define RPB_ATS_CNTL__WR_AT__SHIFT 0x17 2271e54294d6SYong Zhao #define RPB_ATS_CNTL__MM_VC_SWITCH__SHIFT 0x19 2272e54294d6SYong Zhao #define RPB_ATS_CNTL__GC_VC_SWITCH__SHIFT 0x1a 2273e54294d6SYong Zhao #define RPB_ATS_CNTL__PAGE_MIN_LATENCY_ENABLE_MASK 0x00000001L 2274e54294d6SYong Zhao #define RPB_ATS_CNTL__TR_MIN_LATENCY_ENABLE_MASK 0x00000002L 2275e54294d6SYong Zhao #define RPB_ATS_CNTL__SWITCH_THRESHOLD_MASK 0x0000007CL 2276e54294d6SYong Zhao #define RPB_ATS_CNTL__TIME_SLICE_MASK 0x00007F80L 2277e54294d6SYong Zhao #define RPB_ATS_CNTL__ATCTR_GFX_SWITCH_NUM_MASK 0x00078000L 2278e54294d6SYong Zhao #define RPB_ATS_CNTL__ATCPAGE_SWITCH_NUM_MASK 0x00780000L 2279e54294d6SYong Zhao #define RPB_ATS_CNTL__WR_AT_MASK 0x01800000L 2280e54294d6SYong Zhao #define RPB_ATS_CNTL__MM_VC_SWITCH_MASK 0x02000000L 2281e54294d6SYong Zhao #define RPB_ATS_CNTL__GC_VC_SWITCH_MASK 0x04000000L 2282e54294d6SYong Zhao //RPB_ATS_CNTL2 2283e54294d6SYong Zhao #define RPB_ATS_CNTL2__INVAL_COM_CMD__SHIFT 0x0 2284e54294d6SYong Zhao #define RPB_ATS_CNTL2__TRANS_CMD__SHIFT 0x6 2285e54294d6SYong Zhao #define RPB_ATS_CNTL2__PAGE_REQ_CMD__SHIFT 0xc 2286e54294d6SYong Zhao #define RPB_ATS_CNTL2__PAGE_ROUTING_CODE__SHIFT 0x12 2287e54294d6SYong Zhao #define RPB_ATS_CNTL2__INVAL_COM_ROUTING_CODE__SHIFT 0x15 2288e54294d6SYong Zhao #define RPB_ATS_CNTL2__VENDOR_ID__SHIFT 0x18 2289e54294d6SYong Zhao #define RPB_ATS_CNTL2__RPB_VC5_CRD__SHIFT 0x1a 2290e54294d6SYong Zhao #define RPB_ATS_CNTL2__INVAL_COM_CMD_MASK 0x0000003FL 2291e54294d6SYong Zhao #define RPB_ATS_CNTL2__TRANS_CMD_MASK 0x00000FC0L 2292e54294d6SYong Zhao #define RPB_ATS_CNTL2__PAGE_REQ_CMD_MASK 0x0003F000L 2293e54294d6SYong Zhao #define RPB_ATS_CNTL2__PAGE_ROUTING_CODE_MASK 0x001C0000L 2294e54294d6SYong Zhao #define RPB_ATS_CNTL2__INVAL_COM_ROUTING_CODE_MASK 0x00E00000L 2295e54294d6SYong Zhao #define RPB_ATS_CNTL2__VENDOR_ID_MASK 0x03000000L 2296e54294d6SYong Zhao #define RPB_ATS_CNTL2__RPB_VC5_CRD_MASK 0x7C000000L 2297e54294d6SYong Zhao //RPB_ATS_CNTL3 2298e54294d6SYong Zhao #define RPB_ATS_CNTL3__RPB_ATS_MM_TR__SHIFT 0x0 2299e54294d6SYong Zhao #define RPB_ATS_CNTL3__RPB_ATS_GFX_TR__SHIFT 0x9 2300e54294d6SYong Zhao #define RPB_ATS_CNTL3__RPB_ATS_PR__SHIFT 0x12 2301e54294d6SYong Zhao #define RPB_ATS_CNTL3__RPB_ATS_MM_TR_MASK 0x000001FFL 2302e54294d6SYong Zhao #define RPB_ATS_CNTL3__RPB_ATS_GFX_TR_MASK 0x0003FE00L 2303e54294d6SYong Zhao #define RPB_ATS_CNTL3__RPB_ATS_PR_MASK 0x07FC0000L 2304e54294d6SYong Zhao //RPB_DF_SDPPORT_CNTL 2305e54294d6SYong Zhao #define RPB_DF_SDPPORT_CNTL__DF_REQ_CRD__SHIFT 0x0 2306e54294d6SYong Zhao #define RPB_DF_SDPPORT_CNTL__DF_DATA_CRD__SHIFT 0x6 2307e54294d6SYong Zhao #define RPB_DF_SDPPORT_CNTL__DF_HALT_THRESHOLD__SHIFT 0xc 2308e54294d6SYong Zhao #define RPB_DF_SDPPORT_CNTL__DF_RELEASE_CREDIT_MODE__SHIFT 0x10 2309e54294d6SYong Zhao #define RPB_DF_SDPPORT_CNTL__DF_INSERT_PARITY_ERR__SHIFT 0x11 2310e54294d6SYong Zhao #define RPB_DF_SDPPORT_CNTL__DF_BUSY_INCLUDE_CONN__SHIFT 0x12 2311e54294d6SYong Zhao #define RPB_DF_SDPPORT_CNTL__RESERVED__SHIFT 0x13 2312e54294d6SYong Zhao #define RPB_DF_SDPPORT_CNTL__DF_REQ_CRD_MASK 0x0000003FL 2313e54294d6SYong Zhao #define RPB_DF_SDPPORT_CNTL__DF_DATA_CRD_MASK 0x00000FC0L 2314e54294d6SYong Zhao #define RPB_DF_SDPPORT_CNTL__DF_HALT_THRESHOLD_MASK 0x0000F000L 2315e54294d6SYong Zhao #define RPB_DF_SDPPORT_CNTL__DF_RELEASE_CREDIT_MODE_MASK 0x00010000L 2316e54294d6SYong Zhao #define RPB_DF_SDPPORT_CNTL__DF_INSERT_PARITY_ERR_MASK 0x00020000L 2317e54294d6SYong Zhao #define RPB_DF_SDPPORT_CNTL__DF_BUSY_INCLUDE_CONN_MASK 0x00040000L 2318e54294d6SYong Zhao #define RPB_DF_SDPPORT_CNTL__RESERVED_MASK 0xFFF80000L 2319e54294d6SYong Zhao //RPB_SDPPORT_CNTL 2320e54294d6SYong Zhao #define RPB_SDPPORT_CNTL__NBIF_DMA_SELF_ACTIVATE__SHIFT 0x0 2321e54294d6SYong Zhao #define RPB_SDPPORT_CNTL__NBIF_DMA_CFG_MODE__SHIFT 0x1 2322e54294d6SYong Zhao #define RPB_SDPPORT_CNTL__NBIF_DMA_ENABLE_REISSUE_CREDIT__SHIFT 0x3 2323e54294d6SYong Zhao #define RPB_SDPPORT_CNTL__NBIF_DMA_ENABLE_SATURATE_COUNTER__SHIFT 0x4 2324e54294d6SYong Zhao #define RPB_SDPPORT_CNTL__NBIF_DMA_ENABLE_DISRUPT_FULLDIS__SHIFT 0x5 2325e54294d6SYong Zhao #define RPB_SDPPORT_CNTL__NBIF_DMA_HALT_THRESHOLD__SHIFT 0x6 2326e54294d6SYong Zhao #define RPB_SDPPORT_CNTL__NBIF_HST_SELF_ACTIVATE__SHIFT 0xa 2327e54294d6SYong Zhao #define RPB_SDPPORT_CNTL__NBIF_HST_CFG_MODE__SHIFT 0xb 2328e54294d6SYong Zhao #define RPB_SDPPORT_CNTL__NBIF_HST_ENABLE_REISSUE_CREDIT__SHIFT 0xd 2329e54294d6SYong Zhao #define RPB_SDPPORT_CNTL__NBIF_HST_ENABLE_SATURATE_COUNTER__SHIFT 0xe 2330e54294d6SYong Zhao #define RPB_SDPPORT_CNTL__NBIF_HST_ENABLE_DISRUPT_FULLDIS__SHIFT 0xf 2331e54294d6SYong Zhao #define RPB_SDPPORT_CNTL__NBIF_HST_HALT_THRESHOLD__SHIFT 0x10 2332e54294d6SYong Zhao #define RPB_SDPPORT_CNTL__NBIF_HST_PASSIVE_MODE__SHIFT 0x14 2333e54294d6SYong Zhao #define RPB_SDPPORT_CNTL__NBIF_HST_QUICK_COMACK__SHIFT 0x15 2334e54294d6SYong Zhao #define RPB_SDPPORT_CNTL__DF_SDPVDCI_RDRSPCKEN__SHIFT 0x16 2335e54294d6SYong Zhao #define RPB_SDPPORT_CNTL__DF_SDPVDCI_RDRSPCKENRCV__SHIFT 0x17 2336e54294d6SYong Zhao #define RPB_SDPPORT_CNTL__DF_SDPVDCI_RDRSPDATACKEN__SHIFT 0x18 2337e54294d6SYong Zhao #define RPB_SDPPORT_CNTL__DF_SDPVDCI_RDRSPDATACKENRCV__SHIFT 0x19 2338e54294d6SYong Zhao #define RPB_SDPPORT_CNTL__DF_SDPVDCI_WRRSPCKEN__SHIFT 0x1a 2339e54294d6SYong Zhao #define RPB_SDPPORT_CNTL__DF_SDPVDCI_WRRSPCKENRCV__SHIFT 0x1b 2340e54294d6SYong Zhao #define RPB_SDPPORT_CNTL__RESERVED__SHIFT 0x1c 2341e54294d6SYong Zhao #define RPB_SDPPORT_CNTL__NBIF_DMA_SELF_ACTIVATE_MASK 0x00000001L 2342e54294d6SYong Zhao #define RPB_SDPPORT_CNTL__NBIF_DMA_CFG_MODE_MASK 0x00000006L 2343e54294d6SYong Zhao #define RPB_SDPPORT_CNTL__NBIF_DMA_ENABLE_REISSUE_CREDIT_MASK 0x00000008L 2344e54294d6SYong Zhao #define RPB_SDPPORT_CNTL__NBIF_DMA_ENABLE_SATURATE_COUNTER_MASK 0x00000010L 2345e54294d6SYong Zhao #define RPB_SDPPORT_CNTL__NBIF_DMA_ENABLE_DISRUPT_FULLDIS_MASK 0x00000020L 2346e54294d6SYong Zhao #define RPB_SDPPORT_CNTL__NBIF_DMA_HALT_THRESHOLD_MASK 0x000003C0L 2347e54294d6SYong Zhao #define RPB_SDPPORT_CNTL__NBIF_HST_SELF_ACTIVATE_MASK 0x00000400L 2348e54294d6SYong Zhao #define RPB_SDPPORT_CNTL__NBIF_HST_CFG_MODE_MASK 0x00001800L 2349e54294d6SYong Zhao #define RPB_SDPPORT_CNTL__NBIF_HST_ENABLE_REISSUE_CREDIT_MASK 0x00002000L 2350e54294d6SYong Zhao #define RPB_SDPPORT_CNTL__NBIF_HST_ENABLE_SATURATE_COUNTER_MASK 0x00004000L 2351e54294d6SYong Zhao #define RPB_SDPPORT_CNTL__NBIF_HST_ENABLE_DISRUPT_FULLDIS_MASK 0x00008000L 2352e54294d6SYong Zhao #define RPB_SDPPORT_CNTL__NBIF_HST_HALT_THRESHOLD_MASK 0x000F0000L 2353e54294d6SYong Zhao #define RPB_SDPPORT_CNTL__NBIF_HST_PASSIVE_MODE_MASK 0x00100000L 2354e54294d6SYong Zhao #define RPB_SDPPORT_CNTL__NBIF_HST_QUICK_COMACK_MASK 0x00200000L 2355e54294d6SYong Zhao #define RPB_SDPPORT_CNTL__DF_SDPVDCI_RDRSPCKEN_MASK 0x00400000L 2356e54294d6SYong Zhao #define RPB_SDPPORT_CNTL__DF_SDPVDCI_RDRSPCKENRCV_MASK 0x00800000L 2357e54294d6SYong Zhao #define RPB_SDPPORT_CNTL__DF_SDPVDCI_RDRSPDATACKEN_MASK 0x01000000L 2358e54294d6SYong Zhao #define RPB_SDPPORT_CNTL__DF_SDPVDCI_RDRSPDATACKENRCV_MASK 0x02000000L 2359e54294d6SYong Zhao #define RPB_SDPPORT_CNTL__DF_SDPVDCI_WRRSPCKEN_MASK 0x04000000L 2360e54294d6SYong Zhao #define RPB_SDPPORT_CNTL__DF_SDPVDCI_WRRSPCKENRCV_MASK 0x08000000L 2361e54294d6SYong Zhao #define RPB_SDPPORT_CNTL__RESERVED_MASK 0xF0000000L 2362e54294d6SYong Zhao //RPB_NBIF_SDPPORT_CNTL 2363e54294d6SYong Zhao #define RPB_NBIF_SDPPORT_CNTL__NBIF_DMA_WRRSP_CRD__SHIFT 0x0 2364e54294d6SYong Zhao #define RPB_NBIF_SDPPORT_CNTL__NBIF_DMA_RDRSP_CRD__SHIFT 0x8 2365e54294d6SYong Zhao #define RPB_NBIF_SDPPORT_CNTL__NBIF_HST_REQ_CRD__SHIFT 0x10 2366e54294d6SYong Zhao #define RPB_NBIF_SDPPORT_CNTL__NBIF_HST_DATA_CRD__SHIFT 0x18 2367e54294d6SYong Zhao #define RPB_NBIF_SDPPORT_CNTL__NBIF_DMA_WRRSP_CRD_MASK 0x000000FFL 2368e54294d6SYong Zhao #define RPB_NBIF_SDPPORT_CNTL__NBIF_DMA_RDRSP_CRD_MASK 0x0000FF00L 2369e54294d6SYong Zhao #define RPB_NBIF_SDPPORT_CNTL__NBIF_HST_REQ_CRD_MASK 0x00FF0000L 2370e54294d6SYong Zhao #define RPB_NBIF_SDPPORT_CNTL__NBIF_HST_DATA_CRD_MASK 0xFF000000L 2371e54294d6SYong Zhao 2372e54294d6SYong Zhao 2373e54294d6SYong Zhao 2374e54294d6SYong Zhao 2375e54294d6SYong Zhao 2376e54294d6SYong Zhao 2377e54294d6SYong Zhao 2378e54294d6SYong Zhao #endif 2379