1 /* 2 * Copyright 2015 Advanced Micro Devices, Inc. 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice shall be included in 12 * all copies or substantial portions of the Software. 13 * 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 20 * OTHER DEALINGS IN THE SOFTWARE. 21 */ 22 23 #ifndef __AMD_SHARED_H__ 24 #define __AMD_SHARED_H__ 25 26 enum amd_ip_block_type { 27 AMD_IP_BLOCK_TYPE_COMMON, 28 AMD_IP_BLOCK_TYPE_GMC, 29 AMD_IP_BLOCK_TYPE_IH, 30 AMD_IP_BLOCK_TYPE_SMC, 31 AMD_IP_BLOCK_TYPE_DCE, 32 AMD_IP_BLOCK_TYPE_GFX, 33 AMD_IP_BLOCK_TYPE_SDMA, 34 AMD_IP_BLOCK_TYPE_UVD, 35 AMD_IP_BLOCK_TYPE_VCE, 36 }; 37 38 enum amd_clockgating_state { 39 AMD_CG_STATE_GATE = 0, 40 AMD_CG_STATE_UNGATE, 41 }; 42 43 enum amd_powergating_state { 44 AMD_PG_STATE_GATE = 0, 45 AMD_PG_STATE_UNGATE, 46 }; 47 48 struct amd_ip_funcs { 49 /* sets up early driver state (pre sw_init), does not configure hw - Optional */ 50 int (*early_init)(void *handle); 51 /* sets up late driver/hw state (post hw_init) - Optional */ 52 int (*late_init)(void *handle); 53 /* sets up driver state, does not configure hw */ 54 int (*sw_init)(void *handle); 55 /* tears down driver state, does not configure hw */ 56 int (*sw_fini)(void *handle); 57 /* sets up the hw state */ 58 int (*hw_init)(void *handle); 59 /* tears down the hw state */ 60 int (*hw_fini)(void *handle); 61 /* handles IP specific hw/sw changes for suspend */ 62 int (*suspend)(void *handle); 63 /* handles IP specific hw/sw changes for resume */ 64 int (*resume)(void *handle); 65 /* returns current IP block idle status */ 66 bool (*is_idle)(void *handle); 67 /* poll for idle */ 68 int (*wait_for_idle)(void *handle); 69 /* soft reset the IP block */ 70 int (*soft_reset)(void *handle); 71 /* dump the IP block status registers */ 72 void (*print_status)(void *handle); 73 /* enable/disable cg for the IP block */ 74 int (*set_clockgating_state)(void *handle, 75 enum amd_clockgating_state state); 76 /* enable/disable pg for the IP block */ 77 int (*set_powergating_state)(void *handle, 78 enum amd_powergating_state state); 79 }; 80 81 #endif /* __AMD_SHARED_H__ */ 82