1 /* Copyright 2018 Advanced Micro Devices, Inc. 2 * 3 * Permission is hereby granted, free of charge, to any person obtaining a 4 * copy of this software and associated documentation files (the "Software"), 5 * to deal in the Software without restriction, including without limitation 6 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 7 * and/or sell copies of the Software, and to permit persons to whom the 8 * Software is furnished to do so, subject to the following conditions: 9 * 10 * The above copyright notice and this permission notice shall be included in 11 * all copies or substantial portions of the Software. 12 * 13 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 14 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 15 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 16 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 17 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 18 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 19 * OTHER DEALINGS IN THE SOFTWARE. 20 * 21 * Authors: AMD 22 * 23 */ 24 25 #include "power_helpers.h" 26 #include "dc/inc/hw/dmcu.h" 27 28 #define DIV_ROUNDUP(a, b) (((a)+((b)/2))/(b)) 29 30 /* Possible Min Reduction config from least aggressive to most aggressive 31 * 0 1 2 3 4 5 6 7 8 9 10 11 12 32 * 100 98.0 94.1 94.1 85.1 80.3 75.3 69.4 60.0 57.6 50.2 49.8 40.0 % 33 */ 34 static const unsigned char min_reduction_table[13] = { 35 0xff, 0xfa, 0xf0, 0xf0, 0xd9, 0xcd, 0xc0, 0xb1, 0x99, 0x93, 0x80, 0x82, 0x66}; 36 37 /* Possible Max Reduction configs from least aggressive to most aggressive 38 * 0 1 2 3 4 5 6 7 8 9 10 11 12 39 * 96.1 89.8 85.1 80.3 69.4 64.7 64.7 50.2 39.6 30.2 30.2 30.2 19.6 % 40 */ 41 static const unsigned char max_reduction_table[13] = { 42 0xf5, 0xe5, 0xd9, 0xcd, 0xb1, 0xa5, 0xa5, 0x80, 0x65, 0x4d, 0x4d, 0x4d, 0x32}; 43 44 /* ABM 2.2 Min Reduction effectively disabled (100% for all configs)*/ 45 static const unsigned char min_reduction_table_v_2_2[13] = { 46 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}; 47 48 /* Possible ABM 2.2 Max Reduction configs from least aggressive to most aggressive 49 * 0 1 2 3 4 5 6 7 8 9 10 11 12 50 * 96.1 89.8 74.9 69.4 64.7 52.2 48.6 39.6 30.2 25.1 19.6 12.5 12.5 % 51 */ 52 static const unsigned char max_reduction_table_v_2_2[13] = { 53 0xf5, 0xe5, 0xbf, 0xb1, 0xa5, 0x85, 0x7c, 0x65, 0x4d, 0x40, 0x32, 0x20, 0x20}; 54 55 /* Predefined ABM configuration sets. We may have different configuration sets 56 * in order to satisfy different power/quality requirements. 57 */ 58 static const unsigned char abm_config[abm_defines_max_config][abm_defines_max_level] = { 59 /* ABM Level 1, ABM Level 2, ABM Level 3, ABM Level 4 */ 60 { 2, 5, 7, 8 }, /* Default - Medium aggressiveness */ 61 { 2, 5, 8, 11 }, /* Alt #1 - Increased aggressiveness */ 62 { 0, 2, 4, 8 }, /* Alt #2 - Minimal aggressiveness */ 63 { 3, 6, 10, 12 }, /* Alt #3 - Super aggressiveness */ 64 }; 65 66 #define NUM_AMBI_LEVEL 5 67 #define NUM_AGGR_LEVEL 4 68 #define NUM_POWER_FN_SEGS 8 69 #define NUM_BL_CURVE_SEGS 16 70 #define IRAM_SIZE 256 71 72 #define IRAM_RESERVE_AREA_START_V2 0xF0 // reserve 0xF0~0xF6 are write by DMCU only 73 #define IRAM_RESERVE_AREA_END_V2 0xF6 // reserve 0xF0~0xF6 are write by DMCU only 74 75 #define IRAM_RESERVE_AREA_START_V2_2 0xF0 // reserve 0xF0~0xFF are write by DMCU only 76 #define IRAM_RESERVE_AREA_END_V2_2 0xFF // reserve 0xF0~0xFF are write by DMCU only 77 78 #pragma pack(push, 1) 79 /* NOTE: iRAM is 256B in size */ 80 struct iram_table_v_2 { 81 /* flags */ 82 uint16_t flags; /* 0x00 U16 */ 83 84 /* parameters for ABM2.0 algorithm */ 85 uint8_t min_reduction[NUM_AMBI_LEVEL][NUM_AGGR_LEVEL]; /* 0x02 U0.8 */ 86 uint8_t max_reduction[NUM_AMBI_LEVEL][NUM_AGGR_LEVEL]; /* 0x16 U0.8 */ 87 uint8_t bright_pos_gain[NUM_AMBI_LEVEL][NUM_AGGR_LEVEL]; /* 0x2a U2.6 */ 88 uint8_t bright_neg_gain[NUM_AMBI_LEVEL][NUM_AGGR_LEVEL]; /* 0x3e U2.6 */ 89 uint8_t dark_pos_gain[NUM_AMBI_LEVEL][NUM_AGGR_LEVEL]; /* 0x52 U2.6 */ 90 uint8_t dark_neg_gain[NUM_AMBI_LEVEL][NUM_AGGR_LEVEL]; /* 0x66 U2.6 */ 91 uint8_t iir_curve[NUM_AMBI_LEVEL]; /* 0x7a U0.8 */ 92 uint8_t deviation_gain; /* 0x7f U0.8 */ 93 94 /* parameters for crgb conversion */ 95 uint16_t crgb_thresh[NUM_POWER_FN_SEGS]; /* 0x80 U3.13 */ 96 uint16_t crgb_offset[NUM_POWER_FN_SEGS]; /* 0x90 U1.15 */ 97 uint16_t crgb_slope[NUM_POWER_FN_SEGS]; /* 0xa0 U4.12 */ 98 99 /* parameters for custom curve */ 100 /* thresholds for brightness --> backlight */ 101 uint16_t backlight_thresholds[NUM_BL_CURVE_SEGS]; /* 0xb0 U16.0 */ 102 /* offsets for brightness --> backlight */ 103 uint16_t backlight_offsets[NUM_BL_CURVE_SEGS]; /* 0xd0 U16.0 */ 104 105 /* For reading PSR State directly from IRAM */ 106 uint8_t psr_state; /* 0xf0 */ 107 uint8_t dmcu_mcp_interface_version; /* 0xf1 */ 108 uint8_t dmcu_abm_feature_version; /* 0xf2 */ 109 uint8_t dmcu_psr_feature_version; /* 0xf3 */ 110 uint16_t dmcu_version; /* 0xf4 */ 111 uint8_t dmcu_state; /* 0xf6 */ 112 113 uint16_t blRampReduction; /* 0xf7 */ 114 uint16_t blRampStart; /* 0xf9 */ 115 uint8_t dummy5; /* 0xfb */ 116 uint8_t dummy6; /* 0xfc */ 117 uint8_t dummy7; /* 0xfd */ 118 uint8_t dummy8; /* 0xfe */ 119 uint8_t dummy9; /* 0xff */ 120 }; 121 122 struct iram_table_v_2_2 { 123 /* flags */ 124 uint16_t flags; /* 0x00 U16 */ 125 126 /* parameters for ABM2.2 algorithm */ 127 uint8_t min_reduction[NUM_AMBI_LEVEL][NUM_AGGR_LEVEL]; /* 0x02 U0.8 */ 128 uint8_t max_reduction[NUM_AMBI_LEVEL][NUM_AGGR_LEVEL]; /* 0x16 U0.8 */ 129 uint8_t bright_pos_gain[NUM_AMBI_LEVEL][NUM_AGGR_LEVEL]; /* 0x2a U2.6 */ 130 uint8_t dark_pos_gain[NUM_AMBI_LEVEL][NUM_AGGR_LEVEL]; /* 0x3e U2.6 */ 131 uint8_t hybridFactor[NUM_AGGR_LEVEL]; /* 0x52 U0.8 */ 132 uint8_t contrastFactor[NUM_AGGR_LEVEL]; /* 0x56 U0.8 */ 133 uint8_t deviation_gain[NUM_AGGR_LEVEL]; /* 0x5a U0.8 */ 134 uint8_t iir_curve[NUM_AMBI_LEVEL]; /* 0x5e U0.8 */ 135 uint8_t pad[29]; /* 0x63 U0.8 */ 136 137 /* parameters for crgb conversion */ 138 uint16_t crgb_thresh[NUM_POWER_FN_SEGS]; /* 0x80 U3.13 */ 139 uint16_t crgb_offset[NUM_POWER_FN_SEGS]; /* 0x90 U1.15 */ 140 uint16_t crgb_slope[NUM_POWER_FN_SEGS]; /* 0xa0 U4.12 */ 141 142 /* parameters for custom curve */ 143 /* thresholds for brightness --> backlight */ 144 uint16_t backlight_thresholds[NUM_BL_CURVE_SEGS]; /* 0xb0 U16.0 */ 145 /* offsets for brightness --> backlight */ 146 uint16_t backlight_offsets[NUM_BL_CURVE_SEGS]; /* 0xd0 U16.0 */ 147 148 /* For reading PSR State directly from IRAM */ 149 uint8_t psr_state; /* 0xf0 */ 150 uint8_t dmcu_mcp_interface_version; /* 0xf1 */ 151 uint8_t dmcu_abm_feature_version; /* 0xf2 */ 152 uint8_t dmcu_psr_feature_version; /* 0xf3 */ 153 uint16_t dmcu_version; /* 0xf4 */ 154 uint8_t dmcu_state; /* 0xf6 */ 155 156 uint8_t dummy1; /* 0xf7 */ 157 uint8_t dummy2; /* 0xf8 */ 158 uint8_t dummy3; /* 0xf9 */ 159 uint8_t dummy4; /* 0xfa */ 160 uint8_t dummy5; /* 0xfb */ 161 uint8_t dummy6; /* 0xfc */ 162 uint8_t dummy7; /* 0xfd */ 163 uint8_t dummy8; /* 0xfe */ 164 uint8_t dummy9; /* 0xff */ 165 }; 166 #pragma pack(pop) 167 168 static void fill_backlight_transform_table(struct dmcu_iram_parameters params, 169 struct iram_table_v_2 *table) 170 { 171 unsigned int i; 172 unsigned int num_entries = NUM_BL_CURVE_SEGS; 173 unsigned int lut_index; 174 175 table->backlight_thresholds[0] = 0; 176 table->backlight_offsets[0] = params.backlight_lut_array[0]; 177 table->backlight_thresholds[num_entries-1] = 0xFFFF; 178 table->backlight_offsets[num_entries-1] = 179 params.backlight_lut_array[params.backlight_lut_array_size - 1]; 180 181 /* Setup all brightness levels between 0% and 100% exclusive 182 * Fills brightness-to-backlight transform table. Backlight custom curve 183 * describes transform from brightness to backlight. It will be defined 184 * as set of thresholds and set of offsets, together, implying 185 * extrapolation of custom curve into 16 uniformly spanned linear 186 * segments. Each threshold/offset represented by 16 bit entry in 187 * format U4.10. 188 */ 189 for (i = 1; i+1 < num_entries; i++) { 190 lut_index = (params.backlight_lut_array_size - 1) * i / (num_entries - 1); 191 ASSERT(lut_index < params.backlight_lut_array_size); 192 193 table->backlight_thresholds[i] = 194 cpu_to_be16(DIV_ROUNDUP((i * 65536), num_entries)); 195 table->backlight_offsets[i] = 196 cpu_to_be16(params.backlight_lut_array[lut_index]); 197 } 198 } 199 200 static void fill_backlight_transform_table_v_2_2(struct dmcu_iram_parameters params, 201 struct iram_table_v_2_2 *table) 202 { 203 unsigned int i; 204 unsigned int num_entries = NUM_BL_CURVE_SEGS; 205 unsigned int lut_index; 206 207 table->backlight_thresholds[0] = 0; 208 table->backlight_offsets[0] = params.backlight_lut_array[0]; 209 table->backlight_thresholds[num_entries-1] = 0xFFFF; 210 table->backlight_offsets[num_entries-1] = 211 params.backlight_lut_array[params.backlight_lut_array_size - 1]; 212 213 /* Setup all brightness levels between 0% and 100% exclusive 214 * Fills brightness-to-backlight transform table. Backlight custom curve 215 * describes transform from brightness to backlight. It will be defined 216 * as set of thresholds and set of offsets, together, implying 217 * extrapolation of custom curve into 16 uniformly spanned linear 218 * segments. Each threshold/offset represented by 16 bit entry in 219 * format U4.10. 220 */ 221 for (i = 1; i+1 < num_entries; i++) { 222 lut_index = (params.backlight_lut_array_size - 1) * i / (num_entries - 1); 223 ASSERT(lut_index < params.backlight_lut_array_size); 224 225 table->backlight_thresholds[i] = 226 cpu_to_be16(DIV_ROUNDUP((i * 65536), num_entries)); 227 table->backlight_offsets[i] = 228 cpu_to_be16(params.backlight_lut_array[lut_index]); 229 } 230 } 231 232 void fill_iram_v_2(struct iram_table_v_2 *ram_table, struct dmcu_iram_parameters params) 233 { 234 unsigned int set = params.set; 235 236 ram_table->flags = 0x0; 237 ram_table->deviation_gain = 0xb3; 238 239 ram_table->blRampReduction = 240 cpu_to_be16(params.backlight_ramping_reduction); 241 ram_table->blRampStart = 242 cpu_to_be16(params.backlight_ramping_start); 243 244 ram_table->min_reduction[0][0] = min_reduction_table[abm_config[set][0]]; 245 ram_table->min_reduction[1][0] = min_reduction_table[abm_config[set][0]]; 246 ram_table->min_reduction[2][0] = min_reduction_table[abm_config[set][0]]; 247 ram_table->min_reduction[3][0] = min_reduction_table[abm_config[set][0]]; 248 ram_table->min_reduction[4][0] = min_reduction_table[abm_config[set][0]]; 249 ram_table->max_reduction[0][0] = max_reduction_table[abm_config[set][0]]; 250 ram_table->max_reduction[1][0] = max_reduction_table[abm_config[set][0]]; 251 ram_table->max_reduction[2][0] = max_reduction_table[abm_config[set][0]]; 252 ram_table->max_reduction[3][0] = max_reduction_table[abm_config[set][0]]; 253 ram_table->max_reduction[4][0] = max_reduction_table[abm_config[set][0]]; 254 255 ram_table->min_reduction[0][1] = min_reduction_table[abm_config[set][1]]; 256 ram_table->min_reduction[1][1] = min_reduction_table[abm_config[set][1]]; 257 ram_table->min_reduction[2][1] = min_reduction_table[abm_config[set][1]]; 258 ram_table->min_reduction[3][1] = min_reduction_table[abm_config[set][1]]; 259 ram_table->min_reduction[4][1] = min_reduction_table[abm_config[set][1]]; 260 ram_table->max_reduction[0][1] = max_reduction_table[abm_config[set][1]]; 261 ram_table->max_reduction[1][1] = max_reduction_table[abm_config[set][1]]; 262 ram_table->max_reduction[2][1] = max_reduction_table[abm_config[set][1]]; 263 ram_table->max_reduction[3][1] = max_reduction_table[abm_config[set][1]]; 264 ram_table->max_reduction[4][1] = max_reduction_table[abm_config[set][1]]; 265 266 ram_table->min_reduction[0][2] = min_reduction_table[abm_config[set][2]]; 267 ram_table->min_reduction[1][2] = min_reduction_table[abm_config[set][2]]; 268 ram_table->min_reduction[2][2] = min_reduction_table[abm_config[set][2]]; 269 ram_table->min_reduction[3][2] = min_reduction_table[abm_config[set][2]]; 270 ram_table->min_reduction[4][2] = min_reduction_table[abm_config[set][2]]; 271 ram_table->max_reduction[0][2] = max_reduction_table[abm_config[set][2]]; 272 ram_table->max_reduction[1][2] = max_reduction_table[abm_config[set][2]]; 273 ram_table->max_reduction[2][2] = max_reduction_table[abm_config[set][2]]; 274 ram_table->max_reduction[3][2] = max_reduction_table[abm_config[set][2]]; 275 ram_table->max_reduction[4][2] = max_reduction_table[abm_config[set][2]]; 276 277 ram_table->min_reduction[0][3] = min_reduction_table[abm_config[set][3]]; 278 ram_table->min_reduction[1][3] = min_reduction_table[abm_config[set][3]]; 279 ram_table->min_reduction[2][3] = min_reduction_table[abm_config[set][3]]; 280 ram_table->min_reduction[3][3] = min_reduction_table[abm_config[set][3]]; 281 ram_table->min_reduction[4][3] = min_reduction_table[abm_config[set][3]]; 282 ram_table->max_reduction[0][3] = max_reduction_table[abm_config[set][3]]; 283 ram_table->max_reduction[1][3] = max_reduction_table[abm_config[set][3]]; 284 ram_table->max_reduction[2][3] = max_reduction_table[abm_config[set][3]]; 285 ram_table->max_reduction[3][3] = max_reduction_table[abm_config[set][3]]; 286 ram_table->max_reduction[4][3] = max_reduction_table[abm_config[set][3]]; 287 288 ram_table->bright_pos_gain[0][0] = 0x20; 289 ram_table->bright_pos_gain[0][1] = 0x20; 290 ram_table->bright_pos_gain[0][2] = 0x20; 291 ram_table->bright_pos_gain[0][3] = 0x20; 292 ram_table->bright_pos_gain[1][0] = 0x20; 293 ram_table->bright_pos_gain[1][1] = 0x20; 294 ram_table->bright_pos_gain[1][2] = 0x20; 295 ram_table->bright_pos_gain[1][3] = 0x20; 296 ram_table->bright_pos_gain[2][0] = 0x20; 297 ram_table->bright_pos_gain[2][1] = 0x20; 298 ram_table->bright_pos_gain[2][2] = 0x20; 299 ram_table->bright_pos_gain[2][3] = 0x20; 300 ram_table->bright_pos_gain[3][0] = 0x20; 301 ram_table->bright_pos_gain[3][1] = 0x20; 302 ram_table->bright_pos_gain[3][2] = 0x20; 303 ram_table->bright_pos_gain[3][3] = 0x20; 304 ram_table->bright_pos_gain[4][0] = 0x20; 305 ram_table->bright_pos_gain[4][1] = 0x20; 306 ram_table->bright_pos_gain[4][2] = 0x20; 307 ram_table->bright_pos_gain[4][3] = 0x20; 308 ram_table->bright_neg_gain[0][1] = 0x00; 309 ram_table->bright_neg_gain[0][2] = 0x00; 310 ram_table->bright_neg_gain[0][3] = 0x00; 311 ram_table->bright_neg_gain[1][0] = 0x00; 312 ram_table->bright_neg_gain[1][1] = 0x00; 313 ram_table->bright_neg_gain[1][2] = 0x00; 314 ram_table->bright_neg_gain[1][3] = 0x00; 315 ram_table->bright_neg_gain[2][0] = 0x00; 316 ram_table->bright_neg_gain[2][1] = 0x00; 317 ram_table->bright_neg_gain[2][2] = 0x00; 318 ram_table->bright_neg_gain[2][3] = 0x00; 319 ram_table->bright_neg_gain[3][0] = 0x00; 320 ram_table->bright_neg_gain[3][1] = 0x00; 321 ram_table->bright_neg_gain[3][2] = 0x00; 322 ram_table->bright_neg_gain[3][3] = 0x00; 323 ram_table->bright_neg_gain[4][0] = 0x00; 324 ram_table->bright_neg_gain[4][1] = 0x00; 325 ram_table->bright_neg_gain[4][2] = 0x00; 326 ram_table->bright_neg_gain[4][3] = 0x00; 327 ram_table->dark_pos_gain[0][0] = 0x00; 328 ram_table->dark_pos_gain[0][1] = 0x00; 329 ram_table->dark_pos_gain[0][2] = 0x00; 330 ram_table->dark_pos_gain[0][3] = 0x00; 331 ram_table->dark_pos_gain[1][0] = 0x00; 332 ram_table->dark_pos_gain[1][1] = 0x00; 333 ram_table->dark_pos_gain[1][2] = 0x00; 334 ram_table->dark_pos_gain[1][3] = 0x00; 335 ram_table->dark_pos_gain[2][0] = 0x00; 336 ram_table->dark_pos_gain[2][1] = 0x00; 337 ram_table->dark_pos_gain[2][2] = 0x00; 338 ram_table->dark_pos_gain[2][3] = 0x00; 339 ram_table->dark_pos_gain[3][0] = 0x00; 340 ram_table->dark_pos_gain[3][1] = 0x00; 341 ram_table->dark_pos_gain[3][2] = 0x00; 342 ram_table->dark_pos_gain[3][3] = 0x00; 343 ram_table->dark_pos_gain[4][0] = 0x00; 344 ram_table->dark_pos_gain[4][1] = 0x00; 345 ram_table->dark_pos_gain[4][2] = 0x00; 346 ram_table->dark_pos_gain[4][3] = 0x00; 347 ram_table->dark_neg_gain[0][0] = 0x00; 348 ram_table->dark_neg_gain[0][1] = 0x00; 349 ram_table->dark_neg_gain[0][2] = 0x00; 350 ram_table->dark_neg_gain[0][3] = 0x00; 351 ram_table->dark_neg_gain[1][0] = 0x00; 352 ram_table->dark_neg_gain[1][1] = 0x00; 353 ram_table->dark_neg_gain[1][2] = 0x00; 354 ram_table->dark_neg_gain[1][3] = 0x00; 355 ram_table->dark_neg_gain[2][0] = 0x00; 356 ram_table->dark_neg_gain[2][1] = 0x00; 357 ram_table->dark_neg_gain[2][2] = 0x00; 358 ram_table->dark_neg_gain[2][3] = 0x00; 359 ram_table->dark_neg_gain[3][0] = 0x00; 360 ram_table->dark_neg_gain[3][1] = 0x00; 361 ram_table->dark_neg_gain[3][2] = 0x00; 362 ram_table->dark_neg_gain[3][3] = 0x00; 363 ram_table->dark_neg_gain[4][0] = 0x00; 364 ram_table->dark_neg_gain[4][1] = 0x00; 365 ram_table->dark_neg_gain[4][2] = 0x00; 366 ram_table->dark_neg_gain[4][3] = 0x00; 367 368 ram_table->iir_curve[0] = 0x65; 369 ram_table->iir_curve[1] = 0x65; 370 ram_table->iir_curve[2] = 0x65; 371 ram_table->iir_curve[3] = 0x65; 372 ram_table->iir_curve[4] = 0x65; 373 374 //Gamma 2.4 375 ram_table->crgb_thresh[0] = cpu_to_be16(0x13b6); 376 ram_table->crgb_thresh[1] = cpu_to_be16(0x1648); 377 ram_table->crgb_thresh[2] = cpu_to_be16(0x18e3); 378 ram_table->crgb_thresh[3] = cpu_to_be16(0x1b41); 379 ram_table->crgb_thresh[4] = cpu_to_be16(0x1d46); 380 ram_table->crgb_thresh[5] = cpu_to_be16(0x1f21); 381 ram_table->crgb_thresh[6] = cpu_to_be16(0x2167); 382 ram_table->crgb_thresh[7] = cpu_to_be16(0x2384); 383 ram_table->crgb_offset[0] = cpu_to_be16(0x2999); 384 ram_table->crgb_offset[1] = cpu_to_be16(0x3999); 385 ram_table->crgb_offset[2] = cpu_to_be16(0x4666); 386 ram_table->crgb_offset[3] = cpu_to_be16(0x5999); 387 ram_table->crgb_offset[4] = cpu_to_be16(0x6333); 388 ram_table->crgb_offset[5] = cpu_to_be16(0x7800); 389 ram_table->crgb_offset[6] = cpu_to_be16(0x8c00); 390 ram_table->crgb_offset[7] = cpu_to_be16(0xa000); 391 ram_table->crgb_slope[0] = cpu_to_be16(0x3147); 392 ram_table->crgb_slope[1] = cpu_to_be16(0x2978); 393 ram_table->crgb_slope[2] = cpu_to_be16(0x23a2); 394 ram_table->crgb_slope[3] = cpu_to_be16(0x1f55); 395 ram_table->crgb_slope[4] = cpu_to_be16(0x1c63); 396 ram_table->crgb_slope[5] = cpu_to_be16(0x1a0f); 397 ram_table->crgb_slope[6] = cpu_to_be16(0x178d); 398 ram_table->crgb_slope[7] = cpu_to_be16(0x15ab); 399 400 fill_backlight_transform_table( 401 params, ram_table); 402 } 403 404 void fill_iram_v_2_2(struct iram_table_v_2_2 *ram_table, struct dmcu_iram_parameters params) 405 { 406 unsigned int set = params.set; 407 408 ram_table->flags = 0x0; 409 410 ram_table->deviation_gain[0] = 0xb3; 411 ram_table->deviation_gain[1] = 0xb3; 412 ram_table->deviation_gain[2] = 0xb3; 413 ram_table->deviation_gain[3] = 0xb3; 414 415 ram_table->min_reduction[0][0] = min_reduction_table_v_2_2[abm_config[set][0]]; 416 ram_table->min_reduction[1][0] = min_reduction_table_v_2_2[abm_config[set][0]]; 417 ram_table->min_reduction[2][0] = min_reduction_table_v_2_2[abm_config[set][0]]; 418 ram_table->min_reduction[3][0] = min_reduction_table_v_2_2[abm_config[set][0]]; 419 ram_table->min_reduction[4][0] = min_reduction_table_v_2_2[abm_config[set][0]]; 420 ram_table->max_reduction[0][0] = max_reduction_table_v_2_2[abm_config[set][0]]; 421 ram_table->max_reduction[1][0] = max_reduction_table_v_2_2[abm_config[set][0]]; 422 ram_table->max_reduction[2][0] = max_reduction_table_v_2_2[abm_config[set][0]]; 423 ram_table->max_reduction[3][0] = max_reduction_table_v_2_2[abm_config[set][0]]; 424 ram_table->max_reduction[4][0] = max_reduction_table_v_2_2[abm_config[set][0]]; 425 426 ram_table->min_reduction[0][1] = min_reduction_table_v_2_2[abm_config[set][1]]; 427 ram_table->min_reduction[1][1] = min_reduction_table_v_2_2[abm_config[set][1]]; 428 ram_table->min_reduction[2][1] = min_reduction_table_v_2_2[abm_config[set][1]]; 429 ram_table->min_reduction[3][1] = min_reduction_table_v_2_2[abm_config[set][1]]; 430 ram_table->min_reduction[4][1] = min_reduction_table_v_2_2[abm_config[set][1]]; 431 ram_table->max_reduction[0][1] = max_reduction_table_v_2_2[abm_config[set][1]]; 432 ram_table->max_reduction[1][1] = max_reduction_table_v_2_2[abm_config[set][1]]; 433 ram_table->max_reduction[2][1] = max_reduction_table_v_2_2[abm_config[set][1]]; 434 ram_table->max_reduction[3][1] = max_reduction_table_v_2_2[abm_config[set][1]]; 435 ram_table->max_reduction[4][1] = max_reduction_table_v_2_2[abm_config[set][1]]; 436 437 ram_table->min_reduction[0][2] = min_reduction_table_v_2_2[abm_config[set][2]]; 438 ram_table->min_reduction[1][2] = min_reduction_table_v_2_2[abm_config[set][2]]; 439 ram_table->min_reduction[2][2] = min_reduction_table_v_2_2[abm_config[set][2]]; 440 ram_table->min_reduction[3][2] = min_reduction_table_v_2_2[abm_config[set][2]]; 441 ram_table->min_reduction[4][2] = min_reduction_table_v_2_2[abm_config[set][2]]; 442 ram_table->max_reduction[0][2] = max_reduction_table_v_2_2[abm_config[set][2]]; 443 ram_table->max_reduction[1][2] = max_reduction_table_v_2_2[abm_config[set][2]]; 444 ram_table->max_reduction[2][2] = max_reduction_table_v_2_2[abm_config[set][2]]; 445 ram_table->max_reduction[3][2] = max_reduction_table_v_2_2[abm_config[set][2]]; 446 ram_table->max_reduction[4][2] = max_reduction_table_v_2_2[abm_config[set][2]]; 447 448 ram_table->min_reduction[0][3] = min_reduction_table_v_2_2[abm_config[set][3]]; 449 ram_table->min_reduction[1][3] = min_reduction_table_v_2_2[abm_config[set][3]]; 450 ram_table->min_reduction[2][3] = min_reduction_table_v_2_2[abm_config[set][3]]; 451 ram_table->min_reduction[3][3] = min_reduction_table_v_2_2[abm_config[set][3]]; 452 ram_table->min_reduction[4][3] = min_reduction_table_v_2_2[abm_config[set][3]]; 453 ram_table->max_reduction[0][3] = max_reduction_table_v_2_2[abm_config[set][3]]; 454 ram_table->max_reduction[1][3] = max_reduction_table_v_2_2[abm_config[set][3]]; 455 ram_table->max_reduction[2][3] = max_reduction_table_v_2_2[abm_config[set][3]]; 456 ram_table->max_reduction[3][3] = max_reduction_table_v_2_2[abm_config[set][3]]; 457 ram_table->max_reduction[4][3] = max_reduction_table_v_2_2[abm_config[set][3]]; 458 459 ram_table->bright_pos_gain[0][0] = 0x20; 460 ram_table->bright_pos_gain[0][1] = 0x20; 461 ram_table->bright_pos_gain[0][2] = 0x20; 462 ram_table->bright_pos_gain[0][3] = 0x20; 463 ram_table->bright_pos_gain[1][0] = 0x20; 464 ram_table->bright_pos_gain[1][1] = 0x20; 465 ram_table->bright_pos_gain[1][2] = 0x20; 466 ram_table->bright_pos_gain[1][3] = 0x20; 467 ram_table->bright_pos_gain[2][0] = 0x20; 468 ram_table->bright_pos_gain[2][1] = 0x20; 469 ram_table->bright_pos_gain[2][2] = 0x20; 470 ram_table->bright_pos_gain[2][3] = 0x20; 471 ram_table->bright_pos_gain[3][0] = 0x20; 472 ram_table->bright_pos_gain[3][1] = 0x20; 473 ram_table->bright_pos_gain[3][2] = 0x20; 474 ram_table->bright_pos_gain[3][3] = 0x20; 475 ram_table->bright_pos_gain[4][0] = 0x20; 476 ram_table->bright_pos_gain[4][1] = 0x20; 477 ram_table->bright_pos_gain[4][2] = 0x20; 478 ram_table->bright_pos_gain[4][3] = 0x20; 479 480 ram_table->dark_pos_gain[0][0] = 0x00; 481 ram_table->dark_pos_gain[0][1] = 0x00; 482 ram_table->dark_pos_gain[0][2] = 0x00; 483 ram_table->dark_pos_gain[0][3] = 0x00; 484 ram_table->dark_pos_gain[1][0] = 0x00; 485 ram_table->dark_pos_gain[1][1] = 0x00; 486 ram_table->dark_pos_gain[1][2] = 0x00; 487 ram_table->dark_pos_gain[1][3] = 0x00; 488 ram_table->dark_pos_gain[2][0] = 0x00; 489 ram_table->dark_pos_gain[2][1] = 0x00; 490 ram_table->dark_pos_gain[2][2] = 0x00; 491 ram_table->dark_pos_gain[2][3] = 0x00; 492 ram_table->dark_pos_gain[3][0] = 0x00; 493 ram_table->dark_pos_gain[3][1] = 0x00; 494 ram_table->dark_pos_gain[3][2] = 0x00; 495 ram_table->dark_pos_gain[3][3] = 0x00; 496 ram_table->dark_pos_gain[4][0] = 0x00; 497 ram_table->dark_pos_gain[4][1] = 0x00; 498 ram_table->dark_pos_gain[4][2] = 0x00; 499 ram_table->dark_pos_gain[4][3] = 0x00; 500 501 ram_table->hybridFactor[0] = 0xff; 502 ram_table->hybridFactor[1] = 0xff; 503 ram_table->hybridFactor[2] = 0xff; 504 ram_table->hybridFactor[3] = 0xc0; 505 506 ram_table->contrastFactor[0] = 0x99; 507 ram_table->contrastFactor[1] = 0x99; 508 ram_table->contrastFactor[2] = 0x99; 509 ram_table->contrastFactor[3] = 0x80; 510 511 ram_table->iir_curve[0] = 0x65; 512 ram_table->iir_curve[1] = 0x65; 513 ram_table->iir_curve[2] = 0x65; 514 ram_table->iir_curve[3] = 0x65; 515 ram_table->iir_curve[4] = 0x65; 516 517 //Gamma 2.2 518 ram_table->crgb_thresh[0] = cpu_to_be16(0x127c); 519 ram_table->crgb_thresh[1] = cpu_to_be16(0x151b); 520 ram_table->crgb_thresh[2] = cpu_to_be16(0x17d5); 521 ram_table->crgb_thresh[3] = cpu_to_be16(0x1a56); 522 ram_table->crgb_thresh[4] = cpu_to_be16(0x1c83); 523 ram_table->crgb_thresh[5] = cpu_to_be16(0x1e72); 524 ram_table->crgb_thresh[6] = cpu_to_be16(0x20f0); 525 ram_table->crgb_thresh[7] = cpu_to_be16(0x232b); 526 ram_table->crgb_offset[0] = cpu_to_be16(0x2999); 527 ram_table->crgb_offset[1] = cpu_to_be16(0x3999); 528 ram_table->crgb_offset[2] = cpu_to_be16(0x4666); 529 ram_table->crgb_offset[3] = cpu_to_be16(0x5999); 530 ram_table->crgb_offset[4] = cpu_to_be16(0x6333); 531 ram_table->crgb_offset[5] = cpu_to_be16(0x7800); 532 ram_table->crgb_offset[6] = cpu_to_be16(0x8c00); 533 ram_table->crgb_offset[7] = cpu_to_be16(0xa000); 534 ram_table->crgb_slope[0] = cpu_to_be16(0x3609); 535 ram_table->crgb_slope[1] = cpu_to_be16(0x2dfa); 536 ram_table->crgb_slope[2] = cpu_to_be16(0x27ea); 537 ram_table->crgb_slope[3] = cpu_to_be16(0x235d); 538 ram_table->crgb_slope[4] = cpu_to_be16(0x2042); 539 ram_table->crgb_slope[5] = cpu_to_be16(0x1dc3); 540 ram_table->crgb_slope[6] = cpu_to_be16(0x1b1a); 541 ram_table->crgb_slope[7] = cpu_to_be16(0x1910); 542 543 fill_backlight_transform_table_v_2_2( 544 params, ram_table); 545 } 546 547 bool dmcu_load_iram(struct dmcu *dmcu, 548 struct dmcu_iram_parameters params) 549 { 550 unsigned char ram_table[IRAM_SIZE]; 551 bool result = false; 552 553 if (dmcu == NULL) 554 return false; 555 556 if (!dmcu->funcs->is_dmcu_initialized(dmcu)) 557 return true; 558 559 memset(&ram_table, 0, sizeof(ram_table)); 560 561 if (dmcu->dmcu_version.abm_version == 0x22) { 562 fill_iram_v_2_2((struct iram_table_v_2_2 *)ram_table, params); 563 564 result = dmcu->funcs->load_iram( 565 dmcu, 0, (char *)(&ram_table), IRAM_RESERVE_AREA_START_V2_2); 566 } else { 567 fill_iram_v_2((struct iram_table_v_2 *)ram_table, params); 568 569 result = dmcu->funcs->load_iram( 570 dmcu, 0, (char *)(&ram_table), IRAM_RESERVE_AREA_START_V2); 571 572 if (result) 573 result = dmcu->funcs->load_iram( 574 dmcu, IRAM_RESERVE_AREA_END_V2 + 1, 575 (char *)(&ram_table) + IRAM_RESERVE_AREA_END_V2 + 1, 576 sizeof(ram_table) - IRAM_RESERVE_AREA_END_V2 - 1); 577 } 578 579 return result; 580 } 581