1 /* Copyright 2018 Advanced Micro Devices, Inc.
2  *
3  * Permission is hereby granted, free of charge, to any person obtaining a
4  * copy of this software and associated documentation files (the "Software"),
5  * to deal in the Software without restriction, including without limitation
6  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
7  * and/or sell copies of the Software, and to permit persons to whom the
8  * Software is furnished to do so, subject to the following conditions:
9  *
10  * The above copyright notice and this permission notice shall be included in
11  * all copies or substantial portions of the Software.
12  *
13  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
14  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
15  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
16  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
17  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
18  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
19  * OTHER DEALINGS IN THE SOFTWARE.
20  *
21  * Authors: AMD
22  *
23  */
24 
25 #include "power_helpers.h"
26 #include "dc/inc/hw/dmcu.h"
27 
28 #define DIV_ROUNDUP(a, b) (((a)+((b)/2))/(b))
29 
30 /* Possible Min Reduction config from least aggressive to most aggressive
31  *  0    1     2     3     4     5     6     7     8     9     10    11   12
32  * 100  98.0 94.1  94.1  85.1  80.3  75.3  69.4  60.0  57.6  50.2  49.8  40.0 %
33  */
34 static const unsigned char min_reduction_table[13] = {
35 0xff, 0xfa, 0xf0, 0xf0, 0xd9, 0xcd, 0xc0, 0xb1, 0x99, 0x93, 0x80, 0x82, 0x66};
36 
37 /* Possible Max Reduction configs from least aggressive to most aggressive
38  *  0    1     2     3     4     5     6     7     8     9     10    11   12
39  * 96.1 89.8 85.1  80.3  69.4  64.7  64.7  50.2  39.6  30.2  30.2  30.2  19.6 %
40  */
41 static const unsigned char max_reduction_table[13] = {
42 0xf5, 0xe5, 0xd9, 0xcd, 0xb1, 0xa5, 0xa5, 0x80, 0x65, 0x4d, 0x4d, 0x4d, 0x32};
43 
44 /* Possible ABM 2.2 Min Reduction configs from least aggressive to most aggressive
45  *  0    1     2     3     4     5     6     7     8     9     10    11   12
46  * 100  100   100   100   100   100   100   100  100  92.2  83.1  75.3  75.3 %
47  */
48 static const unsigned char min_reduction_table_v_2_2[13] = {
49 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xeb, 0xd4, 0xc0, 0xc0};
50 
51 /* Possible ABM 2.2 Max Reduction configs from least aggressive to most aggressive
52  *  0    1     2     3     4     5     6     7     8     9     10    11   12
53  * 96.1 89.8 74.9  69.4  64.7  52.2  48.6  39.6  30.2  25.1  19.6  12.5  12.5 %
54  */
55 static const unsigned char max_reduction_table_v_2_2[13] = {
56 0xf5, 0xe5, 0xbf, 0xb1, 0xa5, 0x85, 0x7c, 0x65, 0x4d, 0x40, 0x32, 0x20, 0x20};
57 
58 /* Predefined ABM configuration sets. We may have different configuration sets
59  * in order to satisfy different power/quality requirements.
60  */
61 static const unsigned char abm_config[abm_defines_max_config][abm_defines_max_level] = {
62 /*  ABM Level 1,    ABM Level 2,    ABM Level 3,    ABM Level 4 */
63 {       2,              5,              7,              8       },	/* Default - Medium aggressiveness */
64 {       2,              5,              8,              11      },	/* Alt #1  - Increased aggressiveness */
65 {       0,              2,              4,              8       },	/* Alt #2  - Minimal aggressiveness */
66 {       3,              6,              10,             12      },	/* Alt #3  - Super aggressiveness */
67 };
68 
69 struct abm_parameters {
70 	unsigned char min_reduction;
71 	unsigned char max_reduction;
72 	unsigned char bright_pos_gain;
73 	unsigned char dark_pos_gain;
74 	unsigned char brightness_gain;
75 	unsigned char contrast_factor;
76 	unsigned char deviation_gain;
77 	unsigned char min_knee;
78 	unsigned char max_knee;
79 };
80 
81 static const struct abm_parameters abm_settings_config0[abm_defines_max_level] = {
82 //  min_red  max_red  bright_pos  dark_pos  brightness_gain  contrast  deviation  min_knee  max_knee
83 	{0xff,   0xbf,    0x20,       0x00,     0xff,            0x99,     0xb3,      0x40,     0xE0},
84 	{0xff,   0x85,    0x20,       0x00,     0xff,            0x90,     0xa8,      0x40,     0xE0},
85 	{0xff,   0x40,    0x20,       0x00,     0xff,            0x90,     0x68,      0x40,     0xE0},
86 	{0x82,   0x4d,    0x20,       0x00,     0x00,            0x90,     0xb3,      0x70,     0x70},
87 };
88 
89 static const struct abm_parameters abm_settings_config1[abm_defines_max_level] = {
90 //  min_red  max_red  bright_pos  dark_pos  brightness_gain  contrast  deviation  min_knee  max_knee
91 	{0xf0,   0xd9,    0x20,       0x00,     0x00,            0xa8,     0xb3,      0x70,     0x70},
92 	{0xcd,   0xa5,    0x20,       0x00,     0x00,            0xa8,     0xb3,      0x70,     0x70},
93 	{0x99,   0x65,    0x20,       0x00,     0x00,            0xa8,     0xb3,      0x70,     0x70},
94 	{0x82,   0x4d,    0x20,       0x00,     0x00,            0xa8,     0xb3,      0x70,     0x70},
95 };
96 
97 static const struct abm_parameters * const abm_settings[] = {
98 	abm_settings_config0,
99 	abm_settings_config1,
100 };
101 
102 #define NUM_AMBI_LEVEL    5
103 #define NUM_AGGR_LEVEL    4
104 #define NUM_POWER_FN_SEGS 8
105 #define NUM_BL_CURVE_SEGS 16
106 #define IRAM_SIZE 256
107 
108 #define IRAM_RESERVE_AREA_START_V2 0xF0  // reserve 0xF0~0xF6 are write by DMCU only
109 #define IRAM_RESERVE_AREA_END_V2 0xF6  // reserve 0xF0~0xF6 are write by DMCU only
110 
111 #define IRAM_RESERVE_AREA_START_V2_2 0xF0  // reserve 0xF0~0xFF are write by DMCU only
112 #define IRAM_RESERVE_AREA_END_V2_2 0xFF  // reserve 0xF0~0xFF are write by DMCU only
113 
114 #pragma pack(push, 1)
115 /* NOTE: iRAM is 256B in size */
116 struct iram_table_v_2 {
117 	/* flags                      */
118 	uint16_t flags;							/* 0x00 U16  */
119 
120 	/* parameters for ABM2.0 algorithm */
121 	uint8_t min_reduction[NUM_AMBI_LEVEL][NUM_AGGR_LEVEL];		/* 0x02 U0.8 */
122 	uint8_t max_reduction[NUM_AMBI_LEVEL][NUM_AGGR_LEVEL];		/* 0x16 U0.8 */
123 	uint8_t bright_pos_gain[NUM_AMBI_LEVEL][NUM_AGGR_LEVEL];	/* 0x2a U2.6 */
124 	uint8_t bright_neg_gain[NUM_AMBI_LEVEL][NUM_AGGR_LEVEL];	/* 0x3e U2.6 */
125 	uint8_t dark_pos_gain[NUM_AMBI_LEVEL][NUM_AGGR_LEVEL];		/* 0x52 U2.6 */
126 	uint8_t dark_neg_gain[NUM_AMBI_LEVEL][NUM_AGGR_LEVEL];		/* 0x66 U2.6 */
127 	uint8_t iir_curve[NUM_AMBI_LEVEL];				/* 0x7a U0.8 */
128 	uint8_t deviation_gain;						/* 0x7f U0.8 */
129 
130 	/* parameters for crgb conversion */
131 	uint16_t crgb_thresh[NUM_POWER_FN_SEGS];			/* 0x80 U3.13 */
132 	uint16_t crgb_offset[NUM_POWER_FN_SEGS];			/* 0x90 U1.15 */
133 	uint16_t crgb_slope[NUM_POWER_FN_SEGS];				/* 0xa0 U4.12 */
134 
135 	/* parameters for custom curve */
136 	/* thresholds for brightness --> backlight */
137 	uint16_t backlight_thresholds[NUM_BL_CURVE_SEGS];		/* 0xb0 U16.0 */
138 	/* offsets for brightness --> backlight */
139 	uint16_t backlight_offsets[NUM_BL_CURVE_SEGS];			/* 0xd0 U16.0 */
140 
141 	/* For reading PSR State directly from IRAM */
142 	uint8_t psr_state;						/* 0xf0       */
143 	uint8_t dmcu_mcp_interface_version;							/* 0xf1       */
144 	uint8_t dmcu_abm_feature_version;							/* 0xf2       */
145 	uint8_t dmcu_psr_feature_version;							/* 0xf3       */
146 	uint16_t dmcu_version;										/* 0xf4       */
147 	uint8_t dmcu_state;						/* 0xf6       */
148 
149 	uint16_t blRampReduction;					/* 0xf7       */
150 	uint16_t blRampStart;						/* 0xf9       */
151 	uint8_t dummy5;							/* 0xfb       */
152 	uint8_t dummy6;							/* 0xfc       */
153 	uint8_t dummy7;							/* 0xfd       */
154 	uint8_t dummy8;							/* 0xfe       */
155 	uint8_t dummy9;							/* 0xff       */
156 };
157 
158 struct iram_table_v_2_2 {
159 	/* flags                      */
160 	uint16_t flags;							/* 0x00 U16  */
161 
162 	/* parameters for ABM2.2 algorithm */
163 	uint8_t min_reduction[NUM_AMBI_LEVEL][NUM_AGGR_LEVEL];		/* 0x02 U0.8 */
164 	uint8_t max_reduction[NUM_AMBI_LEVEL][NUM_AGGR_LEVEL];		/* 0x16 U0.8 */
165 	uint8_t bright_pos_gain[NUM_AMBI_LEVEL][NUM_AGGR_LEVEL];	/* 0x2a U2.6 */
166 	uint8_t dark_pos_gain[NUM_AMBI_LEVEL][NUM_AGGR_LEVEL];		/* 0x3e U2.6 */
167 	uint8_t hybrid_factor[NUM_AGGR_LEVEL];						/* 0x52 U0.8 */
168 	uint8_t contrast_factor[NUM_AGGR_LEVEL];					/* 0x56 U0.8 */
169 	uint8_t deviation_gain[NUM_AGGR_LEVEL];						/* 0x5a U0.8 */
170 	uint8_t iir_curve[NUM_AMBI_LEVEL];							/* 0x5e U0.8 */
171 	uint8_t min_knee[NUM_AGGR_LEVEL];							/* 0x63 U0.8 */
172 	uint8_t max_knee[NUM_AGGR_LEVEL];							/* 0x67 U0.8 */
173 	uint8_t pad[21];											/* 0x6b U0.8 */
174 
175 	/* parameters for crgb conversion */
176 	uint16_t crgb_thresh[NUM_POWER_FN_SEGS];					/* 0x80 U3.13 */
177 	uint16_t crgb_offset[NUM_POWER_FN_SEGS];					/* 0x90 U1.15 */
178 	uint16_t crgb_slope[NUM_POWER_FN_SEGS];						/* 0xa0 U4.12 */
179 
180 	/* parameters for custom curve */
181 	/* thresholds for brightness --> backlight */
182 	uint16_t backlight_thresholds[NUM_BL_CURVE_SEGS];			/* 0xb0 U16.0 */
183 	/* offsets for brightness --> backlight */
184 	uint16_t backlight_offsets[NUM_BL_CURVE_SEGS];				/* 0xd0 U16.0 */
185 
186 	/* For reading PSR State directly from IRAM */
187 	uint8_t psr_state;											/* 0xf0       */
188 	uint8_t dmcu_mcp_interface_version;							/* 0xf1       */
189 	uint8_t dmcu_abm_feature_version;							/* 0xf2       */
190 	uint8_t dmcu_psr_feature_version;							/* 0xf3       */
191 	uint16_t dmcu_version;										/* 0xf4       */
192 	uint8_t dmcu_state;											/* 0xf6       */
193 
194 	uint8_t dummy1;												/* 0xf7       */
195 	uint8_t dummy2;												/* 0xf8       */
196 	uint8_t dummy3;												/* 0xf9       */
197 	uint8_t dummy4;												/* 0xfa       */
198 	uint8_t dummy5;												/* 0xfb       */
199 	uint8_t dummy6;												/* 0xfc       */
200 	uint8_t dummy7;												/* 0xfd       */
201 	uint8_t dummy8;												/* 0xfe       */
202 	uint8_t dummy9;												/* 0xff       */
203 };
204 #pragma pack(pop)
205 
206 static void fill_backlight_transform_table(struct dmcu_iram_parameters params,
207 		struct iram_table_v_2 *table)
208 {
209 	unsigned int i;
210 	unsigned int num_entries = NUM_BL_CURVE_SEGS;
211 	unsigned int lut_index;
212 
213 	table->backlight_thresholds[0] = 0;
214 	table->backlight_offsets[0] = params.backlight_lut_array[0];
215 	table->backlight_thresholds[num_entries-1] = 0xFFFF;
216 	table->backlight_offsets[num_entries-1] =
217 		params.backlight_lut_array[params.backlight_lut_array_size - 1];
218 
219 	/* Setup all brightness levels between 0% and 100% exclusive
220 	 * Fills brightness-to-backlight transform table. Backlight custom curve
221 	 * describes transform from brightness to backlight. It will be defined
222 	 * as set of thresholds and set of offsets, together, implying
223 	 * extrapolation of custom curve into 16 uniformly spanned linear
224 	 * segments.  Each threshold/offset represented by 16 bit entry in
225 	 * format U4.10.
226 	 */
227 	for (i = 1; i+1 < num_entries; i++) {
228 		lut_index = (params.backlight_lut_array_size - 1) * i / (num_entries - 1);
229 		ASSERT(lut_index < params.backlight_lut_array_size);
230 
231 		table->backlight_thresholds[i] =
232 			cpu_to_be16(DIV_ROUNDUP((i * 65536), num_entries));
233 		table->backlight_offsets[i] =
234 			cpu_to_be16(params.backlight_lut_array[lut_index]);
235 	}
236 }
237 
238 static void fill_backlight_transform_table_v_2_2(struct dmcu_iram_parameters params,
239 		struct iram_table_v_2_2 *table)
240 {
241 	unsigned int i;
242 	unsigned int num_entries = NUM_BL_CURVE_SEGS;
243 	unsigned int lut_index;
244 
245 	table->backlight_thresholds[0] = 0;
246 	table->backlight_offsets[0] = params.backlight_lut_array[0];
247 	table->backlight_thresholds[num_entries-1] = 0xFFFF;
248 	table->backlight_offsets[num_entries-1] =
249 		params.backlight_lut_array[params.backlight_lut_array_size - 1];
250 
251 	/* Setup all brightness levels between 0% and 100% exclusive
252 	 * Fills brightness-to-backlight transform table. Backlight custom curve
253 	 * describes transform from brightness to backlight. It will be defined
254 	 * as set of thresholds and set of offsets, together, implying
255 	 * extrapolation of custom curve into 16 uniformly spanned linear
256 	 * segments.  Each threshold/offset represented by 16 bit entry in
257 	 * format U4.10.
258 	 */
259 	for (i = 1; i+1 < num_entries; i++) {
260 		lut_index = (params.backlight_lut_array_size - 1) * i / (num_entries - 1);
261 		ASSERT(lut_index < params.backlight_lut_array_size);
262 
263 		table->backlight_thresholds[i] =
264 			cpu_to_be16(DIV_ROUNDUP((i * 65536), num_entries));
265 		table->backlight_offsets[i] =
266 			cpu_to_be16(params.backlight_lut_array[lut_index]);
267 	}
268 }
269 
270 void fill_iram_v_2(struct iram_table_v_2 *ram_table, struct dmcu_iram_parameters params)
271 {
272 	unsigned int set = params.set;
273 
274 	ram_table->flags = 0x0;
275 	ram_table->deviation_gain = 0xb3;
276 
277 	ram_table->blRampReduction =
278 		cpu_to_be16(params.backlight_ramping_reduction);
279 	ram_table->blRampStart =
280 		cpu_to_be16(params.backlight_ramping_start);
281 
282 	ram_table->min_reduction[0][0] = min_reduction_table[abm_config[set][0]];
283 	ram_table->min_reduction[1][0] = min_reduction_table[abm_config[set][0]];
284 	ram_table->min_reduction[2][0] = min_reduction_table[abm_config[set][0]];
285 	ram_table->min_reduction[3][0] = min_reduction_table[abm_config[set][0]];
286 	ram_table->min_reduction[4][0] = min_reduction_table[abm_config[set][0]];
287 	ram_table->max_reduction[0][0] = max_reduction_table[abm_config[set][0]];
288 	ram_table->max_reduction[1][0] = max_reduction_table[abm_config[set][0]];
289 	ram_table->max_reduction[2][0] = max_reduction_table[abm_config[set][0]];
290 	ram_table->max_reduction[3][0] = max_reduction_table[abm_config[set][0]];
291 	ram_table->max_reduction[4][0] = max_reduction_table[abm_config[set][0]];
292 
293 	ram_table->min_reduction[0][1] = min_reduction_table[abm_config[set][1]];
294 	ram_table->min_reduction[1][1] = min_reduction_table[abm_config[set][1]];
295 	ram_table->min_reduction[2][1] = min_reduction_table[abm_config[set][1]];
296 	ram_table->min_reduction[3][1] = min_reduction_table[abm_config[set][1]];
297 	ram_table->min_reduction[4][1] = min_reduction_table[abm_config[set][1]];
298 	ram_table->max_reduction[0][1] = max_reduction_table[abm_config[set][1]];
299 	ram_table->max_reduction[1][1] = max_reduction_table[abm_config[set][1]];
300 	ram_table->max_reduction[2][1] = max_reduction_table[abm_config[set][1]];
301 	ram_table->max_reduction[3][1] = max_reduction_table[abm_config[set][1]];
302 	ram_table->max_reduction[4][1] = max_reduction_table[abm_config[set][1]];
303 
304 	ram_table->min_reduction[0][2] = min_reduction_table[abm_config[set][2]];
305 	ram_table->min_reduction[1][2] = min_reduction_table[abm_config[set][2]];
306 	ram_table->min_reduction[2][2] = min_reduction_table[abm_config[set][2]];
307 	ram_table->min_reduction[3][2] = min_reduction_table[abm_config[set][2]];
308 	ram_table->min_reduction[4][2] = min_reduction_table[abm_config[set][2]];
309 	ram_table->max_reduction[0][2] = max_reduction_table[abm_config[set][2]];
310 	ram_table->max_reduction[1][2] = max_reduction_table[abm_config[set][2]];
311 	ram_table->max_reduction[2][2] = max_reduction_table[abm_config[set][2]];
312 	ram_table->max_reduction[3][2] = max_reduction_table[abm_config[set][2]];
313 	ram_table->max_reduction[4][2] = max_reduction_table[abm_config[set][2]];
314 
315 	ram_table->min_reduction[0][3] = min_reduction_table[abm_config[set][3]];
316 	ram_table->min_reduction[1][3] = min_reduction_table[abm_config[set][3]];
317 	ram_table->min_reduction[2][3] = min_reduction_table[abm_config[set][3]];
318 	ram_table->min_reduction[3][3] = min_reduction_table[abm_config[set][3]];
319 	ram_table->min_reduction[4][3] = min_reduction_table[abm_config[set][3]];
320 	ram_table->max_reduction[0][3] = max_reduction_table[abm_config[set][3]];
321 	ram_table->max_reduction[1][3] = max_reduction_table[abm_config[set][3]];
322 	ram_table->max_reduction[2][3] = max_reduction_table[abm_config[set][3]];
323 	ram_table->max_reduction[3][3] = max_reduction_table[abm_config[set][3]];
324 	ram_table->max_reduction[4][3] = max_reduction_table[abm_config[set][3]];
325 
326 	ram_table->bright_pos_gain[0][0] = 0x20;
327 	ram_table->bright_pos_gain[0][1] = 0x20;
328 	ram_table->bright_pos_gain[0][2] = 0x20;
329 	ram_table->bright_pos_gain[0][3] = 0x20;
330 	ram_table->bright_pos_gain[1][0] = 0x20;
331 	ram_table->bright_pos_gain[1][1] = 0x20;
332 	ram_table->bright_pos_gain[1][2] = 0x20;
333 	ram_table->bright_pos_gain[1][3] = 0x20;
334 	ram_table->bright_pos_gain[2][0] = 0x20;
335 	ram_table->bright_pos_gain[2][1] = 0x20;
336 	ram_table->bright_pos_gain[2][2] = 0x20;
337 	ram_table->bright_pos_gain[2][3] = 0x20;
338 	ram_table->bright_pos_gain[3][0] = 0x20;
339 	ram_table->bright_pos_gain[3][1] = 0x20;
340 	ram_table->bright_pos_gain[3][2] = 0x20;
341 	ram_table->bright_pos_gain[3][3] = 0x20;
342 	ram_table->bright_pos_gain[4][0] = 0x20;
343 	ram_table->bright_pos_gain[4][1] = 0x20;
344 	ram_table->bright_pos_gain[4][2] = 0x20;
345 	ram_table->bright_pos_gain[4][3] = 0x20;
346 	ram_table->bright_neg_gain[0][1] = 0x00;
347 	ram_table->bright_neg_gain[0][2] = 0x00;
348 	ram_table->bright_neg_gain[0][3] = 0x00;
349 	ram_table->bright_neg_gain[1][0] = 0x00;
350 	ram_table->bright_neg_gain[1][1] = 0x00;
351 	ram_table->bright_neg_gain[1][2] = 0x00;
352 	ram_table->bright_neg_gain[1][3] = 0x00;
353 	ram_table->bright_neg_gain[2][0] = 0x00;
354 	ram_table->bright_neg_gain[2][1] = 0x00;
355 	ram_table->bright_neg_gain[2][2] = 0x00;
356 	ram_table->bright_neg_gain[2][3] = 0x00;
357 	ram_table->bright_neg_gain[3][0] = 0x00;
358 	ram_table->bright_neg_gain[3][1] = 0x00;
359 	ram_table->bright_neg_gain[3][2] = 0x00;
360 	ram_table->bright_neg_gain[3][3] = 0x00;
361 	ram_table->bright_neg_gain[4][0] = 0x00;
362 	ram_table->bright_neg_gain[4][1] = 0x00;
363 	ram_table->bright_neg_gain[4][2] = 0x00;
364 	ram_table->bright_neg_gain[4][3] = 0x00;
365 	ram_table->dark_pos_gain[0][0] = 0x00;
366 	ram_table->dark_pos_gain[0][1] = 0x00;
367 	ram_table->dark_pos_gain[0][2] = 0x00;
368 	ram_table->dark_pos_gain[0][3] = 0x00;
369 	ram_table->dark_pos_gain[1][0] = 0x00;
370 	ram_table->dark_pos_gain[1][1] = 0x00;
371 	ram_table->dark_pos_gain[1][2] = 0x00;
372 	ram_table->dark_pos_gain[1][3] = 0x00;
373 	ram_table->dark_pos_gain[2][0] = 0x00;
374 	ram_table->dark_pos_gain[2][1] = 0x00;
375 	ram_table->dark_pos_gain[2][2] = 0x00;
376 	ram_table->dark_pos_gain[2][3] = 0x00;
377 	ram_table->dark_pos_gain[3][0] = 0x00;
378 	ram_table->dark_pos_gain[3][1] = 0x00;
379 	ram_table->dark_pos_gain[3][2] = 0x00;
380 	ram_table->dark_pos_gain[3][3] = 0x00;
381 	ram_table->dark_pos_gain[4][0] = 0x00;
382 	ram_table->dark_pos_gain[4][1] = 0x00;
383 	ram_table->dark_pos_gain[4][2] = 0x00;
384 	ram_table->dark_pos_gain[4][3] = 0x00;
385 	ram_table->dark_neg_gain[0][0] = 0x00;
386 	ram_table->dark_neg_gain[0][1] = 0x00;
387 	ram_table->dark_neg_gain[0][2] = 0x00;
388 	ram_table->dark_neg_gain[0][3] = 0x00;
389 	ram_table->dark_neg_gain[1][0] = 0x00;
390 	ram_table->dark_neg_gain[1][1] = 0x00;
391 	ram_table->dark_neg_gain[1][2] = 0x00;
392 	ram_table->dark_neg_gain[1][3] = 0x00;
393 	ram_table->dark_neg_gain[2][0] = 0x00;
394 	ram_table->dark_neg_gain[2][1] = 0x00;
395 	ram_table->dark_neg_gain[2][2] = 0x00;
396 	ram_table->dark_neg_gain[2][3] = 0x00;
397 	ram_table->dark_neg_gain[3][0] = 0x00;
398 	ram_table->dark_neg_gain[3][1] = 0x00;
399 	ram_table->dark_neg_gain[3][2] = 0x00;
400 	ram_table->dark_neg_gain[3][3] = 0x00;
401 	ram_table->dark_neg_gain[4][0] = 0x00;
402 	ram_table->dark_neg_gain[4][1] = 0x00;
403 	ram_table->dark_neg_gain[4][2] = 0x00;
404 	ram_table->dark_neg_gain[4][3] = 0x00;
405 
406 	ram_table->iir_curve[0] = 0x65;
407 	ram_table->iir_curve[1] = 0x65;
408 	ram_table->iir_curve[2] = 0x65;
409 	ram_table->iir_curve[3] = 0x65;
410 	ram_table->iir_curve[4] = 0x65;
411 
412 	//Gamma 2.4
413 	ram_table->crgb_thresh[0] = cpu_to_be16(0x13b6);
414 	ram_table->crgb_thresh[1] = cpu_to_be16(0x1648);
415 	ram_table->crgb_thresh[2] = cpu_to_be16(0x18e3);
416 	ram_table->crgb_thresh[3] = cpu_to_be16(0x1b41);
417 	ram_table->crgb_thresh[4] = cpu_to_be16(0x1d46);
418 	ram_table->crgb_thresh[5] = cpu_to_be16(0x1f21);
419 	ram_table->crgb_thresh[6] = cpu_to_be16(0x2167);
420 	ram_table->crgb_thresh[7] = cpu_to_be16(0x2384);
421 	ram_table->crgb_offset[0] = cpu_to_be16(0x2999);
422 	ram_table->crgb_offset[1] = cpu_to_be16(0x3999);
423 	ram_table->crgb_offset[2] = cpu_to_be16(0x4666);
424 	ram_table->crgb_offset[3] = cpu_to_be16(0x5999);
425 	ram_table->crgb_offset[4] = cpu_to_be16(0x6333);
426 	ram_table->crgb_offset[5] = cpu_to_be16(0x7800);
427 	ram_table->crgb_offset[6] = cpu_to_be16(0x8c00);
428 	ram_table->crgb_offset[7] = cpu_to_be16(0xa000);
429 	ram_table->crgb_slope[0]  = cpu_to_be16(0x3147);
430 	ram_table->crgb_slope[1]  = cpu_to_be16(0x2978);
431 	ram_table->crgb_slope[2]  = cpu_to_be16(0x23a2);
432 	ram_table->crgb_slope[3]  = cpu_to_be16(0x1f55);
433 	ram_table->crgb_slope[4]  = cpu_to_be16(0x1c63);
434 	ram_table->crgb_slope[5]  = cpu_to_be16(0x1a0f);
435 	ram_table->crgb_slope[6]  = cpu_to_be16(0x178d);
436 	ram_table->crgb_slope[7]  = cpu_to_be16(0x15ab);
437 
438 	fill_backlight_transform_table(
439 			params, ram_table);
440 }
441 
442 void fill_iram_v_2_2(struct iram_table_v_2_2 *ram_table, struct dmcu_iram_parameters params)
443 {
444 	unsigned int set = params.set;
445 
446 	ram_table->flags = 0x0;
447 
448 	ram_table->deviation_gain[0] = 0xb3;
449 	ram_table->deviation_gain[1] = 0xa8;
450 	ram_table->deviation_gain[2] = 0x98;
451 	ram_table->deviation_gain[3] = 0x68;
452 
453 	ram_table->min_reduction[0][0] = min_reduction_table_v_2_2[abm_config[set][0]];
454 	ram_table->min_reduction[1][0] = min_reduction_table_v_2_2[abm_config[set][0]];
455 	ram_table->min_reduction[2][0] = min_reduction_table_v_2_2[abm_config[set][0]];
456 	ram_table->min_reduction[3][0] = min_reduction_table_v_2_2[abm_config[set][0]];
457 	ram_table->min_reduction[4][0] = min_reduction_table_v_2_2[abm_config[set][0]];
458 	ram_table->max_reduction[0][0] = max_reduction_table_v_2_2[abm_config[set][0]];
459 	ram_table->max_reduction[1][0] = max_reduction_table_v_2_2[abm_config[set][0]];
460 	ram_table->max_reduction[2][0] = max_reduction_table_v_2_2[abm_config[set][0]];
461 	ram_table->max_reduction[3][0] = max_reduction_table_v_2_2[abm_config[set][0]];
462 	ram_table->max_reduction[4][0] = max_reduction_table_v_2_2[abm_config[set][0]];
463 
464 	ram_table->min_reduction[0][1] = min_reduction_table_v_2_2[abm_config[set][1]];
465 	ram_table->min_reduction[1][1] = min_reduction_table_v_2_2[abm_config[set][1]];
466 	ram_table->min_reduction[2][1] = min_reduction_table_v_2_2[abm_config[set][1]];
467 	ram_table->min_reduction[3][1] = min_reduction_table_v_2_2[abm_config[set][1]];
468 	ram_table->min_reduction[4][1] = min_reduction_table_v_2_2[abm_config[set][1]];
469 	ram_table->max_reduction[0][1] = max_reduction_table_v_2_2[abm_config[set][1]];
470 	ram_table->max_reduction[1][1] = max_reduction_table_v_2_2[abm_config[set][1]];
471 	ram_table->max_reduction[2][1] = max_reduction_table_v_2_2[abm_config[set][1]];
472 	ram_table->max_reduction[3][1] = max_reduction_table_v_2_2[abm_config[set][1]];
473 	ram_table->max_reduction[4][1] = max_reduction_table_v_2_2[abm_config[set][1]];
474 
475 	ram_table->min_reduction[0][2] = min_reduction_table_v_2_2[abm_config[set][2]];
476 	ram_table->min_reduction[1][2] = min_reduction_table_v_2_2[abm_config[set][2]];
477 	ram_table->min_reduction[2][2] = min_reduction_table_v_2_2[abm_config[set][2]];
478 	ram_table->min_reduction[3][2] = min_reduction_table_v_2_2[abm_config[set][2]];
479 	ram_table->min_reduction[4][2] = min_reduction_table_v_2_2[abm_config[set][2]];
480 	ram_table->max_reduction[0][2] = max_reduction_table_v_2_2[abm_config[set][2]];
481 	ram_table->max_reduction[1][2] = max_reduction_table_v_2_2[abm_config[set][2]];
482 	ram_table->max_reduction[2][2] = max_reduction_table_v_2_2[abm_config[set][2]];
483 	ram_table->max_reduction[3][2] = max_reduction_table_v_2_2[abm_config[set][2]];
484 	ram_table->max_reduction[4][2] = max_reduction_table_v_2_2[abm_config[set][2]];
485 
486 	ram_table->min_reduction[0][3] = min_reduction_table_v_2_2[abm_config[set][3]];
487 	ram_table->min_reduction[1][3] = min_reduction_table_v_2_2[abm_config[set][3]];
488 	ram_table->min_reduction[2][3] = min_reduction_table_v_2_2[abm_config[set][3]];
489 	ram_table->min_reduction[3][3] = min_reduction_table_v_2_2[abm_config[set][3]];
490 	ram_table->min_reduction[4][3] = min_reduction_table_v_2_2[abm_config[set][3]];
491 	ram_table->max_reduction[0][3] = max_reduction_table_v_2_2[abm_config[set][3]];
492 	ram_table->max_reduction[1][3] = max_reduction_table_v_2_2[abm_config[set][3]];
493 	ram_table->max_reduction[2][3] = max_reduction_table_v_2_2[abm_config[set][3]];
494 	ram_table->max_reduction[3][3] = max_reduction_table_v_2_2[abm_config[set][3]];
495 	ram_table->max_reduction[4][3] = max_reduction_table_v_2_2[abm_config[set][3]];
496 
497 	ram_table->bright_pos_gain[0][0] = 0x20;
498 	ram_table->bright_pos_gain[0][1] = 0x20;
499 	ram_table->bright_pos_gain[0][2] = 0x20;
500 	ram_table->bright_pos_gain[0][3] = 0x20;
501 	ram_table->bright_pos_gain[1][0] = 0x20;
502 	ram_table->bright_pos_gain[1][1] = 0x20;
503 	ram_table->bright_pos_gain[1][2] = 0x20;
504 	ram_table->bright_pos_gain[1][3] = 0x20;
505 	ram_table->bright_pos_gain[2][0] = 0x20;
506 	ram_table->bright_pos_gain[2][1] = 0x20;
507 	ram_table->bright_pos_gain[2][2] = 0x20;
508 	ram_table->bright_pos_gain[2][3] = 0x20;
509 	ram_table->bright_pos_gain[3][0] = 0x20;
510 	ram_table->bright_pos_gain[3][1] = 0x20;
511 	ram_table->bright_pos_gain[3][2] = 0x20;
512 	ram_table->bright_pos_gain[3][3] = 0x20;
513 	ram_table->bright_pos_gain[4][0] = 0x20;
514 	ram_table->bright_pos_gain[4][1] = 0x20;
515 	ram_table->bright_pos_gain[4][2] = 0x20;
516 	ram_table->bright_pos_gain[4][3] = 0x20;
517 
518 	ram_table->dark_pos_gain[0][0] = 0x00;
519 	ram_table->dark_pos_gain[0][1] = 0x00;
520 	ram_table->dark_pos_gain[0][2] = 0x00;
521 	ram_table->dark_pos_gain[0][3] = 0x00;
522 	ram_table->dark_pos_gain[1][0] = 0x00;
523 	ram_table->dark_pos_gain[1][1] = 0x00;
524 	ram_table->dark_pos_gain[1][2] = 0x00;
525 	ram_table->dark_pos_gain[1][3] = 0x00;
526 	ram_table->dark_pos_gain[2][0] = 0x00;
527 	ram_table->dark_pos_gain[2][1] = 0x00;
528 	ram_table->dark_pos_gain[2][2] = 0x00;
529 	ram_table->dark_pos_gain[2][3] = 0x00;
530 	ram_table->dark_pos_gain[3][0] = 0x00;
531 	ram_table->dark_pos_gain[3][1] = 0x00;
532 	ram_table->dark_pos_gain[3][2] = 0x00;
533 	ram_table->dark_pos_gain[3][3] = 0x00;
534 	ram_table->dark_pos_gain[4][0] = 0x00;
535 	ram_table->dark_pos_gain[4][1] = 0x00;
536 	ram_table->dark_pos_gain[4][2] = 0x00;
537 	ram_table->dark_pos_gain[4][3] = 0x00;
538 
539 	ram_table->hybrid_factor[0] = 0xff;
540 	ram_table->hybrid_factor[1] = 0xff;
541 	ram_table->hybrid_factor[2] = 0xff;
542 	ram_table->hybrid_factor[3] = 0xc0;
543 
544 	ram_table->contrast_factor[0] = 0x99;
545 	ram_table->contrast_factor[1] = 0x99;
546 	ram_table->contrast_factor[2] = 0x90;
547 	ram_table->contrast_factor[3] = 0x80;
548 
549 	ram_table->iir_curve[0] = 0x65;
550 	ram_table->iir_curve[1] = 0x65;
551 	ram_table->iir_curve[2] = 0x65;
552 	ram_table->iir_curve[3] = 0x65;
553 	ram_table->iir_curve[4] = 0x65;
554 
555 	//Gamma 2.2
556 	ram_table->crgb_thresh[0] = cpu_to_be16(0x127c);
557 	ram_table->crgb_thresh[1] = cpu_to_be16(0x151b);
558 	ram_table->crgb_thresh[2] = cpu_to_be16(0x17d5);
559 	ram_table->crgb_thresh[3] = cpu_to_be16(0x1a56);
560 	ram_table->crgb_thresh[4] = cpu_to_be16(0x1c83);
561 	ram_table->crgb_thresh[5] = cpu_to_be16(0x1e72);
562 	ram_table->crgb_thresh[6] = cpu_to_be16(0x20f0);
563 	ram_table->crgb_thresh[7] = cpu_to_be16(0x232b);
564 	ram_table->crgb_offset[0] = cpu_to_be16(0x2999);
565 	ram_table->crgb_offset[1] = cpu_to_be16(0x3999);
566 	ram_table->crgb_offset[2] = cpu_to_be16(0x4666);
567 	ram_table->crgb_offset[3] = cpu_to_be16(0x5999);
568 	ram_table->crgb_offset[4] = cpu_to_be16(0x6333);
569 	ram_table->crgb_offset[5] = cpu_to_be16(0x7800);
570 	ram_table->crgb_offset[6] = cpu_to_be16(0x8c00);
571 	ram_table->crgb_offset[7] = cpu_to_be16(0xa000);
572 	ram_table->crgb_slope[0]  = cpu_to_be16(0x3609);
573 	ram_table->crgb_slope[1]  = cpu_to_be16(0x2dfa);
574 	ram_table->crgb_slope[2]  = cpu_to_be16(0x27ea);
575 	ram_table->crgb_slope[3]  = cpu_to_be16(0x235d);
576 	ram_table->crgb_slope[4]  = cpu_to_be16(0x2042);
577 	ram_table->crgb_slope[5]  = cpu_to_be16(0x1dc3);
578 	ram_table->crgb_slope[6]  = cpu_to_be16(0x1b1a);
579 	ram_table->crgb_slope[7]  = cpu_to_be16(0x1910);
580 
581 	fill_backlight_transform_table_v_2_2(
582 			params, ram_table);
583 }
584 
585 void fill_iram_v_2_3(struct iram_table_v_2_2 *ram_table, struct dmcu_iram_parameters params)
586 {
587 	unsigned int i, j;
588 	unsigned int set = params.set;
589 
590 	ram_table->flags = 0x0;
591 	for (i = 0; i < NUM_AGGR_LEVEL; i++) {
592 		ram_table->hybrid_factor[i] = abm_settings[set][i].brightness_gain;
593 		ram_table->contrast_factor[i] = abm_settings[set][i].contrast_factor;
594 		ram_table->deviation_gain[i] = abm_settings[set][i].deviation_gain;
595 		ram_table->min_knee[i] = abm_settings[set][i].min_knee;
596 		ram_table->max_knee[i] = abm_settings[set][i].max_knee;
597 
598 		for (j = 0; j < NUM_AMBI_LEVEL; j++) {
599 			ram_table->min_reduction[j][i] = abm_settings[set][i].min_reduction;
600 			ram_table->max_reduction[j][i] = abm_settings[set][i].max_reduction;
601 			ram_table->bright_pos_gain[j][i] = abm_settings[set][i].bright_pos_gain;
602 			ram_table->dark_pos_gain[j][i] = abm_settings[set][i].dark_pos_gain;
603 		}
604 	}
605 
606 	ram_table->iir_curve[0] = 0x65;
607 	ram_table->iir_curve[1] = 0x65;
608 	ram_table->iir_curve[2] = 0x65;
609 	ram_table->iir_curve[3] = 0x65;
610 	ram_table->iir_curve[4] = 0x65;
611 
612 	//Gamma 2.2
613 	ram_table->crgb_thresh[0] = cpu_to_be16(0x127c);
614 	ram_table->crgb_thresh[1] = cpu_to_be16(0x151b);
615 	ram_table->crgb_thresh[2] = cpu_to_be16(0x17d5);
616 	ram_table->crgb_thresh[3] = cpu_to_be16(0x1a56);
617 	ram_table->crgb_thresh[4] = cpu_to_be16(0x1c83);
618 	ram_table->crgb_thresh[5] = cpu_to_be16(0x1e72);
619 	ram_table->crgb_thresh[6] = cpu_to_be16(0x20f0);
620 	ram_table->crgb_thresh[7] = cpu_to_be16(0x232b);
621 	ram_table->crgb_offset[0] = cpu_to_be16(0x2999);
622 	ram_table->crgb_offset[1] = cpu_to_be16(0x3999);
623 	ram_table->crgb_offset[2] = cpu_to_be16(0x4666);
624 	ram_table->crgb_offset[3] = cpu_to_be16(0x5999);
625 	ram_table->crgb_offset[4] = cpu_to_be16(0x6333);
626 	ram_table->crgb_offset[5] = cpu_to_be16(0x7800);
627 	ram_table->crgb_offset[6] = cpu_to_be16(0x8c00);
628 	ram_table->crgb_offset[7] = cpu_to_be16(0xa000);
629 	ram_table->crgb_slope[0]  = cpu_to_be16(0x3609);
630 	ram_table->crgb_slope[1]  = cpu_to_be16(0x2dfa);
631 	ram_table->crgb_slope[2]  = cpu_to_be16(0x27ea);
632 	ram_table->crgb_slope[3]  = cpu_to_be16(0x235d);
633 	ram_table->crgb_slope[4]  = cpu_to_be16(0x2042);
634 	ram_table->crgb_slope[5]  = cpu_to_be16(0x1dc3);
635 	ram_table->crgb_slope[6]  = cpu_to_be16(0x1b1a);
636 	ram_table->crgb_slope[7]  = cpu_to_be16(0x1910);
637 
638 	fill_backlight_transform_table_v_2_2(
639 			params, ram_table);
640 }
641 
642 bool dmcu_load_iram(struct dmcu *dmcu,
643 	struct dmcu_iram_parameters params)
644 {
645 	unsigned char ram_table[IRAM_SIZE];
646 	bool result = false;
647 
648 	if (dmcu == NULL)
649 		return false;
650 
651 	if (!dmcu->funcs->is_dmcu_initialized(dmcu))
652 		return true;
653 
654 	memset(&ram_table, 0, sizeof(ram_table));
655 
656 	if (dmcu->dmcu_version.abm_version == 0x23) {
657 		fill_iram_v_2_3((struct iram_table_v_2_2 *)ram_table, params);
658 
659 		result = dmcu->funcs->load_iram(
660 				dmcu, 0, (char *)(&ram_table), IRAM_RESERVE_AREA_START_V2_2);
661 	} else if (dmcu->dmcu_version.abm_version == 0x22) {
662 		fill_iram_v_2_2((struct iram_table_v_2_2 *)ram_table, params);
663 
664 		result = dmcu->funcs->load_iram(
665 				dmcu, 0, (char *)(&ram_table), IRAM_RESERVE_AREA_START_V2_2);
666 	} else {
667 		fill_iram_v_2((struct iram_table_v_2 *)ram_table, params);
668 
669 		result = dmcu->funcs->load_iram(
670 				dmcu, 0, (char *)(&ram_table), IRAM_RESERVE_AREA_START_V2);
671 
672 		if (result)
673 			result = dmcu->funcs->load_iram(
674 					dmcu, IRAM_RESERVE_AREA_END_V2 + 1,
675 					(char *)(&ram_table) + IRAM_RESERVE_AREA_END_V2 + 1,
676 					sizeof(ram_table) - IRAM_RESERVE_AREA_END_V2 - 1);
677 	}
678 
679 	return result;
680 }
681