1 /* Copyright 2018 Advanced Micro Devices, Inc.
2  *
3  * Permission is hereby granted, free of charge, to any person obtaining a
4  * copy of this software and associated documentation files (the "Software"),
5  * to deal in the Software without restriction, including without limitation
6  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
7  * and/or sell copies of the Software, and to permit persons to whom the
8  * Software is furnished to do so, subject to the following conditions:
9  *
10  * The above copyright notice and this permission notice shall be included in
11  * all copies or substantial portions of the Software.
12  *
13  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
14  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
15  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
16  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
17  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
18  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
19  * OTHER DEALINGS IN THE SOFTWARE.
20  *
21  * Authors: AMD
22  *
23  */
24 
25 #include "power_helpers.h"
26 #include "dc/inc/hw/dmcu.h"
27 
28 #define DIV_ROUNDUP(a, b) (((a)+((b)/2))/(b))
29 
30 /* Possible Min Reduction config from least aggressive to most aggressive
31  *  0    1     2     3     4     5     6     7     8     9     10    11   12
32  * 100  98.0 94.1  94.1  85.1  80.3  75.3  69.4  60.0  57.6  50.2  49.8  40.0 %
33  */
34 static const unsigned char min_reduction_table[13] = {
35 0xff, 0xfa, 0xf0, 0xf0, 0xd9, 0xcd, 0xc0, 0xb1, 0x99, 0x93, 0x80, 0x82, 0x66};
36 
37 /* Possible Max Reduction configs from least aggressive to most aggressive
38  *  0    1     2     3     4     5     6     7     8     9     10    11   12
39  * 96.1 89.8 85.1  80.3  69.4  64.7  64.7  50.2  39.6  30.2  30.2  30.2  19.6 %
40  */
41 static const unsigned char max_reduction_table[13] = {
42 0xf5, 0xe5, 0xd9, 0xcd, 0xb1, 0xa5, 0xa5, 0x80, 0x65, 0x4d, 0x4d, 0x4d, 0x32};
43 
44 /* Possible ABM 2.2 Min Reduction configs from least aggressive to most aggressive
45  *  0    1     2     3     4     5     6     7     8     9     10    11   12
46  * 100  100   100   100   100   100   100   100  100  92.2  83.1  75.3  75.3 %
47  */
48 static const unsigned char min_reduction_table_v_2_2[13] = {
49 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xeb, 0xd4, 0xc0, 0xc0};
50 
51 /* Possible ABM 2.2 Max Reduction configs from least aggressive to most aggressive
52  *  0    1     2     3     4     5     6     7     8     9     10    11   12
53  * 96.1 89.8 74.9  69.4  64.7  52.2  48.6  39.6  30.2  25.1  19.6  12.5  12.5 %
54  */
55 static const unsigned char max_reduction_table_v_2_2[13] = {
56 0xf5, 0xe5, 0xbf, 0xb1, 0xa5, 0x85, 0x7c, 0x65, 0x4d, 0x40, 0x32, 0x20, 0x20};
57 
58 /* Predefined ABM configuration sets. We may have different configuration sets
59  * in order to satisfy different power/quality requirements.
60  */
61 static const unsigned char abm_config[abm_defines_max_config][abm_defines_max_level] = {
62 /*  ABM Level 1,    ABM Level 2,    ABM Level 3,    ABM Level 4 */
63 {       2,              5,              7,              8       },	/* Default - Medium aggressiveness */
64 {       2,              5,              8,              11      },	/* Alt #1  - Increased aggressiveness */
65 {       0,              2,              4,              8       },	/* Alt #2  - Minimal aggressiveness */
66 {       3,              6,              10,             12      },	/* Alt #3  - Super aggressiveness */
67 };
68 
69 #define NUM_AMBI_LEVEL    5
70 #define NUM_AGGR_LEVEL    4
71 #define NUM_POWER_FN_SEGS 8
72 #define NUM_BL_CURVE_SEGS 16
73 #define IRAM_SIZE 256
74 
75 #define IRAM_RESERVE_AREA_START_V2 0xF0  // reserve 0xF0~0xF6 are write by DMCU only
76 #define IRAM_RESERVE_AREA_END_V2 0xF6  // reserve 0xF0~0xF6 are write by DMCU only
77 
78 #define IRAM_RESERVE_AREA_START_V2_2 0xF0  // reserve 0xF0~0xFF are write by DMCU only
79 #define IRAM_RESERVE_AREA_END_V2_2 0xFF  // reserve 0xF0~0xFF are write by DMCU only
80 
81 #pragma pack(push, 1)
82 /* NOTE: iRAM is 256B in size */
83 struct iram_table_v_2 {
84 	/* flags                      */
85 	uint16_t flags;							/* 0x00 U16  */
86 
87 	/* parameters for ABM2.0 algorithm */
88 	uint8_t min_reduction[NUM_AMBI_LEVEL][NUM_AGGR_LEVEL];		/* 0x02 U0.8 */
89 	uint8_t max_reduction[NUM_AMBI_LEVEL][NUM_AGGR_LEVEL];		/* 0x16 U0.8 */
90 	uint8_t bright_pos_gain[NUM_AMBI_LEVEL][NUM_AGGR_LEVEL];	/* 0x2a U2.6 */
91 	uint8_t bright_neg_gain[NUM_AMBI_LEVEL][NUM_AGGR_LEVEL];	/* 0x3e U2.6 */
92 	uint8_t dark_pos_gain[NUM_AMBI_LEVEL][NUM_AGGR_LEVEL];		/* 0x52 U2.6 */
93 	uint8_t dark_neg_gain[NUM_AMBI_LEVEL][NUM_AGGR_LEVEL];		/* 0x66 U2.6 */
94 	uint8_t iir_curve[NUM_AMBI_LEVEL];				/* 0x7a U0.8 */
95 	uint8_t deviation_gain;						/* 0x7f U0.8 */
96 
97 	/* parameters for crgb conversion */
98 	uint16_t crgb_thresh[NUM_POWER_FN_SEGS];			/* 0x80 U3.13 */
99 	uint16_t crgb_offset[NUM_POWER_FN_SEGS];			/* 0x90 U1.15 */
100 	uint16_t crgb_slope[NUM_POWER_FN_SEGS];				/* 0xa0 U4.12 */
101 
102 	/* parameters for custom curve */
103 	/* thresholds for brightness --> backlight */
104 	uint16_t backlight_thresholds[NUM_BL_CURVE_SEGS];		/* 0xb0 U16.0 */
105 	/* offsets for brightness --> backlight */
106 	uint16_t backlight_offsets[NUM_BL_CURVE_SEGS];			/* 0xd0 U16.0 */
107 
108 	/* For reading PSR State directly from IRAM */
109 	uint8_t psr_state;						/* 0xf0       */
110 	uint8_t dmcu_mcp_interface_version;							/* 0xf1       */
111 	uint8_t dmcu_abm_feature_version;							/* 0xf2       */
112 	uint8_t dmcu_psr_feature_version;							/* 0xf3       */
113 	uint16_t dmcu_version;										/* 0xf4       */
114 	uint8_t dmcu_state;						/* 0xf6       */
115 
116 	uint16_t blRampReduction;					/* 0xf7       */
117 	uint16_t blRampStart;						/* 0xf9       */
118 	uint8_t dummy5;							/* 0xfb       */
119 	uint8_t dummy6;							/* 0xfc       */
120 	uint8_t dummy7;							/* 0xfd       */
121 	uint8_t dummy8;							/* 0xfe       */
122 	uint8_t dummy9;							/* 0xff       */
123 };
124 
125 struct iram_table_v_2_2 {
126 	/* flags                      */
127 	uint16_t flags;							/* 0x00 U16  */
128 
129 	/* parameters for ABM2.2 algorithm */
130 	uint8_t min_reduction[NUM_AMBI_LEVEL][NUM_AGGR_LEVEL];		/* 0x02 U0.8 */
131 	uint8_t max_reduction[NUM_AMBI_LEVEL][NUM_AGGR_LEVEL];		/* 0x16 U0.8 */
132 	uint8_t bright_pos_gain[NUM_AMBI_LEVEL][NUM_AGGR_LEVEL];	/* 0x2a U2.6 */
133 	uint8_t dark_pos_gain[NUM_AMBI_LEVEL][NUM_AGGR_LEVEL];		/* 0x3e U2.6 */
134 	uint8_t hybridFactor[NUM_AGGR_LEVEL];						/* 0x52 U0.8 */
135 	uint8_t contrastFactor[NUM_AGGR_LEVEL];						/* 0x56 U0.8 */
136 	uint8_t deviation_gain[NUM_AGGR_LEVEL];						/* 0x5a U0.8 */
137 	uint8_t iir_curve[NUM_AMBI_LEVEL];							/* 0x5e U0.8 */
138 	uint8_t pad[29];											/* 0x63 U0.8 */
139 
140 	/* parameters for crgb conversion */
141 	uint16_t crgb_thresh[NUM_POWER_FN_SEGS];					/* 0x80 U3.13 */
142 	uint16_t crgb_offset[NUM_POWER_FN_SEGS];					/* 0x90 U1.15 */
143 	uint16_t crgb_slope[NUM_POWER_FN_SEGS];						/* 0xa0 U4.12 */
144 
145 	/* parameters for custom curve */
146 	/* thresholds for brightness --> backlight */
147 	uint16_t backlight_thresholds[NUM_BL_CURVE_SEGS];			/* 0xb0 U16.0 */
148 	/* offsets for brightness --> backlight */
149 	uint16_t backlight_offsets[NUM_BL_CURVE_SEGS];				/* 0xd0 U16.0 */
150 
151 	/* For reading PSR State directly from IRAM */
152 	uint8_t psr_state;											/* 0xf0       */
153 	uint8_t dmcu_mcp_interface_version;							/* 0xf1       */
154 	uint8_t dmcu_abm_feature_version;							/* 0xf2       */
155 	uint8_t dmcu_psr_feature_version;							/* 0xf3       */
156 	uint16_t dmcu_version;										/* 0xf4       */
157 	uint8_t dmcu_state;											/* 0xf6       */
158 
159 	uint8_t dummy1;												/* 0xf7       */
160 	uint8_t dummy2;												/* 0xf8       */
161 	uint8_t dummy3;												/* 0xf9       */
162 	uint8_t dummy4;												/* 0xfa       */
163 	uint8_t dummy5;												/* 0xfb       */
164 	uint8_t dummy6;												/* 0xfc       */
165 	uint8_t dummy7;												/* 0xfd       */
166 	uint8_t dummy8;												/* 0xfe       */
167 	uint8_t dummy9;												/* 0xff       */
168 };
169 #pragma pack(pop)
170 
171 static void fill_backlight_transform_table(struct dmcu_iram_parameters params,
172 		struct iram_table_v_2 *table)
173 {
174 	unsigned int i;
175 	unsigned int num_entries = NUM_BL_CURVE_SEGS;
176 	unsigned int lut_index;
177 
178 	table->backlight_thresholds[0] = 0;
179 	table->backlight_offsets[0] = params.backlight_lut_array[0];
180 	table->backlight_thresholds[num_entries-1] = 0xFFFF;
181 	table->backlight_offsets[num_entries-1] =
182 		params.backlight_lut_array[params.backlight_lut_array_size - 1];
183 
184 	/* Setup all brightness levels between 0% and 100% exclusive
185 	 * Fills brightness-to-backlight transform table. Backlight custom curve
186 	 * describes transform from brightness to backlight. It will be defined
187 	 * as set of thresholds and set of offsets, together, implying
188 	 * extrapolation of custom curve into 16 uniformly spanned linear
189 	 * segments.  Each threshold/offset represented by 16 bit entry in
190 	 * format U4.10.
191 	 */
192 	for (i = 1; i+1 < num_entries; i++) {
193 		lut_index = (params.backlight_lut_array_size - 1) * i / (num_entries - 1);
194 		ASSERT(lut_index < params.backlight_lut_array_size);
195 
196 		table->backlight_thresholds[i] =
197 			cpu_to_be16(DIV_ROUNDUP((i * 65536), num_entries));
198 		table->backlight_offsets[i] =
199 			cpu_to_be16(params.backlight_lut_array[lut_index]);
200 	}
201 }
202 
203 static void fill_backlight_transform_table_v_2_2(struct dmcu_iram_parameters params,
204 		struct iram_table_v_2_2 *table)
205 {
206 	unsigned int i;
207 	unsigned int num_entries = NUM_BL_CURVE_SEGS;
208 	unsigned int lut_index;
209 
210 	table->backlight_thresholds[0] = 0;
211 	table->backlight_offsets[0] = params.backlight_lut_array[0];
212 	table->backlight_thresholds[num_entries-1] = 0xFFFF;
213 	table->backlight_offsets[num_entries-1] =
214 		params.backlight_lut_array[params.backlight_lut_array_size - 1];
215 
216 	/* Setup all brightness levels between 0% and 100% exclusive
217 	 * Fills brightness-to-backlight transform table. Backlight custom curve
218 	 * describes transform from brightness to backlight. It will be defined
219 	 * as set of thresholds and set of offsets, together, implying
220 	 * extrapolation of custom curve into 16 uniformly spanned linear
221 	 * segments.  Each threshold/offset represented by 16 bit entry in
222 	 * format U4.10.
223 	 */
224 	for (i = 1; i+1 < num_entries; i++) {
225 		lut_index = (params.backlight_lut_array_size - 1) * i / (num_entries - 1);
226 		ASSERT(lut_index < params.backlight_lut_array_size);
227 
228 		table->backlight_thresholds[i] =
229 			cpu_to_be16(DIV_ROUNDUP((i * 65536), num_entries));
230 		table->backlight_offsets[i] =
231 			cpu_to_be16(params.backlight_lut_array[lut_index]);
232 	}
233 }
234 
235 void fill_iram_v_2(struct iram_table_v_2 *ram_table, struct dmcu_iram_parameters params)
236 {
237 	unsigned int set = params.set;
238 
239 	ram_table->flags = 0x0;
240 	ram_table->deviation_gain = 0xb3;
241 
242 	ram_table->blRampReduction =
243 		cpu_to_be16(params.backlight_ramping_reduction);
244 	ram_table->blRampStart =
245 		cpu_to_be16(params.backlight_ramping_start);
246 
247 	ram_table->min_reduction[0][0] = min_reduction_table[abm_config[set][0]];
248 	ram_table->min_reduction[1][0] = min_reduction_table[abm_config[set][0]];
249 	ram_table->min_reduction[2][0] = min_reduction_table[abm_config[set][0]];
250 	ram_table->min_reduction[3][0] = min_reduction_table[abm_config[set][0]];
251 	ram_table->min_reduction[4][0] = min_reduction_table[abm_config[set][0]];
252 	ram_table->max_reduction[0][0] = max_reduction_table[abm_config[set][0]];
253 	ram_table->max_reduction[1][0] = max_reduction_table[abm_config[set][0]];
254 	ram_table->max_reduction[2][0] = max_reduction_table[abm_config[set][0]];
255 	ram_table->max_reduction[3][0] = max_reduction_table[abm_config[set][0]];
256 	ram_table->max_reduction[4][0] = max_reduction_table[abm_config[set][0]];
257 
258 	ram_table->min_reduction[0][1] = min_reduction_table[abm_config[set][1]];
259 	ram_table->min_reduction[1][1] = min_reduction_table[abm_config[set][1]];
260 	ram_table->min_reduction[2][1] = min_reduction_table[abm_config[set][1]];
261 	ram_table->min_reduction[3][1] = min_reduction_table[abm_config[set][1]];
262 	ram_table->min_reduction[4][1] = min_reduction_table[abm_config[set][1]];
263 	ram_table->max_reduction[0][1] = max_reduction_table[abm_config[set][1]];
264 	ram_table->max_reduction[1][1] = max_reduction_table[abm_config[set][1]];
265 	ram_table->max_reduction[2][1] = max_reduction_table[abm_config[set][1]];
266 	ram_table->max_reduction[3][1] = max_reduction_table[abm_config[set][1]];
267 	ram_table->max_reduction[4][1] = max_reduction_table[abm_config[set][1]];
268 
269 	ram_table->min_reduction[0][2] = min_reduction_table[abm_config[set][2]];
270 	ram_table->min_reduction[1][2] = min_reduction_table[abm_config[set][2]];
271 	ram_table->min_reduction[2][2] = min_reduction_table[abm_config[set][2]];
272 	ram_table->min_reduction[3][2] = min_reduction_table[abm_config[set][2]];
273 	ram_table->min_reduction[4][2] = min_reduction_table[abm_config[set][2]];
274 	ram_table->max_reduction[0][2] = max_reduction_table[abm_config[set][2]];
275 	ram_table->max_reduction[1][2] = max_reduction_table[abm_config[set][2]];
276 	ram_table->max_reduction[2][2] = max_reduction_table[abm_config[set][2]];
277 	ram_table->max_reduction[3][2] = max_reduction_table[abm_config[set][2]];
278 	ram_table->max_reduction[4][2] = max_reduction_table[abm_config[set][2]];
279 
280 	ram_table->min_reduction[0][3] = min_reduction_table[abm_config[set][3]];
281 	ram_table->min_reduction[1][3] = min_reduction_table[abm_config[set][3]];
282 	ram_table->min_reduction[2][3] = min_reduction_table[abm_config[set][3]];
283 	ram_table->min_reduction[3][3] = min_reduction_table[abm_config[set][3]];
284 	ram_table->min_reduction[4][3] = min_reduction_table[abm_config[set][3]];
285 	ram_table->max_reduction[0][3] = max_reduction_table[abm_config[set][3]];
286 	ram_table->max_reduction[1][3] = max_reduction_table[abm_config[set][3]];
287 	ram_table->max_reduction[2][3] = max_reduction_table[abm_config[set][3]];
288 	ram_table->max_reduction[3][3] = max_reduction_table[abm_config[set][3]];
289 	ram_table->max_reduction[4][3] = max_reduction_table[abm_config[set][3]];
290 
291 	ram_table->bright_pos_gain[0][0] = 0x20;
292 	ram_table->bright_pos_gain[0][1] = 0x20;
293 	ram_table->bright_pos_gain[0][2] = 0x20;
294 	ram_table->bright_pos_gain[0][3] = 0x20;
295 	ram_table->bright_pos_gain[1][0] = 0x20;
296 	ram_table->bright_pos_gain[1][1] = 0x20;
297 	ram_table->bright_pos_gain[1][2] = 0x20;
298 	ram_table->bright_pos_gain[1][3] = 0x20;
299 	ram_table->bright_pos_gain[2][0] = 0x20;
300 	ram_table->bright_pos_gain[2][1] = 0x20;
301 	ram_table->bright_pos_gain[2][2] = 0x20;
302 	ram_table->bright_pos_gain[2][3] = 0x20;
303 	ram_table->bright_pos_gain[3][0] = 0x20;
304 	ram_table->bright_pos_gain[3][1] = 0x20;
305 	ram_table->bright_pos_gain[3][2] = 0x20;
306 	ram_table->bright_pos_gain[3][3] = 0x20;
307 	ram_table->bright_pos_gain[4][0] = 0x20;
308 	ram_table->bright_pos_gain[4][1] = 0x20;
309 	ram_table->bright_pos_gain[4][2] = 0x20;
310 	ram_table->bright_pos_gain[4][3] = 0x20;
311 	ram_table->bright_neg_gain[0][1] = 0x00;
312 	ram_table->bright_neg_gain[0][2] = 0x00;
313 	ram_table->bright_neg_gain[0][3] = 0x00;
314 	ram_table->bright_neg_gain[1][0] = 0x00;
315 	ram_table->bright_neg_gain[1][1] = 0x00;
316 	ram_table->bright_neg_gain[1][2] = 0x00;
317 	ram_table->bright_neg_gain[1][3] = 0x00;
318 	ram_table->bright_neg_gain[2][0] = 0x00;
319 	ram_table->bright_neg_gain[2][1] = 0x00;
320 	ram_table->bright_neg_gain[2][2] = 0x00;
321 	ram_table->bright_neg_gain[2][3] = 0x00;
322 	ram_table->bright_neg_gain[3][0] = 0x00;
323 	ram_table->bright_neg_gain[3][1] = 0x00;
324 	ram_table->bright_neg_gain[3][2] = 0x00;
325 	ram_table->bright_neg_gain[3][3] = 0x00;
326 	ram_table->bright_neg_gain[4][0] = 0x00;
327 	ram_table->bright_neg_gain[4][1] = 0x00;
328 	ram_table->bright_neg_gain[4][2] = 0x00;
329 	ram_table->bright_neg_gain[4][3] = 0x00;
330 	ram_table->dark_pos_gain[0][0] = 0x00;
331 	ram_table->dark_pos_gain[0][1] = 0x00;
332 	ram_table->dark_pos_gain[0][2] = 0x00;
333 	ram_table->dark_pos_gain[0][3] = 0x00;
334 	ram_table->dark_pos_gain[1][0] = 0x00;
335 	ram_table->dark_pos_gain[1][1] = 0x00;
336 	ram_table->dark_pos_gain[1][2] = 0x00;
337 	ram_table->dark_pos_gain[1][3] = 0x00;
338 	ram_table->dark_pos_gain[2][0] = 0x00;
339 	ram_table->dark_pos_gain[2][1] = 0x00;
340 	ram_table->dark_pos_gain[2][2] = 0x00;
341 	ram_table->dark_pos_gain[2][3] = 0x00;
342 	ram_table->dark_pos_gain[3][0] = 0x00;
343 	ram_table->dark_pos_gain[3][1] = 0x00;
344 	ram_table->dark_pos_gain[3][2] = 0x00;
345 	ram_table->dark_pos_gain[3][3] = 0x00;
346 	ram_table->dark_pos_gain[4][0] = 0x00;
347 	ram_table->dark_pos_gain[4][1] = 0x00;
348 	ram_table->dark_pos_gain[4][2] = 0x00;
349 	ram_table->dark_pos_gain[4][3] = 0x00;
350 	ram_table->dark_neg_gain[0][0] = 0x00;
351 	ram_table->dark_neg_gain[0][1] = 0x00;
352 	ram_table->dark_neg_gain[0][2] = 0x00;
353 	ram_table->dark_neg_gain[0][3] = 0x00;
354 	ram_table->dark_neg_gain[1][0] = 0x00;
355 	ram_table->dark_neg_gain[1][1] = 0x00;
356 	ram_table->dark_neg_gain[1][2] = 0x00;
357 	ram_table->dark_neg_gain[1][3] = 0x00;
358 	ram_table->dark_neg_gain[2][0] = 0x00;
359 	ram_table->dark_neg_gain[2][1] = 0x00;
360 	ram_table->dark_neg_gain[2][2] = 0x00;
361 	ram_table->dark_neg_gain[2][3] = 0x00;
362 	ram_table->dark_neg_gain[3][0] = 0x00;
363 	ram_table->dark_neg_gain[3][1] = 0x00;
364 	ram_table->dark_neg_gain[3][2] = 0x00;
365 	ram_table->dark_neg_gain[3][3] = 0x00;
366 	ram_table->dark_neg_gain[4][0] = 0x00;
367 	ram_table->dark_neg_gain[4][1] = 0x00;
368 	ram_table->dark_neg_gain[4][2] = 0x00;
369 	ram_table->dark_neg_gain[4][3] = 0x00;
370 
371 	ram_table->iir_curve[0] = 0x65;
372 	ram_table->iir_curve[1] = 0x65;
373 	ram_table->iir_curve[2] = 0x65;
374 	ram_table->iir_curve[3] = 0x65;
375 	ram_table->iir_curve[4] = 0x65;
376 
377 	//Gamma 2.4
378 	ram_table->crgb_thresh[0] = cpu_to_be16(0x13b6);
379 	ram_table->crgb_thresh[1] = cpu_to_be16(0x1648);
380 	ram_table->crgb_thresh[2] = cpu_to_be16(0x18e3);
381 	ram_table->crgb_thresh[3] = cpu_to_be16(0x1b41);
382 	ram_table->crgb_thresh[4] = cpu_to_be16(0x1d46);
383 	ram_table->crgb_thresh[5] = cpu_to_be16(0x1f21);
384 	ram_table->crgb_thresh[6] = cpu_to_be16(0x2167);
385 	ram_table->crgb_thresh[7] = cpu_to_be16(0x2384);
386 	ram_table->crgb_offset[0] = cpu_to_be16(0x2999);
387 	ram_table->crgb_offset[1] = cpu_to_be16(0x3999);
388 	ram_table->crgb_offset[2] = cpu_to_be16(0x4666);
389 	ram_table->crgb_offset[3] = cpu_to_be16(0x5999);
390 	ram_table->crgb_offset[4] = cpu_to_be16(0x6333);
391 	ram_table->crgb_offset[5] = cpu_to_be16(0x7800);
392 	ram_table->crgb_offset[6] = cpu_to_be16(0x8c00);
393 	ram_table->crgb_offset[7] = cpu_to_be16(0xa000);
394 	ram_table->crgb_slope[0]  = cpu_to_be16(0x3147);
395 	ram_table->crgb_slope[1]  = cpu_to_be16(0x2978);
396 	ram_table->crgb_slope[2]  = cpu_to_be16(0x23a2);
397 	ram_table->crgb_slope[3]  = cpu_to_be16(0x1f55);
398 	ram_table->crgb_slope[4]  = cpu_to_be16(0x1c63);
399 	ram_table->crgb_slope[5]  = cpu_to_be16(0x1a0f);
400 	ram_table->crgb_slope[6]  = cpu_to_be16(0x178d);
401 	ram_table->crgb_slope[7]  = cpu_to_be16(0x15ab);
402 
403 	fill_backlight_transform_table(
404 			params, ram_table);
405 }
406 
407 void fill_iram_v_2_2(struct iram_table_v_2_2 *ram_table, struct dmcu_iram_parameters params)
408 {
409 	unsigned int set = params.set;
410 
411 	ram_table->flags = 0x0;
412 
413 	ram_table->deviation_gain[0] = 0xb3;
414 	ram_table->deviation_gain[1] = 0xa8;
415 	ram_table->deviation_gain[2] = 0x98;
416 	ram_table->deviation_gain[3] = 0x68;
417 
418 	ram_table->min_reduction[0][0] = min_reduction_table_v_2_2[abm_config[set][0]];
419 	ram_table->min_reduction[1][0] = min_reduction_table_v_2_2[abm_config[set][0]];
420 	ram_table->min_reduction[2][0] = min_reduction_table_v_2_2[abm_config[set][0]];
421 	ram_table->min_reduction[3][0] = min_reduction_table_v_2_2[abm_config[set][0]];
422 	ram_table->min_reduction[4][0] = min_reduction_table_v_2_2[abm_config[set][0]];
423 	ram_table->max_reduction[0][0] = max_reduction_table_v_2_2[abm_config[set][0]];
424 	ram_table->max_reduction[1][0] = max_reduction_table_v_2_2[abm_config[set][0]];
425 	ram_table->max_reduction[2][0] = max_reduction_table_v_2_2[abm_config[set][0]];
426 	ram_table->max_reduction[3][0] = max_reduction_table_v_2_2[abm_config[set][0]];
427 	ram_table->max_reduction[4][0] = max_reduction_table_v_2_2[abm_config[set][0]];
428 
429 	ram_table->min_reduction[0][1] = min_reduction_table_v_2_2[abm_config[set][1]];
430 	ram_table->min_reduction[1][1] = min_reduction_table_v_2_2[abm_config[set][1]];
431 	ram_table->min_reduction[2][1] = min_reduction_table_v_2_2[abm_config[set][1]];
432 	ram_table->min_reduction[3][1] = min_reduction_table_v_2_2[abm_config[set][1]];
433 	ram_table->min_reduction[4][1] = min_reduction_table_v_2_2[abm_config[set][1]];
434 	ram_table->max_reduction[0][1] = max_reduction_table_v_2_2[abm_config[set][1]];
435 	ram_table->max_reduction[1][1] = max_reduction_table_v_2_2[abm_config[set][1]];
436 	ram_table->max_reduction[2][1] = max_reduction_table_v_2_2[abm_config[set][1]];
437 	ram_table->max_reduction[3][1] = max_reduction_table_v_2_2[abm_config[set][1]];
438 	ram_table->max_reduction[4][1] = max_reduction_table_v_2_2[abm_config[set][1]];
439 
440 	ram_table->min_reduction[0][2] = min_reduction_table_v_2_2[abm_config[set][2]];
441 	ram_table->min_reduction[1][2] = min_reduction_table_v_2_2[abm_config[set][2]];
442 	ram_table->min_reduction[2][2] = min_reduction_table_v_2_2[abm_config[set][2]];
443 	ram_table->min_reduction[3][2] = min_reduction_table_v_2_2[abm_config[set][2]];
444 	ram_table->min_reduction[4][2] = min_reduction_table_v_2_2[abm_config[set][2]];
445 	ram_table->max_reduction[0][2] = max_reduction_table_v_2_2[abm_config[set][2]];
446 	ram_table->max_reduction[1][2] = max_reduction_table_v_2_2[abm_config[set][2]];
447 	ram_table->max_reduction[2][2] = max_reduction_table_v_2_2[abm_config[set][2]];
448 	ram_table->max_reduction[3][2] = max_reduction_table_v_2_2[abm_config[set][2]];
449 	ram_table->max_reduction[4][2] = max_reduction_table_v_2_2[abm_config[set][2]];
450 
451 	ram_table->min_reduction[0][3] = min_reduction_table_v_2_2[abm_config[set][3]];
452 	ram_table->min_reduction[1][3] = min_reduction_table_v_2_2[abm_config[set][3]];
453 	ram_table->min_reduction[2][3] = min_reduction_table_v_2_2[abm_config[set][3]];
454 	ram_table->min_reduction[3][3] = min_reduction_table_v_2_2[abm_config[set][3]];
455 	ram_table->min_reduction[4][3] = min_reduction_table_v_2_2[abm_config[set][3]];
456 	ram_table->max_reduction[0][3] = max_reduction_table_v_2_2[abm_config[set][3]];
457 	ram_table->max_reduction[1][3] = max_reduction_table_v_2_2[abm_config[set][3]];
458 	ram_table->max_reduction[2][3] = max_reduction_table_v_2_2[abm_config[set][3]];
459 	ram_table->max_reduction[3][3] = max_reduction_table_v_2_2[abm_config[set][3]];
460 	ram_table->max_reduction[4][3] = max_reduction_table_v_2_2[abm_config[set][3]];
461 
462 	ram_table->bright_pos_gain[0][0] = 0x20;
463 	ram_table->bright_pos_gain[0][1] = 0x20;
464 	ram_table->bright_pos_gain[0][2] = 0x20;
465 	ram_table->bright_pos_gain[0][3] = 0x20;
466 	ram_table->bright_pos_gain[1][0] = 0x20;
467 	ram_table->bright_pos_gain[1][1] = 0x20;
468 	ram_table->bright_pos_gain[1][2] = 0x20;
469 	ram_table->bright_pos_gain[1][3] = 0x20;
470 	ram_table->bright_pos_gain[2][0] = 0x20;
471 	ram_table->bright_pos_gain[2][1] = 0x20;
472 	ram_table->bright_pos_gain[2][2] = 0x20;
473 	ram_table->bright_pos_gain[2][3] = 0x20;
474 	ram_table->bright_pos_gain[3][0] = 0x20;
475 	ram_table->bright_pos_gain[3][1] = 0x20;
476 	ram_table->bright_pos_gain[3][2] = 0x20;
477 	ram_table->bright_pos_gain[3][3] = 0x20;
478 	ram_table->bright_pos_gain[4][0] = 0x20;
479 	ram_table->bright_pos_gain[4][1] = 0x20;
480 	ram_table->bright_pos_gain[4][2] = 0x20;
481 	ram_table->bright_pos_gain[4][3] = 0x20;
482 
483 	ram_table->dark_pos_gain[0][0] = 0x00;
484 	ram_table->dark_pos_gain[0][1] = 0x00;
485 	ram_table->dark_pos_gain[0][2] = 0x00;
486 	ram_table->dark_pos_gain[0][3] = 0x00;
487 	ram_table->dark_pos_gain[1][0] = 0x00;
488 	ram_table->dark_pos_gain[1][1] = 0x00;
489 	ram_table->dark_pos_gain[1][2] = 0x00;
490 	ram_table->dark_pos_gain[1][3] = 0x00;
491 	ram_table->dark_pos_gain[2][0] = 0x00;
492 	ram_table->dark_pos_gain[2][1] = 0x00;
493 	ram_table->dark_pos_gain[2][2] = 0x00;
494 	ram_table->dark_pos_gain[2][3] = 0x00;
495 	ram_table->dark_pos_gain[3][0] = 0x00;
496 	ram_table->dark_pos_gain[3][1] = 0x00;
497 	ram_table->dark_pos_gain[3][2] = 0x00;
498 	ram_table->dark_pos_gain[3][3] = 0x00;
499 	ram_table->dark_pos_gain[4][0] = 0x00;
500 	ram_table->dark_pos_gain[4][1] = 0x00;
501 	ram_table->dark_pos_gain[4][2] = 0x00;
502 	ram_table->dark_pos_gain[4][3] = 0x00;
503 
504 	ram_table->hybridFactor[0] = 0xff;
505 	ram_table->hybridFactor[1] = 0xff;
506 	ram_table->hybridFactor[2] = 0xff;
507 	ram_table->hybridFactor[3] = 0xc0;
508 
509 	ram_table->contrastFactor[0] = 0x99;
510 	ram_table->contrastFactor[1] = 0x99;
511 	ram_table->contrastFactor[2] = 0x90;
512 	ram_table->contrastFactor[3] = 0x80;
513 
514 	ram_table->iir_curve[0] = 0x65;
515 	ram_table->iir_curve[1] = 0x65;
516 	ram_table->iir_curve[2] = 0x65;
517 	ram_table->iir_curve[3] = 0x65;
518 	ram_table->iir_curve[4] = 0x65;
519 
520 	//Gamma 2.2
521 	ram_table->crgb_thresh[0] = cpu_to_be16(0x127c);
522 	ram_table->crgb_thresh[1] = cpu_to_be16(0x151b);
523 	ram_table->crgb_thresh[2] = cpu_to_be16(0x17d5);
524 	ram_table->crgb_thresh[3] = cpu_to_be16(0x1a56);
525 	ram_table->crgb_thresh[4] = cpu_to_be16(0x1c83);
526 	ram_table->crgb_thresh[5] = cpu_to_be16(0x1e72);
527 	ram_table->crgb_thresh[6] = cpu_to_be16(0x20f0);
528 	ram_table->crgb_thresh[7] = cpu_to_be16(0x232b);
529 	ram_table->crgb_offset[0] = cpu_to_be16(0x2999);
530 	ram_table->crgb_offset[1] = cpu_to_be16(0x3999);
531 	ram_table->crgb_offset[2] = cpu_to_be16(0x4666);
532 	ram_table->crgb_offset[3] = cpu_to_be16(0x5999);
533 	ram_table->crgb_offset[4] = cpu_to_be16(0x6333);
534 	ram_table->crgb_offset[5] = cpu_to_be16(0x7800);
535 	ram_table->crgb_offset[6] = cpu_to_be16(0x8c00);
536 	ram_table->crgb_offset[7] = cpu_to_be16(0xa000);
537 	ram_table->crgb_slope[0]  = cpu_to_be16(0x3609);
538 	ram_table->crgb_slope[1]  = cpu_to_be16(0x2dfa);
539 	ram_table->crgb_slope[2]  = cpu_to_be16(0x27ea);
540 	ram_table->crgb_slope[3]  = cpu_to_be16(0x235d);
541 	ram_table->crgb_slope[4]  = cpu_to_be16(0x2042);
542 	ram_table->crgb_slope[5]  = cpu_to_be16(0x1dc3);
543 	ram_table->crgb_slope[6]  = cpu_to_be16(0x1b1a);
544 	ram_table->crgb_slope[7]  = cpu_to_be16(0x1910);
545 
546 	fill_backlight_transform_table_v_2_2(
547 			params, ram_table);
548 }
549 
550 bool dmcu_load_iram(struct dmcu *dmcu,
551 	struct dmcu_iram_parameters params)
552 {
553 	unsigned char ram_table[IRAM_SIZE];
554 	bool result = false;
555 
556 	if (dmcu == NULL)
557 		return false;
558 
559 	if (!dmcu->funcs->is_dmcu_initialized(dmcu))
560 		return true;
561 
562 	memset(&ram_table, 0, sizeof(ram_table));
563 
564 	if (dmcu->dmcu_version.abm_version == 0x22) {
565 		fill_iram_v_2_2((struct iram_table_v_2_2 *)ram_table, params);
566 
567 		result = dmcu->funcs->load_iram(
568 				dmcu, 0, (char *)(&ram_table), IRAM_RESERVE_AREA_START_V2_2);
569 	} else {
570 		fill_iram_v_2((struct iram_table_v_2 *)ram_table, params);
571 
572 		result = dmcu->funcs->load_iram(
573 				dmcu, 0, (char *)(&ram_table), IRAM_RESERVE_AREA_START_V2);
574 
575 		if (result)
576 			result = dmcu->funcs->load_iram(
577 					dmcu, IRAM_RESERVE_AREA_END_V2 + 1,
578 					(char *)(&ram_table) + IRAM_RESERVE_AREA_END_V2 + 1,
579 					sizeof(ram_table) - IRAM_RESERVE_AREA_END_V2 - 1);
580 	}
581 
582 	return result;
583 }
584