1 /* 2 * Copyright 2018 Advanced Micro Devices, Inc. 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice shall be included in 12 * all copies or substantial portions of the Software. 13 * 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 20 * OTHER DEALINGS IN THE SOFTWARE. 21 * 22 * Authors: AMD 23 * 24 */ 25 26 #include "mod_info_packet.h" 27 #include "core_types.h" 28 #include "dc_types.h" 29 #include "mod_shared.h" 30 #include "mod_freesync.h" 31 #include "dc.h" 32 33 enum vsc_packet_revision { 34 vsc_packet_undefined = 0, 35 //01h = VSC SDP supports only 3D stereo. 36 vsc_packet_rev1 = 1, 37 //02h = 3D stereo + PSR. 38 vsc_packet_rev2 = 2, 39 //03h = 3D stereo + PSR2. 40 vsc_packet_rev3 = 3, 41 //04h = 3D stereo + PSR/PSR2 + Y-coordinate. 42 vsc_packet_rev4 = 4, 43 //05h = 3D stereo + PSR/PSR2 + Y-coordinate + Pixel Encoding/Colorimetry Format 44 vsc_packet_rev5 = 5, 45 }; 46 47 #define HDMI_INFOFRAME_TYPE_VENDOR 0x81 48 #define HF_VSIF_VERSION 1 49 50 // VTEM Byte Offset 51 #define VTEM_PB0 0 52 #define VTEM_PB1 1 53 #define VTEM_PB2 2 54 #define VTEM_PB3 3 55 #define VTEM_PB4 4 56 #define VTEM_PB5 5 57 #define VTEM_PB6 6 58 59 #define VTEM_MD0 7 60 #define VTEM_MD1 8 61 #define VTEM_MD2 9 62 #define VTEM_MD3 10 63 64 65 // VTEM Byte Masks 66 //PB0 67 #define MASK_VTEM_PB0__RESERVED0 0x01 68 #define MASK_VTEM_PB0__SYNC 0x02 69 #define MASK_VTEM_PB0__VFR 0x04 70 #define MASK_VTEM_PB0__AFR 0x08 71 #define MASK_VTEM_PB0__DS_TYPE 0x30 72 //0: Periodic pseudo-static EM Data Set 73 //1: Periodic dynamic EM Data Set 74 //2: Unique EM Data Set 75 //3: Reserved 76 #define MASK_VTEM_PB0__END 0x40 77 #define MASK_VTEM_PB0__NEW 0x80 78 79 //PB1 80 #define MASK_VTEM_PB1__RESERVED1 0xFF 81 82 //PB2 83 #define MASK_VTEM_PB2__ORGANIZATION_ID 0xFF 84 //0: This is a Vendor Specific EM Data Set 85 //1: This EM Data Set is defined by This Specification (HDMI 2.1 r102.clean) 86 //2: This EM Data Set is defined by CTA-861-G 87 //3: This EM Data Set is defined by VESA 88 //PB3 89 #define MASK_VTEM_PB3__DATA_SET_TAG_MSB 0xFF 90 //PB4 91 #define MASK_VTEM_PB4__DATA_SET_TAG_LSB 0xFF 92 //PB5 93 #define MASK_VTEM_PB5__DATA_SET_LENGTH_MSB 0xFF 94 //PB6 95 #define MASK_VTEM_PB6__DATA_SET_LENGTH_LSB 0xFF 96 97 98 99 //PB7-27 (20 bytes): 100 //PB7 = MD0 101 #define MASK_VTEM_MD0__VRR_EN 0x01 102 #define MASK_VTEM_MD0__M_CONST 0x02 103 #define MASK_VTEM_MD0__RESERVED2 0x0C 104 #define MASK_VTEM_MD0__FVA_FACTOR_M1 0xF0 105 106 //MD1 107 #define MASK_VTEM_MD1__BASE_VFRONT 0xFF 108 109 //MD2 110 #define MASK_VTEM_MD2__BASE_REFRESH_RATE_98 0x03 111 #define MASK_VTEM_MD2__RB 0x04 112 #define MASK_VTEM_MD2__RESERVED3 0xF8 113 114 //MD3 115 #define MASK_VTEM_MD3__BASE_REFRESH_RATE_07 0xFF 116 117 enum ColorimetryRGBDP { 118 ColorimetryRGB_DP_sRGB = 0, 119 ColorimetryRGB_DP_AdobeRGB = 3, 120 ColorimetryRGB_DP_P3 = 4, 121 ColorimetryRGB_DP_CustomColorProfile = 5, 122 ColorimetryRGB_DP_ITU_R_BT2020RGB = 6, 123 }; 124 enum ColorimetryYCCDP { 125 ColorimetryYCC_DP_ITU601 = 0, 126 ColorimetryYCC_DP_ITU709 = 1, 127 ColorimetryYCC_DP_AdobeYCC = 5, 128 ColorimetryYCC_DP_ITU2020YCC = 6, 129 ColorimetryYCC_DP_ITU2020YCbCr = 7, 130 }; 131 132 void mod_build_vsc_infopacket(const struct dc_stream_state *stream, 133 struct dc_info_packet *info_packet) 134 { 135 unsigned int vsc_packet_revision = vsc_packet_undefined; 136 unsigned int i; 137 unsigned int pixelEncoding = 0; 138 unsigned int colorimetryFormat = 0; 139 bool stereo3dSupport = false; 140 141 if (stream->timing.timing_3d_format != TIMING_3D_FORMAT_NONE && stream->view_format != VIEW_3D_FORMAT_NONE) { 142 vsc_packet_revision = vsc_packet_rev1; 143 stereo3dSupport = true; 144 } 145 146 /*VSC packet set to 2 when DP revision >= 1.2*/ 147 if (stream->link->psr_settings.psr_version != DC_PSR_VERSION_UNSUPPORTED) 148 vsc_packet_revision = vsc_packet_rev2; 149 150 /* Update to revision 5 for extended colorimetry support */ 151 if (stream->use_vsc_sdp_for_colorimetry) 152 vsc_packet_revision = vsc_packet_rev5; 153 154 /* VSC packet not needed based on the features 155 * supported by this DP display 156 */ 157 if (vsc_packet_revision == vsc_packet_undefined) 158 return; 159 160 if (vsc_packet_revision == vsc_packet_rev2) { 161 /* Secondary-data Packet ID = 0*/ 162 info_packet->hb0 = 0x00; 163 /* 07h - Packet Type Value indicating Video 164 * Stream Configuration packet 165 */ 166 info_packet->hb1 = 0x07; 167 /* 02h = VSC SDP supporting 3D stereo and PSR 168 * (applies to eDP v1.3 or higher). 169 */ 170 info_packet->hb2 = 0x02; 171 /* 08h = VSC packet supporting 3D stereo + PSR 172 * (HB2 = 02h). 173 */ 174 info_packet->hb3 = 0x08; 175 176 for (i = 0; i < 28; i++) 177 info_packet->sb[i] = 0; 178 179 info_packet->valid = true; 180 } 181 182 if (vsc_packet_revision == vsc_packet_rev1) { 183 184 info_packet->hb0 = 0x00; // Secondary-data Packet ID = 0 185 info_packet->hb1 = 0x07; // 07h = Packet Type Value indicating Video Stream Configuration packet 186 info_packet->hb2 = 0x01; // 01h = Revision number. VSC SDP supporting 3D stereo only 187 info_packet->hb3 = 0x01; // 01h = VSC SDP supporting 3D stereo only (HB2 = 01h). 188 189 info_packet->valid = true; 190 } 191 192 if (stereo3dSupport) { 193 /* ==============================================================================================================| 194 * A. STEREO 3D 195 * ==============================================================================================================| 196 * VSC Payload (1 byte) From DP1.2 spec 197 * 198 * Bits 3:0 (Stereo Interface Method Code) | Bits 7:4 (Stereo Interface Method Specific Parameter) 199 * ----------------------------------------------------------------------------------------------------- 200 * 0 = Non Stereo Video | Must be set to 0x0 201 * ----------------------------------------------------------------------------------------------------- 202 * 1 = Frame/Field Sequential | 0x0: L + R view indication based on MISC1 bit 2:1 203 * | 0x1: Right when Stereo Signal = 1 204 * | 0x2: Left when Stereo Signal = 1 205 * | (others reserved) 206 * ----------------------------------------------------------------------------------------------------- 207 * 2 = Stacked Frame | 0x0: Left view is on top and right view on bottom 208 * | (others reserved) 209 * ----------------------------------------------------------------------------------------------------- 210 * 3 = Pixel Interleaved | 0x0: horiz interleaved, right view pixels on even lines 211 * | 0x1: horiz interleaved, right view pixels on odd lines 212 * | 0x2: checker board, start with left view pixel 213 * | 0x3: vertical interleaved, start with left view pixels 214 * | 0x4: vertical interleaved, start with right view pixels 215 * | (others reserved) 216 * ----------------------------------------------------------------------------------------------------- 217 * 4 = Side-by-side | 0x0: left half represents left eye view 218 * | 0x1: left half represents right eye view 219 */ 220 switch (stream->timing.timing_3d_format) { 221 case TIMING_3D_FORMAT_HW_FRAME_PACKING: 222 case TIMING_3D_FORMAT_SW_FRAME_PACKING: 223 case TIMING_3D_FORMAT_TOP_AND_BOTTOM: 224 case TIMING_3D_FORMAT_TB_SW_PACKED: 225 info_packet->sb[0] = 0x02; // Stacked Frame, Left view is on top and right view on bottom. 226 break; 227 case TIMING_3D_FORMAT_DP_HDMI_INBAND_FA: 228 case TIMING_3D_FORMAT_INBAND_FA: 229 info_packet->sb[0] = 0x01; // Frame/Field Sequential, L + R view indication based on MISC1 bit 2:1 230 break; 231 case TIMING_3D_FORMAT_SIDE_BY_SIDE: 232 case TIMING_3D_FORMAT_SBS_SW_PACKED: 233 info_packet->sb[0] = 0x04; // Side-by-side 234 break; 235 default: 236 info_packet->sb[0] = 0x00; // No Stereo Video, Shall be cleared to 0x0. 237 break; 238 } 239 240 } 241 242 /* 05h = VSC SDP supporting 3D stereo, PSR2, and Pixel Encoding/Colorimetry Format indication. 243 * Added in DP1.3, a DP Source device is allowed to indicate the pixel encoding/colorimetry 244 * format to the DP Sink device with VSC SDP only when the DP Sink device supports it 245 * (i.e., VSC_SDP_EXTENSION_FOR_COLORIMETRY_SUPPORTED bit in the DPRX_FEATURE_ENUMERATION_LIST 246 * register (DPCD Address 02210h, bit 3) is set to 1). 247 * (Requires VSC_SDP_EXTENSION_FOR_COLORIMETRY_SUPPORTED bit set to 1 in DPCD 02210h. This 248 * DPCD register is exposed in the new Extended Receiver Capability field for DPCD Rev. 1.4 249 * (and higher). When MISC1. bit 6. is Set to 1, a Source device uses a VSC SDP to indicate 250 * the Pixel Encoding/Colorimetry Format and that a Sink device must ignore MISC1, bit 7, and 251 * MISC0, bits 7:1 (MISC1, bit 7. and MISC0, bits 7:1 become "don't care").) 252 */ 253 if (vsc_packet_revision == vsc_packet_rev5) { 254 /* Secondary-data Packet ID = 0 */ 255 info_packet->hb0 = 0x00; 256 /* 07h - Packet Type Value indicating Video Stream Configuration packet */ 257 info_packet->hb1 = 0x07; 258 /* 05h = VSC SDP supporting 3D stereo, PSR2, and Pixel Encoding/Colorimetry Format indication. */ 259 info_packet->hb2 = 0x05; 260 /* 13h = VSC SDP supporting 3D stereo, + PSR2, + Pixel Encoding/Colorimetry Format indication (HB2 = 05h). */ 261 info_packet->hb3 = 0x13; 262 263 info_packet->valid = true; 264 265 /* Set VSC SDP fields for pixel encoding and colorimetry format from DP 1.3 specs 266 * Data Bytes DB 18~16 267 * Bits 3:0 (Colorimetry Format) | Bits 7:4 (Pixel Encoding) 268 * ---------------------------------------------------------------------------------------------------- 269 * 0x0 = sRGB | 0 = RGB 270 * 0x1 = RGB Wide Gamut Fixed Point 271 * 0x2 = RGB Wide Gamut Floating Point 272 * 0x3 = AdobeRGB 273 * 0x4 = DCI-P3 274 * 0x5 = CustomColorProfile 275 * (others reserved) 276 * ---------------------------------------------------------------------------------------------------- 277 * 0x0 = ITU-R BT.601 | 1 = YCbCr444 278 * 0x1 = ITU-R BT.709 279 * 0x2 = xvYCC601 280 * 0x3 = xvYCC709 281 * 0x4 = sYCC601 282 * 0x5 = AdobeYCC601 283 * 0x6 = ITU-R BT.2020 Y'cC'bcC'rc 284 * 0x7 = ITU-R BT.2020 Y'C'bC'r 285 * (others reserved) 286 * ---------------------------------------------------------------------------------------------------- 287 * 0x0 = ITU-R BT.601 | 2 = YCbCr422 288 * 0x1 = ITU-R BT.709 289 * 0x2 = xvYCC601 290 * 0x3 = xvYCC709 291 * 0x4 = sYCC601 292 * 0x5 = AdobeYCC601 293 * 0x6 = ITU-R BT.2020 Y'cC'bcC'rc 294 * 0x7 = ITU-R BT.2020 Y'C'bC'r 295 * (others reserved) 296 * ---------------------------------------------------------------------------------------------------- 297 * 0x0 = ITU-R BT.601 | 3 = YCbCr420 298 * 0x1 = ITU-R BT.709 299 * 0x2 = xvYCC601 300 * 0x3 = xvYCC709 301 * 0x4 = sYCC601 302 * 0x5 = AdobeYCC601 303 * 0x6 = ITU-R BT.2020 Y'cC'bcC'rc 304 * 0x7 = ITU-R BT.2020 Y'C'bC'r 305 * (others reserved) 306 * ---------------------------------------------------------------------------------------------------- 307 * 0x0 =DICOM Part14 Grayscale | 4 = Yonly 308 * Display Function 309 * (others reserved) 310 */ 311 312 /* Set Pixel Encoding */ 313 switch (stream->timing.pixel_encoding) { 314 case PIXEL_ENCODING_RGB: 315 pixelEncoding = 0x0; /* RGB = 0h */ 316 break; 317 case PIXEL_ENCODING_YCBCR444: 318 pixelEncoding = 0x1; /* YCbCr444 = 1h */ 319 break; 320 case PIXEL_ENCODING_YCBCR422: 321 pixelEncoding = 0x2; /* YCbCr422 = 2h */ 322 break; 323 case PIXEL_ENCODING_YCBCR420: 324 pixelEncoding = 0x3; /* YCbCr420 = 3h */ 325 break; 326 default: 327 pixelEncoding = 0x0; /* default RGB = 0h */ 328 break; 329 } 330 331 /* Set Colorimetry format based on pixel encoding */ 332 switch (stream->timing.pixel_encoding) { 333 case PIXEL_ENCODING_RGB: 334 if ((stream->output_color_space == COLOR_SPACE_SRGB) || 335 (stream->output_color_space == COLOR_SPACE_SRGB_LIMITED)) 336 colorimetryFormat = ColorimetryRGB_DP_sRGB; 337 else if (stream->output_color_space == COLOR_SPACE_ADOBERGB) 338 colorimetryFormat = ColorimetryRGB_DP_AdobeRGB; 339 else if ((stream->output_color_space == COLOR_SPACE_2020_RGB_FULLRANGE) || 340 (stream->output_color_space == COLOR_SPACE_2020_RGB_LIMITEDRANGE)) 341 colorimetryFormat = ColorimetryRGB_DP_ITU_R_BT2020RGB; 342 break; 343 344 case PIXEL_ENCODING_YCBCR444: 345 case PIXEL_ENCODING_YCBCR422: 346 case PIXEL_ENCODING_YCBCR420: 347 /* Note: xvYCC probably not supported correctly here on DP since colorspace translation 348 * loses distinction between BT601 vs xvYCC601 in translation 349 */ 350 if (stream->output_color_space == COLOR_SPACE_YCBCR601) 351 colorimetryFormat = ColorimetryYCC_DP_ITU601; 352 else if (stream->output_color_space == COLOR_SPACE_YCBCR709) 353 colorimetryFormat = ColorimetryYCC_DP_ITU709; 354 else if (stream->output_color_space == COLOR_SPACE_ADOBERGB) 355 colorimetryFormat = ColorimetryYCC_DP_AdobeYCC; 356 else if (stream->output_color_space == COLOR_SPACE_2020_YCBCR) 357 colorimetryFormat = ColorimetryYCC_DP_ITU2020YCbCr; 358 break; 359 360 default: 361 colorimetryFormat = ColorimetryRGB_DP_sRGB; 362 break; 363 } 364 365 info_packet->sb[16] = (pixelEncoding << 4) | colorimetryFormat; 366 367 /* Set color depth */ 368 switch (stream->timing.display_color_depth) { 369 case COLOR_DEPTH_666: 370 /* NOTE: This is actually not valid for YCbCr pixel encoding to have 6 bpc 371 * as of DP1.4 spec, but value of 0 probably reserved here for potential future use. 372 */ 373 info_packet->sb[17] = 0; 374 break; 375 case COLOR_DEPTH_888: 376 info_packet->sb[17] = 1; 377 break; 378 case COLOR_DEPTH_101010: 379 info_packet->sb[17] = 2; 380 break; 381 case COLOR_DEPTH_121212: 382 info_packet->sb[17] = 3; 383 break; 384 /*case COLOR_DEPTH_141414: -- NO SUCH FORMAT IN DP SPEC */ 385 case COLOR_DEPTH_161616: 386 info_packet->sb[17] = 4; 387 break; 388 default: 389 info_packet->sb[17] = 0; 390 break; 391 } 392 393 /* all YCbCr are always limited range */ 394 if ((stream->output_color_space == COLOR_SPACE_SRGB_LIMITED) || 395 (stream->output_color_space == COLOR_SPACE_2020_RGB_LIMITEDRANGE) || 396 (pixelEncoding != 0x0)) { 397 info_packet->sb[17] |= 0x80; /* DB17 bit 7 set to 1 for CEA timing. */ 398 } 399 400 /* Content Type (Bits 2:0) 401 * 0 = Not defined. 402 * 1 = Graphics. 403 * 2 = Photo. 404 * 3 = Video. 405 * 4 = Game. 406 */ 407 info_packet->sb[18] = 0; 408 } 409 } 410 411 /** 412 * mod_build_hf_vsif_infopacket - Prepare HDMI Vendor Specific info frame. 413 * Follows HDMI Spec to build up Vendor Specific info frame 414 * 415 * @stream: contains data we may need to construct VSIF (i.e. timing_3d_format, etc.) 416 * @info_packet: output structure where to store VSIF 417 */ 418 void mod_build_hf_vsif_infopacket(const struct dc_stream_state *stream, 419 struct dc_info_packet *info_packet) 420 { 421 unsigned int length = 5; 422 bool hdmi_vic_mode = false; 423 uint8_t checksum = 0; 424 uint32_t i = 0; 425 enum dc_timing_3d_format format; 426 427 info_packet->valid = false; 428 format = stream->timing.timing_3d_format; 429 if (stream->view_format == VIEW_3D_FORMAT_NONE) 430 format = TIMING_3D_FORMAT_NONE; 431 432 if (stream->timing.hdmi_vic != 0 433 && stream->timing.h_total >= 3840 434 && stream->timing.v_total >= 2160 435 && format == TIMING_3D_FORMAT_NONE) 436 hdmi_vic_mode = true; 437 438 if ((format == TIMING_3D_FORMAT_NONE) && !hdmi_vic_mode) 439 return; 440 441 info_packet->sb[1] = 0x03; 442 info_packet->sb[2] = 0x0C; 443 info_packet->sb[3] = 0x00; 444 445 if (format != TIMING_3D_FORMAT_NONE) 446 info_packet->sb[4] = (2 << 5); 447 448 else if (hdmi_vic_mode) 449 info_packet->sb[4] = (1 << 5); 450 451 switch (format) { 452 case TIMING_3D_FORMAT_HW_FRAME_PACKING: 453 case TIMING_3D_FORMAT_SW_FRAME_PACKING: 454 info_packet->sb[5] = (0x0 << 4); 455 break; 456 457 case TIMING_3D_FORMAT_SIDE_BY_SIDE: 458 case TIMING_3D_FORMAT_SBS_SW_PACKED: 459 info_packet->sb[5] = (0x8 << 4); 460 length = 6; 461 break; 462 463 case TIMING_3D_FORMAT_TOP_AND_BOTTOM: 464 case TIMING_3D_FORMAT_TB_SW_PACKED: 465 info_packet->sb[5] = (0x6 << 4); 466 break; 467 468 default: 469 break; 470 } 471 472 if (hdmi_vic_mode) 473 info_packet->sb[5] = stream->timing.hdmi_vic; 474 475 info_packet->hb0 = HDMI_INFOFRAME_TYPE_VENDOR; 476 info_packet->hb1 = 0x01; 477 info_packet->hb2 = (uint8_t) (length); 478 479 checksum += info_packet->hb0; 480 checksum += info_packet->hb1; 481 checksum += info_packet->hb2; 482 483 for (i = 1; i <= length; i++) 484 checksum += info_packet->sb[i]; 485 486 info_packet->sb[0] = (uint8_t) (0x100 - checksum); 487 488 info_packet->valid = true; 489 } 490 491