1 /* 2 * Copyright 2019 Advanced Micro Devices, Inc. 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice shall be included in 12 * all copies or substantial portions of the Software. 13 * 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 20 * OTHER DEALINGS IN THE SOFTWARE. 21 * 22 * Authors: AMD 23 * 24 */ 25 26 #ifndef MODULES_HDCP_HDCP_PSP_H_ 27 #define MODULES_HDCP_HDCP_PSP_H_ 28 29 /* 30 * NOTE: These parameters are a one-to-one copy of the 31 * parameters required by PSP 32 */ 33 enum bgd_security_hdcp_encryption_level { 34 HDCP_ENCRYPTION_LEVEL__INVALID = 0, 35 HDCP_ENCRYPTION_LEVEL__OFF, 36 HDCP_ENCRYPTION_LEVEL__ON 37 }; 38 39 enum ta_dtm_command { 40 TA_DTM_COMMAND__UNUSED_1 = 1, 41 TA_DTM_COMMAND__TOPOLOGY_UPDATE_V2, 42 TA_DTM_COMMAND__TOPOLOGY_ASSR_ENABLE 43 }; 44 45 /* DTM related enumerations */ 46 /**********************************************************/ 47 48 enum ta_dtm_status { 49 TA_DTM_STATUS__SUCCESS = 0x00, 50 TA_DTM_STATUS__GENERIC_FAILURE = 0x01, 51 TA_DTM_STATUS__INVALID_PARAMETER = 0x02, 52 TA_DTM_STATUS__NULL_POINTER = 0x3 53 }; 54 55 /* input/output structures for DTM commands */ 56 /**********************************************************/ 57 /** 58 * Input structures 59 */ 60 enum ta_dtm_hdcp_version_max_supported { 61 TA_DTM_HDCP_VERSION_MAX_SUPPORTED__NONE = 0, 62 TA_DTM_HDCP_VERSION_MAX_SUPPORTED__1_x = 10, 63 TA_DTM_HDCP_VERSION_MAX_SUPPORTED__2_0 = 20, 64 TA_DTM_HDCP_VERSION_MAX_SUPPORTED__2_1 = 21, 65 TA_DTM_HDCP_VERSION_MAX_SUPPORTED__2_2 = 22, 66 TA_DTM_HDCP_VERSION_MAX_SUPPORTED__2_3 = 23 67 }; 68 69 struct ta_dtm_topology_update_input_v2 { 70 /* display handle is unique across the driver and is used to identify a display */ 71 /* for all security interfaces which reference displays such as HDCP */ 72 uint32_t display_handle; 73 uint32_t is_active; 74 uint32_t is_miracast; 75 uint32_t controller; 76 uint32_t ddc_line; 77 uint32_t dig_be; 78 uint32_t dig_fe; 79 uint32_t dp_mst_vcid; 80 uint32_t is_assr; 81 uint32_t max_hdcp_supported_version; 82 }; 83 84 struct ta_dtm_topology_assr_enable { 85 uint32_t display_topology_dig_be_index; 86 }; 87 88 /** 89 * Output structures 90 */ 91 92 /* No output structures yet */ 93 94 union ta_dtm_cmd_input { 95 struct ta_dtm_topology_update_input_v2 topology_update_v2; 96 struct ta_dtm_topology_assr_enable topology_assr_enable; 97 }; 98 99 union ta_dtm_cmd_output { 100 uint32_t reserved; 101 }; 102 103 struct ta_dtm_shared_memory { 104 uint32_t cmd_id; 105 uint32_t resp_id; 106 enum ta_dtm_status dtm_status; 107 uint32_t reserved; 108 union ta_dtm_cmd_input dtm_in_message; 109 union ta_dtm_cmd_output dtm_out_message; 110 }; 111 112 int psp_cmd_submit_buf(struct psp_context *psp, struct amdgpu_firmware_info *ucode, struct psp_gfx_cmd_resp *cmd, 113 uint64_t fence_mc_addr); 114 115 enum ta_hdcp_command { 116 TA_HDCP_COMMAND__INITIALIZE, 117 TA_HDCP_COMMAND__HDCP1_CREATE_SESSION, 118 TA_HDCP_COMMAND__HDCP1_DESTROY_SESSION, 119 TA_HDCP_COMMAND__HDCP1_FIRST_PART_AUTHENTICATION, 120 TA_HDCP_COMMAND__HDCP1_SECOND_PART_AUTHENTICATION, 121 TA_HDCP_COMMAND__HDCP1_ENABLE_ENCRYPTION, 122 TA_HDCP_COMMAND__HDCP1_ENABLE_DP_STREAM_ENCRYPTION, 123 TA_HDCP_COMMAND__HDCP1_GET_ENCRYPTION_STATUS, 124 }; 125 126 127 /* HDCP related enumerations */ 128 /**********************************************************/ 129 #define TA_HDCP__INVALID_SESSION 0xFFFF 130 #define TA_HDCP__HDCP1_AN_SIZE 8 131 #define TA_HDCP__HDCP1_KSV_SIZE 5 132 #define TA_HDCP__HDCP1_KSV_LIST_MAX_ENTRIES 127 133 #define TA_HDCP__HDCP1_V_PRIME_SIZE 20 134 135 enum ta_hdcp_status { 136 TA_HDCP_STATUS__SUCCESS = 0x00, 137 TA_HDCP_STATUS__GENERIC_FAILURE = 0x01, 138 TA_HDCP_STATUS__NULL_POINTER = 0x02, 139 TA_HDCP_STATUS__FAILED_ALLOCATING_SESSION = 0x03, 140 TA_HDCP_STATUS__FAILED_SETUP_TX = 0x04, 141 TA_HDCP_STATUS__INVALID_PARAMETER = 0x05, 142 TA_HDCP_STATUS__VHX_ERROR = 0x06, 143 TA_HDCP_STATUS__SESSION_NOT_CLOSED_PROPERLY = 0x07, 144 TA_HDCP_STATUS__SRM_FAILURE = 0x08, 145 TA_HDCP_STATUS__MST_AUTHENTICATED_ALREADY_STARTED = 0x09, 146 TA_HDCP_STATUS__AKE_SEND_CERT_FAILURE = 0x0A, 147 TA_HDCP_STATUS__AKE_NO_STORED_KM_FAILURE = 0x0B, 148 TA_HDCP_STATUS__AKE_SEND_HPRIME_FAILURE = 0x0C, 149 TA_HDCP_STATUS__LC_SEND_LPRIME_FAILURE = 0x0D, 150 TA_HDCP_STATUS__SKE_SEND_EKS_FAILURE = 0x0E, 151 TA_HDCP_STATUS__REPAUTH_SEND_RXIDLIST_FAILURE = 0x0F, 152 TA_HDCP_STATUS__REPAUTH_STREAM_READY_FAILURE = 0x10, 153 TA_HDCP_STATUS__ASD_GENERIC_FAILURE = 0x11, 154 TA_HDCP_STATUS__UNWRAP_SECRET_FAILURE = 0x12, 155 TA_HDCP_STATUS__ENABLE_ENCR_FAILURE = 0x13, 156 TA_HDCP_STATUS__DISABLE_ENCR_FAILURE = 0x14, 157 TA_HDCP_STATUS__NOT_ENOUGH_MEMORY_FAILURE = 0x15, 158 TA_HDCP_STATUS__UNKNOWN_MESSAGE = 0x16, 159 TA_HDCP_STATUS__TOO_MANY_STREAM = 0x17 160 }; 161 162 enum ta_hdcp_authentication_status { 163 TA_HDCP_AUTHENTICATION_STATUS__NOT_STARTED = 0x00, 164 TA_HDCP_AUTHENTICATION_STATUS__HDCP1_FIRST_PART_FAILED = 0x01, 165 TA_HDCP_AUTHENTICATION_STATUS__HDCP1_FIRST_PART_COMPLETE = 0x02, 166 TA_HDCP_AUTHENTICATION_STATUS__HDCP1_SECOND_PART_FAILED = 0x03, 167 TA_HDCP_AUTHENTICATION_STATUS__HDCP1_AUTHENTICATED = 0x04, 168 TA_HDCP_AUTHENTICATION_STATUS__HDCP1_KSV_VALIDATION_FAILED = 0x09 169 }; 170 171 172 /* input/output structures for HDCP commands */ 173 /**********************************************************/ 174 struct ta_hdcp_cmd_hdcp1_create_session_input { 175 uint8_t display_handle; 176 }; 177 178 struct ta_hdcp_cmd_hdcp1_create_session_output { 179 uint32_t session_handle; 180 uint8_t an_primary[TA_HDCP__HDCP1_AN_SIZE]; 181 uint8_t aksv_primary[TA_HDCP__HDCP1_KSV_SIZE]; 182 uint8_t ainfo_primary; 183 uint8_t an_secondary[TA_HDCP__HDCP1_AN_SIZE]; 184 uint8_t aksv_secondary[TA_HDCP__HDCP1_KSV_SIZE]; 185 uint8_t ainfo_secondary; 186 }; 187 188 struct ta_hdcp_cmd_hdcp1_destroy_session_input { 189 uint32_t session_handle; 190 }; 191 192 struct ta_hdcp_cmd_hdcp1_first_part_authentication_input { 193 uint32_t session_handle; 194 uint8_t bksv_primary[TA_HDCP__HDCP1_KSV_SIZE]; 195 uint8_t bksv_secondary[TA_HDCP__HDCP1_KSV_SIZE]; 196 uint8_t bcaps; 197 uint16_t r0_prime_primary; 198 uint16_t r0_prime_secondary; 199 }; 200 201 struct ta_hdcp_cmd_hdcp1_first_part_authentication_output { 202 enum ta_hdcp_authentication_status authentication_status; 203 }; 204 205 struct ta_hdcp_cmd_hdcp1_second_part_authentication_input { 206 uint32_t session_handle; 207 uint16_t bstatus_binfo; 208 uint8_t ksv_list[TA_HDCP__HDCP1_KSV_LIST_MAX_ENTRIES][TA_HDCP__HDCP1_KSV_SIZE]; 209 uint32_t ksv_list_size; 210 uint8_t pj_prime; 211 uint8_t v_prime[TA_HDCP__HDCP1_V_PRIME_SIZE]; 212 }; 213 214 struct ta_hdcp_cmd_hdcp1_second_part_authentication_output { 215 enum ta_hdcp_authentication_status authentication_status; 216 }; 217 218 struct ta_hdcp_cmd_hdcp1_enable_encryption_input { 219 uint32_t session_handle; 220 }; 221 222 struct ta_hdcp_cmd_hdcp1_enable_dp_stream_encryption_input { 223 uint32_t session_handle; 224 uint32_t display_handle; 225 }; 226 227 struct ta_hdcp_cmd_hdcp1_get_encryption_status_input { 228 uint32_t session_handle; 229 }; 230 231 struct ta_hdcp_cmd_hdcp1_get_encryption_status_output { 232 uint32_t protection_level; 233 }; 234 235 /**********************************************************/ 236 /* Common input structure for HDCP callbacks */ 237 union ta_hdcp_cmd_input { 238 struct ta_hdcp_cmd_hdcp1_create_session_input hdcp1_create_session; 239 struct ta_hdcp_cmd_hdcp1_destroy_session_input hdcp1_destroy_session; 240 struct ta_hdcp_cmd_hdcp1_first_part_authentication_input hdcp1_first_part_authentication; 241 struct ta_hdcp_cmd_hdcp1_second_part_authentication_input hdcp1_second_part_authentication; 242 struct ta_hdcp_cmd_hdcp1_enable_encryption_input hdcp1_enable_encryption; 243 struct ta_hdcp_cmd_hdcp1_enable_dp_stream_encryption_input hdcp1_enable_dp_stream_encryption; 244 struct ta_hdcp_cmd_hdcp1_get_encryption_status_input hdcp1_get_encryption_status; 245 }; 246 247 /* Common output structure for HDCP callbacks */ 248 union ta_hdcp_cmd_output { 249 struct ta_hdcp_cmd_hdcp1_create_session_output hdcp1_create_session; 250 struct ta_hdcp_cmd_hdcp1_first_part_authentication_output hdcp1_first_part_authentication; 251 struct ta_hdcp_cmd_hdcp1_second_part_authentication_output hdcp1_second_part_authentication; 252 struct ta_hdcp_cmd_hdcp1_get_encryption_status_output hdcp1_get_encryption_status; 253 }; 254 /**********************************************************/ 255 256 struct ta_hdcp_shared_memory { 257 uint32_t cmd_id; 258 enum ta_hdcp_status hdcp_status; 259 uint32_t reserved; 260 union ta_hdcp_cmd_input in_msg; 261 union ta_hdcp_cmd_output out_msg; 262 }; 263 264 enum psp_status { 265 PSP_STATUS__SUCCESS = 0, 266 PSP_STATUS__ERROR_INVALID_PARAMS, 267 PSP_STATUS__ERROR_GENERIC, 268 PSP_STATUS__ERROR_OUT_OF_MEMORY, 269 PSP_STATUS__ERROR_UNSUPPORTED_FEATURE 270 }; 271 272 #endif /* MODULES_HDCP_HDCP_PSP_H_ */ 273