1 /*
2  * Copyright 2016-2023 Advanced Micro Devices, Inc.
3  *
4  * Permission is hereby granted, free of charge, to any person obtaining a
5  * copy of this software and associated documentation files (the "Software"),
6  * to deal in the Software without restriction, including without limitation
7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8  * and/or sell copies of the Software, and to permit persons to whom the
9  * Software is furnished to do so, subject to the following conditions:
10  *
11  * The above copyright notice and this permission notice shall be included in
12  * all copies or substantial portions of the Software.
13  *
14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
17  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20  * OTHER DEALINGS IN THE SOFTWARE.
21  *
22  * Authors: AMD
23  *
24  */
25 
26 #include "dm_services.h"
27 #include "dc.h"
28 #include "mod_freesync.h"
29 #include "core_types.h"
30 
31 #define MOD_FREESYNC_MAX_CONCURRENT_STREAMS  32
32 
33 #define MIN_REFRESH_RANGE 10
34 /* Refresh rate ramp at a fixed rate of 65 Hz/second */
35 #define STATIC_SCREEN_RAMP_DELTA_REFRESH_RATE_PER_FRAME ((1000 / 60) * 65)
36 /* Number of elements in the render times cache array */
37 #define RENDER_TIMES_MAX_COUNT 10
38 /* Threshold to exit/exit BTR (to avoid frequent enter-exits at the lower limit) */
39 #define BTR_MAX_MARGIN 2500
40 /* Threshold to change BTR multiplier (to avoid frequent changes) */
41 #define BTR_DRIFT_MARGIN 2000
42 /* Threshold to exit fixed refresh rate */
43 #define FIXED_REFRESH_EXIT_MARGIN_IN_HZ 1
44 /* Number of consecutive frames to check before entering/exiting fixed refresh */
45 #define FIXED_REFRESH_ENTER_FRAME_COUNT 5
46 #define FIXED_REFRESH_EXIT_FRAME_COUNT 10
47 /* Flip interval workaround constants */
48 #define VSYNCS_BETWEEN_FLIP_THRESHOLD 2
49 #define FREESYNC_CONSEC_FLIP_AFTER_VSYNC 5
50 #define FREESYNC_VSYNC_TO_FLIP_DELTA_IN_US 500
51 
52 struct core_freesync {
53 	struct mod_freesync public;
54 	struct dc *dc;
55 };
56 
57 #define MOD_FREESYNC_TO_CORE(mod_freesync)\
58 		container_of(mod_freesync, struct core_freesync, public)
59 
60 struct mod_freesync *mod_freesync_create(struct dc *dc)
61 {
62 	struct core_freesync *core_freesync =
63 			kzalloc(sizeof(struct core_freesync), GFP_KERNEL);
64 
65 	if (core_freesync == NULL)
66 		goto fail_alloc_context;
67 
68 	if (dc == NULL)
69 		goto fail_construct;
70 
71 	core_freesync->dc = dc;
72 	return &core_freesync->public;
73 
74 fail_construct:
75 	kfree(core_freesync);
76 
77 fail_alloc_context:
78 	return NULL;
79 }
80 
81 void mod_freesync_destroy(struct mod_freesync *mod_freesync)
82 {
83 	struct core_freesync *core_freesync = NULL;
84 	if (mod_freesync == NULL)
85 		return;
86 	core_freesync = MOD_FREESYNC_TO_CORE(mod_freesync);
87 	kfree(core_freesync);
88 }
89 
90 #if 0 /* Unused currently */
91 static unsigned int calc_refresh_in_uhz_from_duration(
92 		unsigned int duration_in_ns)
93 {
94 	unsigned int refresh_in_uhz =
95 			((unsigned int)(div64_u64((1000000000ULL * 1000000),
96 					duration_in_ns)));
97 	return refresh_in_uhz;
98 }
99 #endif
100 
101 static unsigned int calc_duration_in_us_from_refresh_in_uhz(
102 		unsigned int refresh_in_uhz)
103 {
104 	unsigned int duration_in_us =
105 			((unsigned int)(div64_u64((1000000000ULL * 1000),
106 					refresh_in_uhz)));
107 	return duration_in_us;
108 }
109 
110 static unsigned int calc_duration_in_us_from_v_total(
111 		const struct dc_stream_state *stream,
112 		const struct mod_vrr_params *in_vrr,
113 		unsigned int v_total)
114 {
115 	unsigned int duration_in_us =
116 			(unsigned int)(div64_u64(((unsigned long long)(v_total)
117 				* 10000) * stream->timing.h_total,
118 					stream->timing.pix_clk_100hz));
119 
120 	return duration_in_us;
121 }
122 
123 unsigned int mod_freesync_calc_v_total_from_refresh(
124 		const struct dc_stream_state *stream,
125 		unsigned int refresh_in_uhz)
126 {
127 	unsigned int v_total;
128 	unsigned int frame_duration_in_ns;
129 
130 	frame_duration_in_ns =
131 			((unsigned int)(div64_u64((1000000000ULL * 1000000),
132 					refresh_in_uhz)));
133 
134 	v_total = div64_u64(div64_u64(((unsigned long long)(
135 			frame_duration_in_ns) * (stream->timing.pix_clk_100hz / 10)),
136 			stream->timing.h_total), 1000000);
137 
138 	/* v_total cannot be less than nominal */
139 	if (v_total < stream->timing.v_total) {
140 		ASSERT(v_total < stream->timing.v_total);
141 		v_total = stream->timing.v_total;
142 	}
143 
144 	return v_total;
145 }
146 
147 static unsigned int calc_v_total_from_duration(
148 		const struct dc_stream_state *stream,
149 		const struct mod_vrr_params *vrr,
150 		unsigned int duration_in_us)
151 {
152 	unsigned int v_total = 0;
153 
154 	if (duration_in_us < vrr->min_duration_in_us)
155 		duration_in_us = vrr->min_duration_in_us;
156 
157 	if (duration_in_us > vrr->max_duration_in_us)
158 		duration_in_us = vrr->max_duration_in_us;
159 
160 	if (dc_is_hdmi_signal(stream->signal)) {
161 		uint32_t h_total_up_scaled;
162 
163 		h_total_up_scaled = stream->timing.h_total * 10000;
164 		v_total = div_u64((unsigned long long)duration_in_us
165 					* stream->timing.pix_clk_100hz + (h_total_up_scaled - 1),
166 					h_total_up_scaled);
167 	} else {
168 		v_total = div64_u64(div64_u64(((unsigned long long)(
169 					duration_in_us) * (stream->timing.pix_clk_100hz / 10)),
170 					stream->timing.h_total), 1000);
171 	}
172 
173 	/* v_total cannot be less than nominal */
174 	if (v_total < stream->timing.v_total) {
175 		ASSERT(v_total < stream->timing.v_total);
176 		v_total = stream->timing.v_total;
177 	}
178 
179 	return v_total;
180 }
181 
182 static void update_v_total_for_static_ramp(
183 		struct core_freesync *core_freesync,
184 		const struct dc_stream_state *stream,
185 		struct mod_vrr_params *in_out_vrr)
186 {
187 	unsigned int v_total = 0;
188 	unsigned int current_duration_in_us =
189 			calc_duration_in_us_from_v_total(
190 				stream, in_out_vrr,
191 				in_out_vrr->adjust.v_total_max);
192 	unsigned int target_duration_in_us =
193 			calc_duration_in_us_from_refresh_in_uhz(
194 				in_out_vrr->fixed.target_refresh_in_uhz);
195 	bool ramp_direction_is_up = (current_duration_in_us >
196 				target_duration_in_us) ? true : false;
197 
198 	/* Calculate ratio between new and current frame duration with 3 digit */
199 	unsigned int frame_duration_ratio = div64_u64(1000000,
200 		(1000 +  div64_u64(((unsigned long long)(
201 		STATIC_SCREEN_RAMP_DELTA_REFRESH_RATE_PER_FRAME) *
202 		current_duration_in_us),
203 		1000000)));
204 
205 	/* Calculate delta between new and current frame duration in us */
206 	unsigned int frame_duration_delta = div64_u64(((unsigned long long)(
207 		current_duration_in_us) *
208 		(1000 - frame_duration_ratio)), 1000);
209 
210 	/* Adjust frame duration delta based on ratio between current and
211 	 * standard frame duration (frame duration at 60 Hz refresh rate).
212 	 */
213 	unsigned int ramp_rate_interpolated = div64_u64(((unsigned long long)(
214 		frame_duration_delta) * current_duration_in_us), 16666);
215 
216 	/* Going to a higher refresh rate (lower frame duration) */
217 	if (ramp_direction_is_up) {
218 		/* Reduce frame duration */
219 		current_duration_in_us -= ramp_rate_interpolated;
220 
221 		/* Adjust for frame duration below min */
222 		if (current_duration_in_us <= target_duration_in_us) {
223 			in_out_vrr->fixed.ramping_active = false;
224 			in_out_vrr->fixed.ramping_done = true;
225 			current_duration_in_us =
226 				calc_duration_in_us_from_refresh_in_uhz(
227 				in_out_vrr->fixed.target_refresh_in_uhz);
228 		}
229 	/* Going to a lower refresh rate (larger frame duration) */
230 	} else {
231 		/* Increase frame duration */
232 		current_duration_in_us += ramp_rate_interpolated;
233 
234 		/* Adjust for frame duration above max */
235 		if (current_duration_in_us >= target_duration_in_us) {
236 			in_out_vrr->fixed.ramping_active = false;
237 			in_out_vrr->fixed.ramping_done = true;
238 			current_duration_in_us =
239 				calc_duration_in_us_from_refresh_in_uhz(
240 				in_out_vrr->fixed.target_refresh_in_uhz);
241 		}
242 	}
243 
244 	v_total = div64_u64(div64_u64(((unsigned long long)(
245 			current_duration_in_us) * (stream->timing.pix_clk_100hz / 10)),
246 				stream->timing.h_total), 1000);
247 
248 	/* v_total cannot be less than nominal */
249 	if (v_total < stream->timing.v_total)
250 		v_total = stream->timing.v_total;
251 
252 	in_out_vrr->adjust.v_total_min = v_total;
253 	in_out_vrr->adjust.v_total_max = v_total;
254 }
255 
256 static void apply_below_the_range(struct core_freesync *core_freesync,
257 		const struct dc_stream_state *stream,
258 		unsigned int last_render_time_in_us,
259 		struct mod_vrr_params *in_out_vrr)
260 {
261 	unsigned int inserted_frame_duration_in_us = 0;
262 	unsigned int mid_point_frames_ceil = 0;
263 	unsigned int mid_point_frames_floor = 0;
264 	unsigned int frame_time_in_us = 0;
265 	unsigned int delta_from_mid_point_in_us_1 = 0xFFFFFFFF;
266 	unsigned int delta_from_mid_point_in_us_2 = 0xFFFFFFFF;
267 	unsigned int frames_to_insert = 0;
268 	unsigned int delta_from_mid_point_delta_in_us;
269 	unsigned int max_render_time_in_us =
270 			in_out_vrr->max_duration_in_us - in_out_vrr->btr.margin_in_us;
271 
272 	/* Program BTR */
273 	if ((last_render_time_in_us + in_out_vrr->btr.margin_in_us / 2) < max_render_time_in_us) {
274 		/* Exit Below the Range */
275 		if (in_out_vrr->btr.btr_active) {
276 			in_out_vrr->btr.frame_counter = 0;
277 			in_out_vrr->btr.btr_active = false;
278 		}
279 	} else if (last_render_time_in_us > (max_render_time_in_us + in_out_vrr->btr.margin_in_us / 2)) {
280 		/* Enter Below the Range */
281 		if (!in_out_vrr->btr.btr_active) {
282 			in_out_vrr->btr.btr_active = true;
283 		}
284 	}
285 
286 	/* BTR set to "not active" so disengage */
287 	if (!in_out_vrr->btr.btr_active) {
288 		in_out_vrr->btr.inserted_duration_in_us = 0;
289 		in_out_vrr->btr.frames_to_insert = 0;
290 		in_out_vrr->btr.frame_counter = 0;
291 
292 		/* Restore FreeSync */
293 		in_out_vrr->adjust.v_total_min =
294 			mod_freesync_calc_v_total_from_refresh(stream,
295 				in_out_vrr->max_refresh_in_uhz);
296 		in_out_vrr->adjust.v_total_max =
297 			mod_freesync_calc_v_total_from_refresh(stream,
298 				in_out_vrr->min_refresh_in_uhz);
299 	/* BTR set to "active" so engage */
300 	} else {
301 
302 		/* Calculate number of midPoint frames that could fit within
303 		 * the render time interval - take ceil of this value
304 		 */
305 		mid_point_frames_ceil = (last_render_time_in_us +
306 				in_out_vrr->btr.mid_point_in_us - 1) /
307 					in_out_vrr->btr.mid_point_in_us;
308 
309 		if (mid_point_frames_ceil > 0) {
310 			frame_time_in_us = last_render_time_in_us /
311 				mid_point_frames_ceil;
312 			delta_from_mid_point_in_us_1 =
313 				(in_out_vrr->btr.mid_point_in_us >
314 				frame_time_in_us) ?
315 				(in_out_vrr->btr.mid_point_in_us - frame_time_in_us) :
316 				(frame_time_in_us - in_out_vrr->btr.mid_point_in_us);
317 		}
318 
319 		/* Calculate number of midPoint frames that could fit within
320 		 * the render time interval - take floor of this value
321 		 */
322 		mid_point_frames_floor = last_render_time_in_us /
323 				in_out_vrr->btr.mid_point_in_us;
324 
325 		if (mid_point_frames_floor > 0) {
326 
327 			frame_time_in_us = last_render_time_in_us /
328 				mid_point_frames_floor;
329 			delta_from_mid_point_in_us_2 =
330 				(in_out_vrr->btr.mid_point_in_us >
331 				frame_time_in_us) ?
332 				(in_out_vrr->btr.mid_point_in_us - frame_time_in_us) :
333 				(frame_time_in_us - in_out_vrr->btr.mid_point_in_us);
334 		}
335 
336 		/* Choose number of frames to insert based on how close it
337 		 * can get to the mid point of the variable range.
338 		 *  - Delta for CEIL: delta_from_mid_point_in_us_1
339 		 *  - Delta for FLOOR: delta_from_mid_point_in_us_2
340 		 */
341 		if (mid_point_frames_ceil &&
342 		    (last_render_time_in_us / mid_point_frames_ceil) <
343 		    in_out_vrr->min_duration_in_us) {
344 			/* Check for out of range.
345 			 * If using CEIL produces a value that is out of range,
346 			 * then we are forced to use FLOOR.
347 			 */
348 			frames_to_insert = mid_point_frames_floor;
349 		} else if (mid_point_frames_floor < 2) {
350 			/* Check if FLOOR would result in non-LFC. In this case
351 			 * choose to use CEIL
352 			 */
353 			frames_to_insert = mid_point_frames_ceil;
354 		} else if (delta_from_mid_point_in_us_1 < delta_from_mid_point_in_us_2) {
355 			/* If choosing CEIL results in a frame duration that is
356 			 * closer to the mid point of the range.
357 			 * Choose CEIL
358 			 */
359 			frames_to_insert = mid_point_frames_ceil;
360 		} else {
361 			/* If choosing FLOOR results in a frame duration that is
362 			 * closer to the mid point of the range.
363 			 * Choose FLOOR
364 			 */
365 			frames_to_insert = mid_point_frames_floor;
366 		}
367 
368 		/* Prefer current frame multiplier when BTR is enabled unless it drifts
369 		 * too far from the midpoint
370 		 */
371 		if (delta_from_mid_point_in_us_1 < delta_from_mid_point_in_us_2) {
372 			delta_from_mid_point_delta_in_us = delta_from_mid_point_in_us_2 -
373 					delta_from_mid_point_in_us_1;
374 		} else {
375 			delta_from_mid_point_delta_in_us = delta_from_mid_point_in_us_1 -
376 					delta_from_mid_point_in_us_2;
377 		}
378 		if (in_out_vrr->btr.frames_to_insert != 0 &&
379 				delta_from_mid_point_delta_in_us < BTR_DRIFT_MARGIN) {
380 			if (((last_render_time_in_us / in_out_vrr->btr.frames_to_insert) <
381 					max_render_time_in_us) &&
382 				((last_render_time_in_us / in_out_vrr->btr.frames_to_insert) >
383 					in_out_vrr->min_duration_in_us))
384 				frames_to_insert = in_out_vrr->btr.frames_to_insert;
385 		}
386 
387 		/* Either we've calculated the number of frames to insert,
388 		 * or we need to insert min duration frames
389 		 */
390 		if (frames_to_insert &&
391 		    (last_render_time_in_us / frames_to_insert) <
392 		    in_out_vrr->min_duration_in_us){
393 			frames_to_insert -= (frames_to_insert > 1) ?
394 					1 : 0;
395 		}
396 
397 		if (frames_to_insert > 0)
398 			inserted_frame_duration_in_us = last_render_time_in_us /
399 							frames_to_insert;
400 
401 		if (inserted_frame_duration_in_us < in_out_vrr->min_duration_in_us)
402 			inserted_frame_duration_in_us = in_out_vrr->min_duration_in_us;
403 
404 		/* Cache the calculated variables */
405 		in_out_vrr->btr.inserted_duration_in_us =
406 			inserted_frame_duration_in_us;
407 		in_out_vrr->btr.frames_to_insert = frames_to_insert;
408 		in_out_vrr->btr.frame_counter = frames_to_insert;
409 	}
410 }
411 
412 static void apply_fixed_refresh(struct core_freesync *core_freesync,
413 		const struct dc_stream_state *stream,
414 		unsigned int last_render_time_in_us,
415 		struct mod_vrr_params *in_out_vrr)
416 {
417 	bool update = false;
418 	unsigned int max_render_time_in_us = in_out_vrr->max_duration_in_us;
419 
420 	/* Compute the exit refresh rate and exit frame duration */
421 	unsigned int exit_refresh_rate_in_milli_hz = ((1000000000/max_render_time_in_us)
422 			+ (1000*FIXED_REFRESH_EXIT_MARGIN_IN_HZ));
423 	unsigned int exit_frame_duration_in_us = 1000000000/exit_refresh_rate_in_milli_hz;
424 
425 	if (last_render_time_in_us < exit_frame_duration_in_us) {
426 		/* Exit Fixed Refresh mode */
427 		if (in_out_vrr->fixed.fixed_active) {
428 			in_out_vrr->fixed.frame_counter++;
429 
430 			if (in_out_vrr->fixed.frame_counter >
431 					FIXED_REFRESH_EXIT_FRAME_COUNT) {
432 				in_out_vrr->fixed.frame_counter = 0;
433 				in_out_vrr->fixed.fixed_active = false;
434 				in_out_vrr->fixed.target_refresh_in_uhz = 0;
435 				update = true;
436 			}
437 		} else
438 			in_out_vrr->fixed.frame_counter = 0;
439 	} else if (last_render_time_in_us > max_render_time_in_us) {
440 		/* Enter Fixed Refresh mode */
441 		if (!in_out_vrr->fixed.fixed_active) {
442 			in_out_vrr->fixed.frame_counter++;
443 
444 			if (in_out_vrr->fixed.frame_counter >
445 					FIXED_REFRESH_ENTER_FRAME_COUNT) {
446 				in_out_vrr->fixed.frame_counter = 0;
447 				in_out_vrr->fixed.fixed_active = true;
448 				in_out_vrr->fixed.target_refresh_in_uhz =
449 						in_out_vrr->max_refresh_in_uhz;
450 				update = true;
451 			}
452 		} else
453 			in_out_vrr->fixed.frame_counter = 0;
454 	}
455 
456 	if (update) {
457 		if (in_out_vrr->fixed.fixed_active) {
458 			in_out_vrr->adjust.v_total_min =
459 				mod_freesync_calc_v_total_from_refresh(
460 				stream, in_out_vrr->max_refresh_in_uhz);
461 			in_out_vrr->adjust.v_total_max =
462 					in_out_vrr->adjust.v_total_min;
463 		} else {
464 			in_out_vrr->adjust.v_total_min =
465 				mod_freesync_calc_v_total_from_refresh(stream,
466 					in_out_vrr->max_refresh_in_uhz);
467 			in_out_vrr->adjust.v_total_max =
468 				mod_freesync_calc_v_total_from_refresh(stream,
469 					in_out_vrr->min_refresh_in_uhz);
470 		}
471 	}
472 }
473 
474 static void determine_flip_interval_workaround_req(struct mod_vrr_params *in_vrr,
475 		unsigned int curr_time_stamp_in_us)
476 {
477 	in_vrr->flip_interval.vsync_to_flip_in_us = curr_time_stamp_in_us -
478 			in_vrr->flip_interval.v_update_timestamp_in_us;
479 
480 	/* Determine conditions for stopping workaround */
481 	if (in_vrr->flip_interval.flip_interval_workaround_active &&
482 			in_vrr->flip_interval.vsyncs_between_flip < VSYNCS_BETWEEN_FLIP_THRESHOLD &&
483 			in_vrr->flip_interval.vsync_to_flip_in_us > FREESYNC_VSYNC_TO_FLIP_DELTA_IN_US) {
484 		in_vrr->flip_interval.flip_interval_detect_counter = 0;
485 		in_vrr->flip_interval.program_flip_interval_workaround = true;
486 		in_vrr->flip_interval.flip_interval_workaround_active = false;
487 	} else {
488 		/* Determine conditions for starting workaround */
489 		if (in_vrr->flip_interval.vsyncs_between_flip >= VSYNCS_BETWEEN_FLIP_THRESHOLD &&
490 				in_vrr->flip_interval.vsync_to_flip_in_us < FREESYNC_VSYNC_TO_FLIP_DELTA_IN_US) {
491 			/* Increase flip interval counter we have 2 vsyncs between flips and
492 			 * vsync to flip interval is less than 500us
493 			 */
494 			in_vrr->flip_interval.flip_interval_detect_counter++;
495 			if (in_vrr->flip_interval.flip_interval_detect_counter > FREESYNC_CONSEC_FLIP_AFTER_VSYNC) {
496 				/* Start workaround if we detect 5 consecutive instances of the above case */
497 				in_vrr->flip_interval.program_flip_interval_workaround = true;
498 				in_vrr->flip_interval.flip_interval_workaround_active = true;
499 			}
500 		} else {
501 			/* Reset the flip interval counter if we condition is no longer met */
502 			in_vrr->flip_interval.flip_interval_detect_counter = 0;
503 		}
504 	}
505 
506 	in_vrr->flip_interval.vsyncs_between_flip = 0;
507 }
508 
509 static bool vrr_settings_require_update(struct core_freesync *core_freesync,
510 		struct mod_freesync_config *in_config,
511 		unsigned int min_refresh_in_uhz,
512 		unsigned int max_refresh_in_uhz,
513 		struct mod_vrr_params *in_vrr)
514 {
515 	if (in_vrr->state != in_config->state) {
516 		return true;
517 	} else if (in_vrr->state == VRR_STATE_ACTIVE_FIXED &&
518 			in_vrr->fixed.target_refresh_in_uhz !=
519 					in_config->fixed_refresh_in_uhz) {
520 		return true;
521 	} else if (in_vrr->min_refresh_in_uhz != min_refresh_in_uhz) {
522 		return true;
523 	} else if (in_vrr->max_refresh_in_uhz != max_refresh_in_uhz) {
524 		return true;
525 	}
526 
527 	return false;
528 }
529 
530 bool mod_freesync_get_vmin_vmax(struct mod_freesync *mod_freesync,
531 		const struct dc_stream_state *stream,
532 		unsigned int *vmin,
533 		unsigned int *vmax)
534 {
535 	*vmin = stream->adjust.v_total_min;
536 	*vmax = stream->adjust.v_total_max;
537 
538 	return true;
539 }
540 
541 bool mod_freesync_get_v_position(struct mod_freesync *mod_freesync,
542 		struct dc_stream_state *stream,
543 		unsigned int *nom_v_pos,
544 		unsigned int *v_pos)
545 {
546 	struct core_freesync *core_freesync = NULL;
547 	struct crtc_position position;
548 
549 	if (mod_freesync == NULL)
550 		return false;
551 
552 	core_freesync = MOD_FREESYNC_TO_CORE(mod_freesync);
553 
554 	if (dc_stream_get_crtc_position(core_freesync->dc, &stream, 1,
555 					&position.vertical_count,
556 					&position.nominal_vcount)) {
557 
558 		*nom_v_pos = position.nominal_vcount;
559 		*v_pos = position.vertical_count;
560 
561 		return true;
562 	}
563 
564 	return false;
565 }
566 
567 static void build_vrr_infopacket_data_v1(const struct mod_vrr_params *vrr,
568 		struct dc_info_packet *infopacket,
569 		bool freesync_on_desktop)
570 {
571 	/* PB1 = 0x1A (24bit AMD IEEE OUI (0x00001A) - Byte 0) */
572 	infopacket->sb[1] = 0x1A;
573 
574 	/* PB2 = 0x00 (24bit AMD IEEE OUI (0x00001A) - Byte 1) */
575 	infopacket->sb[2] = 0x00;
576 
577 	/* PB3 = 0x00 (24bit AMD IEEE OUI (0x00001A) - Byte 2) */
578 	infopacket->sb[3] = 0x00;
579 
580 	/* PB4 = Reserved */
581 
582 	/* PB5 = Reserved */
583 
584 	/* PB6 = [Bits 7:3 = Reserved] */
585 
586 	/* PB6 = [Bit 0 = FreeSync Supported] */
587 	if (vrr->state != VRR_STATE_UNSUPPORTED)
588 		infopacket->sb[6] |= 0x01;
589 
590 	/* PB6 = [Bit 1 = FreeSync Enabled] */
591 	if (vrr->state != VRR_STATE_DISABLED &&
592 			vrr->state != VRR_STATE_UNSUPPORTED)
593 		infopacket->sb[6] |= 0x02;
594 
595 	if (freesync_on_desktop) {
596 		/* PB6 = [Bit 2 = FreeSync Active] */
597 		if (vrr->state != VRR_STATE_DISABLED &&
598 			vrr->state != VRR_STATE_UNSUPPORTED)
599 			infopacket->sb[6] |= 0x04;
600 	} else {
601 		if (vrr->state == VRR_STATE_ACTIVE_VARIABLE ||
602 			vrr->state == VRR_STATE_ACTIVE_FIXED)
603 			infopacket->sb[6] |= 0x04;
604 	}
605 
606 	// For v1 & 2 infoframes program nominal if non-fs mode, otherwise full range
607 	/* PB7 = FreeSync Minimum refresh rate (Hz) */
608 	if (vrr->state == VRR_STATE_ACTIVE_VARIABLE ||
609 			vrr->state == VRR_STATE_ACTIVE_FIXED) {
610 		infopacket->sb[7] = (unsigned char)((vrr->min_refresh_in_uhz + 500000) / 1000000);
611 	} else {
612 		infopacket->sb[7] = (unsigned char)((vrr->max_refresh_in_uhz + 500000) / 1000000);
613 	}
614 
615 	/* PB8 = FreeSync Maximum refresh rate (Hz)
616 	 * Note: We should never go above the field rate of the mode timing set.
617 	 */
618 	infopacket->sb[8] = (unsigned char)((vrr->max_refresh_in_uhz + 500000) / 1000000);
619 }
620 
621 static void build_vrr_infopacket_data_v3(const struct mod_vrr_params *vrr,
622 		struct dc_info_packet *infopacket,
623 		bool freesync_on_desktop)
624 {
625 	unsigned int min_refresh;
626 	unsigned int max_refresh;
627 	unsigned int fixed_refresh;
628 	unsigned int min_programmed;
629 	unsigned int max_programmed;
630 
631 	/* PB1 = 0x1A (24bit AMD IEEE OUI (0x00001A) - Byte 0) */
632 	infopacket->sb[1] = 0x1A;
633 
634 	/* PB2 = 0x00 (24bit AMD IEEE OUI (0x00001A) - Byte 1) */
635 	infopacket->sb[2] = 0x00;
636 
637 	/* PB3 = 0x00 (24bit AMD IEEE OUI (0x00001A) - Byte 2) */
638 	infopacket->sb[3] = 0x00;
639 
640 	/* PB4 = Reserved */
641 
642 	/* PB5 = Reserved */
643 
644 	/* PB6 = [Bits 7:3 = Reserved] */
645 
646 	/* PB6 = [Bit 0 = FreeSync Supported] */
647 	if (vrr->state != VRR_STATE_UNSUPPORTED)
648 		infopacket->sb[6] |= 0x01;
649 
650 	/* PB6 = [Bit 1 = FreeSync Enabled] */
651 	if (vrr->state != VRR_STATE_DISABLED &&
652 			vrr->state != VRR_STATE_UNSUPPORTED)
653 		infopacket->sb[6] |= 0x02;
654 
655 	/* PB6 = [Bit 2 = FreeSync Active] */
656 	if (freesync_on_desktop) {
657 		if (vrr->state != VRR_STATE_DISABLED &&
658 			vrr->state != VRR_STATE_UNSUPPORTED)
659 			infopacket->sb[6] |= 0x04;
660 	} else {
661 		if (vrr->state == VRR_STATE_ACTIVE_VARIABLE ||
662 			vrr->state == VRR_STATE_ACTIVE_FIXED)
663 			infopacket->sb[6] |= 0x04;
664 	}
665 
666 	min_refresh = (vrr->min_refresh_in_uhz + 500000) / 1000000;
667 	max_refresh = (vrr->max_refresh_in_uhz + 500000) / 1000000;
668 	fixed_refresh = (vrr->fixed_refresh_in_uhz + 500000) / 1000000;
669 
670 	min_programmed = (vrr->state == VRR_STATE_ACTIVE_FIXED) ? fixed_refresh :
671 			(vrr->state == VRR_STATE_ACTIVE_VARIABLE) ? min_refresh :
672 			(vrr->state == VRR_STATE_INACTIVE) ? min_refresh :
673 			max_refresh; // Non-fs case, program nominal range
674 
675 	max_programmed = (vrr->state == VRR_STATE_ACTIVE_FIXED) ? fixed_refresh :
676 			(vrr->state == VRR_STATE_ACTIVE_VARIABLE) ? max_refresh :
677 			max_refresh;// Non-fs case, program nominal range
678 
679 	/* PB7 = FreeSync Minimum refresh rate (Hz) */
680 	infopacket->sb[7] = min_programmed & 0xFF;
681 
682 	/* PB8 = FreeSync Maximum refresh rate (Hz) */
683 	infopacket->sb[8] = max_programmed & 0xFF;
684 
685 	/* PB11 : MSB FreeSync Minimum refresh rate [Hz] - bits 9:8 */
686 	infopacket->sb[11] = (min_programmed >> 8) & 0x03;
687 
688 	/* PB12 : MSB FreeSync Maximum refresh rate [Hz] - bits 9:8 */
689 	infopacket->sb[12] = (max_programmed >> 8) & 0x03;
690 
691 	/* PB16 : Reserved bits 7:1, FixedRate bit 0 */
692 	infopacket->sb[16] = (vrr->state == VRR_STATE_ACTIVE_FIXED) ? 1 : 0;
693 }
694 
695 static void build_vrr_infopacket_fs2_data(enum color_transfer_func app_tf,
696 		struct dc_info_packet *infopacket)
697 {
698 	if (app_tf != TRANSFER_FUNC_UNKNOWN) {
699 		infopacket->valid = true;
700 
701 		if (app_tf != TRANSFER_FUNC_PQ2084) {
702 			infopacket->sb[6] |= 0x08;  // PB6 = [Bit 3 = Native Color Active]
703 			if (app_tf == TRANSFER_FUNC_GAMMA_22)
704 				infopacket->sb[9] |= 0x04;  // PB6 = [Bit 2 = Gamma 2.2 EOTF Active]
705 		}
706 	}
707 }
708 
709 static void build_vrr_infopacket_header_v1(enum signal_type signal,
710 		struct dc_info_packet *infopacket,
711 		unsigned int *payload_size)
712 {
713 	if (dc_is_hdmi_signal(signal)) {
714 
715 		/* HEADER */
716 
717 		/* HB0  = Packet Type = 0x83 (Source Product
718 		 *	  Descriptor InfoFrame)
719 		 */
720 		infopacket->hb0 = DC_HDMI_INFOFRAME_TYPE_SPD;
721 
722 		/* HB1  = Version = 0x01 */
723 		infopacket->hb1 = 0x01;
724 
725 		/* HB2  = [Bits 7:5 = 0] [Bits 4:0 = Length = 0x08] */
726 		infopacket->hb2 = 0x08;
727 
728 		*payload_size = 0x08;
729 
730 	} else if (dc_is_dp_signal(signal)) {
731 
732 		/* HEADER */
733 
734 		/* HB0  = Secondary-data Packet ID = 0 - Only non-zero
735 		 *	  when used to associate audio related info packets
736 		 */
737 		infopacket->hb0 = 0x00;
738 
739 		/* HB1  = Packet Type = 0x83 (Source Product
740 		 *	  Descriptor InfoFrame)
741 		 */
742 		infopacket->hb1 = DC_HDMI_INFOFRAME_TYPE_SPD;
743 
744 		/* HB2  = [Bits 7:0 = Least significant eight bits -
745 		 *	  For INFOFRAME, the value must be 1Bh]
746 		 */
747 		infopacket->hb2 = 0x1B;
748 
749 		/* HB3  = [Bits 7:2 = INFOFRAME SDP Version Number = 0x1]
750 		 *	  [Bits 1:0 = Most significant two bits = 0x00]
751 		 */
752 		infopacket->hb3 = 0x04;
753 
754 		*payload_size = 0x1B;
755 	}
756 }
757 
758 static void build_vrr_infopacket_header_v2(enum signal_type signal,
759 		struct dc_info_packet *infopacket,
760 		unsigned int *payload_size)
761 {
762 	if (dc_is_hdmi_signal(signal)) {
763 
764 		/* HEADER */
765 
766 		/* HB0  = Packet Type = 0x83 (Source Product
767 		 *	  Descriptor InfoFrame)
768 		 */
769 		infopacket->hb0 = DC_HDMI_INFOFRAME_TYPE_SPD;
770 
771 		/* HB1  = Version = 0x02 */
772 		infopacket->hb1 = 0x02;
773 
774 		/* HB2  = [Bits 7:5 = 0] [Bits 4:0 = Length = 0x09] */
775 		infopacket->hb2 = 0x09;
776 
777 		*payload_size = 0x09;
778 	} else if (dc_is_dp_signal(signal)) {
779 
780 		/* HEADER */
781 
782 		/* HB0  = Secondary-data Packet ID = 0 - Only non-zero
783 		 *	  when used to associate audio related info packets
784 		 */
785 		infopacket->hb0 = 0x00;
786 
787 		/* HB1  = Packet Type = 0x83 (Source Product
788 		 *	  Descriptor InfoFrame)
789 		 */
790 		infopacket->hb1 = DC_HDMI_INFOFRAME_TYPE_SPD;
791 
792 		/* HB2  = [Bits 7:0 = Least significant eight bits -
793 		 *	  For INFOFRAME, the value must be 1Bh]
794 		 */
795 		infopacket->hb2 = 0x1B;
796 
797 		/* HB3  = [Bits 7:2 = INFOFRAME SDP Version Number = 0x2]
798 		 *	  [Bits 1:0 = Most significant two bits = 0x00]
799 		 */
800 		infopacket->hb3 = 0x08;
801 
802 		*payload_size = 0x1B;
803 	}
804 }
805 
806 static void build_vrr_infopacket_header_v3(enum signal_type signal,
807 		struct dc_info_packet *infopacket,
808 		unsigned int *payload_size)
809 {
810 	unsigned char version;
811 
812 	version = 3;
813 	if (dc_is_hdmi_signal(signal)) {
814 
815 		/* HEADER */
816 
817 		/* HB0  = Packet Type = 0x83 (Source Product
818 		 *	  Descriptor InfoFrame)
819 		 */
820 		infopacket->hb0 = DC_HDMI_INFOFRAME_TYPE_SPD;
821 
822 		/* HB1  = Version = 0x03 */
823 		infopacket->hb1 = version;
824 
825 		/* HB2  = [Bits 7:5 = 0] [Bits 4:0 = Length] */
826 		infopacket->hb2 = 0x10;
827 
828 		*payload_size = 0x10;
829 	} else if (dc_is_dp_signal(signal)) {
830 
831 		/* HEADER */
832 
833 		/* HB0  = Secondary-data Packet ID = 0 - Only non-zero
834 		 *	  when used to associate audio related info packets
835 		 */
836 		infopacket->hb0 = 0x00;
837 
838 		/* HB1  = Packet Type = 0x83 (Source Product
839 		 *	  Descriptor InfoFrame)
840 		 */
841 		infopacket->hb1 = DC_HDMI_INFOFRAME_TYPE_SPD;
842 
843 		/* HB2  = [Bits 7:0 = Least significant eight bits -
844 		 *	  For INFOFRAME, the value must be 1Bh]
845 		 */
846 		infopacket->hb2 = 0x1B;
847 
848 		/* HB3  = [Bits 7:2 = INFOFRAME SDP Version Number = 0x2]
849 		 *	  [Bits 1:0 = Most significant two bits = 0x00]
850 		 */
851 
852 		infopacket->hb3 = (version & 0x3F) << 2;
853 
854 		*payload_size = 0x1B;
855 	}
856 }
857 
858 static void build_vrr_infopacket_checksum(unsigned int *payload_size,
859 		struct dc_info_packet *infopacket)
860 {
861 	/* Calculate checksum */
862 	unsigned int idx = 0;
863 	unsigned char checksum = 0;
864 
865 	checksum += infopacket->hb0;
866 	checksum += infopacket->hb1;
867 	checksum += infopacket->hb2;
868 	checksum += infopacket->hb3;
869 
870 	for (idx = 1; idx <= *payload_size; idx++)
871 		checksum += infopacket->sb[idx];
872 
873 	/* PB0 = Checksum (one byte complement) */
874 	infopacket->sb[0] = (unsigned char)(0x100 - checksum);
875 
876 	infopacket->valid = true;
877 }
878 
879 static void build_vrr_infopacket_v1(enum signal_type signal,
880 		const struct mod_vrr_params *vrr,
881 		struct dc_info_packet *infopacket,
882 		bool freesync_on_desktop)
883 {
884 	/* SPD info packet for FreeSync */
885 	unsigned int payload_size = 0;
886 
887 	build_vrr_infopacket_header_v1(signal, infopacket, &payload_size);
888 	build_vrr_infopacket_data_v1(vrr, infopacket, freesync_on_desktop);
889 	build_vrr_infopacket_checksum(&payload_size, infopacket);
890 
891 	infopacket->valid = true;
892 }
893 
894 static void build_vrr_infopacket_v2(enum signal_type signal,
895 		const struct mod_vrr_params *vrr,
896 		enum color_transfer_func app_tf,
897 		struct dc_info_packet *infopacket,
898 		bool freesync_on_desktop)
899 {
900 	unsigned int payload_size = 0;
901 
902 	build_vrr_infopacket_header_v2(signal, infopacket, &payload_size);
903 	build_vrr_infopacket_data_v1(vrr, infopacket, freesync_on_desktop);
904 
905 	build_vrr_infopacket_fs2_data(app_tf, infopacket);
906 
907 	build_vrr_infopacket_checksum(&payload_size, infopacket);
908 
909 	infopacket->valid = true;
910 }
911 
912 static void build_vrr_infopacket_v3(enum signal_type signal,
913 		const struct mod_vrr_params *vrr,
914 		enum color_transfer_func app_tf,
915 		struct dc_info_packet *infopacket,
916 		bool freesync_on_desktop)
917 {
918 	unsigned int payload_size = 0;
919 
920 	build_vrr_infopacket_header_v3(signal, infopacket, &payload_size);
921 	build_vrr_infopacket_data_v3(vrr, infopacket, freesync_on_desktop);
922 
923 	build_vrr_infopacket_fs2_data(app_tf, infopacket);
924 
925 	build_vrr_infopacket_checksum(&payload_size, infopacket);
926 
927 	infopacket->valid = true;
928 }
929 
930 static void build_vrr_infopacket_sdp_v1_3(enum vrr_packet_type packet_type,
931 										struct dc_info_packet *infopacket)
932 {
933 	uint8_t idx = 0, size = 0;
934 
935 	size = ((packet_type == PACKET_TYPE_FS_V1) ? 0x08 :
936 			(packet_type == PACKET_TYPE_FS_V3) ? 0x10 :
937 												0x09);
938 
939 	for (idx = infopacket->hb2; idx > 1; idx--) // Data Byte Count: 0x1B
940 		infopacket->sb[idx] = infopacket->sb[idx-1];
941 
942 	infopacket->sb[1] = size;                         // Length
943 	infopacket->sb[0] = (infopacket->hb3 >> 2) & 0x3F;//Version
944 	infopacket->hb3   = (0x13 << 2);                  // Header,SDP 1.3
945 	infopacket->hb2   = 0x1D;
946 }
947 
948 void mod_freesync_build_vrr_infopacket(struct mod_freesync *mod_freesync,
949 		const struct dc_stream_state *stream,
950 		const struct mod_vrr_params *vrr,
951 		enum vrr_packet_type packet_type,
952 		enum color_transfer_func app_tf,
953 		struct dc_info_packet *infopacket,
954 		bool pack_sdp_v1_3)
955 {
956 	/* SPD info packet for FreeSync
957 	 * VTEM info packet for HdmiVRR
958 	 * Check if Freesync is supported. Return if false. If true,
959 	 * set the corresponding bit in the info packet
960 	 */
961 	if (!vrr->send_info_frame)
962 		return;
963 
964 	switch (packet_type) {
965 	case PACKET_TYPE_FS_V3:
966 		build_vrr_infopacket_v3(stream->signal, vrr, app_tf, infopacket, stream->freesync_on_desktop);
967 		break;
968 	case PACKET_TYPE_FS_V2:
969 		build_vrr_infopacket_v2(stream->signal, vrr, app_tf, infopacket, stream->freesync_on_desktop);
970 		break;
971 	case PACKET_TYPE_VRR:
972 	case PACKET_TYPE_FS_V1:
973 	default:
974 		build_vrr_infopacket_v1(stream->signal, vrr, infopacket, stream->freesync_on_desktop);
975 	}
976 
977 	if (true == pack_sdp_v1_3 &&
978 		true == dc_is_dp_signal(stream->signal) &&
979 		packet_type != PACKET_TYPE_VRR &&
980 		packet_type != PACKET_TYPE_VTEM)
981 		build_vrr_infopacket_sdp_v1_3(packet_type, infopacket);
982 }
983 
984 void mod_freesync_build_vrr_params(struct mod_freesync *mod_freesync,
985 		const struct dc_stream_state *stream,
986 		struct mod_freesync_config *in_config,
987 		struct mod_vrr_params *in_out_vrr)
988 {
989 	struct core_freesync *core_freesync = NULL;
990 	unsigned long long nominal_field_rate_in_uhz = 0;
991 	unsigned long long rounded_nominal_in_uhz = 0;
992 	unsigned int refresh_range = 0;
993 	unsigned long long min_refresh_in_uhz = 0;
994 	unsigned long long max_refresh_in_uhz = 0;
995 	unsigned long long min_hardware_refresh_in_uhz = 0;
996 
997 	if (mod_freesync == NULL)
998 		return;
999 
1000 	core_freesync = MOD_FREESYNC_TO_CORE(mod_freesync);
1001 
1002 	/* Calculate nominal field rate for stream */
1003 	nominal_field_rate_in_uhz =
1004 			mod_freesync_calc_nominal_field_rate(stream);
1005 
1006 	if (stream->ctx->dc->caps.max_v_total != 0 && stream->timing.h_total != 0) {
1007 		min_hardware_refresh_in_uhz = div64_u64((stream->timing.pix_clk_100hz * 100000000ULL),
1008 			(stream->timing.h_total * stream->ctx->dc->caps.max_v_total));
1009 	}
1010 	/* Limit minimum refresh rate to what can be supported by hardware */
1011 	min_refresh_in_uhz = min_hardware_refresh_in_uhz > in_config->min_refresh_in_uhz ?
1012 		min_hardware_refresh_in_uhz : in_config->min_refresh_in_uhz;
1013 	max_refresh_in_uhz = in_config->max_refresh_in_uhz;
1014 
1015 	/* Full range may be larger than current video timing, so cap at nominal */
1016 	if (max_refresh_in_uhz > nominal_field_rate_in_uhz)
1017 		max_refresh_in_uhz = nominal_field_rate_in_uhz;
1018 
1019 	/* Full range may be larger than current video timing, so cap at nominal */
1020 	if (min_refresh_in_uhz > max_refresh_in_uhz)
1021 		min_refresh_in_uhz = max_refresh_in_uhz;
1022 
1023 	/* If a monitor reports exactly max refresh of 2x of min, enforce it on nominal */
1024 	rounded_nominal_in_uhz =
1025 			div_u64(nominal_field_rate_in_uhz + 50000, 100000) * 100000;
1026 	if (in_config->max_refresh_in_uhz == (2 * in_config->min_refresh_in_uhz) &&
1027 		in_config->max_refresh_in_uhz == rounded_nominal_in_uhz)
1028 		min_refresh_in_uhz = div_u64(nominal_field_rate_in_uhz, 2);
1029 
1030 	if (!vrr_settings_require_update(core_freesync,
1031 			in_config, (unsigned int)min_refresh_in_uhz, (unsigned int)max_refresh_in_uhz,
1032 			in_out_vrr))
1033 		return;
1034 
1035 	in_out_vrr->state = in_config->state;
1036 	in_out_vrr->send_info_frame = in_config->vsif_supported;
1037 
1038 	if (in_config->state == VRR_STATE_UNSUPPORTED) {
1039 		in_out_vrr->state = VRR_STATE_UNSUPPORTED;
1040 		in_out_vrr->supported = false;
1041 		in_out_vrr->adjust.v_total_min = stream->timing.v_total;
1042 		in_out_vrr->adjust.v_total_max = stream->timing.v_total;
1043 
1044 		return;
1045 
1046 	} else {
1047 		in_out_vrr->min_refresh_in_uhz = (unsigned int)min_refresh_in_uhz;
1048 		in_out_vrr->max_duration_in_us =
1049 				calc_duration_in_us_from_refresh_in_uhz(
1050 						(unsigned int)min_refresh_in_uhz);
1051 
1052 		in_out_vrr->max_refresh_in_uhz = (unsigned int)max_refresh_in_uhz;
1053 		in_out_vrr->min_duration_in_us =
1054 				calc_duration_in_us_from_refresh_in_uhz(
1055 						(unsigned int)max_refresh_in_uhz);
1056 
1057 		if (in_config->state == VRR_STATE_ACTIVE_FIXED)
1058 			in_out_vrr->fixed_refresh_in_uhz = in_config->fixed_refresh_in_uhz;
1059 		else
1060 			in_out_vrr->fixed_refresh_in_uhz = 0;
1061 
1062 		refresh_range = div_u64(in_out_vrr->max_refresh_in_uhz + 500000, 1000000) -
1063 +				div_u64(in_out_vrr->min_refresh_in_uhz + 500000, 1000000);
1064 
1065 		in_out_vrr->supported = true;
1066 	}
1067 
1068 	in_out_vrr->fixed.ramping_active = in_config->ramping;
1069 
1070 	in_out_vrr->btr.btr_enabled = in_config->btr;
1071 
1072 	if (in_out_vrr->max_refresh_in_uhz < (2 * in_out_vrr->min_refresh_in_uhz))
1073 		in_out_vrr->btr.btr_enabled = false;
1074 	else {
1075 		in_out_vrr->btr.margin_in_us = in_out_vrr->max_duration_in_us -
1076 				2 * in_out_vrr->min_duration_in_us;
1077 		if (in_out_vrr->btr.margin_in_us > BTR_MAX_MARGIN)
1078 			in_out_vrr->btr.margin_in_us = BTR_MAX_MARGIN;
1079 	}
1080 
1081 	in_out_vrr->btr.btr_active = false;
1082 	in_out_vrr->btr.inserted_duration_in_us = 0;
1083 	in_out_vrr->btr.frames_to_insert = 0;
1084 	in_out_vrr->btr.frame_counter = 0;
1085 	in_out_vrr->fixed.fixed_active = false;
1086 	in_out_vrr->fixed.target_refresh_in_uhz = 0;
1087 
1088 	in_out_vrr->btr.mid_point_in_us =
1089 				(in_out_vrr->min_duration_in_us +
1090 				 in_out_vrr->max_duration_in_us) / 2;
1091 
1092 	if (in_out_vrr->state == VRR_STATE_UNSUPPORTED) {
1093 		in_out_vrr->adjust.v_total_min = stream->timing.v_total;
1094 		in_out_vrr->adjust.v_total_max = stream->timing.v_total;
1095 	} else if (in_out_vrr->state == VRR_STATE_DISABLED) {
1096 		in_out_vrr->adjust.v_total_min = stream->timing.v_total;
1097 		in_out_vrr->adjust.v_total_max = stream->timing.v_total;
1098 	} else if (in_out_vrr->state == VRR_STATE_INACTIVE) {
1099 		in_out_vrr->adjust.v_total_min = stream->timing.v_total;
1100 		in_out_vrr->adjust.v_total_max = stream->timing.v_total;
1101 	} else if (in_out_vrr->state == VRR_STATE_ACTIVE_VARIABLE &&
1102 			refresh_range >= MIN_REFRESH_RANGE) {
1103 
1104 		in_out_vrr->adjust.v_total_min =
1105 			mod_freesync_calc_v_total_from_refresh(stream,
1106 				in_out_vrr->max_refresh_in_uhz);
1107 		in_out_vrr->adjust.v_total_max =
1108 			mod_freesync_calc_v_total_from_refresh(stream,
1109 				in_out_vrr->min_refresh_in_uhz);
1110 	} else if (in_out_vrr->state == VRR_STATE_ACTIVE_FIXED) {
1111 		in_out_vrr->fixed.target_refresh_in_uhz =
1112 				in_out_vrr->fixed_refresh_in_uhz;
1113 		if (in_out_vrr->fixed.ramping_active &&
1114 				in_out_vrr->fixed.fixed_active) {
1115 			/* Do not update vtotals if ramping is already active
1116 			 * in order to continue ramp from current refresh.
1117 			 */
1118 			in_out_vrr->fixed.fixed_active = true;
1119 		} else {
1120 			in_out_vrr->fixed.fixed_active = true;
1121 			in_out_vrr->adjust.v_total_min =
1122 				mod_freesync_calc_v_total_from_refresh(stream,
1123 					in_out_vrr->fixed.target_refresh_in_uhz);
1124 			in_out_vrr->adjust.v_total_max =
1125 				in_out_vrr->adjust.v_total_min;
1126 		}
1127 	} else {
1128 		in_out_vrr->state = VRR_STATE_INACTIVE;
1129 		in_out_vrr->adjust.v_total_min = stream->timing.v_total;
1130 		in_out_vrr->adjust.v_total_max = stream->timing.v_total;
1131 	}
1132 }
1133 
1134 void mod_freesync_handle_preflip(struct mod_freesync *mod_freesync,
1135 		const struct dc_plane_state *plane,
1136 		const struct dc_stream_state *stream,
1137 		unsigned int curr_time_stamp_in_us,
1138 		struct mod_vrr_params *in_out_vrr)
1139 {
1140 	struct core_freesync *core_freesync = NULL;
1141 	unsigned int last_render_time_in_us = 0;
1142 
1143 	if (mod_freesync == NULL)
1144 		return;
1145 
1146 	core_freesync = MOD_FREESYNC_TO_CORE(mod_freesync);
1147 
1148 	if (in_out_vrr->supported &&
1149 			in_out_vrr->state == VRR_STATE_ACTIVE_VARIABLE) {
1150 
1151 		last_render_time_in_us = curr_time_stamp_in_us -
1152 				plane->time.prev_update_time_in_us;
1153 
1154 		if (in_out_vrr->btr.btr_enabled) {
1155 			apply_below_the_range(core_freesync,
1156 					stream,
1157 					last_render_time_in_us,
1158 					in_out_vrr);
1159 		} else {
1160 			apply_fixed_refresh(core_freesync,
1161 				stream,
1162 				last_render_time_in_us,
1163 				in_out_vrr);
1164 		}
1165 
1166 		determine_flip_interval_workaround_req(in_out_vrr,
1167 				curr_time_stamp_in_us);
1168 
1169 	}
1170 }
1171 
1172 void mod_freesync_handle_v_update(struct mod_freesync *mod_freesync,
1173 		const struct dc_stream_state *stream,
1174 		struct mod_vrr_params *in_out_vrr)
1175 {
1176 	struct core_freesync *core_freesync = NULL;
1177 	unsigned int cur_timestamp_in_us;
1178 	unsigned long long cur_tick;
1179 
1180 	if ((mod_freesync == NULL) || (stream == NULL) || (in_out_vrr == NULL))
1181 		return;
1182 
1183 	core_freesync = MOD_FREESYNC_TO_CORE(mod_freesync);
1184 
1185 	if (in_out_vrr->supported == false)
1186 		return;
1187 
1188 	cur_tick = dm_get_timestamp(core_freesync->dc->ctx);
1189 	cur_timestamp_in_us = (unsigned int)
1190 			div_u64(dm_get_elapse_time_in_ns(core_freesync->dc->ctx, cur_tick, 0), 1000);
1191 
1192 	in_out_vrr->flip_interval.vsyncs_between_flip++;
1193 	in_out_vrr->flip_interval.v_update_timestamp_in_us = cur_timestamp_in_us;
1194 
1195 	if (in_out_vrr->state == VRR_STATE_ACTIVE_VARIABLE &&
1196 			(in_out_vrr->flip_interval.flip_interval_workaround_active ||
1197 			(!in_out_vrr->flip_interval.flip_interval_workaround_active &&
1198 			in_out_vrr->flip_interval.program_flip_interval_workaround))) {
1199 		// set freesync vmin vmax to nominal for workaround
1200 		in_out_vrr->adjust.v_total_min =
1201 			mod_freesync_calc_v_total_from_refresh(
1202 			stream, in_out_vrr->max_refresh_in_uhz);
1203 		in_out_vrr->adjust.v_total_max =
1204 				in_out_vrr->adjust.v_total_min;
1205 		in_out_vrr->flip_interval.program_flip_interval_workaround = false;
1206 		in_out_vrr->flip_interval.do_flip_interval_workaround_cleanup = true;
1207 		return;
1208 	}
1209 
1210 	if (in_out_vrr->state != VRR_STATE_ACTIVE_VARIABLE &&
1211 			in_out_vrr->flip_interval.do_flip_interval_workaround_cleanup) {
1212 		in_out_vrr->flip_interval.do_flip_interval_workaround_cleanup = false;
1213 		in_out_vrr->flip_interval.flip_interval_detect_counter = 0;
1214 		in_out_vrr->flip_interval.vsyncs_between_flip = 0;
1215 		in_out_vrr->flip_interval.vsync_to_flip_in_us = 0;
1216 	}
1217 
1218 	/* Below the Range Logic */
1219 
1220 	/* Only execute if in fullscreen mode */
1221 	if (in_out_vrr->state == VRR_STATE_ACTIVE_VARIABLE &&
1222 					in_out_vrr->btr.btr_active) {
1223 		/* TODO: pass in flag for Pre-DCE12 ASIC
1224 		 * in order for frame variable duration to take affect,
1225 		 * it needs to be done one VSYNC early, which is at
1226 		 * frameCounter == 1.
1227 		 * For DCE12 and newer updates to V_TOTAL_MIN/MAX
1228 		 * will take affect on current frame
1229 		 */
1230 		if (in_out_vrr->btr.frames_to_insert ==
1231 				in_out_vrr->btr.frame_counter) {
1232 			in_out_vrr->adjust.v_total_min =
1233 				calc_v_total_from_duration(stream,
1234 				in_out_vrr,
1235 				in_out_vrr->btr.inserted_duration_in_us);
1236 			in_out_vrr->adjust.v_total_max =
1237 				in_out_vrr->adjust.v_total_min;
1238 		}
1239 
1240 		if (in_out_vrr->btr.frame_counter > 0)
1241 			in_out_vrr->btr.frame_counter--;
1242 
1243 		/* Restore FreeSync */
1244 		if (in_out_vrr->btr.frame_counter == 0) {
1245 			in_out_vrr->adjust.v_total_min =
1246 				mod_freesync_calc_v_total_from_refresh(stream,
1247 				in_out_vrr->max_refresh_in_uhz);
1248 			in_out_vrr->adjust.v_total_max =
1249 				mod_freesync_calc_v_total_from_refresh(stream,
1250 				in_out_vrr->min_refresh_in_uhz);
1251 		}
1252 	}
1253 
1254 	/* If in fullscreen freesync mode or in video, do not program
1255 	 * static screen ramp values
1256 	 */
1257 	if (in_out_vrr->state == VRR_STATE_ACTIVE_VARIABLE)
1258 		in_out_vrr->fixed.ramping_active = false;
1259 
1260 	/* Gradual Static Screen Ramping Logic
1261 	 * Execute if ramp is active and user enabled freesync static screen
1262 	 */
1263 	if (in_out_vrr->state == VRR_STATE_ACTIVE_FIXED &&
1264 				in_out_vrr->fixed.ramping_active) {
1265 		update_v_total_for_static_ramp(
1266 				core_freesync, stream, in_out_vrr);
1267 	}
1268 }
1269 
1270 void mod_freesync_get_settings(struct mod_freesync *mod_freesync,
1271 		const struct mod_vrr_params *vrr,
1272 		unsigned int *v_total_min, unsigned int *v_total_max,
1273 		unsigned int *event_triggers,
1274 		unsigned int *window_min, unsigned int *window_max,
1275 		unsigned int *lfc_mid_point_in_us,
1276 		unsigned int *inserted_frames,
1277 		unsigned int *inserted_duration_in_us)
1278 {
1279 	if (mod_freesync == NULL)
1280 		return;
1281 
1282 	if (vrr->supported) {
1283 		*v_total_min = vrr->adjust.v_total_min;
1284 		*v_total_max = vrr->adjust.v_total_max;
1285 		*event_triggers = 0;
1286 		*lfc_mid_point_in_us = vrr->btr.mid_point_in_us;
1287 		*inserted_frames = vrr->btr.frames_to_insert;
1288 		*inserted_duration_in_us = vrr->btr.inserted_duration_in_us;
1289 	}
1290 }
1291 
1292 unsigned long long mod_freesync_calc_nominal_field_rate(
1293 			const struct dc_stream_state *stream)
1294 {
1295 	unsigned long long nominal_field_rate_in_uhz = 0;
1296 	unsigned int total = stream->timing.h_total * stream->timing.v_total;
1297 
1298 	/* Calculate nominal field rate for stream, rounded up to nearest integer */
1299 	nominal_field_rate_in_uhz = stream->timing.pix_clk_100hz;
1300 	nominal_field_rate_in_uhz *= 100000000ULL;
1301 
1302 	nominal_field_rate_in_uhz =	div_u64(nominal_field_rate_in_uhz, total);
1303 
1304 	return nominal_field_rate_in_uhz;
1305 }
1306 
1307 unsigned long long mod_freesync_calc_field_rate_from_timing(
1308 		unsigned int vtotal, unsigned int htotal, unsigned int pix_clk)
1309 {
1310 	unsigned long long field_rate_in_uhz = 0;
1311 	unsigned int total = htotal * vtotal;
1312 
1313 	/* Calculate nominal field rate for stream, rounded up to nearest integer */
1314 	field_rate_in_uhz = pix_clk;
1315 	field_rate_in_uhz *= 1000000ULL;
1316 
1317 	field_rate_in_uhz =	div_u64(field_rate_in_uhz, total);
1318 
1319 	return field_rate_in_uhz;
1320 }
1321 
1322 bool mod_freesync_get_freesync_enabled(struct mod_vrr_params *pVrr)
1323 {
1324 	return (pVrr->state != VRR_STATE_UNSUPPORTED) && (pVrr->state != VRR_STATE_DISABLED);
1325 }
1326 
1327 bool mod_freesync_is_valid_range(uint32_t min_refresh_cap_in_uhz,
1328 		uint32_t max_refresh_cap_in_uhz,
1329 		uint32_t nominal_field_rate_in_uhz)
1330 {
1331 
1332 	/* Typically nominal refresh calculated can have some fractional part.
1333 	 * Allow for some rounding error of actual video timing by taking floor
1334 	 * of caps and request. Round the nominal refresh rate.
1335 	 *
1336 	 * Dividing will convert everything to units in Hz although input
1337 	 * variable name is in uHz!
1338 	 *
1339 	 * Also note, this takes care of rounding error on the nominal refresh
1340 	 * so by rounding error we only expect it to be off by a small amount,
1341 	 * such as < 0.1 Hz. i.e. 143.9xxx or 144.1xxx.
1342 	 *
1343 	 * Example 1. Caps    Min = 40 Hz, Max = 144 Hz
1344 	 *            Request Min = 40 Hz, Max = 144 Hz
1345 	 *                    Nominal = 143.5x Hz rounded to 144 Hz
1346 	 *            This function should allow this as valid request
1347 	 *
1348 	 * Example 2. Caps    Min = 40 Hz, Max = 144 Hz
1349 	 *            Request Min = 40 Hz, Max = 144 Hz
1350 	 *                    Nominal = 144.4x Hz rounded to 144 Hz
1351 	 *            This function should allow this as valid request
1352 	 *
1353 	 * Example 3. Caps    Min = 40 Hz, Max = 144 Hz
1354 	 *            Request Min = 40 Hz, Max = 144 Hz
1355 	 *                    Nominal = 120.xx Hz rounded to 120 Hz
1356 	 *            This function should return NOT valid since the requested
1357 	 *            max is greater than current timing's nominal
1358 	 *
1359 	 * Example 4. Caps    Min = 40 Hz, Max = 120 Hz
1360 	 *            Request Min = 40 Hz, Max = 120 Hz
1361 	 *                    Nominal = 144.xx Hz rounded to 144 Hz
1362 	 *            This function should return NOT valid since the nominal
1363 	 *            is greater than the capability's max refresh
1364 	 */
1365 	nominal_field_rate_in_uhz =
1366 			div_u64(nominal_field_rate_in_uhz + 500000, 1000000);
1367 	min_refresh_cap_in_uhz /= 1000000;
1368 	max_refresh_cap_in_uhz /= 1000000;
1369 
1370 	/* Check nominal is within range */
1371 	if (nominal_field_rate_in_uhz > max_refresh_cap_in_uhz ||
1372 		nominal_field_rate_in_uhz < min_refresh_cap_in_uhz)
1373 		return false;
1374 
1375 	/* If nominal is less than max, limit the max allowed refresh rate */
1376 	if (nominal_field_rate_in_uhz < max_refresh_cap_in_uhz)
1377 		max_refresh_cap_in_uhz = nominal_field_rate_in_uhz;
1378 
1379 	/* Check min is within range */
1380 	if (min_refresh_cap_in_uhz > max_refresh_cap_in_uhz)
1381 		return false;
1382 
1383 	/* For variable range, check for at least 10 Hz range */
1384 	if (nominal_field_rate_in_uhz - min_refresh_cap_in_uhz < 10)
1385 		return false;
1386 
1387 	return true;
1388 }
1389