1 /* 2 * Copyright 2016 Advanced Micro Devices, Inc. 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice shall be included in 12 * all copies or substantial portions of the Software. 13 * 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 20 * OTHER DEALINGS IN THE SOFTWARE. 21 * 22 * Authors: AMD 23 * 24 */ 25 26 #include "dm_services.h" 27 #include "dc.h" 28 #include "mod_freesync.h" 29 #include "core_types.h" 30 31 #define MOD_FREESYNC_MAX_CONCURRENT_STREAMS 32 32 33 #define MIN_REFRESH_RANGE_IN_US 10000000 34 /* Refresh rate ramp at a fixed rate of 65 Hz/second */ 35 #define STATIC_SCREEN_RAMP_DELTA_REFRESH_RATE_PER_FRAME ((1000 / 60) * 65) 36 /* Number of elements in the render times cache array */ 37 #define RENDER_TIMES_MAX_COUNT 10 38 /* Threshold to exit BTR (to avoid frequent enter-exits at the lower limit) */ 39 #define BTR_EXIT_MARGIN 2000 40 /*Threshold to exit fixed refresh rate*/ 41 #define FIXED_REFRESH_EXIT_MARGIN_IN_HZ 4 42 /* Number of consecutive frames to check before entering/exiting fixed refresh*/ 43 #define FIXED_REFRESH_ENTER_FRAME_COUNT 5 44 #define FIXED_REFRESH_EXIT_FRAME_COUNT 5 45 46 struct core_freesync { 47 struct mod_freesync public; 48 struct dc *dc; 49 }; 50 51 #define MOD_FREESYNC_TO_CORE(mod_freesync)\ 52 container_of(mod_freesync, struct core_freesync, public) 53 54 struct mod_freesync *mod_freesync_create(struct dc *dc) 55 { 56 struct core_freesync *core_freesync = 57 kzalloc(sizeof(struct core_freesync), GFP_KERNEL); 58 59 if (core_freesync == NULL) 60 goto fail_alloc_context; 61 62 if (dc == NULL) 63 goto fail_construct; 64 65 core_freesync->dc = dc; 66 return &core_freesync->public; 67 68 fail_construct: 69 kfree(core_freesync); 70 71 fail_alloc_context: 72 return NULL; 73 } 74 75 void mod_freesync_destroy(struct mod_freesync *mod_freesync) 76 { 77 struct core_freesync *core_freesync = NULL; 78 if (mod_freesync == NULL) 79 return; 80 core_freesync = MOD_FREESYNC_TO_CORE(mod_freesync); 81 kfree(core_freesync); 82 } 83 84 #if 0 /* unused currently */ 85 static unsigned int calc_refresh_in_uhz_from_duration( 86 unsigned int duration_in_ns) 87 { 88 unsigned int refresh_in_uhz = 89 ((unsigned int)(div64_u64((1000000000ULL * 1000000), 90 duration_in_ns))); 91 return refresh_in_uhz; 92 } 93 #endif 94 95 static unsigned int calc_duration_in_us_from_refresh_in_uhz( 96 unsigned int refresh_in_uhz) 97 { 98 unsigned int duration_in_us = 99 ((unsigned int)(div64_u64((1000000000ULL * 1000), 100 refresh_in_uhz))); 101 return duration_in_us; 102 } 103 104 static unsigned int calc_duration_in_us_from_v_total( 105 const struct dc_stream_state *stream, 106 const struct mod_vrr_params *in_vrr, 107 unsigned int v_total) 108 { 109 unsigned int duration_in_us = 110 (unsigned int)(div64_u64(((unsigned long long)(v_total) 111 * 10000) * stream->timing.h_total, 112 stream->timing.pix_clk_100hz)); 113 114 return duration_in_us; 115 } 116 117 static unsigned int calc_v_total_from_refresh( 118 const struct dc_stream_state *stream, 119 unsigned int refresh_in_uhz) 120 { 121 unsigned int v_total = stream->timing.v_total; 122 unsigned int frame_duration_in_ns; 123 124 frame_duration_in_ns = 125 ((unsigned int)(div64_u64((1000000000ULL * 1000000), 126 refresh_in_uhz))); 127 128 v_total = div64_u64(div64_u64(((unsigned long long)( 129 frame_duration_in_ns) * (stream->timing.pix_clk_100hz / 10)), 130 stream->timing.h_total), 1000000); 131 132 /* v_total cannot be less than nominal */ 133 if (v_total < stream->timing.v_total) { 134 ASSERT(v_total < stream->timing.v_total); 135 v_total = stream->timing.v_total; 136 } 137 138 return v_total; 139 } 140 141 static unsigned int calc_v_total_from_duration( 142 const struct dc_stream_state *stream, 143 const struct mod_vrr_params *vrr, 144 unsigned int duration_in_us) 145 { 146 unsigned int v_total = 0; 147 148 if (duration_in_us < vrr->min_duration_in_us) 149 duration_in_us = vrr->min_duration_in_us; 150 151 if (duration_in_us > vrr->max_duration_in_us) 152 duration_in_us = vrr->max_duration_in_us; 153 154 v_total = div64_u64(div64_u64(((unsigned long long)( 155 duration_in_us) * (stream->timing.pix_clk_100hz / 10)), 156 stream->timing.h_total), 1000); 157 158 /* v_total cannot be less than nominal */ 159 if (v_total < stream->timing.v_total) { 160 ASSERT(v_total < stream->timing.v_total); 161 v_total = stream->timing.v_total; 162 } 163 164 return v_total; 165 } 166 167 static void update_v_total_for_static_ramp( 168 struct core_freesync *core_freesync, 169 const struct dc_stream_state *stream, 170 struct mod_vrr_params *in_out_vrr) 171 { 172 unsigned int v_total = 0; 173 unsigned int current_duration_in_us = 174 calc_duration_in_us_from_v_total( 175 stream, in_out_vrr, 176 in_out_vrr->adjust.v_total_max); 177 unsigned int target_duration_in_us = 178 calc_duration_in_us_from_refresh_in_uhz( 179 in_out_vrr->fixed.target_refresh_in_uhz); 180 bool ramp_direction_is_up = (current_duration_in_us > 181 target_duration_in_us) ? true : false; 182 183 /* Calc ratio between new and current frame duration with 3 digit */ 184 unsigned int frame_duration_ratio = div64_u64(1000000, 185 (1000 + div64_u64(((unsigned long long)( 186 STATIC_SCREEN_RAMP_DELTA_REFRESH_RATE_PER_FRAME) * 187 current_duration_in_us), 188 1000000))); 189 190 /* Calculate delta between new and current frame duration in us */ 191 unsigned int frame_duration_delta = div64_u64(((unsigned long long)( 192 current_duration_in_us) * 193 (1000 - frame_duration_ratio)), 1000); 194 195 /* Adjust frame duration delta based on ratio between current and 196 * standard frame duration (frame duration at 60 Hz refresh rate). 197 */ 198 unsigned int ramp_rate_interpolated = div64_u64(((unsigned long long)( 199 frame_duration_delta) * current_duration_in_us), 16666); 200 201 /* Going to a higher refresh rate (lower frame duration) */ 202 if (ramp_direction_is_up) { 203 /* reduce frame duration */ 204 current_duration_in_us -= ramp_rate_interpolated; 205 206 /* adjust for frame duration below min */ 207 if (current_duration_in_us <= target_duration_in_us) { 208 in_out_vrr->fixed.ramping_active = false; 209 in_out_vrr->fixed.ramping_done = true; 210 current_duration_in_us = 211 calc_duration_in_us_from_refresh_in_uhz( 212 in_out_vrr->fixed.target_refresh_in_uhz); 213 } 214 /* Going to a lower refresh rate (larger frame duration) */ 215 } else { 216 /* increase frame duration */ 217 current_duration_in_us += ramp_rate_interpolated; 218 219 /* adjust for frame duration above max */ 220 if (current_duration_in_us >= target_duration_in_us) { 221 in_out_vrr->fixed.ramping_active = false; 222 in_out_vrr->fixed.ramping_done = true; 223 current_duration_in_us = 224 calc_duration_in_us_from_refresh_in_uhz( 225 in_out_vrr->fixed.target_refresh_in_uhz); 226 } 227 } 228 229 v_total = div64_u64(div64_u64(((unsigned long long)( 230 current_duration_in_us) * (stream->timing.pix_clk_100hz / 10)), 231 stream->timing.h_total), 1000); 232 233 in_out_vrr->adjust.v_total_min = v_total; 234 in_out_vrr->adjust.v_total_max = v_total; 235 } 236 237 static void apply_below_the_range(struct core_freesync *core_freesync, 238 const struct dc_stream_state *stream, 239 unsigned int last_render_time_in_us, 240 struct mod_vrr_params *in_out_vrr) 241 { 242 unsigned int inserted_frame_duration_in_us = 0; 243 unsigned int mid_point_frames_ceil = 0; 244 unsigned int mid_point_frames_floor = 0; 245 unsigned int frame_time_in_us = 0; 246 unsigned int delta_from_mid_point_in_us_1 = 0xFFFFFFFF; 247 unsigned int delta_from_mid_point_in_us_2 = 0xFFFFFFFF; 248 unsigned int frames_to_insert = 0; 249 unsigned int min_frame_duration_in_ns = 0; 250 unsigned int max_render_time_in_us = in_out_vrr->max_duration_in_us; 251 252 min_frame_duration_in_ns = ((unsigned int) (div64_u64( 253 (1000000000ULL * 1000000), 254 in_out_vrr->max_refresh_in_uhz))); 255 256 /* Program BTR */ 257 if (last_render_time_in_us + BTR_EXIT_MARGIN < max_render_time_in_us) { 258 /* Exit Below the Range */ 259 if (in_out_vrr->btr.btr_active) { 260 in_out_vrr->btr.frame_counter = 0; 261 in_out_vrr->btr.btr_active = false; 262 } 263 } else if (last_render_time_in_us > max_render_time_in_us) { 264 /* Enter Below the Range */ 265 in_out_vrr->btr.btr_active = true; 266 } 267 268 /* BTR set to "not active" so disengage */ 269 if (!in_out_vrr->btr.btr_active) { 270 in_out_vrr->btr.inserted_duration_in_us = 0; 271 in_out_vrr->btr.frames_to_insert = 0; 272 in_out_vrr->btr.frame_counter = 0; 273 274 /* Restore FreeSync */ 275 in_out_vrr->adjust.v_total_min = 276 calc_v_total_from_refresh(stream, 277 in_out_vrr->max_refresh_in_uhz); 278 in_out_vrr->adjust.v_total_max = 279 calc_v_total_from_refresh(stream, 280 in_out_vrr->min_refresh_in_uhz); 281 /* BTR set to "active" so engage */ 282 } else { 283 284 /* Calculate number of midPoint frames that could fit within 285 * the render time interval- take ceil of this value 286 */ 287 mid_point_frames_ceil = (last_render_time_in_us + 288 in_out_vrr->btr.mid_point_in_us - 1) / 289 in_out_vrr->btr.mid_point_in_us; 290 291 if (mid_point_frames_ceil > 0) { 292 frame_time_in_us = last_render_time_in_us / 293 mid_point_frames_ceil; 294 delta_from_mid_point_in_us_1 = 295 (in_out_vrr->btr.mid_point_in_us > 296 frame_time_in_us) ? 297 (in_out_vrr->btr.mid_point_in_us - frame_time_in_us) : 298 (frame_time_in_us - in_out_vrr->btr.mid_point_in_us); 299 } 300 301 /* Calculate number of midPoint frames that could fit within 302 * the render time interval- take floor of this value 303 */ 304 mid_point_frames_floor = last_render_time_in_us / 305 in_out_vrr->btr.mid_point_in_us; 306 307 if (mid_point_frames_floor > 0) { 308 309 frame_time_in_us = last_render_time_in_us / 310 mid_point_frames_floor; 311 delta_from_mid_point_in_us_2 = 312 (in_out_vrr->btr.mid_point_in_us > 313 frame_time_in_us) ? 314 (in_out_vrr->btr.mid_point_in_us - frame_time_in_us) : 315 (frame_time_in_us - in_out_vrr->btr.mid_point_in_us); 316 } 317 318 /* Choose number of frames to insert based on how close it 319 * can get to the mid point of the variable range. 320 */ 321 if (delta_from_mid_point_in_us_1 < delta_from_mid_point_in_us_2) 322 frames_to_insert = mid_point_frames_ceil; 323 else 324 frames_to_insert = mid_point_frames_floor; 325 326 /* Either we've calculated the number of frames to insert, 327 * or we need to insert min duration frames 328 */ 329 if (frames_to_insert > 0) 330 inserted_frame_duration_in_us = last_render_time_in_us / 331 frames_to_insert; 332 333 if (inserted_frame_duration_in_us < 334 (1000000 / in_out_vrr->max_refresh_in_uhz)) 335 inserted_frame_duration_in_us = 336 (1000000 / in_out_vrr->max_refresh_in_uhz); 337 338 /* Cache the calculated variables */ 339 in_out_vrr->btr.inserted_duration_in_us = 340 inserted_frame_duration_in_us; 341 in_out_vrr->btr.frames_to_insert = frames_to_insert; 342 in_out_vrr->btr.frame_counter = frames_to_insert; 343 } 344 } 345 346 static void apply_fixed_refresh(struct core_freesync *core_freesync, 347 const struct dc_stream_state *stream, 348 unsigned int last_render_time_in_us, 349 struct mod_vrr_params *in_out_vrr) 350 { 351 bool update = false; 352 unsigned int max_render_time_in_us = in_out_vrr->max_duration_in_us; 353 354 //Compute the exit refresh rate and exit frame duration 355 unsigned int exit_refresh_rate_in_milli_hz = ((1000000000/max_render_time_in_us) 356 + (1000*FIXED_REFRESH_EXIT_MARGIN_IN_HZ)); 357 unsigned int exit_frame_duration_in_us = 1000000000/exit_refresh_rate_in_milli_hz; 358 359 if (last_render_time_in_us < exit_frame_duration_in_us) { 360 /* Exit Fixed Refresh mode */ 361 if (in_out_vrr->fixed.fixed_active) { 362 in_out_vrr->fixed.frame_counter++; 363 364 if (in_out_vrr->fixed.frame_counter > 365 FIXED_REFRESH_EXIT_FRAME_COUNT) { 366 in_out_vrr->fixed.frame_counter = 0; 367 in_out_vrr->fixed.fixed_active = false; 368 in_out_vrr->fixed.target_refresh_in_uhz = 0; 369 update = true; 370 } 371 } 372 } else if (last_render_time_in_us > max_render_time_in_us) { 373 /* Enter Fixed Refresh mode */ 374 if (!in_out_vrr->fixed.fixed_active) { 375 in_out_vrr->fixed.frame_counter++; 376 377 if (in_out_vrr->fixed.frame_counter > 378 FIXED_REFRESH_ENTER_FRAME_COUNT) { 379 in_out_vrr->fixed.frame_counter = 0; 380 in_out_vrr->fixed.fixed_active = true; 381 in_out_vrr->fixed.target_refresh_in_uhz = 382 in_out_vrr->max_refresh_in_uhz; 383 update = true; 384 } 385 } 386 } 387 388 if (update) { 389 if (in_out_vrr->fixed.fixed_active) { 390 in_out_vrr->adjust.v_total_min = 391 calc_v_total_from_refresh( 392 stream, in_out_vrr->max_refresh_in_uhz); 393 in_out_vrr->adjust.v_total_max = 394 in_out_vrr->adjust.v_total_min; 395 } else { 396 in_out_vrr->adjust.v_total_min = 397 calc_v_total_from_refresh(stream, 398 in_out_vrr->max_refresh_in_uhz); 399 in_out_vrr->adjust.v_total_max = 400 calc_v_total_from_refresh(stream, 401 in_out_vrr->min_refresh_in_uhz); 402 } 403 } 404 } 405 406 static bool vrr_settings_require_update(struct core_freesync *core_freesync, 407 struct mod_freesync_config *in_config, 408 unsigned int min_refresh_in_uhz, 409 unsigned int max_refresh_in_uhz, 410 struct mod_vrr_params *in_vrr) 411 { 412 if (in_vrr->state != in_config->state) { 413 return true; 414 } else if (in_vrr->state == VRR_STATE_ACTIVE_FIXED && 415 in_vrr->fixed.target_refresh_in_uhz != 416 in_config->min_refresh_in_uhz) { 417 return true; 418 } else if (in_vrr->min_refresh_in_uhz != min_refresh_in_uhz) { 419 return true; 420 } else if (in_vrr->max_refresh_in_uhz != max_refresh_in_uhz) { 421 return true; 422 } 423 424 return false; 425 } 426 427 bool mod_freesync_get_vmin_vmax(struct mod_freesync *mod_freesync, 428 const struct dc_stream_state *stream, 429 unsigned int *vmin, 430 unsigned int *vmax) 431 { 432 *vmin = stream->adjust.v_total_min; 433 *vmax = stream->adjust.v_total_max; 434 435 return true; 436 } 437 438 bool mod_freesync_get_v_position(struct mod_freesync *mod_freesync, 439 struct dc_stream_state *stream, 440 unsigned int *nom_v_pos, 441 unsigned int *v_pos) 442 { 443 struct core_freesync *core_freesync = NULL; 444 struct crtc_position position; 445 446 if (mod_freesync == NULL) 447 return false; 448 449 core_freesync = MOD_FREESYNC_TO_CORE(mod_freesync); 450 451 if (dc_stream_get_crtc_position(core_freesync->dc, &stream, 1, 452 &position.vertical_count, 453 &position.nominal_vcount)) { 454 455 *nom_v_pos = position.nominal_vcount; 456 *v_pos = position.vertical_count; 457 458 return true; 459 } 460 461 return false; 462 } 463 464 static void build_vrr_infopacket_header_vtem(enum signal_type signal, 465 struct dc_info_packet *infopacket) 466 { 467 // HEADER 468 469 // HB0, HB1, HB2 indicates PacketType VTEMPacket 470 infopacket->hb0 = 0x7F; 471 infopacket->hb1 = 0xC0; 472 infopacket->hb2 = 0x00; 473 /* HB3 Bit Fields 474 * Reserved :1 = 0 475 * Sync :1 = 0 476 * VFR :1 = 1 477 * Ds_Type :2 = 0 478 * End :1 = 0 479 * New :1 = 0 480 */ 481 infopacket->hb3 = 0x20; 482 } 483 484 static void build_vrr_infopacket_header_v1(enum signal_type signal, 485 struct dc_info_packet *infopacket, 486 unsigned int *payload_size) 487 { 488 if (dc_is_hdmi_signal(signal)) { 489 490 /* HEADER */ 491 492 /* HB0 = Packet Type = 0x83 (Source Product 493 * Descriptor InfoFrame) 494 */ 495 infopacket->hb0 = DC_HDMI_INFOFRAME_TYPE_SPD; 496 497 /* HB1 = Version = 0x01 */ 498 infopacket->hb1 = 0x01; 499 500 /* HB2 = [Bits 7:5 = 0] [Bits 4:0 = Length = 0x08] */ 501 infopacket->hb2 = 0x08; 502 503 *payload_size = 0x08; 504 505 } else if (dc_is_dp_signal(signal)) { 506 507 /* HEADER */ 508 509 /* HB0 = Secondary-data Packet ID = 0 - Only non-zero 510 * when used to associate audio related info packets 511 */ 512 infopacket->hb0 = 0x00; 513 514 /* HB1 = Packet Type = 0x83 (Source Product 515 * Descriptor InfoFrame) 516 */ 517 infopacket->hb1 = DC_HDMI_INFOFRAME_TYPE_SPD; 518 519 /* HB2 = [Bits 7:0 = Least significant eight bits - 520 * For INFOFRAME, the value must be 1Bh] 521 */ 522 infopacket->hb2 = 0x1B; 523 524 /* HB3 = [Bits 7:2 = INFOFRAME SDP Version Number = 0x1] 525 * [Bits 1:0 = Most significant two bits = 0x00] 526 */ 527 infopacket->hb3 = 0x04; 528 529 *payload_size = 0x1B; 530 } 531 } 532 533 static void build_vrr_infopacket_header_v2(enum signal_type signal, 534 struct dc_info_packet *infopacket, 535 unsigned int *payload_size) 536 { 537 if (dc_is_hdmi_signal(signal)) { 538 539 /* HEADER */ 540 541 /* HB0 = Packet Type = 0x83 (Source Product 542 * Descriptor InfoFrame) 543 */ 544 infopacket->hb0 = DC_HDMI_INFOFRAME_TYPE_SPD; 545 546 /* HB1 = Version = 0x02 */ 547 infopacket->hb1 = 0x02; 548 549 /* HB2 = [Bits 7:5 = 0] [Bits 4:0 = Length = 0x09] */ 550 infopacket->hb2 = 0x09; 551 552 *payload_size = 0x0A; 553 554 } else if (dc_is_dp_signal(signal)) { 555 556 /* HEADER */ 557 558 /* HB0 = Secondary-data Packet ID = 0 - Only non-zero 559 * when used to associate audio related info packets 560 */ 561 infopacket->hb0 = 0x00; 562 563 /* HB1 = Packet Type = 0x83 (Source Product 564 * Descriptor InfoFrame) 565 */ 566 infopacket->hb1 = DC_HDMI_INFOFRAME_TYPE_SPD; 567 568 /* HB2 = [Bits 7:0 = Least significant eight bits - 569 * For INFOFRAME, the value must be 1Bh] 570 */ 571 infopacket->hb2 = 0x1B; 572 573 /* HB3 = [Bits 7:2 = INFOFRAME SDP Version Number = 0x2] 574 * [Bits 1:0 = Most significant two bits = 0x00] 575 */ 576 infopacket->hb3 = 0x08; 577 578 *payload_size = 0x1B; 579 } 580 } 581 582 static void build_vrr_vtem_infopacket_data(const struct dc_stream_state *stream, 583 const struct mod_vrr_params *vrr, 584 struct dc_info_packet *infopacket) 585 { 586 /* dc_info_packet to VtemPacket Translation of Bit-fields, 587 * SB[6] 588 * unsigned char VRR_EN :1 589 * unsigned char M_CONST :1 590 * unsigned char Reserved2 :2 591 * unsigned char FVA_Factor_M1 :4 592 * SB[7] 593 * unsigned char Base_Vfront :8 594 * SB[8] 595 * unsigned char Base_Refresh_Rate_98 :2 596 * unsigned char RB :1 597 * unsigned char Reserved3 :5 598 * SB[9] 599 * unsigned char Base_RefreshRate_07 :8 600 */ 601 unsigned int fieldRateInHz; 602 603 if (vrr->state == VRR_STATE_ACTIVE_VARIABLE || 604 vrr->state == VRR_STATE_ACTIVE_FIXED){ 605 infopacket->sb[6] |= 0x80; //VRR_EN Bit = 1 606 } else { 607 infopacket->sb[6] &= 0x7F; //VRR_EN Bit = 0 608 } 609 610 if (!stream->timing.vic) { 611 infopacket->sb[7] = stream->timing.v_front_porch; 612 613 /* TODO: In dal2, we check mode flags for a reduced blanking timing. 614 * Need a way to relay that information to this function. 615 * if("ReducedBlanking") 616 * { 617 * infopacket->sb[8] |= 0x20; //Set 3rd bit to 1 618 * } 619 */ 620 fieldRateInHz = (stream->timing.pix_clk_100hz * 100)/ 621 (stream->timing.h_total * stream->timing.v_total); 622 623 infopacket->sb[8] |= ((fieldRateInHz & 0x300) >> 2); 624 infopacket->sb[9] |= fieldRateInHz & 0xFF; 625 626 } 627 infopacket->valid = true; 628 } 629 630 static void build_vrr_infopacket_data(const struct mod_vrr_params *vrr, 631 struct dc_info_packet *infopacket) 632 { 633 /* PB1 = 0x1A (24bit AMD IEEE OUI (0x00001A) - Byte 0) */ 634 infopacket->sb[1] = 0x1A; 635 636 /* PB2 = 0x00 (24bit AMD IEEE OUI (0x00001A) - Byte 1) */ 637 infopacket->sb[2] = 0x00; 638 639 /* PB3 = 0x00 (24bit AMD IEEE OUI (0x00001A) - Byte 2) */ 640 infopacket->sb[3] = 0x00; 641 642 /* PB4 = Reserved */ 643 644 /* PB5 = Reserved */ 645 646 /* PB6 = [Bits 7:3 = Reserved] */ 647 648 /* PB6 = [Bit 0 = FreeSync Supported] */ 649 if (vrr->state != VRR_STATE_UNSUPPORTED) 650 infopacket->sb[6] |= 0x01; 651 652 /* PB6 = [Bit 1 = FreeSync Enabled] */ 653 if (vrr->state != VRR_STATE_DISABLED && 654 vrr->state != VRR_STATE_UNSUPPORTED) 655 infopacket->sb[6] |= 0x02; 656 657 /* PB6 = [Bit 2 = FreeSync Active] */ 658 if (vrr->state == VRR_STATE_ACTIVE_VARIABLE || 659 vrr->state == VRR_STATE_ACTIVE_FIXED) 660 infopacket->sb[6] |= 0x04; 661 662 /* PB7 = FreeSync Minimum refresh rate (Hz) */ 663 infopacket->sb[7] = (unsigned char)(vrr->min_refresh_in_uhz / 1000000); 664 665 /* PB8 = FreeSync Maximum refresh rate (Hz) 666 * Note: We should never go above the field rate of the mode timing set. 667 */ 668 infopacket->sb[8] = (unsigned char)(vrr->max_refresh_in_uhz / 1000000); 669 670 671 //FreeSync HDR 672 infopacket->sb[9] = 0; 673 infopacket->sb[10] = 0; 674 } 675 676 static void build_vrr_infopacket_fs2_data(enum color_transfer_func app_tf, 677 struct dc_info_packet *infopacket) 678 { 679 if (app_tf != TRANSFER_FUNC_UNKNOWN) { 680 infopacket->valid = true; 681 682 infopacket->sb[6] |= 0x08; // PB6 = [Bit 3 = Native Color Active] 683 684 if (app_tf == TRANSFER_FUNC_GAMMA_22) { 685 infopacket->sb[9] |= 0x04; // PB6 = [Bit 2 = Gamma 2.2 EOTF Active] 686 } 687 } 688 } 689 690 static void build_vrr_infopacket_checksum(unsigned int *payload_size, 691 struct dc_info_packet *infopacket) 692 { 693 /* Calculate checksum */ 694 unsigned int idx = 0; 695 unsigned char checksum = 0; 696 697 checksum += infopacket->hb0; 698 checksum += infopacket->hb1; 699 checksum += infopacket->hb2; 700 checksum += infopacket->hb3; 701 702 for (idx = 1; idx <= *payload_size; idx++) 703 checksum += infopacket->sb[idx]; 704 705 /* PB0 = Checksum (one byte complement) */ 706 infopacket->sb[0] = (unsigned char)(0x100 - checksum); 707 708 infopacket->valid = true; 709 } 710 711 static void build_vrr_infopacket_v1(enum signal_type signal, 712 const struct mod_vrr_params *vrr, 713 struct dc_info_packet *infopacket) 714 { 715 /* SPD info packet for FreeSync */ 716 unsigned int payload_size = 0; 717 718 build_vrr_infopacket_header_v1(signal, infopacket, &payload_size); 719 build_vrr_infopacket_data(vrr, infopacket); 720 build_vrr_infopacket_checksum(&payload_size, infopacket); 721 722 infopacket->valid = true; 723 } 724 725 static void build_vrr_infopacket_v2(enum signal_type signal, 726 const struct mod_vrr_params *vrr, 727 enum color_transfer_func app_tf, 728 struct dc_info_packet *infopacket) 729 { 730 unsigned int payload_size = 0; 731 732 build_vrr_infopacket_header_v2(signal, infopacket, &payload_size); 733 build_vrr_infopacket_data(vrr, infopacket); 734 735 build_vrr_infopacket_fs2_data(app_tf, infopacket); 736 737 build_vrr_infopacket_checksum(&payload_size, infopacket); 738 739 infopacket->valid = true; 740 } 741 742 static void build_vrr_infopacket_vtem(const struct dc_stream_state *stream, 743 const struct mod_vrr_params *vrr, 744 struct dc_info_packet *infopacket) 745 { 746 //VTEM info packet for HdmiVrr 747 748 //VTEM Packet is structured differently 749 build_vrr_infopacket_header_vtem(stream->signal, infopacket); 750 build_vrr_vtem_infopacket_data(stream, vrr, infopacket); 751 752 infopacket->valid = true; 753 } 754 755 void mod_freesync_build_vrr_infopacket(struct mod_freesync *mod_freesync, 756 const struct dc_stream_state *stream, 757 const struct mod_vrr_params *vrr, 758 enum vrr_packet_type packet_type, 759 enum color_transfer_func app_tf, 760 struct dc_info_packet *infopacket) 761 { 762 /* SPD info packet for FreeSync 763 * VTEM info packet for HdmiVRR 764 * Check if Freesync is supported. Return if false. If true, 765 * set the corresponding bit in the info packet 766 */ 767 if (!vrr->supported || (!vrr->send_info_frame && packet_type != PACKET_TYPE_VTEM)) 768 return; 769 770 switch (packet_type) { 771 case PACKET_TYPE_FS2: 772 build_vrr_infopacket_v2(stream->signal, vrr, app_tf, infopacket); 773 break; 774 case PACKET_TYPE_VTEM: 775 build_vrr_infopacket_vtem(stream, vrr, infopacket); 776 break; 777 case PACKET_TYPE_VRR: 778 case PACKET_TYPE_FS1: 779 default: 780 build_vrr_infopacket_v1(stream->signal, vrr, infopacket); 781 } 782 } 783 784 void mod_freesync_build_vrr_params(struct mod_freesync *mod_freesync, 785 const struct dc_stream_state *stream, 786 struct mod_freesync_config *in_config, 787 struct mod_vrr_params *in_out_vrr) 788 { 789 struct core_freesync *core_freesync = NULL; 790 unsigned long long nominal_field_rate_in_uhz = 0; 791 unsigned int refresh_range = 0; 792 unsigned int min_refresh_in_uhz = 0; 793 unsigned int max_refresh_in_uhz = 0; 794 795 if (mod_freesync == NULL) 796 return; 797 798 core_freesync = MOD_FREESYNC_TO_CORE(mod_freesync); 799 800 /* Calculate nominal field rate for stream */ 801 nominal_field_rate_in_uhz = 802 mod_freesync_calc_nominal_field_rate(stream); 803 804 min_refresh_in_uhz = in_config->min_refresh_in_uhz; 805 max_refresh_in_uhz = in_config->max_refresh_in_uhz; 806 807 // Don't allow min > max 808 if (min_refresh_in_uhz > max_refresh_in_uhz) 809 min_refresh_in_uhz = max_refresh_in_uhz; 810 811 // Full range may be larger than current video timing, so cap at nominal 812 if (max_refresh_in_uhz > nominal_field_rate_in_uhz) 813 max_refresh_in_uhz = nominal_field_rate_in_uhz; 814 815 // Full range may be larger than current video timing, so cap at nominal 816 if (min_refresh_in_uhz > nominal_field_rate_in_uhz) 817 min_refresh_in_uhz = nominal_field_rate_in_uhz; 818 819 if (!vrr_settings_require_update(core_freesync, 820 in_config, min_refresh_in_uhz, max_refresh_in_uhz, 821 in_out_vrr)) 822 return; 823 824 in_out_vrr->state = in_config->state; 825 in_out_vrr->send_info_frame = in_config->vsif_supported; 826 827 if (in_config->state == VRR_STATE_UNSUPPORTED) { 828 in_out_vrr->state = VRR_STATE_UNSUPPORTED; 829 in_out_vrr->supported = false; 830 in_out_vrr->adjust.v_total_min = stream->timing.v_total; 831 in_out_vrr->adjust.v_total_max = stream->timing.v_total; 832 833 return; 834 835 } else { 836 in_out_vrr->min_refresh_in_uhz = min_refresh_in_uhz; 837 in_out_vrr->max_duration_in_us = 838 calc_duration_in_us_from_refresh_in_uhz( 839 min_refresh_in_uhz); 840 841 in_out_vrr->max_refresh_in_uhz = max_refresh_in_uhz; 842 in_out_vrr->min_duration_in_us = 843 calc_duration_in_us_from_refresh_in_uhz( 844 max_refresh_in_uhz); 845 846 refresh_range = in_out_vrr->max_refresh_in_uhz - 847 in_out_vrr->min_refresh_in_uhz; 848 849 in_out_vrr->supported = true; 850 } 851 852 in_out_vrr->fixed.ramping_active = in_config->ramping; 853 854 in_out_vrr->btr.btr_enabled = in_config->btr; 855 if (in_out_vrr->max_refresh_in_uhz < 856 2 * in_out_vrr->min_refresh_in_uhz) 857 in_out_vrr->btr.btr_enabled = false; 858 in_out_vrr->btr.btr_active = false; 859 in_out_vrr->btr.inserted_duration_in_us = 0; 860 in_out_vrr->btr.frames_to_insert = 0; 861 in_out_vrr->btr.frame_counter = 0; 862 in_out_vrr->btr.mid_point_in_us = 863 in_out_vrr->min_duration_in_us + 864 (in_out_vrr->max_duration_in_us - 865 in_out_vrr->min_duration_in_us) / 2; 866 867 if (in_out_vrr->state == VRR_STATE_UNSUPPORTED) { 868 in_out_vrr->adjust.v_total_min = stream->timing.v_total; 869 in_out_vrr->adjust.v_total_max = stream->timing.v_total; 870 } else if (in_out_vrr->state == VRR_STATE_DISABLED) { 871 in_out_vrr->adjust.v_total_min = stream->timing.v_total; 872 in_out_vrr->adjust.v_total_max = stream->timing.v_total; 873 } else if (in_out_vrr->state == VRR_STATE_INACTIVE) { 874 in_out_vrr->adjust.v_total_min = stream->timing.v_total; 875 in_out_vrr->adjust.v_total_max = stream->timing.v_total; 876 } else if (in_out_vrr->state == VRR_STATE_ACTIVE_VARIABLE && 877 refresh_range >= MIN_REFRESH_RANGE_IN_US) { 878 in_out_vrr->adjust.v_total_min = 879 calc_v_total_from_refresh(stream, 880 in_out_vrr->max_refresh_in_uhz); 881 in_out_vrr->adjust.v_total_max = 882 calc_v_total_from_refresh(stream, 883 in_out_vrr->min_refresh_in_uhz); 884 } else if (in_out_vrr->state == VRR_STATE_ACTIVE_FIXED) { 885 in_out_vrr->fixed.target_refresh_in_uhz = 886 in_out_vrr->min_refresh_in_uhz; 887 if (in_out_vrr->fixed.ramping_active && 888 in_out_vrr->fixed.fixed_active) { 889 /* Do not update vtotals if ramping is already active 890 * in order to continue ramp from current refresh. 891 */ 892 in_out_vrr->fixed.fixed_active = true; 893 } else { 894 in_out_vrr->fixed.fixed_active = true; 895 in_out_vrr->adjust.v_total_min = 896 calc_v_total_from_refresh(stream, 897 in_out_vrr->fixed.target_refresh_in_uhz); 898 in_out_vrr->adjust.v_total_max = 899 in_out_vrr->adjust.v_total_min; 900 } 901 } else { 902 in_out_vrr->state = VRR_STATE_INACTIVE; 903 in_out_vrr->adjust.v_total_min = stream->timing.v_total; 904 in_out_vrr->adjust.v_total_max = stream->timing.v_total; 905 } 906 } 907 908 void mod_freesync_handle_preflip(struct mod_freesync *mod_freesync, 909 const struct dc_plane_state *plane, 910 const struct dc_stream_state *stream, 911 unsigned int curr_time_stamp_in_us, 912 struct mod_vrr_params *in_out_vrr) 913 { 914 struct core_freesync *core_freesync = NULL; 915 unsigned int last_render_time_in_us = 0; 916 unsigned int average_render_time_in_us = 0; 917 918 if (mod_freesync == NULL) 919 return; 920 921 core_freesync = MOD_FREESYNC_TO_CORE(mod_freesync); 922 923 if (in_out_vrr->supported && 924 in_out_vrr->state == VRR_STATE_ACTIVE_VARIABLE) { 925 unsigned int i = 0; 926 unsigned int oldest_index = plane->time.index + 1; 927 928 if (oldest_index >= DC_PLANE_UPDATE_TIMES_MAX) 929 oldest_index = 0; 930 931 last_render_time_in_us = curr_time_stamp_in_us - 932 plane->time.prev_update_time_in_us; 933 934 // Sum off all entries except oldest one 935 for (i = 0; i < DC_PLANE_UPDATE_TIMES_MAX; i++) { 936 average_render_time_in_us += 937 plane->time.time_elapsed_in_us[i]; 938 } 939 average_render_time_in_us -= 940 plane->time.time_elapsed_in_us[oldest_index]; 941 942 // Add render time for current flip 943 average_render_time_in_us += last_render_time_in_us; 944 average_render_time_in_us /= DC_PLANE_UPDATE_TIMES_MAX; 945 946 if (in_out_vrr->btr.btr_enabled) { 947 apply_below_the_range(core_freesync, 948 stream, 949 last_render_time_in_us, 950 in_out_vrr); 951 } else { 952 apply_fixed_refresh(core_freesync, 953 stream, 954 last_render_time_in_us, 955 in_out_vrr); 956 } 957 958 } 959 } 960 961 void mod_freesync_handle_v_update(struct mod_freesync *mod_freesync, 962 const struct dc_stream_state *stream, 963 struct mod_vrr_params *in_out_vrr) 964 { 965 struct core_freesync *core_freesync = NULL; 966 967 if ((mod_freesync == NULL) || (stream == NULL) || (in_out_vrr == NULL)) 968 return; 969 970 core_freesync = MOD_FREESYNC_TO_CORE(mod_freesync); 971 972 if (in_out_vrr->supported == false) 973 return; 974 975 /* Below the Range Logic */ 976 977 /* Only execute if in fullscreen mode */ 978 if (in_out_vrr->state == VRR_STATE_ACTIVE_VARIABLE && 979 in_out_vrr->btr.btr_active) { 980 /* TODO: pass in flag for Pre-DCE12 ASIC 981 * in order for frame variable duration to take affect, 982 * it needs to be done one VSYNC early, which is at 983 * frameCounter == 1. 984 * For DCE12 and newer updates to V_TOTAL_MIN/MAX 985 * will take affect on current frame 986 */ 987 if (in_out_vrr->btr.frames_to_insert == 988 in_out_vrr->btr.frame_counter) { 989 in_out_vrr->adjust.v_total_min = 990 calc_v_total_from_duration(stream, 991 in_out_vrr, 992 in_out_vrr->btr.inserted_duration_in_us); 993 in_out_vrr->adjust.v_total_max = 994 in_out_vrr->adjust.v_total_min; 995 } 996 997 if (in_out_vrr->btr.frame_counter > 0) 998 in_out_vrr->btr.frame_counter--; 999 1000 /* Restore FreeSync */ 1001 if (in_out_vrr->btr.frame_counter == 0) { 1002 in_out_vrr->adjust.v_total_min = 1003 calc_v_total_from_refresh(stream, 1004 in_out_vrr->max_refresh_in_uhz); 1005 in_out_vrr->adjust.v_total_max = 1006 calc_v_total_from_refresh(stream, 1007 in_out_vrr->min_refresh_in_uhz); 1008 } 1009 } 1010 1011 /* If in fullscreen freesync mode or in video, do not program 1012 * static screen ramp values 1013 */ 1014 if (in_out_vrr->state == VRR_STATE_ACTIVE_VARIABLE) 1015 in_out_vrr->fixed.ramping_active = false; 1016 1017 /* Gradual Static Screen Ramping Logic */ 1018 /* Execute if ramp is active and user enabled freesync static screen*/ 1019 if (in_out_vrr->state == VRR_STATE_ACTIVE_FIXED && 1020 in_out_vrr->fixed.ramping_active) { 1021 update_v_total_for_static_ramp( 1022 core_freesync, stream, in_out_vrr); 1023 } 1024 } 1025 1026 void mod_freesync_get_settings(struct mod_freesync *mod_freesync, 1027 const struct mod_vrr_params *vrr, 1028 unsigned int *v_total_min, unsigned int *v_total_max, 1029 unsigned int *event_triggers, 1030 unsigned int *window_min, unsigned int *window_max, 1031 unsigned int *lfc_mid_point_in_us, 1032 unsigned int *inserted_frames, 1033 unsigned int *inserted_duration_in_us) 1034 { 1035 struct core_freesync *core_freesync = NULL; 1036 1037 if (mod_freesync == NULL) 1038 return; 1039 1040 core_freesync = MOD_FREESYNC_TO_CORE(mod_freesync); 1041 1042 if (vrr->supported) { 1043 *v_total_min = vrr->adjust.v_total_min; 1044 *v_total_max = vrr->adjust.v_total_max; 1045 *event_triggers = 0; 1046 *lfc_mid_point_in_us = vrr->btr.mid_point_in_us; 1047 *inserted_frames = vrr->btr.frames_to_insert; 1048 *inserted_duration_in_us = vrr->btr.inserted_duration_in_us; 1049 } 1050 } 1051 1052 unsigned long long mod_freesync_calc_nominal_field_rate( 1053 const struct dc_stream_state *stream) 1054 { 1055 unsigned long long nominal_field_rate_in_uhz = 0; 1056 1057 /* Calculate nominal field rate for stream */ 1058 nominal_field_rate_in_uhz = stream->timing.pix_clk_100hz / 10; 1059 nominal_field_rate_in_uhz *= 1000ULL * 1000ULL * 1000ULL; 1060 nominal_field_rate_in_uhz = div_u64(nominal_field_rate_in_uhz, 1061 stream->timing.h_total); 1062 nominal_field_rate_in_uhz = div_u64(nominal_field_rate_in_uhz, 1063 stream->timing.v_total); 1064 1065 return nominal_field_rate_in_uhz; 1066 } 1067 1068 bool mod_freesync_is_valid_range(struct mod_freesync *mod_freesync, 1069 const struct dc_stream_state *stream, 1070 uint32_t min_refresh_cap_in_uhz, 1071 uint32_t max_refresh_cap_in_uhz, 1072 uint32_t min_refresh_request_in_uhz, 1073 uint32_t max_refresh_request_in_uhz) 1074 { 1075 /* Calculate nominal field rate for stream */ 1076 unsigned long long nominal_field_rate_in_uhz = 1077 mod_freesync_calc_nominal_field_rate(stream); 1078 1079 /* Typically nominal refresh calculated can have some fractional part. 1080 * Allow for some rounding error of actual video timing by taking floor 1081 * of caps and request. Round the nominal refresh rate. 1082 * 1083 * Dividing will convert everything to units in Hz although input 1084 * variable name is in uHz! 1085 * 1086 * Also note, this takes care of rounding error on the nominal refresh 1087 * so by rounding error we only expect it to be off by a small amount, 1088 * such as < 0.1 Hz. i.e. 143.9xxx or 144.1xxx. 1089 * 1090 * Example 1. Caps Min = 40 Hz, Max = 144 Hz 1091 * Request Min = 40 Hz, Max = 144 Hz 1092 * Nominal = 143.5x Hz rounded to 144 Hz 1093 * This function should allow this as valid request 1094 * 1095 * Example 2. Caps Min = 40 Hz, Max = 144 Hz 1096 * Request Min = 40 Hz, Max = 144 Hz 1097 * Nominal = 144.4x Hz rounded to 144 Hz 1098 * This function should allow this as valid request 1099 * 1100 * Example 3. Caps Min = 40 Hz, Max = 144 Hz 1101 * Request Min = 40 Hz, Max = 144 Hz 1102 * Nominal = 120.xx Hz rounded to 120 Hz 1103 * This function should return NOT valid since the requested 1104 * max is greater than current timing's nominal 1105 * 1106 * Example 4. Caps Min = 40 Hz, Max = 120 Hz 1107 * Request Min = 40 Hz, Max = 120 Hz 1108 * Nominal = 144.xx Hz rounded to 144 Hz 1109 * This function should return NOT valid since the nominal 1110 * is greater than the capability's max refresh 1111 */ 1112 nominal_field_rate_in_uhz = 1113 div_u64(nominal_field_rate_in_uhz + 500000, 1000000); 1114 min_refresh_cap_in_uhz /= 1000000; 1115 max_refresh_cap_in_uhz /= 1000000; 1116 min_refresh_request_in_uhz /= 1000000; 1117 max_refresh_request_in_uhz /= 1000000; 1118 1119 // Check nominal is within range 1120 if (nominal_field_rate_in_uhz > max_refresh_cap_in_uhz || 1121 nominal_field_rate_in_uhz < min_refresh_cap_in_uhz) 1122 return false; 1123 1124 // If nominal is less than max, limit the max allowed refresh rate 1125 if (nominal_field_rate_in_uhz < max_refresh_cap_in_uhz) 1126 max_refresh_cap_in_uhz = nominal_field_rate_in_uhz; 1127 1128 // Don't allow min > max 1129 if (min_refresh_request_in_uhz > max_refresh_request_in_uhz) 1130 return false; 1131 1132 // Check min is within range 1133 if (min_refresh_request_in_uhz > max_refresh_cap_in_uhz || 1134 min_refresh_request_in_uhz < min_refresh_cap_in_uhz) 1135 return false; 1136 1137 // Check max is within range 1138 if (max_refresh_request_in_uhz > max_refresh_cap_in_uhz || 1139 max_refresh_request_in_uhz < min_refresh_cap_in_uhz) 1140 return false; 1141 1142 // For variable range, check for at least 10 Hz range 1143 if ((max_refresh_request_in_uhz != min_refresh_request_in_uhz) && 1144 (max_refresh_request_in_uhz - min_refresh_request_in_uhz < 10)) 1145 return false; 1146 1147 return true; 1148 } 1149 1150