1 /* 2 * Copyright 2016 Advanced Micro Devices, Inc. 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice shall be included in 12 * all copies or substantial portions of the Software. 13 * 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 20 * OTHER DEALINGS IN THE SOFTWARE. 21 * 22 * Authors: AMD 23 * 24 */ 25 26 #include <linux/slab.h> 27 28 #include "dm_services.h" 29 #include "dc.h" 30 #include "mod_freesync.h" 31 #include "core_types.h" 32 33 #define MOD_FREESYNC_MAX_CONCURRENT_STREAMS 32 34 35 #define MIN_REFRESH_RANGE 10 36 /* Refresh rate ramp at a fixed rate of 65 Hz/second */ 37 #define STATIC_SCREEN_RAMP_DELTA_REFRESH_RATE_PER_FRAME ((1000 / 60) * 65) 38 /* Number of elements in the render times cache array */ 39 #define RENDER_TIMES_MAX_COUNT 10 40 /* Threshold to exit/exit BTR (to avoid frequent enter-exits at the lower limit) */ 41 #define BTR_MAX_MARGIN 2500 42 /* Threshold to change BTR multiplier (to avoid frequent changes) */ 43 #define BTR_DRIFT_MARGIN 2000 44 /*Threshold to exit fixed refresh rate*/ 45 #define FIXED_REFRESH_EXIT_MARGIN_IN_HZ 4 46 /* Number of consecutive frames to check before entering/exiting fixed refresh*/ 47 #define FIXED_REFRESH_ENTER_FRAME_COUNT 5 48 #define FIXED_REFRESH_EXIT_FRAME_COUNT 5 49 50 struct core_freesync { 51 struct mod_freesync public; 52 struct dc *dc; 53 }; 54 55 #define MOD_FREESYNC_TO_CORE(mod_freesync)\ 56 container_of(mod_freesync, struct core_freesync, public) 57 58 struct mod_freesync *mod_freesync_create(struct dc *dc) 59 { 60 struct core_freesync *core_freesync = 61 kzalloc(sizeof(struct core_freesync), GFP_KERNEL); 62 63 if (core_freesync == NULL) 64 goto fail_alloc_context; 65 66 if (dc == NULL) 67 goto fail_construct; 68 69 core_freesync->dc = dc; 70 return &core_freesync->public; 71 72 fail_construct: 73 kfree(core_freesync); 74 75 fail_alloc_context: 76 return NULL; 77 } 78 79 void mod_freesync_destroy(struct mod_freesync *mod_freesync) 80 { 81 struct core_freesync *core_freesync = NULL; 82 if (mod_freesync == NULL) 83 return; 84 core_freesync = MOD_FREESYNC_TO_CORE(mod_freesync); 85 kfree(core_freesync); 86 } 87 88 #if 0 /* unused currently */ 89 static unsigned int calc_refresh_in_uhz_from_duration( 90 unsigned int duration_in_ns) 91 { 92 unsigned int refresh_in_uhz = 93 ((unsigned int)(div64_u64((1000000000ULL * 1000000), 94 duration_in_ns))); 95 return refresh_in_uhz; 96 } 97 #endif 98 99 static unsigned int calc_duration_in_us_from_refresh_in_uhz( 100 unsigned int refresh_in_uhz) 101 { 102 unsigned int duration_in_us = 103 ((unsigned int)(div64_u64((1000000000ULL * 1000), 104 refresh_in_uhz))); 105 return duration_in_us; 106 } 107 108 static unsigned int calc_duration_in_us_from_v_total( 109 const struct dc_stream_state *stream, 110 const struct mod_vrr_params *in_vrr, 111 unsigned int v_total) 112 { 113 unsigned int duration_in_us = 114 (unsigned int)(div64_u64(((unsigned long long)(v_total) 115 * 10000) * stream->timing.h_total, 116 stream->timing.pix_clk_100hz)); 117 118 return duration_in_us; 119 } 120 121 static unsigned int calc_v_total_from_refresh( 122 const struct dc_stream_state *stream, 123 unsigned int refresh_in_uhz) 124 { 125 unsigned int v_total; 126 unsigned int frame_duration_in_ns; 127 128 frame_duration_in_ns = 129 ((unsigned int)(div64_u64((1000000000ULL * 1000000), 130 refresh_in_uhz))); 131 132 v_total = div64_u64(div64_u64(((unsigned long long)( 133 frame_duration_in_ns) * (stream->timing.pix_clk_100hz / 10)), 134 stream->timing.h_total), 1000000); 135 136 /* v_total cannot be less than nominal */ 137 if (v_total < stream->timing.v_total) { 138 ASSERT(v_total < stream->timing.v_total); 139 v_total = stream->timing.v_total; 140 } 141 142 return v_total; 143 } 144 145 static unsigned int calc_v_total_from_duration( 146 const struct dc_stream_state *stream, 147 const struct mod_vrr_params *vrr, 148 unsigned int duration_in_us) 149 { 150 unsigned int v_total = 0; 151 152 if (duration_in_us < vrr->min_duration_in_us) 153 duration_in_us = vrr->min_duration_in_us; 154 155 if (duration_in_us > vrr->max_duration_in_us) 156 duration_in_us = vrr->max_duration_in_us; 157 158 v_total = div64_u64(div64_u64(((unsigned long long)( 159 duration_in_us) * (stream->timing.pix_clk_100hz / 10)), 160 stream->timing.h_total), 1000); 161 162 /* v_total cannot be less than nominal */ 163 if (v_total < stream->timing.v_total) { 164 ASSERT(v_total < stream->timing.v_total); 165 v_total = stream->timing.v_total; 166 } 167 168 return v_total; 169 } 170 171 static void update_v_total_for_static_ramp( 172 struct core_freesync *core_freesync, 173 const struct dc_stream_state *stream, 174 struct mod_vrr_params *in_out_vrr) 175 { 176 unsigned int v_total = 0; 177 unsigned int current_duration_in_us = 178 calc_duration_in_us_from_v_total( 179 stream, in_out_vrr, 180 in_out_vrr->adjust.v_total_max); 181 unsigned int target_duration_in_us = 182 calc_duration_in_us_from_refresh_in_uhz( 183 in_out_vrr->fixed.target_refresh_in_uhz); 184 bool ramp_direction_is_up = (current_duration_in_us > 185 target_duration_in_us) ? true : false; 186 187 /* Calc ratio between new and current frame duration with 3 digit */ 188 unsigned int frame_duration_ratio = div64_u64(1000000, 189 (1000 + div64_u64(((unsigned long long)( 190 STATIC_SCREEN_RAMP_DELTA_REFRESH_RATE_PER_FRAME) * 191 current_duration_in_us), 192 1000000))); 193 194 /* Calculate delta between new and current frame duration in us */ 195 unsigned int frame_duration_delta = div64_u64(((unsigned long long)( 196 current_duration_in_us) * 197 (1000 - frame_duration_ratio)), 1000); 198 199 /* Adjust frame duration delta based on ratio between current and 200 * standard frame duration (frame duration at 60 Hz refresh rate). 201 */ 202 unsigned int ramp_rate_interpolated = div64_u64(((unsigned long long)( 203 frame_duration_delta) * current_duration_in_us), 16666); 204 205 /* Going to a higher refresh rate (lower frame duration) */ 206 if (ramp_direction_is_up) { 207 /* reduce frame duration */ 208 current_duration_in_us -= ramp_rate_interpolated; 209 210 /* adjust for frame duration below min */ 211 if (current_duration_in_us <= target_duration_in_us) { 212 in_out_vrr->fixed.ramping_active = false; 213 in_out_vrr->fixed.ramping_done = true; 214 current_duration_in_us = 215 calc_duration_in_us_from_refresh_in_uhz( 216 in_out_vrr->fixed.target_refresh_in_uhz); 217 } 218 /* Going to a lower refresh rate (larger frame duration) */ 219 } else { 220 /* increase frame duration */ 221 current_duration_in_us += ramp_rate_interpolated; 222 223 /* adjust for frame duration above max */ 224 if (current_duration_in_us >= target_duration_in_us) { 225 in_out_vrr->fixed.ramping_active = false; 226 in_out_vrr->fixed.ramping_done = true; 227 current_duration_in_us = 228 calc_duration_in_us_from_refresh_in_uhz( 229 in_out_vrr->fixed.target_refresh_in_uhz); 230 } 231 } 232 233 v_total = div64_u64(div64_u64(((unsigned long long)( 234 current_duration_in_us) * (stream->timing.pix_clk_100hz / 10)), 235 stream->timing.h_total), 1000); 236 237 /* v_total cannot be less than nominal */ 238 if (v_total < stream->timing.v_total) 239 v_total = stream->timing.v_total; 240 241 in_out_vrr->adjust.v_total_min = v_total; 242 in_out_vrr->adjust.v_total_max = v_total; 243 } 244 245 static void apply_below_the_range(struct core_freesync *core_freesync, 246 const struct dc_stream_state *stream, 247 unsigned int last_render_time_in_us, 248 struct mod_vrr_params *in_out_vrr) 249 { 250 unsigned int inserted_frame_duration_in_us = 0; 251 unsigned int mid_point_frames_ceil = 0; 252 unsigned int mid_point_frames_floor = 0; 253 unsigned int frame_time_in_us = 0; 254 unsigned int delta_from_mid_point_in_us_1 = 0xFFFFFFFF; 255 unsigned int delta_from_mid_point_in_us_2 = 0xFFFFFFFF; 256 unsigned int frames_to_insert = 0; 257 unsigned int delta_from_mid_point_delta_in_us; 258 unsigned int max_render_time_in_us = 259 in_out_vrr->max_duration_in_us - in_out_vrr->btr.margin_in_us; 260 261 /* Program BTR */ 262 if ((last_render_time_in_us + in_out_vrr->btr.margin_in_us / 2) < max_render_time_in_us) { 263 /* Exit Below the Range */ 264 if (in_out_vrr->btr.btr_active) { 265 in_out_vrr->btr.frame_counter = 0; 266 in_out_vrr->btr.btr_active = false; 267 } 268 } else if (last_render_time_in_us > (max_render_time_in_us + in_out_vrr->btr.margin_in_us / 2)) { 269 /* Enter Below the Range */ 270 if (!in_out_vrr->btr.btr_active) { 271 in_out_vrr->btr.btr_active = true; 272 } 273 } 274 275 /* BTR set to "not active" so disengage */ 276 if (!in_out_vrr->btr.btr_active) { 277 in_out_vrr->btr.inserted_duration_in_us = 0; 278 in_out_vrr->btr.frames_to_insert = 0; 279 in_out_vrr->btr.frame_counter = 0; 280 281 /* Restore FreeSync */ 282 in_out_vrr->adjust.v_total_min = 283 calc_v_total_from_refresh(stream, 284 in_out_vrr->max_refresh_in_uhz); 285 in_out_vrr->adjust.v_total_max = 286 calc_v_total_from_refresh(stream, 287 in_out_vrr->min_refresh_in_uhz); 288 /* BTR set to "active" so engage */ 289 } else { 290 291 /* Calculate number of midPoint frames that could fit within 292 * the render time interval- take ceil of this value 293 */ 294 mid_point_frames_ceil = (last_render_time_in_us + 295 in_out_vrr->btr.mid_point_in_us - 1) / 296 in_out_vrr->btr.mid_point_in_us; 297 298 if (mid_point_frames_ceil > 0) { 299 frame_time_in_us = last_render_time_in_us / 300 mid_point_frames_ceil; 301 delta_from_mid_point_in_us_1 = 302 (in_out_vrr->btr.mid_point_in_us > 303 frame_time_in_us) ? 304 (in_out_vrr->btr.mid_point_in_us - frame_time_in_us) : 305 (frame_time_in_us - in_out_vrr->btr.mid_point_in_us); 306 } 307 308 /* Calculate number of midPoint frames that could fit within 309 * the render time interval- take floor of this value 310 */ 311 mid_point_frames_floor = last_render_time_in_us / 312 in_out_vrr->btr.mid_point_in_us; 313 314 if (mid_point_frames_floor > 0) { 315 316 frame_time_in_us = last_render_time_in_us / 317 mid_point_frames_floor; 318 delta_from_mid_point_in_us_2 = 319 (in_out_vrr->btr.mid_point_in_us > 320 frame_time_in_us) ? 321 (in_out_vrr->btr.mid_point_in_us - frame_time_in_us) : 322 (frame_time_in_us - in_out_vrr->btr.mid_point_in_us); 323 } 324 325 /* Choose number of frames to insert based on how close it 326 * can get to the mid point of the variable range. 327 */ 328 if ((frame_time_in_us / mid_point_frames_ceil) > in_out_vrr->min_duration_in_us && 329 (delta_from_mid_point_in_us_1 < delta_from_mid_point_in_us_2 || 330 mid_point_frames_floor < 2)) { 331 frames_to_insert = mid_point_frames_ceil; 332 delta_from_mid_point_delta_in_us = delta_from_mid_point_in_us_2 - 333 delta_from_mid_point_in_us_1; 334 } else { 335 frames_to_insert = mid_point_frames_floor; 336 delta_from_mid_point_delta_in_us = delta_from_mid_point_in_us_1 - 337 delta_from_mid_point_in_us_2; 338 } 339 340 /* Prefer current frame multiplier when BTR is enabled unless it drifts 341 * too far from the midpoint 342 */ 343 if (in_out_vrr->btr.frames_to_insert != 0 && 344 delta_from_mid_point_delta_in_us < BTR_DRIFT_MARGIN) { 345 if (((last_render_time_in_us / in_out_vrr->btr.frames_to_insert) < 346 max_render_time_in_us) && 347 ((last_render_time_in_us / in_out_vrr->btr.frames_to_insert) > 348 in_out_vrr->min_duration_in_us)) 349 frames_to_insert = in_out_vrr->btr.frames_to_insert; 350 } 351 352 /* Either we've calculated the number of frames to insert, 353 * or we need to insert min duration frames 354 */ 355 if (last_render_time_in_us / frames_to_insert < 356 in_out_vrr->min_duration_in_us){ 357 frames_to_insert -= (frames_to_insert > 1) ? 358 1 : 0; 359 } 360 361 if (frames_to_insert > 0) 362 inserted_frame_duration_in_us = last_render_time_in_us / 363 frames_to_insert; 364 365 if (inserted_frame_duration_in_us < in_out_vrr->min_duration_in_us) 366 inserted_frame_duration_in_us = in_out_vrr->min_duration_in_us; 367 368 /* Cache the calculated variables */ 369 in_out_vrr->btr.inserted_duration_in_us = 370 inserted_frame_duration_in_us; 371 in_out_vrr->btr.frames_to_insert = frames_to_insert; 372 in_out_vrr->btr.frame_counter = frames_to_insert; 373 } 374 } 375 376 static void apply_fixed_refresh(struct core_freesync *core_freesync, 377 const struct dc_stream_state *stream, 378 unsigned int last_render_time_in_us, 379 struct mod_vrr_params *in_out_vrr) 380 { 381 bool update = false; 382 unsigned int max_render_time_in_us = in_out_vrr->max_duration_in_us; 383 384 /* Compute the exit refresh rate and exit frame duration */ 385 unsigned int exit_refresh_rate_in_milli_hz = ((1000000000/max_render_time_in_us) 386 + (1000*FIXED_REFRESH_EXIT_MARGIN_IN_HZ)); 387 unsigned int exit_frame_duration_in_us = 1000000000/exit_refresh_rate_in_milli_hz; 388 389 if (last_render_time_in_us < exit_frame_duration_in_us) { 390 /* Exit Fixed Refresh mode */ 391 if (in_out_vrr->fixed.fixed_active) { 392 in_out_vrr->fixed.frame_counter++; 393 394 if (in_out_vrr->fixed.frame_counter > 395 FIXED_REFRESH_EXIT_FRAME_COUNT) { 396 in_out_vrr->fixed.frame_counter = 0; 397 in_out_vrr->fixed.fixed_active = false; 398 in_out_vrr->fixed.target_refresh_in_uhz = 0; 399 update = true; 400 } 401 } 402 } else if (last_render_time_in_us > max_render_time_in_us) { 403 /* Enter Fixed Refresh mode */ 404 if (!in_out_vrr->fixed.fixed_active) { 405 in_out_vrr->fixed.frame_counter++; 406 407 if (in_out_vrr->fixed.frame_counter > 408 FIXED_REFRESH_ENTER_FRAME_COUNT) { 409 in_out_vrr->fixed.frame_counter = 0; 410 in_out_vrr->fixed.fixed_active = true; 411 in_out_vrr->fixed.target_refresh_in_uhz = 412 in_out_vrr->max_refresh_in_uhz; 413 update = true; 414 } 415 } 416 } 417 418 if (update) { 419 if (in_out_vrr->fixed.fixed_active) { 420 in_out_vrr->adjust.v_total_min = 421 calc_v_total_from_refresh( 422 stream, in_out_vrr->max_refresh_in_uhz); 423 in_out_vrr->adjust.v_total_max = 424 in_out_vrr->adjust.v_total_min; 425 } else { 426 in_out_vrr->adjust.v_total_min = 427 calc_v_total_from_refresh(stream, 428 in_out_vrr->max_refresh_in_uhz); 429 in_out_vrr->adjust.v_total_max = 430 calc_v_total_from_refresh(stream, 431 in_out_vrr->min_refresh_in_uhz); 432 } 433 } 434 } 435 436 static bool vrr_settings_require_update(struct core_freesync *core_freesync, 437 struct mod_freesync_config *in_config, 438 unsigned int min_refresh_in_uhz, 439 unsigned int max_refresh_in_uhz, 440 struct mod_vrr_params *in_vrr) 441 { 442 if (in_vrr->state != in_config->state) { 443 return true; 444 } else if (in_vrr->state == VRR_STATE_ACTIVE_FIXED && 445 in_vrr->fixed.target_refresh_in_uhz != 446 in_config->fixed_refresh_in_uhz) { 447 return true; 448 } else if (in_vrr->min_refresh_in_uhz != min_refresh_in_uhz) { 449 return true; 450 } else if (in_vrr->max_refresh_in_uhz != max_refresh_in_uhz) { 451 return true; 452 } 453 454 return false; 455 } 456 457 bool mod_freesync_get_vmin_vmax(struct mod_freesync *mod_freesync, 458 const struct dc_stream_state *stream, 459 unsigned int *vmin, 460 unsigned int *vmax) 461 { 462 *vmin = stream->adjust.v_total_min; 463 *vmax = stream->adjust.v_total_max; 464 465 return true; 466 } 467 468 bool mod_freesync_get_v_position(struct mod_freesync *mod_freesync, 469 struct dc_stream_state *stream, 470 unsigned int *nom_v_pos, 471 unsigned int *v_pos) 472 { 473 struct core_freesync *core_freesync = NULL; 474 struct crtc_position position; 475 476 if (mod_freesync == NULL) 477 return false; 478 479 core_freesync = MOD_FREESYNC_TO_CORE(mod_freesync); 480 481 if (dc_stream_get_crtc_position(core_freesync->dc, &stream, 1, 482 &position.vertical_count, 483 &position.nominal_vcount)) { 484 485 *nom_v_pos = position.nominal_vcount; 486 *v_pos = position.vertical_count; 487 488 return true; 489 } 490 491 return false; 492 } 493 494 static void build_vrr_infopacket_data_v1(const struct mod_vrr_params *vrr, 495 struct dc_info_packet *infopacket) 496 { 497 /* PB1 = 0x1A (24bit AMD IEEE OUI (0x00001A) - Byte 0) */ 498 infopacket->sb[1] = 0x1A; 499 500 /* PB2 = 0x00 (24bit AMD IEEE OUI (0x00001A) - Byte 1) */ 501 infopacket->sb[2] = 0x00; 502 503 /* PB3 = 0x00 (24bit AMD IEEE OUI (0x00001A) - Byte 2) */ 504 infopacket->sb[3] = 0x00; 505 506 /* PB4 = Reserved */ 507 508 /* PB5 = Reserved */ 509 510 /* PB6 = [Bits 7:3 = Reserved] */ 511 512 /* PB6 = [Bit 0 = FreeSync Supported] */ 513 if (vrr->state != VRR_STATE_UNSUPPORTED) 514 infopacket->sb[6] |= 0x01; 515 516 /* PB6 = [Bit 1 = FreeSync Enabled] */ 517 if (vrr->state != VRR_STATE_DISABLED && 518 vrr->state != VRR_STATE_UNSUPPORTED) 519 infopacket->sb[6] |= 0x02; 520 521 /* PB6 = [Bit 2 = FreeSync Active] */ 522 if (vrr->state == VRR_STATE_ACTIVE_VARIABLE || 523 vrr->state == VRR_STATE_ACTIVE_FIXED) 524 infopacket->sb[6] |= 0x04; 525 526 // For v1 & 2 infoframes program nominal if non-fs mode, otherwise full range 527 /* PB7 = FreeSync Minimum refresh rate (Hz) */ 528 if (vrr->state == VRR_STATE_ACTIVE_VARIABLE || 529 vrr->state == VRR_STATE_ACTIVE_FIXED) { 530 infopacket->sb[7] = (unsigned char)((vrr->min_refresh_in_uhz + 500000) / 1000000); 531 } else { 532 infopacket->sb[7] = (unsigned char)((vrr->max_refresh_in_uhz + 500000) / 1000000); 533 } 534 535 /* PB8 = FreeSync Maximum refresh rate (Hz) 536 * Note: We should never go above the field rate of the mode timing set. 537 */ 538 infopacket->sb[8] = (unsigned char)((vrr->max_refresh_in_uhz + 500000) / 1000000); 539 540 //FreeSync HDR 541 infopacket->sb[9] = 0; 542 infopacket->sb[10] = 0; 543 } 544 545 static void build_vrr_infopacket_data_v3(const struct mod_vrr_params *vrr, 546 struct dc_info_packet *infopacket) 547 { 548 /* PB1 = 0x1A (24bit AMD IEEE OUI (0x00001A) - Byte 0) */ 549 infopacket->sb[1] = 0x1A; 550 551 /* PB2 = 0x00 (24bit AMD IEEE OUI (0x00001A) - Byte 1) */ 552 infopacket->sb[2] = 0x00; 553 554 /* PB3 = 0x00 (24bit AMD IEEE OUI (0x00001A) - Byte 2) */ 555 infopacket->sb[3] = 0x00; 556 557 /* PB4 = Reserved */ 558 559 /* PB5 = Reserved */ 560 561 /* PB6 = [Bits 7:3 = Reserved] */ 562 563 /* PB6 = [Bit 0 = FreeSync Supported] */ 564 if (vrr->state != VRR_STATE_UNSUPPORTED) 565 infopacket->sb[6] |= 0x01; 566 567 /* PB6 = [Bit 1 = FreeSync Enabled] */ 568 if (vrr->state != VRR_STATE_DISABLED && 569 vrr->state != VRR_STATE_UNSUPPORTED) 570 infopacket->sb[6] |= 0x02; 571 572 /* PB6 = [Bit 2 = FreeSync Active] */ 573 if (vrr->state == VRR_STATE_ACTIVE_VARIABLE || 574 vrr->state == VRR_STATE_ACTIVE_FIXED) 575 infopacket->sb[6] |= 0x04; 576 577 if (vrr->state == VRR_STATE_ACTIVE_FIXED) { 578 /* PB7 = FreeSync Minimum refresh rate (Hz) */ 579 infopacket->sb[7] = (unsigned char)((vrr->fixed_refresh_in_uhz + 500000) / 1000000); 580 /* PB8 = FreeSync Maximum refresh rate (Hz) */ 581 infopacket->sb[8] = (unsigned char)((vrr->fixed_refresh_in_uhz + 500000) / 1000000); 582 } else if (vrr->state == VRR_STATE_ACTIVE_VARIABLE) { 583 /* PB7 = FreeSync Minimum refresh rate (Hz) */ 584 infopacket->sb[7] = (unsigned char)((vrr->min_refresh_in_uhz + 500000) / 1000000); 585 /* PB8 = FreeSync Maximum refresh rate (Hz) */ 586 infopacket->sb[8] = (unsigned char)((vrr->max_refresh_in_uhz + 500000) / 1000000); 587 } else { 588 // Non-fs case, program nominal range 589 /* PB7 = FreeSync Minimum refresh rate (Hz) */ 590 infopacket->sb[7] = (unsigned char)((vrr->max_refresh_in_uhz + 500000) / 1000000); 591 /* PB8 = FreeSync Maximum refresh rate (Hz) */ 592 infopacket->sb[8] = (unsigned char)((vrr->max_refresh_in_uhz + 500000) / 1000000); 593 } 594 595 //FreeSync HDR 596 infopacket->sb[9] = 0; 597 infopacket->sb[10] = 0; 598 } 599 600 static void build_vrr_infopacket_fs2_data(enum color_transfer_func app_tf, 601 struct dc_info_packet *infopacket) 602 { 603 if (app_tf != TRANSFER_FUNC_UNKNOWN) { 604 infopacket->valid = true; 605 606 infopacket->sb[6] |= 0x08; // PB6 = [Bit 3 = Native Color Active] 607 608 if (app_tf == TRANSFER_FUNC_GAMMA_22) { 609 infopacket->sb[9] |= 0x04; // PB6 = [Bit 2 = Gamma 2.2 EOTF Active] 610 } 611 } 612 } 613 614 static void build_vrr_infopacket_header_v1(enum signal_type signal, 615 struct dc_info_packet *infopacket, 616 unsigned int *payload_size) 617 { 618 if (dc_is_hdmi_signal(signal)) { 619 620 /* HEADER */ 621 622 /* HB0 = Packet Type = 0x83 (Source Product 623 * Descriptor InfoFrame) 624 */ 625 infopacket->hb0 = DC_HDMI_INFOFRAME_TYPE_SPD; 626 627 /* HB1 = Version = 0x01 */ 628 infopacket->hb1 = 0x01; 629 630 /* HB2 = [Bits 7:5 = 0] [Bits 4:0 = Length = 0x08] */ 631 infopacket->hb2 = 0x08; 632 633 *payload_size = 0x08; 634 635 } else if (dc_is_dp_signal(signal)) { 636 637 /* HEADER */ 638 639 /* HB0 = Secondary-data Packet ID = 0 - Only non-zero 640 * when used to associate audio related info packets 641 */ 642 infopacket->hb0 = 0x00; 643 644 /* HB1 = Packet Type = 0x83 (Source Product 645 * Descriptor InfoFrame) 646 */ 647 infopacket->hb1 = DC_HDMI_INFOFRAME_TYPE_SPD; 648 649 /* HB2 = [Bits 7:0 = Least significant eight bits - 650 * For INFOFRAME, the value must be 1Bh] 651 */ 652 infopacket->hb2 = 0x1B; 653 654 /* HB3 = [Bits 7:2 = INFOFRAME SDP Version Number = 0x1] 655 * [Bits 1:0 = Most significant two bits = 0x00] 656 */ 657 infopacket->hb3 = 0x04; 658 659 *payload_size = 0x1B; 660 } 661 } 662 663 static void build_vrr_infopacket_header_v2(enum signal_type signal, 664 struct dc_info_packet *infopacket, 665 unsigned int *payload_size) 666 { 667 if (dc_is_hdmi_signal(signal)) { 668 669 /* HEADER */ 670 671 /* HB0 = Packet Type = 0x83 (Source Product 672 * Descriptor InfoFrame) 673 */ 674 infopacket->hb0 = DC_HDMI_INFOFRAME_TYPE_SPD; 675 676 /* HB1 = Version = 0x02 */ 677 infopacket->hb1 = 0x02; 678 679 /* HB2 = [Bits 7:5 = 0] [Bits 4:0 = Length = 0x09] */ 680 infopacket->hb2 = 0x09; 681 682 *payload_size = 0x0A; 683 684 } else if (dc_is_dp_signal(signal)) { 685 686 /* HEADER */ 687 688 /* HB0 = Secondary-data Packet ID = 0 - Only non-zero 689 * when used to associate audio related info packets 690 */ 691 infopacket->hb0 = 0x00; 692 693 /* HB1 = Packet Type = 0x83 (Source Product 694 * Descriptor InfoFrame) 695 */ 696 infopacket->hb1 = DC_HDMI_INFOFRAME_TYPE_SPD; 697 698 /* HB2 = [Bits 7:0 = Least significant eight bits - 699 * For INFOFRAME, the value must be 1Bh] 700 */ 701 infopacket->hb2 = 0x1B; 702 703 /* HB3 = [Bits 7:2 = INFOFRAME SDP Version Number = 0x2] 704 * [Bits 1:0 = Most significant two bits = 0x00] 705 */ 706 infopacket->hb3 = 0x08; 707 708 *payload_size = 0x1B; 709 } 710 } 711 712 static void build_vrr_infopacket_checksum(unsigned int *payload_size, 713 struct dc_info_packet *infopacket) 714 { 715 /* Calculate checksum */ 716 unsigned int idx = 0; 717 unsigned char checksum = 0; 718 719 checksum += infopacket->hb0; 720 checksum += infopacket->hb1; 721 checksum += infopacket->hb2; 722 checksum += infopacket->hb3; 723 724 for (idx = 1; idx <= *payload_size; idx++) 725 checksum += infopacket->sb[idx]; 726 727 /* PB0 = Checksum (one byte complement) */ 728 infopacket->sb[0] = (unsigned char)(0x100 - checksum); 729 730 infopacket->valid = true; 731 } 732 733 static void build_vrr_infopacket_v1(enum signal_type signal, 734 const struct mod_vrr_params *vrr, 735 struct dc_info_packet *infopacket) 736 { 737 /* SPD info packet for FreeSync */ 738 unsigned int payload_size = 0; 739 740 build_vrr_infopacket_header_v1(signal, infopacket, &payload_size); 741 build_vrr_infopacket_data_v1(vrr, infopacket); 742 build_vrr_infopacket_checksum(&payload_size, infopacket); 743 744 infopacket->valid = true; 745 } 746 747 static void build_vrr_infopacket_v2(enum signal_type signal, 748 const struct mod_vrr_params *vrr, 749 enum color_transfer_func app_tf, 750 struct dc_info_packet *infopacket) 751 { 752 unsigned int payload_size = 0; 753 754 build_vrr_infopacket_header_v2(signal, infopacket, &payload_size); 755 build_vrr_infopacket_data_v1(vrr, infopacket); 756 757 build_vrr_infopacket_fs2_data(app_tf, infopacket); 758 759 build_vrr_infopacket_checksum(&payload_size, infopacket); 760 761 infopacket->valid = true; 762 } 763 #ifndef TRIM_FSFT 764 static void build_vrr_infopacket_fast_transport_data( 765 bool ftActive, 766 unsigned int ftOutputRate, 767 struct dc_info_packet *infopacket) 768 { 769 /* PB9 : bit7 - fast transport Active*/ 770 unsigned char activeBit = (ftActive) ? 1 << 7 : 0; 771 772 infopacket->sb[1] &= ~activeBit; //clear bit 773 infopacket->sb[1] |= activeBit; //set bit 774 775 /* PB13 : Target Output Pixel Rate [kHz] - bits 7:0 */ 776 infopacket->sb[13] = ftOutputRate & 0xFF; 777 778 /* PB14 : Target Output Pixel Rate [kHz] - bits 15:8 */ 779 infopacket->sb[14] = (ftOutputRate >> 8) & 0xFF; 780 781 /* PB15 : Target Output Pixel Rate [kHz] - bits 23:16 */ 782 infopacket->sb[15] = (ftOutputRate >> 16) & 0xFF; 783 784 } 785 #endif 786 787 static void build_vrr_infopacket_v3(enum signal_type signal, 788 const struct mod_vrr_params *vrr, 789 #ifndef TRIM_FSFT 790 bool ftActive, unsigned int ftOutputRate, 791 #endif 792 enum color_transfer_func app_tf, 793 struct dc_info_packet *infopacket) 794 { 795 unsigned int payload_size = 0; 796 797 build_vrr_infopacket_header_v2(signal, infopacket, &payload_size); 798 build_vrr_infopacket_data_v3(vrr, infopacket); 799 800 build_vrr_infopacket_fs2_data(app_tf, infopacket); 801 802 #ifndef TRIM_FSFT 803 build_vrr_infopacket_fast_transport_data( 804 ftActive, 805 ftOutputRate, 806 infopacket); 807 #endif 808 809 build_vrr_infopacket_checksum(&payload_size, infopacket); 810 811 infopacket->valid = true; 812 } 813 814 void mod_freesync_build_vrr_infopacket(struct mod_freesync *mod_freesync, 815 const struct dc_stream_state *stream, 816 const struct mod_vrr_params *vrr, 817 enum vrr_packet_type packet_type, 818 enum color_transfer_func app_tf, 819 struct dc_info_packet *infopacket) 820 { 821 /* SPD info packet for FreeSync 822 * VTEM info packet for HdmiVRR 823 * Check if Freesync is supported. Return if false. If true, 824 * set the corresponding bit in the info packet 825 */ 826 if (!vrr->send_info_frame) 827 return; 828 829 switch (packet_type) { 830 case PACKET_TYPE_FS_V3: 831 #ifndef TRIM_FSFT 832 // always populate with pixel rate. 833 build_vrr_infopacket_v3( 834 stream->signal, vrr, 835 stream->timing.flags.FAST_TRANSPORT, 836 (stream->timing.flags.FAST_TRANSPORT) ? 837 stream->timing.fast_transport_output_rate_100hz : 838 stream->timing.pix_clk_100hz, 839 app_tf, infopacket); 840 #else 841 build_vrr_infopacket_v3(stream->signal, vrr, app_tf, infopacket); 842 #endif 843 break; 844 case PACKET_TYPE_FS_V2: 845 build_vrr_infopacket_v2(stream->signal, vrr, app_tf, infopacket); 846 break; 847 case PACKET_TYPE_VRR: 848 case PACKET_TYPE_FS_V1: 849 default: 850 build_vrr_infopacket_v1(stream->signal, vrr, infopacket); 851 } 852 } 853 854 void mod_freesync_build_vrr_params(struct mod_freesync *mod_freesync, 855 const struct dc_stream_state *stream, 856 struct mod_freesync_config *in_config, 857 struct mod_vrr_params *in_out_vrr) 858 { 859 struct core_freesync *core_freesync = NULL; 860 unsigned long long nominal_field_rate_in_uhz = 0; 861 unsigned long long rounded_nominal_in_uhz = 0; 862 unsigned int refresh_range = 0; 863 unsigned long long min_refresh_in_uhz = 0; 864 unsigned long long max_refresh_in_uhz = 0; 865 866 if (mod_freesync == NULL) 867 return; 868 869 core_freesync = MOD_FREESYNC_TO_CORE(mod_freesync); 870 871 /* Calculate nominal field rate for stream */ 872 nominal_field_rate_in_uhz = 873 mod_freesync_calc_nominal_field_rate(stream); 874 875 min_refresh_in_uhz = in_config->min_refresh_in_uhz; 876 max_refresh_in_uhz = in_config->max_refresh_in_uhz; 877 878 // Full range may be larger than current video timing, so cap at nominal 879 if (max_refresh_in_uhz > nominal_field_rate_in_uhz) 880 max_refresh_in_uhz = nominal_field_rate_in_uhz; 881 882 // Full range may be larger than current video timing, so cap at nominal 883 if (min_refresh_in_uhz > max_refresh_in_uhz) 884 min_refresh_in_uhz = max_refresh_in_uhz; 885 886 // If a monitor reports exactly max refresh of 2x of min, enforce it on nominal 887 rounded_nominal_in_uhz = 888 div_u64(nominal_field_rate_in_uhz + 50000, 100000) * 100000; 889 if (in_config->max_refresh_in_uhz == (2 * in_config->min_refresh_in_uhz) && 890 in_config->max_refresh_in_uhz == rounded_nominal_in_uhz) 891 min_refresh_in_uhz = div_u64(nominal_field_rate_in_uhz, 2); 892 893 if (!vrr_settings_require_update(core_freesync, 894 in_config, (unsigned int)min_refresh_in_uhz, (unsigned int)max_refresh_in_uhz, 895 in_out_vrr)) 896 return; 897 898 in_out_vrr->state = in_config->state; 899 in_out_vrr->send_info_frame = in_config->vsif_supported; 900 901 if (in_config->state == VRR_STATE_UNSUPPORTED) { 902 in_out_vrr->state = VRR_STATE_UNSUPPORTED; 903 in_out_vrr->supported = false; 904 in_out_vrr->adjust.v_total_min = stream->timing.v_total; 905 in_out_vrr->adjust.v_total_max = stream->timing.v_total; 906 907 return; 908 909 } else { 910 in_out_vrr->min_refresh_in_uhz = (unsigned int)min_refresh_in_uhz; 911 in_out_vrr->max_duration_in_us = 912 calc_duration_in_us_from_refresh_in_uhz( 913 (unsigned int)min_refresh_in_uhz); 914 915 in_out_vrr->max_refresh_in_uhz = (unsigned int)max_refresh_in_uhz; 916 in_out_vrr->min_duration_in_us = 917 calc_duration_in_us_from_refresh_in_uhz( 918 (unsigned int)max_refresh_in_uhz); 919 920 if (in_config->state == VRR_STATE_ACTIVE_FIXED) 921 in_out_vrr->fixed_refresh_in_uhz = in_config->fixed_refresh_in_uhz; 922 else 923 in_out_vrr->fixed_refresh_in_uhz = 0; 924 925 refresh_range = div_u64(in_out_vrr->max_refresh_in_uhz + 500000, 1000000) - 926 + div_u64(in_out_vrr->min_refresh_in_uhz + 500000, 1000000); 927 928 in_out_vrr->supported = true; 929 } 930 931 in_out_vrr->fixed.ramping_active = in_config->ramping; 932 933 in_out_vrr->btr.btr_enabled = in_config->btr; 934 935 if (in_out_vrr->max_refresh_in_uhz < (2 * in_out_vrr->min_refresh_in_uhz)) 936 in_out_vrr->btr.btr_enabled = false; 937 else { 938 in_out_vrr->btr.margin_in_us = in_out_vrr->max_duration_in_us - 939 2 * in_out_vrr->min_duration_in_us; 940 if (in_out_vrr->btr.margin_in_us > BTR_MAX_MARGIN) 941 in_out_vrr->btr.margin_in_us = BTR_MAX_MARGIN; 942 } 943 944 in_out_vrr->btr.btr_active = false; 945 in_out_vrr->btr.inserted_duration_in_us = 0; 946 in_out_vrr->btr.frames_to_insert = 0; 947 in_out_vrr->btr.frame_counter = 0; 948 in_out_vrr->fixed.fixed_active = false; 949 in_out_vrr->fixed.target_refresh_in_uhz = 0; 950 951 in_out_vrr->btr.mid_point_in_us = 952 (in_out_vrr->min_duration_in_us + 953 in_out_vrr->max_duration_in_us) / 2; 954 955 if (in_out_vrr->state == VRR_STATE_UNSUPPORTED) { 956 in_out_vrr->adjust.v_total_min = stream->timing.v_total; 957 in_out_vrr->adjust.v_total_max = stream->timing.v_total; 958 } else if (in_out_vrr->state == VRR_STATE_DISABLED) { 959 in_out_vrr->adjust.v_total_min = stream->timing.v_total; 960 in_out_vrr->adjust.v_total_max = stream->timing.v_total; 961 } else if (in_out_vrr->state == VRR_STATE_INACTIVE) { 962 in_out_vrr->adjust.v_total_min = stream->timing.v_total; 963 in_out_vrr->adjust.v_total_max = stream->timing.v_total; 964 } else if (in_out_vrr->state == VRR_STATE_ACTIVE_VARIABLE && 965 refresh_range >= MIN_REFRESH_RANGE) { 966 967 in_out_vrr->adjust.v_total_min = 968 calc_v_total_from_refresh(stream, 969 in_out_vrr->max_refresh_in_uhz); 970 in_out_vrr->adjust.v_total_max = 971 calc_v_total_from_refresh(stream, 972 in_out_vrr->min_refresh_in_uhz); 973 } else if (in_out_vrr->state == VRR_STATE_ACTIVE_FIXED) { 974 in_out_vrr->fixed.target_refresh_in_uhz = 975 in_out_vrr->fixed_refresh_in_uhz; 976 if (in_out_vrr->fixed.ramping_active && 977 in_out_vrr->fixed.fixed_active) { 978 /* Do not update vtotals if ramping is already active 979 * in order to continue ramp from current refresh. 980 */ 981 in_out_vrr->fixed.fixed_active = true; 982 } else { 983 in_out_vrr->fixed.fixed_active = true; 984 in_out_vrr->adjust.v_total_min = 985 calc_v_total_from_refresh(stream, 986 in_out_vrr->fixed.target_refresh_in_uhz); 987 in_out_vrr->adjust.v_total_max = 988 in_out_vrr->adjust.v_total_min; 989 } 990 } else { 991 in_out_vrr->state = VRR_STATE_INACTIVE; 992 in_out_vrr->adjust.v_total_min = stream->timing.v_total; 993 in_out_vrr->adjust.v_total_max = stream->timing.v_total; 994 } 995 } 996 997 void mod_freesync_handle_preflip(struct mod_freesync *mod_freesync, 998 const struct dc_plane_state *plane, 999 const struct dc_stream_state *stream, 1000 unsigned int curr_time_stamp_in_us, 1001 struct mod_vrr_params *in_out_vrr) 1002 { 1003 struct core_freesync *core_freesync = NULL; 1004 unsigned int last_render_time_in_us = 0; 1005 unsigned int average_render_time_in_us = 0; 1006 1007 if (mod_freesync == NULL) 1008 return; 1009 1010 core_freesync = MOD_FREESYNC_TO_CORE(mod_freesync); 1011 1012 if (in_out_vrr->supported && 1013 in_out_vrr->state == VRR_STATE_ACTIVE_VARIABLE) { 1014 unsigned int i = 0; 1015 unsigned int oldest_index = plane->time.index + 1; 1016 1017 if (oldest_index >= DC_PLANE_UPDATE_TIMES_MAX) 1018 oldest_index = 0; 1019 1020 last_render_time_in_us = curr_time_stamp_in_us - 1021 plane->time.prev_update_time_in_us; 1022 1023 // Sum off all entries except oldest one 1024 for (i = 0; i < DC_PLANE_UPDATE_TIMES_MAX; i++) { 1025 average_render_time_in_us += 1026 plane->time.time_elapsed_in_us[i]; 1027 } 1028 average_render_time_in_us -= 1029 plane->time.time_elapsed_in_us[oldest_index]; 1030 1031 // Add render time for current flip 1032 average_render_time_in_us += last_render_time_in_us; 1033 average_render_time_in_us /= DC_PLANE_UPDATE_TIMES_MAX; 1034 1035 if (in_out_vrr->btr.btr_enabled) { 1036 apply_below_the_range(core_freesync, 1037 stream, 1038 last_render_time_in_us, 1039 in_out_vrr); 1040 } else { 1041 apply_fixed_refresh(core_freesync, 1042 stream, 1043 last_render_time_in_us, 1044 in_out_vrr); 1045 } 1046 1047 } 1048 } 1049 1050 void mod_freesync_handle_v_update(struct mod_freesync *mod_freesync, 1051 const struct dc_stream_state *stream, 1052 struct mod_vrr_params *in_out_vrr) 1053 { 1054 struct core_freesync *core_freesync = NULL; 1055 1056 if ((mod_freesync == NULL) || (stream == NULL) || (in_out_vrr == NULL)) 1057 return; 1058 1059 core_freesync = MOD_FREESYNC_TO_CORE(mod_freesync); 1060 1061 if (in_out_vrr->supported == false) 1062 return; 1063 1064 /* Below the Range Logic */ 1065 1066 /* Only execute if in fullscreen mode */ 1067 if (in_out_vrr->state == VRR_STATE_ACTIVE_VARIABLE && 1068 in_out_vrr->btr.btr_active) { 1069 /* TODO: pass in flag for Pre-DCE12 ASIC 1070 * in order for frame variable duration to take affect, 1071 * it needs to be done one VSYNC early, which is at 1072 * frameCounter == 1. 1073 * For DCE12 and newer updates to V_TOTAL_MIN/MAX 1074 * will take affect on current frame 1075 */ 1076 if (in_out_vrr->btr.frames_to_insert == 1077 in_out_vrr->btr.frame_counter) { 1078 in_out_vrr->adjust.v_total_min = 1079 calc_v_total_from_duration(stream, 1080 in_out_vrr, 1081 in_out_vrr->btr.inserted_duration_in_us); 1082 in_out_vrr->adjust.v_total_max = 1083 in_out_vrr->adjust.v_total_min; 1084 } 1085 1086 if (in_out_vrr->btr.frame_counter > 0) 1087 in_out_vrr->btr.frame_counter--; 1088 1089 /* Restore FreeSync */ 1090 if (in_out_vrr->btr.frame_counter == 0) { 1091 in_out_vrr->adjust.v_total_min = 1092 calc_v_total_from_refresh(stream, 1093 in_out_vrr->max_refresh_in_uhz); 1094 in_out_vrr->adjust.v_total_max = 1095 calc_v_total_from_refresh(stream, 1096 in_out_vrr->min_refresh_in_uhz); 1097 } 1098 } 1099 1100 /* If in fullscreen freesync mode or in video, do not program 1101 * static screen ramp values 1102 */ 1103 if (in_out_vrr->state == VRR_STATE_ACTIVE_VARIABLE) 1104 in_out_vrr->fixed.ramping_active = false; 1105 1106 /* Gradual Static Screen Ramping Logic */ 1107 /* Execute if ramp is active and user enabled freesync static screen*/ 1108 if (in_out_vrr->state == VRR_STATE_ACTIVE_FIXED && 1109 in_out_vrr->fixed.ramping_active) { 1110 update_v_total_for_static_ramp( 1111 core_freesync, stream, in_out_vrr); 1112 } 1113 } 1114 1115 void mod_freesync_get_settings(struct mod_freesync *mod_freesync, 1116 const struct mod_vrr_params *vrr, 1117 unsigned int *v_total_min, unsigned int *v_total_max, 1118 unsigned int *event_triggers, 1119 unsigned int *window_min, unsigned int *window_max, 1120 unsigned int *lfc_mid_point_in_us, 1121 unsigned int *inserted_frames, 1122 unsigned int *inserted_duration_in_us) 1123 { 1124 if (mod_freesync == NULL) 1125 return; 1126 1127 if (vrr->supported) { 1128 *v_total_min = vrr->adjust.v_total_min; 1129 *v_total_max = vrr->adjust.v_total_max; 1130 *event_triggers = 0; 1131 *lfc_mid_point_in_us = vrr->btr.mid_point_in_us; 1132 *inserted_frames = vrr->btr.frames_to_insert; 1133 *inserted_duration_in_us = vrr->btr.inserted_duration_in_us; 1134 } 1135 } 1136 1137 unsigned long long mod_freesync_calc_nominal_field_rate( 1138 const struct dc_stream_state *stream) 1139 { 1140 unsigned long long nominal_field_rate_in_uhz = 0; 1141 unsigned int total = stream->timing.h_total * stream->timing.v_total; 1142 1143 /* Calculate nominal field rate for stream, rounded up to nearest integer */ 1144 nominal_field_rate_in_uhz = stream->timing.pix_clk_100hz; 1145 nominal_field_rate_in_uhz *= 100000000ULL; 1146 1147 nominal_field_rate_in_uhz = div_u64(nominal_field_rate_in_uhz, total); 1148 1149 return nominal_field_rate_in_uhz; 1150 } 1151 1152 bool mod_freesync_is_valid_range(uint32_t min_refresh_cap_in_uhz, 1153 uint32_t max_refresh_cap_in_uhz, 1154 uint32_t nominal_field_rate_in_uhz) 1155 { 1156 1157 /* Typically nominal refresh calculated can have some fractional part. 1158 * Allow for some rounding error of actual video timing by taking floor 1159 * of caps and request. Round the nominal refresh rate. 1160 * 1161 * Dividing will convert everything to units in Hz although input 1162 * variable name is in uHz! 1163 * 1164 * Also note, this takes care of rounding error on the nominal refresh 1165 * so by rounding error we only expect it to be off by a small amount, 1166 * such as < 0.1 Hz. i.e. 143.9xxx or 144.1xxx. 1167 * 1168 * Example 1. Caps Min = 40 Hz, Max = 144 Hz 1169 * Request Min = 40 Hz, Max = 144 Hz 1170 * Nominal = 143.5x Hz rounded to 144 Hz 1171 * This function should allow this as valid request 1172 * 1173 * Example 2. Caps Min = 40 Hz, Max = 144 Hz 1174 * Request Min = 40 Hz, Max = 144 Hz 1175 * Nominal = 144.4x Hz rounded to 144 Hz 1176 * This function should allow this as valid request 1177 * 1178 * Example 3. Caps Min = 40 Hz, Max = 144 Hz 1179 * Request Min = 40 Hz, Max = 144 Hz 1180 * Nominal = 120.xx Hz rounded to 120 Hz 1181 * This function should return NOT valid since the requested 1182 * max is greater than current timing's nominal 1183 * 1184 * Example 4. Caps Min = 40 Hz, Max = 120 Hz 1185 * Request Min = 40 Hz, Max = 120 Hz 1186 * Nominal = 144.xx Hz rounded to 144 Hz 1187 * This function should return NOT valid since the nominal 1188 * is greater than the capability's max refresh 1189 */ 1190 nominal_field_rate_in_uhz = 1191 div_u64(nominal_field_rate_in_uhz + 500000, 1000000); 1192 min_refresh_cap_in_uhz /= 1000000; 1193 max_refresh_cap_in_uhz /= 1000000; 1194 1195 // Check nominal is within range 1196 if (nominal_field_rate_in_uhz > max_refresh_cap_in_uhz || 1197 nominal_field_rate_in_uhz < min_refresh_cap_in_uhz) 1198 return false; 1199 1200 // If nominal is less than max, limit the max allowed refresh rate 1201 if (nominal_field_rate_in_uhz < max_refresh_cap_in_uhz) 1202 max_refresh_cap_in_uhz = nominal_field_rate_in_uhz; 1203 1204 // Check min is within range 1205 if (min_refresh_cap_in_uhz > max_refresh_cap_in_uhz) 1206 return false; 1207 1208 // For variable range, check for at least 10 Hz range 1209 if (nominal_field_rate_in_uhz - min_refresh_cap_in_uhz < 10) 1210 return false; 1211 1212 return true; 1213 } 1214 1215