1 /* 2 * Copyright 2016 Advanced Micro Devices, Inc. 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice shall be included in 12 * all copies or substantial portions of the Software. 13 * 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 20 * OTHER DEALINGS IN THE SOFTWARE. 21 * 22 * Authors: AMD 23 * 24 */ 25 26 #include "dm_services.h" 27 #include "dc.h" 28 #include "mod_freesync.h" 29 #include "core_types.h" 30 31 #define MOD_FREESYNC_MAX_CONCURRENT_STREAMS 32 32 33 #define MIN_REFRESH_RANGE 10 34 /* Refresh rate ramp at a fixed rate of 65 Hz/second */ 35 #define STATIC_SCREEN_RAMP_DELTA_REFRESH_RATE_PER_FRAME ((1000 / 60) * 65) 36 /* Number of elements in the render times cache array */ 37 #define RENDER_TIMES_MAX_COUNT 10 38 /* Threshold to exit/exit BTR (to avoid frequent enter-exits at the lower limit) */ 39 #define BTR_MAX_MARGIN 2500 40 /* Threshold to change BTR multiplier (to avoid frequent changes) */ 41 #define BTR_DRIFT_MARGIN 2000 42 /* Threshold to exit fixed refresh rate */ 43 #define FIXED_REFRESH_EXIT_MARGIN_IN_HZ 1 44 /* Number of consecutive frames to check before entering/exiting fixed refresh */ 45 #define FIXED_REFRESH_ENTER_FRAME_COUNT 5 46 #define FIXED_REFRESH_EXIT_FRAME_COUNT 10 47 /* Flip interval workaround constants */ 48 #define VSYNCS_BETWEEN_FLIP_THRESHOLD 2 49 #define FREESYNC_CONSEC_FLIP_AFTER_VSYNC 5 50 #define FREESYNC_VSYNC_TO_FLIP_DELTA_IN_US 500 51 52 struct core_freesync { 53 struct mod_freesync public; 54 struct dc *dc; 55 }; 56 57 #define MOD_FREESYNC_TO_CORE(mod_freesync)\ 58 container_of(mod_freesync, struct core_freesync, public) 59 60 struct mod_freesync *mod_freesync_create(struct dc *dc) 61 { 62 struct core_freesync *core_freesync = 63 kzalloc(sizeof(struct core_freesync), GFP_KERNEL); 64 65 if (core_freesync == NULL) 66 goto fail_alloc_context; 67 68 if (dc == NULL) 69 goto fail_construct; 70 71 core_freesync->dc = dc; 72 return &core_freesync->public; 73 74 fail_construct: 75 kfree(core_freesync); 76 77 fail_alloc_context: 78 return NULL; 79 } 80 81 void mod_freesync_destroy(struct mod_freesync *mod_freesync) 82 { 83 struct core_freesync *core_freesync = NULL; 84 if (mod_freesync == NULL) 85 return; 86 core_freesync = MOD_FREESYNC_TO_CORE(mod_freesync); 87 kfree(core_freesync); 88 } 89 90 #if 0 /* Unused currently */ 91 static unsigned int calc_refresh_in_uhz_from_duration( 92 unsigned int duration_in_ns) 93 { 94 unsigned int refresh_in_uhz = 95 ((unsigned int)(div64_u64((1000000000ULL * 1000000), 96 duration_in_ns))); 97 return refresh_in_uhz; 98 } 99 #endif 100 101 static unsigned int calc_duration_in_us_from_refresh_in_uhz( 102 unsigned int refresh_in_uhz) 103 { 104 unsigned int duration_in_us = 105 ((unsigned int)(div64_u64((1000000000ULL * 1000), 106 refresh_in_uhz))); 107 return duration_in_us; 108 } 109 110 static unsigned int calc_duration_in_us_from_v_total( 111 const struct dc_stream_state *stream, 112 const struct mod_vrr_params *in_vrr, 113 unsigned int v_total) 114 { 115 unsigned int duration_in_us = 116 (unsigned int)(div64_u64(((unsigned long long)(v_total) 117 * 10000) * stream->timing.h_total, 118 stream->timing.pix_clk_100hz)); 119 120 return duration_in_us; 121 } 122 123 unsigned int mod_freesync_calc_v_total_from_refresh( 124 const struct dc_stream_state *stream, 125 unsigned int refresh_in_uhz) 126 { 127 unsigned int v_total; 128 unsigned int frame_duration_in_ns; 129 130 frame_duration_in_ns = 131 ((unsigned int)(div64_u64((1000000000ULL * 1000000), 132 refresh_in_uhz))); 133 134 v_total = div64_u64(div64_u64(((unsigned long long)( 135 frame_duration_in_ns) * (stream->timing.pix_clk_100hz / 10)), 136 stream->timing.h_total), 1000000); 137 138 /* v_total cannot be less than nominal */ 139 if (v_total < stream->timing.v_total) { 140 ASSERT(v_total < stream->timing.v_total); 141 v_total = stream->timing.v_total; 142 } 143 144 return v_total; 145 } 146 147 static unsigned int calc_v_total_from_duration( 148 const struct dc_stream_state *stream, 149 const struct mod_vrr_params *vrr, 150 unsigned int duration_in_us) 151 { 152 unsigned int v_total = 0; 153 154 if (duration_in_us < vrr->min_duration_in_us) 155 duration_in_us = vrr->min_duration_in_us; 156 157 if (duration_in_us > vrr->max_duration_in_us) 158 duration_in_us = vrr->max_duration_in_us; 159 160 if (dc_is_hdmi_signal(stream->signal)) { 161 uint32_t h_total_up_scaled; 162 163 h_total_up_scaled = stream->timing.h_total * 10000; 164 v_total = div_u64((unsigned long long)duration_in_us 165 * stream->timing.pix_clk_100hz + (h_total_up_scaled - 1), 166 h_total_up_scaled); 167 } else { 168 v_total = div64_u64(div64_u64(((unsigned long long)( 169 duration_in_us) * (stream->timing.pix_clk_100hz / 10)), 170 stream->timing.h_total), 1000); 171 } 172 173 /* v_total cannot be less than nominal */ 174 if (v_total < stream->timing.v_total) { 175 ASSERT(v_total < stream->timing.v_total); 176 v_total = stream->timing.v_total; 177 } 178 179 return v_total; 180 } 181 182 static void update_v_total_for_static_ramp( 183 struct core_freesync *core_freesync, 184 const struct dc_stream_state *stream, 185 struct mod_vrr_params *in_out_vrr) 186 { 187 unsigned int v_total = 0; 188 unsigned int current_duration_in_us = 189 calc_duration_in_us_from_v_total( 190 stream, in_out_vrr, 191 in_out_vrr->adjust.v_total_max); 192 unsigned int target_duration_in_us = 193 calc_duration_in_us_from_refresh_in_uhz( 194 in_out_vrr->fixed.target_refresh_in_uhz); 195 bool ramp_direction_is_up = (current_duration_in_us > 196 target_duration_in_us) ? true : false; 197 198 /* Calculate ratio between new and current frame duration with 3 digit */ 199 unsigned int frame_duration_ratio = div64_u64(1000000, 200 (1000 + div64_u64(((unsigned long long)( 201 STATIC_SCREEN_RAMP_DELTA_REFRESH_RATE_PER_FRAME) * 202 current_duration_in_us), 203 1000000))); 204 205 /* Calculate delta between new and current frame duration in us */ 206 unsigned int frame_duration_delta = div64_u64(((unsigned long long)( 207 current_duration_in_us) * 208 (1000 - frame_duration_ratio)), 1000); 209 210 /* Adjust frame duration delta based on ratio between current and 211 * standard frame duration (frame duration at 60 Hz refresh rate). 212 */ 213 unsigned int ramp_rate_interpolated = div64_u64(((unsigned long long)( 214 frame_duration_delta) * current_duration_in_us), 16666); 215 216 /* Going to a higher refresh rate (lower frame duration) */ 217 if (ramp_direction_is_up) { 218 /* Reduce frame duration */ 219 current_duration_in_us -= ramp_rate_interpolated; 220 221 /* Adjust for frame duration below min */ 222 if (current_duration_in_us <= target_duration_in_us) { 223 in_out_vrr->fixed.ramping_active = false; 224 in_out_vrr->fixed.ramping_done = true; 225 current_duration_in_us = 226 calc_duration_in_us_from_refresh_in_uhz( 227 in_out_vrr->fixed.target_refresh_in_uhz); 228 } 229 /* Going to a lower refresh rate (larger frame duration) */ 230 } else { 231 /* Increase frame duration */ 232 current_duration_in_us += ramp_rate_interpolated; 233 234 /* Adjust for frame duration above max */ 235 if (current_duration_in_us >= target_duration_in_us) { 236 in_out_vrr->fixed.ramping_active = false; 237 in_out_vrr->fixed.ramping_done = true; 238 current_duration_in_us = 239 calc_duration_in_us_from_refresh_in_uhz( 240 in_out_vrr->fixed.target_refresh_in_uhz); 241 } 242 } 243 244 v_total = div64_u64(div64_u64(((unsigned long long)( 245 current_duration_in_us) * (stream->timing.pix_clk_100hz / 10)), 246 stream->timing.h_total), 1000); 247 248 /* v_total cannot be less than nominal */ 249 if (v_total < stream->timing.v_total) 250 v_total = stream->timing.v_total; 251 252 in_out_vrr->adjust.v_total_min = v_total; 253 in_out_vrr->adjust.v_total_max = v_total; 254 } 255 256 static void apply_below_the_range(struct core_freesync *core_freesync, 257 const struct dc_stream_state *stream, 258 unsigned int last_render_time_in_us, 259 struct mod_vrr_params *in_out_vrr) 260 { 261 unsigned int inserted_frame_duration_in_us = 0; 262 unsigned int mid_point_frames_ceil = 0; 263 unsigned int mid_point_frames_floor = 0; 264 unsigned int frame_time_in_us = 0; 265 unsigned int delta_from_mid_point_in_us_1 = 0xFFFFFFFF; 266 unsigned int delta_from_mid_point_in_us_2 = 0xFFFFFFFF; 267 unsigned int frames_to_insert = 0; 268 unsigned int delta_from_mid_point_delta_in_us; 269 unsigned int max_render_time_in_us = 270 in_out_vrr->max_duration_in_us - in_out_vrr->btr.margin_in_us; 271 272 /* Program BTR */ 273 if ((last_render_time_in_us + in_out_vrr->btr.margin_in_us / 2) < max_render_time_in_us) { 274 /* Exit Below the Range */ 275 if (in_out_vrr->btr.btr_active) { 276 in_out_vrr->btr.frame_counter = 0; 277 in_out_vrr->btr.btr_active = false; 278 } 279 } else if (last_render_time_in_us > (max_render_time_in_us + in_out_vrr->btr.margin_in_us / 2)) { 280 /* Enter Below the Range */ 281 if (!in_out_vrr->btr.btr_active) { 282 in_out_vrr->btr.btr_active = true; 283 } 284 } 285 286 /* BTR set to "not active" so disengage */ 287 if (!in_out_vrr->btr.btr_active) { 288 in_out_vrr->btr.inserted_duration_in_us = 0; 289 in_out_vrr->btr.frames_to_insert = 0; 290 in_out_vrr->btr.frame_counter = 0; 291 292 /* Restore FreeSync */ 293 in_out_vrr->adjust.v_total_min = 294 mod_freesync_calc_v_total_from_refresh(stream, 295 in_out_vrr->max_refresh_in_uhz); 296 in_out_vrr->adjust.v_total_max = 297 mod_freesync_calc_v_total_from_refresh(stream, 298 in_out_vrr->min_refresh_in_uhz); 299 /* BTR set to "active" so engage */ 300 } else { 301 302 /* Calculate number of midPoint frames that could fit within 303 * the render time interval - take ceil of this value 304 */ 305 mid_point_frames_ceil = (last_render_time_in_us + 306 in_out_vrr->btr.mid_point_in_us - 1) / 307 in_out_vrr->btr.mid_point_in_us; 308 309 if (mid_point_frames_ceil > 0) { 310 frame_time_in_us = last_render_time_in_us / 311 mid_point_frames_ceil; 312 delta_from_mid_point_in_us_1 = 313 (in_out_vrr->btr.mid_point_in_us > 314 frame_time_in_us) ? 315 (in_out_vrr->btr.mid_point_in_us - frame_time_in_us) : 316 (frame_time_in_us - in_out_vrr->btr.mid_point_in_us); 317 } 318 319 /* Calculate number of midPoint frames that could fit within 320 * the render time interval - take floor of this value 321 */ 322 mid_point_frames_floor = last_render_time_in_us / 323 in_out_vrr->btr.mid_point_in_us; 324 325 if (mid_point_frames_floor > 0) { 326 327 frame_time_in_us = last_render_time_in_us / 328 mid_point_frames_floor; 329 delta_from_mid_point_in_us_2 = 330 (in_out_vrr->btr.mid_point_in_us > 331 frame_time_in_us) ? 332 (in_out_vrr->btr.mid_point_in_us - frame_time_in_us) : 333 (frame_time_in_us - in_out_vrr->btr.mid_point_in_us); 334 } 335 336 /* Choose number of frames to insert based on how close it 337 * can get to the mid point of the variable range. 338 * - Delta for CEIL: delta_from_mid_point_in_us_1 339 * - Delta for FLOOR: delta_from_mid_point_in_us_2 340 */ 341 if ((last_render_time_in_us / mid_point_frames_ceil) < in_out_vrr->min_duration_in_us) { 342 /* Check for out of range. 343 * If using CEIL produces a value that is out of range, 344 * then we are forced to use FLOOR. 345 */ 346 frames_to_insert = mid_point_frames_floor; 347 } else if (mid_point_frames_floor < 2) { 348 /* Check if FLOOR would result in non-LFC. In this case 349 * choose to use CEIL 350 */ 351 frames_to_insert = mid_point_frames_ceil; 352 } else if (delta_from_mid_point_in_us_1 < delta_from_mid_point_in_us_2) { 353 /* If choosing CEIL results in a frame duration that is 354 * closer to the mid point of the range. 355 * Choose CEIL 356 */ 357 frames_to_insert = mid_point_frames_ceil; 358 } else { 359 /* If choosing FLOOR results in a frame duration that is 360 * closer to the mid point of the range. 361 * Choose FLOOR 362 */ 363 frames_to_insert = mid_point_frames_floor; 364 } 365 366 /* Prefer current frame multiplier when BTR is enabled unless it drifts 367 * too far from the midpoint 368 */ 369 if (delta_from_mid_point_in_us_1 < delta_from_mid_point_in_us_2) { 370 delta_from_mid_point_delta_in_us = delta_from_mid_point_in_us_2 - 371 delta_from_mid_point_in_us_1; 372 } else { 373 delta_from_mid_point_delta_in_us = delta_from_mid_point_in_us_1 - 374 delta_from_mid_point_in_us_2; 375 } 376 if (in_out_vrr->btr.frames_to_insert != 0 && 377 delta_from_mid_point_delta_in_us < BTR_DRIFT_MARGIN) { 378 if (((last_render_time_in_us / in_out_vrr->btr.frames_to_insert) < 379 max_render_time_in_us) && 380 ((last_render_time_in_us / in_out_vrr->btr.frames_to_insert) > 381 in_out_vrr->min_duration_in_us)) 382 frames_to_insert = in_out_vrr->btr.frames_to_insert; 383 } 384 385 /* Either we've calculated the number of frames to insert, 386 * or we need to insert min duration frames 387 */ 388 if (last_render_time_in_us / frames_to_insert < 389 in_out_vrr->min_duration_in_us){ 390 frames_to_insert -= (frames_to_insert > 1) ? 391 1 : 0; 392 } 393 394 if (frames_to_insert > 0) 395 inserted_frame_duration_in_us = last_render_time_in_us / 396 frames_to_insert; 397 398 if (inserted_frame_duration_in_us < in_out_vrr->min_duration_in_us) 399 inserted_frame_duration_in_us = in_out_vrr->min_duration_in_us; 400 401 /* Cache the calculated variables */ 402 in_out_vrr->btr.inserted_duration_in_us = 403 inserted_frame_duration_in_us; 404 in_out_vrr->btr.frames_to_insert = frames_to_insert; 405 in_out_vrr->btr.frame_counter = frames_to_insert; 406 } 407 } 408 409 static void apply_fixed_refresh(struct core_freesync *core_freesync, 410 const struct dc_stream_state *stream, 411 unsigned int last_render_time_in_us, 412 struct mod_vrr_params *in_out_vrr) 413 { 414 bool update = false; 415 unsigned int max_render_time_in_us = in_out_vrr->max_duration_in_us; 416 417 /* Compute the exit refresh rate and exit frame duration */ 418 unsigned int exit_refresh_rate_in_milli_hz = ((1000000000/max_render_time_in_us) 419 + (1000*FIXED_REFRESH_EXIT_MARGIN_IN_HZ)); 420 unsigned int exit_frame_duration_in_us = 1000000000/exit_refresh_rate_in_milli_hz; 421 422 if (last_render_time_in_us < exit_frame_duration_in_us) { 423 /* Exit Fixed Refresh mode */ 424 if (in_out_vrr->fixed.fixed_active) { 425 in_out_vrr->fixed.frame_counter++; 426 427 if (in_out_vrr->fixed.frame_counter > 428 FIXED_REFRESH_EXIT_FRAME_COUNT) { 429 in_out_vrr->fixed.frame_counter = 0; 430 in_out_vrr->fixed.fixed_active = false; 431 in_out_vrr->fixed.target_refresh_in_uhz = 0; 432 update = true; 433 } 434 } else 435 in_out_vrr->fixed.frame_counter = 0; 436 } else if (last_render_time_in_us > max_render_time_in_us) { 437 /* Enter Fixed Refresh mode */ 438 if (!in_out_vrr->fixed.fixed_active) { 439 in_out_vrr->fixed.frame_counter++; 440 441 if (in_out_vrr->fixed.frame_counter > 442 FIXED_REFRESH_ENTER_FRAME_COUNT) { 443 in_out_vrr->fixed.frame_counter = 0; 444 in_out_vrr->fixed.fixed_active = true; 445 in_out_vrr->fixed.target_refresh_in_uhz = 446 in_out_vrr->max_refresh_in_uhz; 447 update = true; 448 } 449 } else 450 in_out_vrr->fixed.frame_counter = 0; 451 } 452 453 if (update) { 454 if (in_out_vrr->fixed.fixed_active) { 455 in_out_vrr->adjust.v_total_min = 456 mod_freesync_calc_v_total_from_refresh( 457 stream, in_out_vrr->max_refresh_in_uhz); 458 in_out_vrr->adjust.v_total_max = 459 in_out_vrr->adjust.v_total_min; 460 } else { 461 in_out_vrr->adjust.v_total_min = 462 mod_freesync_calc_v_total_from_refresh(stream, 463 in_out_vrr->max_refresh_in_uhz); 464 in_out_vrr->adjust.v_total_max = 465 mod_freesync_calc_v_total_from_refresh(stream, 466 in_out_vrr->min_refresh_in_uhz); 467 } 468 } 469 } 470 471 static void determine_flip_interval_workaround_req(struct mod_vrr_params *in_vrr, 472 unsigned int curr_time_stamp_in_us) 473 { 474 in_vrr->flip_interval.vsync_to_flip_in_us = curr_time_stamp_in_us - 475 in_vrr->flip_interval.v_update_timestamp_in_us; 476 477 /* Determine conditions for stopping workaround */ 478 if (in_vrr->flip_interval.flip_interval_workaround_active && 479 in_vrr->flip_interval.vsyncs_between_flip < VSYNCS_BETWEEN_FLIP_THRESHOLD && 480 in_vrr->flip_interval.vsync_to_flip_in_us > FREESYNC_VSYNC_TO_FLIP_DELTA_IN_US) { 481 in_vrr->flip_interval.flip_interval_detect_counter = 0; 482 in_vrr->flip_interval.program_flip_interval_workaround = true; 483 in_vrr->flip_interval.flip_interval_workaround_active = false; 484 } else { 485 /* Determine conditions for starting workaround */ 486 if (in_vrr->flip_interval.vsyncs_between_flip >= VSYNCS_BETWEEN_FLIP_THRESHOLD && 487 in_vrr->flip_interval.vsync_to_flip_in_us < FREESYNC_VSYNC_TO_FLIP_DELTA_IN_US) { 488 /* Increase flip interval counter we have 2 vsyncs between flips and 489 * vsync to flip interval is less than 500us 490 */ 491 in_vrr->flip_interval.flip_interval_detect_counter++; 492 if (in_vrr->flip_interval.flip_interval_detect_counter > FREESYNC_CONSEC_FLIP_AFTER_VSYNC) { 493 /* Start workaround if we detect 5 consecutive instances of the above case */ 494 in_vrr->flip_interval.program_flip_interval_workaround = true; 495 in_vrr->flip_interval.flip_interval_workaround_active = true; 496 } 497 } else { 498 /* Reset the flip interval counter if we condition is no longer met */ 499 in_vrr->flip_interval.flip_interval_detect_counter = 0; 500 } 501 } 502 503 in_vrr->flip_interval.vsyncs_between_flip = 0; 504 } 505 506 static bool vrr_settings_require_update(struct core_freesync *core_freesync, 507 struct mod_freesync_config *in_config, 508 unsigned int min_refresh_in_uhz, 509 unsigned int max_refresh_in_uhz, 510 struct mod_vrr_params *in_vrr) 511 { 512 if (in_vrr->state != in_config->state) { 513 return true; 514 } else if (in_vrr->state == VRR_STATE_ACTIVE_FIXED && 515 in_vrr->fixed.target_refresh_in_uhz != 516 in_config->fixed_refresh_in_uhz) { 517 return true; 518 } else if (in_vrr->min_refresh_in_uhz != min_refresh_in_uhz) { 519 return true; 520 } else if (in_vrr->max_refresh_in_uhz != max_refresh_in_uhz) { 521 return true; 522 } 523 524 return false; 525 } 526 527 bool mod_freesync_get_vmin_vmax(struct mod_freesync *mod_freesync, 528 const struct dc_stream_state *stream, 529 unsigned int *vmin, 530 unsigned int *vmax) 531 { 532 *vmin = stream->adjust.v_total_min; 533 *vmax = stream->adjust.v_total_max; 534 535 return true; 536 } 537 538 bool mod_freesync_get_v_position(struct mod_freesync *mod_freesync, 539 struct dc_stream_state *stream, 540 unsigned int *nom_v_pos, 541 unsigned int *v_pos) 542 { 543 struct core_freesync *core_freesync = NULL; 544 struct crtc_position position; 545 546 if (mod_freesync == NULL) 547 return false; 548 549 core_freesync = MOD_FREESYNC_TO_CORE(mod_freesync); 550 551 if (dc_stream_get_crtc_position(core_freesync->dc, &stream, 1, 552 &position.vertical_count, 553 &position.nominal_vcount)) { 554 555 *nom_v_pos = position.nominal_vcount; 556 *v_pos = position.vertical_count; 557 558 return true; 559 } 560 561 return false; 562 } 563 564 static void build_vrr_infopacket_data_v1(const struct mod_vrr_params *vrr, 565 struct dc_info_packet *infopacket, 566 bool freesync_on_desktop) 567 { 568 /* PB1 = 0x1A (24bit AMD IEEE OUI (0x00001A) - Byte 0) */ 569 infopacket->sb[1] = 0x1A; 570 571 /* PB2 = 0x00 (24bit AMD IEEE OUI (0x00001A) - Byte 1) */ 572 infopacket->sb[2] = 0x00; 573 574 /* PB3 = 0x00 (24bit AMD IEEE OUI (0x00001A) - Byte 2) */ 575 infopacket->sb[3] = 0x00; 576 577 /* PB4 = Reserved */ 578 579 /* PB5 = Reserved */ 580 581 /* PB6 = [Bits 7:3 = Reserved] */ 582 583 /* PB6 = [Bit 0 = FreeSync Supported] */ 584 if (vrr->state != VRR_STATE_UNSUPPORTED) 585 infopacket->sb[6] |= 0x01; 586 587 /* PB6 = [Bit 1 = FreeSync Enabled] */ 588 if (vrr->state != VRR_STATE_DISABLED && 589 vrr->state != VRR_STATE_UNSUPPORTED) 590 infopacket->sb[6] |= 0x02; 591 592 if (freesync_on_desktop) { 593 /* PB6 = [Bit 2 = FreeSync Active] */ 594 if (vrr->state != VRR_STATE_DISABLED && 595 vrr->state != VRR_STATE_UNSUPPORTED) 596 infopacket->sb[6] |= 0x04; 597 } else { 598 if (vrr->state == VRR_STATE_ACTIVE_VARIABLE || 599 vrr->state == VRR_STATE_ACTIVE_FIXED) 600 infopacket->sb[6] |= 0x04; 601 } 602 603 // For v1 & 2 infoframes program nominal if non-fs mode, otherwise full range 604 /* PB7 = FreeSync Minimum refresh rate (Hz) */ 605 if (vrr->state == VRR_STATE_ACTIVE_VARIABLE || 606 vrr->state == VRR_STATE_ACTIVE_FIXED) { 607 infopacket->sb[7] = (unsigned char)((vrr->min_refresh_in_uhz + 500000) / 1000000); 608 } else { 609 infopacket->sb[7] = (unsigned char)((vrr->max_refresh_in_uhz + 500000) / 1000000); 610 } 611 612 /* PB8 = FreeSync Maximum refresh rate (Hz) 613 * Note: We should never go above the field rate of the mode timing set. 614 */ 615 infopacket->sb[8] = (unsigned char)((vrr->max_refresh_in_uhz + 500000) / 1000000); 616 } 617 618 static void build_vrr_infopacket_data_v3(const struct mod_vrr_params *vrr, 619 struct dc_info_packet *infopacket, 620 bool freesync_on_desktop) 621 { 622 unsigned int min_refresh; 623 unsigned int max_refresh; 624 unsigned int fixed_refresh; 625 unsigned int min_programmed; 626 unsigned int max_programmed; 627 628 /* PB1 = 0x1A (24bit AMD IEEE OUI (0x00001A) - Byte 0) */ 629 infopacket->sb[1] = 0x1A; 630 631 /* PB2 = 0x00 (24bit AMD IEEE OUI (0x00001A) - Byte 1) */ 632 infopacket->sb[2] = 0x00; 633 634 /* PB3 = 0x00 (24bit AMD IEEE OUI (0x00001A) - Byte 2) */ 635 infopacket->sb[3] = 0x00; 636 637 /* PB4 = Reserved */ 638 639 /* PB5 = Reserved */ 640 641 /* PB6 = [Bits 7:3 = Reserved] */ 642 643 /* PB6 = [Bit 0 = FreeSync Supported] */ 644 if (vrr->state != VRR_STATE_UNSUPPORTED) 645 infopacket->sb[6] |= 0x01; 646 647 /* PB6 = [Bit 1 = FreeSync Enabled] */ 648 if (vrr->state != VRR_STATE_DISABLED && 649 vrr->state != VRR_STATE_UNSUPPORTED) 650 infopacket->sb[6] |= 0x02; 651 652 /* PB6 = [Bit 2 = FreeSync Active] */ 653 if (freesync_on_desktop) { 654 if (vrr->state != VRR_STATE_DISABLED && 655 vrr->state != VRR_STATE_UNSUPPORTED) 656 infopacket->sb[6] |= 0x04; 657 } else { 658 if (vrr->state == VRR_STATE_ACTIVE_VARIABLE || 659 vrr->state == VRR_STATE_ACTIVE_FIXED) 660 infopacket->sb[6] |= 0x04; 661 } 662 663 min_refresh = (vrr->min_refresh_in_uhz + 500000) / 1000000; 664 max_refresh = (vrr->max_refresh_in_uhz + 500000) / 1000000; 665 fixed_refresh = (vrr->fixed_refresh_in_uhz + 500000) / 1000000; 666 667 min_programmed = (vrr->state == VRR_STATE_ACTIVE_FIXED) ? fixed_refresh : 668 (vrr->state == VRR_STATE_ACTIVE_VARIABLE) ? min_refresh : 669 (vrr->state == VRR_STATE_INACTIVE) ? min_refresh : 670 max_refresh; // Non-fs case, program nominal range 671 672 max_programmed = (vrr->state == VRR_STATE_ACTIVE_FIXED) ? fixed_refresh : 673 (vrr->state == VRR_STATE_ACTIVE_VARIABLE) ? max_refresh : 674 max_refresh;// Non-fs case, program nominal range 675 676 /* PB7 = FreeSync Minimum refresh rate (Hz) */ 677 infopacket->sb[7] = min_programmed & 0xFF; 678 679 /* PB8 = FreeSync Maximum refresh rate (Hz) */ 680 infopacket->sb[8] = max_programmed & 0xFF; 681 682 /* PB11 : MSB FreeSync Minimum refresh rate [Hz] - bits 9:8 */ 683 infopacket->sb[11] = (min_programmed >> 8) & 0x03; 684 685 /* PB12 : MSB FreeSync Maximum refresh rate [Hz] - bits 9:8 */ 686 infopacket->sb[12] = (max_programmed >> 8) & 0x03; 687 688 /* PB16 : Reserved bits 7:1, FixedRate bit 0 */ 689 infopacket->sb[16] = (vrr->state == VRR_STATE_ACTIVE_FIXED) ? 1 : 0; 690 } 691 692 static void build_vrr_infopacket_fs2_data(enum color_transfer_func app_tf, 693 struct dc_info_packet *infopacket) 694 { 695 if (app_tf != TRANSFER_FUNC_UNKNOWN) { 696 infopacket->valid = true; 697 698 if (app_tf != TRANSFER_FUNC_PQ2084) { 699 infopacket->sb[6] |= 0x08; // PB6 = [Bit 3 = Native Color Active] 700 if (app_tf == TRANSFER_FUNC_GAMMA_22) 701 infopacket->sb[9] |= 0x04; // PB6 = [Bit 2 = Gamma 2.2 EOTF Active] 702 } 703 } 704 } 705 706 static void build_vrr_infopacket_header_v1(enum signal_type signal, 707 struct dc_info_packet *infopacket, 708 unsigned int *payload_size) 709 { 710 if (dc_is_hdmi_signal(signal)) { 711 712 /* HEADER */ 713 714 /* HB0 = Packet Type = 0x83 (Source Product 715 * Descriptor InfoFrame) 716 */ 717 infopacket->hb0 = DC_HDMI_INFOFRAME_TYPE_SPD; 718 719 /* HB1 = Version = 0x01 */ 720 infopacket->hb1 = 0x01; 721 722 /* HB2 = [Bits 7:5 = 0] [Bits 4:0 = Length = 0x08] */ 723 infopacket->hb2 = 0x08; 724 725 *payload_size = 0x08; 726 727 } else if (dc_is_dp_signal(signal)) { 728 729 /* HEADER */ 730 731 /* HB0 = Secondary-data Packet ID = 0 - Only non-zero 732 * when used to associate audio related info packets 733 */ 734 infopacket->hb0 = 0x00; 735 736 /* HB1 = Packet Type = 0x83 (Source Product 737 * Descriptor InfoFrame) 738 */ 739 infopacket->hb1 = DC_HDMI_INFOFRAME_TYPE_SPD; 740 741 /* HB2 = [Bits 7:0 = Least significant eight bits - 742 * For INFOFRAME, the value must be 1Bh] 743 */ 744 infopacket->hb2 = 0x1B; 745 746 /* HB3 = [Bits 7:2 = INFOFRAME SDP Version Number = 0x1] 747 * [Bits 1:0 = Most significant two bits = 0x00] 748 */ 749 infopacket->hb3 = 0x04; 750 751 *payload_size = 0x1B; 752 } 753 } 754 755 static void build_vrr_infopacket_header_v2(enum signal_type signal, 756 struct dc_info_packet *infopacket, 757 unsigned int *payload_size) 758 { 759 if (dc_is_hdmi_signal(signal)) { 760 761 /* HEADER */ 762 763 /* HB0 = Packet Type = 0x83 (Source Product 764 * Descriptor InfoFrame) 765 */ 766 infopacket->hb0 = DC_HDMI_INFOFRAME_TYPE_SPD; 767 768 /* HB1 = Version = 0x02 */ 769 infopacket->hb1 = 0x02; 770 771 /* HB2 = [Bits 7:5 = 0] [Bits 4:0 = Length = 0x09] */ 772 infopacket->hb2 = 0x09; 773 774 *payload_size = 0x09; 775 } else if (dc_is_dp_signal(signal)) { 776 777 /* HEADER */ 778 779 /* HB0 = Secondary-data Packet ID = 0 - Only non-zero 780 * when used to associate audio related info packets 781 */ 782 infopacket->hb0 = 0x00; 783 784 /* HB1 = Packet Type = 0x83 (Source Product 785 * Descriptor InfoFrame) 786 */ 787 infopacket->hb1 = DC_HDMI_INFOFRAME_TYPE_SPD; 788 789 /* HB2 = [Bits 7:0 = Least significant eight bits - 790 * For INFOFRAME, the value must be 1Bh] 791 */ 792 infopacket->hb2 = 0x1B; 793 794 /* HB3 = [Bits 7:2 = INFOFRAME SDP Version Number = 0x2] 795 * [Bits 1:0 = Most significant two bits = 0x00] 796 */ 797 infopacket->hb3 = 0x08; 798 799 *payload_size = 0x1B; 800 } 801 } 802 803 static void build_vrr_infopacket_header_v3(enum signal_type signal, 804 struct dc_info_packet *infopacket, 805 unsigned int *payload_size) 806 { 807 unsigned char version; 808 809 version = 3; 810 if (dc_is_hdmi_signal(signal)) { 811 812 /* HEADER */ 813 814 /* HB0 = Packet Type = 0x83 (Source Product 815 * Descriptor InfoFrame) 816 */ 817 infopacket->hb0 = DC_HDMI_INFOFRAME_TYPE_SPD; 818 819 /* HB1 = Version = 0x03 */ 820 infopacket->hb1 = version; 821 822 /* HB2 = [Bits 7:5 = 0] [Bits 4:0 = Length] */ 823 infopacket->hb2 = 0x10; 824 825 *payload_size = 0x10; 826 } else if (dc_is_dp_signal(signal)) { 827 828 /* HEADER */ 829 830 /* HB0 = Secondary-data Packet ID = 0 - Only non-zero 831 * when used to associate audio related info packets 832 */ 833 infopacket->hb0 = 0x00; 834 835 /* HB1 = Packet Type = 0x83 (Source Product 836 * Descriptor InfoFrame) 837 */ 838 infopacket->hb1 = DC_HDMI_INFOFRAME_TYPE_SPD; 839 840 /* HB2 = [Bits 7:0 = Least significant eight bits - 841 * For INFOFRAME, the value must be 1Bh] 842 */ 843 infopacket->hb2 = 0x1B; 844 845 /* HB3 = [Bits 7:2 = INFOFRAME SDP Version Number = 0x2] 846 * [Bits 1:0 = Most significant two bits = 0x00] 847 */ 848 849 infopacket->hb3 = (version & 0x3F) << 2; 850 851 *payload_size = 0x1B; 852 } 853 } 854 855 static void build_vrr_infopacket_checksum(unsigned int *payload_size, 856 struct dc_info_packet *infopacket) 857 { 858 /* Calculate checksum */ 859 unsigned int idx = 0; 860 unsigned char checksum = 0; 861 862 checksum += infopacket->hb0; 863 checksum += infopacket->hb1; 864 checksum += infopacket->hb2; 865 checksum += infopacket->hb3; 866 867 for (idx = 1; idx <= *payload_size; idx++) 868 checksum += infopacket->sb[idx]; 869 870 /* PB0 = Checksum (one byte complement) */ 871 infopacket->sb[0] = (unsigned char)(0x100 - checksum); 872 873 infopacket->valid = true; 874 } 875 876 static void build_vrr_infopacket_v1(enum signal_type signal, 877 const struct mod_vrr_params *vrr, 878 struct dc_info_packet *infopacket, 879 bool freesync_on_desktop) 880 { 881 /* SPD info packet for FreeSync */ 882 unsigned int payload_size = 0; 883 884 build_vrr_infopacket_header_v1(signal, infopacket, &payload_size); 885 build_vrr_infopacket_data_v1(vrr, infopacket, freesync_on_desktop); 886 build_vrr_infopacket_checksum(&payload_size, infopacket); 887 888 infopacket->valid = true; 889 } 890 891 static void build_vrr_infopacket_v2(enum signal_type signal, 892 const struct mod_vrr_params *vrr, 893 enum color_transfer_func app_tf, 894 struct dc_info_packet *infopacket, 895 bool freesync_on_desktop) 896 { 897 unsigned int payload_size = 0; 898 899 build_vrr_infopacket_header_v2(signal, infopacket, &payload_size); 900 build_vrr_infopacket_data_v1(vrr, infopacket, freesync_on_desktop); 901 902 build_vrr_infopacket_fs2_data(app_tf, infopacket); 903 904 build_vrr_infopacket_checksum(&payload_size, infopacket); 905 906 infopacket->valid = true; 907 } 908 909 static void build_vrr_infopacket_v3(enum signal_type signal, 910 const struct mod_vrr_params *vrr, 911 enum color_transfer_func app_tf, 912 struct dc_info_packet *infopacket, 913 bool freesync_on_desktop) 914 { 915 unsigned int payload_size = 0; 916 917 build_vrr_infopacket_header_v3(signal, infopacket, &payload_size); 918 build_vrr_infopacket_data_v3(vrr, infopacket, freesync_on_desktop); 919 920 build_vrr_infopacket_fs2_data(app_tf, infopacket); 921 922 build_vrr_infopacket_checksum(&payload_size, infopacket); 923 924 infopacket->valid = true; 925 } 926 927 static void build_vrr_infopacket_sdp_v1_3(enum vrr_packet_type packet_type, 928 struct dc_info_packet *infopacket) 929 { 930 uint8_t idx = 0, size = 0; 931 932 size = ((packet_type == PACKET_TYPE_FS_V1) ? 0x08 : 933 (packet_type == PACKET_TYPE_FS_V3) ? 0x10 : 934 0x09); 935 936 for (idx = infopacket->hb2; idx > 1; idx--) // Data Byte Count: 0x1B 937 infopacket->sb[idx] = infopacket->sb[idx-1]; 938 939 infopacket->sb[1] = size; // Length 940 infopacket->sb[0] = (infopacket->hb3 >> 2) & 0x3F;//Version 941 infopacket->hb3 = (0x13 << 2); // Header,SDP 1.3 942 infopacket->hb2 = 0x1D; 943 } 944 945 void mod_freesync_build_vrr_infopacket(struct mod_freesync *mod_freesync, 946 const struct dc_stream_state *stream, 947 const struct mod_vrr_params *vrr, 948 enum vrr_packet_type packet_type, 949 enum color_transfer_func app_tf, 950 struct dc_info_packet *infopacket, 951 bool pack_sdp_v1_3) 952 { 953 /* SPD info packet for FreeSync 954 * VTEM info packet for HdmiVRR 955 * Check if Freesync is supported. Return if false. If true, 956 * set the corresponding bit in the info packet 957 */ 958 if (!vrr->send_info_frame) 959 return; 960 961 switch (packet_type) { 962 case PACKET_TYPE_FS_V3: 963 build_vrr_infopacket_v3(stream->signal, vrr, app_tf, infopacket, stream->freesync_on_desktop); 964 break; 965 case PACKET_TYPE_FS_V2: 966 build_vrr_infopacket_v2(stream->signal, vrr, app_tf, infopacket, stream->freesync_on_desktop); 967 break; 968 case PACKET_TYPE_VRR: 969 case PACKET_TYPE_FS_V1: 970 default: 971 build_vrr_infopacket_v1(stream->signal, vrr, infopacket, stream->freesync_on_desktop); 972 } 973 974 if (true == pack_sdp_v1_3 && 975 true == dc_is_dp_signal(stream->signal) && 976 packet_type != PACKET_TYPE_VRR && 977 packet_type != PACKET_TYPE_VTEM) 978 build_vrr_infopacket_sdp_v1_3(packet_type, infopacket); 979 } 980 981 void mod_freesync_build_vrr_params(struct mod_freesync *mod_freesync, 982 const struct dc_stream_state *stream, 983 struct mod_freesync_config *in_config, 984 struct mod_vrr_params *in_out_vrr) 985 { 986 struct core_freesync *core_freesync = NULL; 987 unsigned long long nominal_field_rate_in_uhz = 0; 988 unsigned long long rounded_nominal_in_uhz = 0; 989 unsigned int refresh_range = 0; 990 unsigned long long min_refresh_in_uhz = 0; 991 unsigned long long max_refresh_in_uhz = 0; 992 993 if (mod_freesync == NULL) 994 return; 995 996 core_freesync = MOD_FREESYNC_TO_CORE(mod_freesync); 997 998 /* Calculate nominal field rate for stream */ 999 nominal_field_rate_in_uhz = 1000 mod_freesync_calc_nominal_field_rate(stream); 1001 1002 min_refresh_in_uhz = in_config->min_refresh_in_uhz; 1003 max_refresh_in_uhz = in_config->max_refresh_in_uhz; 1004 1005 /* Full range may be larger than current video timing, so cap at nominal */ 1006 if (max_refresh_in_uhz > nominal_field_rate_in_uhz) 1007 max_refresh_in_uhz = nominal_field_rate_in_uhz; 1008 1009 /* Full range may be larger than current video timing, so cap at nominal */ 1010 if (min_refresh_in_uhz > max_refresh_in_uhz) 1011 min_refresh_in_uhz = max_refresh_in_uhz; 1012 1013 /* If a monitor reports exactly max refresh of 2x of min, enforce it on nominal */ 1014 rounded_nominal_in_uhz = 1015 div_u64(nominal_field_rate_in_uhz + 50000, 100000) * 100000; 1016 if (in_config->max_refresh_in_uhz == (2 * in_config->min_refresh_in_uhz) && 1017 in_config->max_refresh_in_uhz == rounded_nominal_in_uhz) 1018 min_refresh_in_uhz = div_u64(nominal_field_rate_in_uhz, 2); 1019 1020 if (!vrr_settings_require_update(core_freesync, 1021 in_config, (unsigned int)min_refresh_in_uhz, (unsigned int)max_refresh_in_uhz, 1022 in_out_vrr)) 1023 return; 1024 1025 in_out_vrr->state = in_config->state; 1026 in_out_vrr->send_info_frame = in_config->vsif_supported; 1027 1028 if (in_config->state == VRR_STATE_UNSUPPORTED) { 1029 in_out_vrr->state = VRR_STATE_UNSUPPORTED; 1030 in_out_vrr->supported = false; 1031 in_out_vrr->adjust.v_total_min = stream->timing.v_total; 1032 in_out_vrr->adjust.v_total_max = stream->timing.v_total; 1033 1034 return; 1035 1036 } else { 1037 in_out_vrr->min_refresh_in_uhz = (unsigned int)min_refresh_in_uhz; 1038 in_out_vrr->max_duration_in_us = 1039 calc_duration_in_us_from_refresh_in_uhz( 1040 (unsigned int)min_refresh_in_uhz); 1041 1042 in_out_vrr->max_refresh_in_uhz = (unsigned int)max_refresh_in_uhz; 1043 in_out_vrr->min_duration_in_us = 1044 calc_duration_in_us_from_refresh_in_uhz( 1045 (unsigned int)max_refresh_in_uhz); 1046 1047 if (in_config->state == VRR_STATE_ACTIVE_FIXED) 1048 in_out_vrr->fixed_refresh_in_uhz = in_config->fixed_refresh_in_uhz; 1049 else 1050 in_out_vrr->fixed_refresh_in_uhz = 0; 1051 1052 refresh_range = div_u64(in_out_vrr->max_refresh_in_uhz + 500000, 1000000) - 1053 + div_u64(in_out_vrr->min_refresh_in_uhz + 500000, 1000000); 1054 1055 in_out_vrr->supported = true; 1056 } 1057 1058 in_out_vrr->fixed.ramping_active = in_config->ramping; 1059 1060 in_out_vrr->btr.btr_enabled = in_config->btr; 1061 1062 if (in_out_vrr->max_refresh_in_uhz < (2 * in_out_vrr->min_refresh_in_uhz)) 1063 in_out_vrr->btr.btr_enabled = false; 1064 else { 1065 in_out_vrr->btr.margin_in_us = in_out_vrr->max_duration_in_us - 1066 2 * in_out_vrr->min_duration_in_us; 1067 if (in_out_vrr->btr.margin_in_us > BTR_MAX_MARGIN) 1068 in_out_vrr->btr.margin_in_us = BTR_MAX_MARGIN; 1069 } 1070 1071 in_out_vrr->btr.btr_active = false; 1072 in_out_vrr->btr.inserted_duration_in_us = 0; 1073 in_out_vrr->btr.frames_to_insert = 0; 1074 in_out_vrr->btr.frame_counter = 0; 1075 in_out_vrr->fixed.fixed_active = false; 1076 in_out_vrr->fixed.target_refresh_in_uhz = 0; 1077 1078 in_out_vrr->btr.mid_point_in_us = 1079 (in_out_vrr->min_duration_in_us + 1080 in_out_vrr->max_duration_in_us) / 2; 1081 1082 if (in_out_vrr->state == VRR_STATE_UNSUPPORTED) { 1083 in_out_vrr->adjust.v_total_min = stream->timing.v_total; 1084 in_out_vrr->adjust.v_total_max = stream->timing.v_total; 1085 } else if (in_out_vrr->state == VRR_STATE_DISABLED) { 1086 in_out_vrr->adjust.v_total_min = stream->timing.v_total; 1087 in_out_vrr->adjust.v_total_max = stream->timing.v_total; 1088 } else if (in_out_vrr->state == VRR_STATE_INACTIVE) { 1089 in_out_vrr->adjust.v_total_min = stream->timing.v_total; 1090 in_out_vrr->adjust.v_total_max = stream->timing.v_total; 1091 } else if (in_out_vrr->state == VRR_STATE_ACTIVE_VARIABLE && 1092 refresh_range >= MIN_REFRESH_RANGE) { 1093 1094 in_out_vrr->adjust.v_total_min = 1095 mod_freesync_calc_v_total_from_refresh(stream, 1096 in_out_vrr->max_refresh_in_uhz); 1097 in_out_vrr->adjust.v_total_max = 1098 mod_freesync_calc_v_total_from_refresh(stream, 1099 in_out_vrr->min_refresh_in_uhz); 1100 } else if (in_out_vrr->state == VRR_STATE_ACTIVE_FIXED) { 1101 in_out_vrr->fixed.target_refresh_in_uhz = 1102 in_out_vrr->fixed_refresh_in_uhz; 1103 if (in_out_vrr->fixed.ramping_active && 1104 in_out_vrr->fixed.fixed_active) { 1105 /* Do not update vtotals if ramping is already active 1106 * in order to continue ramp from current refresh. 1107 */ 1108 in_out_vrr->fixed.fixed_active = true; 1109 } else { 1110 in_out_vrr->fixed.fixed_active = true; 1111 in_out_vrr->adjust.v_total_min = 1112 mod_freesync_calc_v_total_from_refresh(stream, 1113 in_out_vrr->fixed.target_refresh_in_uhz); 1114 in_out_vrr->adjust.v_total_max = 1115 in_out_vrr->adjust.v_total_min; 1116 } 1117 } else { 1118 in_out_vrr->state = VRR_STATE_INACTIVE; 1119 in_out_vrr->adjust.v_total_min = stream->timing.v_total; 1120 in_out_vrr->adjust.v_total_max = stream->timing.v_total; 1121 } 1122 } 1123 1124 void mod_freesync_handle_preflip(struct mod_freesync *mod_freesync, 1125 const struct dc_plane_state *plane, 1126 const struct dc_stream_state *stream, 1127 unsigned int curr_time_stamp_in_us, 1128 struct mod_vrr_params *in_out_vrr) 1129 { 1130 struct core_freesync *core_freesync = NULL; 1131 unsigned int last_render_time_in_us = 0; 1132 1133 if (mod_freesync == NULL) 1134 return; 1135 1136 core_freesync = MOD_FREESYNC_TO_CORE(mod_freesync); 1137 1138 if (in_out_vrr->supported && 1139 in_out_vrr->state == VRR_STATE_ACTIVE_VARIABLE) { 1140 unsigned int oldest_index = plane->time.index + 1; 1141 1142 if (oldest_index >= DC_PLANE_UPDATE_TIMES_MAX) 1143 oldest_index = 0; 1144 1145 last_render_time_in_us = curr_time_stamp_in_us - 1146 plane->time.prev_update_time_in_us; 1147 1148 if (in_out_vrr->btr.btr_enabled) { 1149 apply_below_the_range(core_freesync, 1150 stream, 1151 last_render_time_in_us, 1152 in_out_vrr); 1153 } else { 1154 apply_fixed_refresh(core_freesync, 1155 stream, 1156 last_render_time_in_us, 1157 in_out_vrr); 1158 } 1159 1160 determine_flip_interval_workaround_req(in_out_vrr, 1161 curr_time_stamp_in_us); 1162 1163 } 1164 } 1165 1166 void mod_freesync_handle_v_update(struct mod_freesync *mod_freesync, 1167 const struct dc_stream_state *stream, 1168 struct mod_vrr_params *in_out_vrr) 1169 { 1170 struct core_freesync *core_freesync = NULL; 1171 unsigned int cur_timestamp_in_us; 1172 unsigned long long cur_tick; 1173 1174 if ((mod_freesync == NULL) || (stream == NULL) || (in_out_vrr == NULL)) 1175 return; 1176 1177 core_freesync = MOD_FREESYNC_TO_CORE(mod_freesync); 1178 1179 if (in_out_vrr->supported == false) 1180 return; 1181 1182 cur_tick = dm_get_timestamp(core_freesync->dc->ctx); 1183 cur_timestamp_in_us = (unsigned int) 1184 div_u64(dm_get_elapse_time_in_ns(core_freesync->dc->ctx, cur_tick, 0), 1000); 1185 1186 in_out_vrr->flip_interval.vsyncs_between_flip++; 1187 in_out_vrr->flip_interval.v_update_timestamp_in_us = cur_timestamp_in_us; 1188 1189 if (in_out_vrr->state == VRR_STATE_ACTIVE_VARIABLE && 1190 (in_out_vrr->flip_interval.flip_interval_workaround_active || 1191 (!in_out_vrr->flip_interval.flip_interval_workaround_active && 1192 in_out_vrr->flip_interval.program_flip_interval_workaround))) { 1193 // set freesync vmin vmax to nominal for workaround 1194 in_out_vrr->adjust.v_total_min = 1195 mod_freesync_calc_v_total_from_refresh( 1196 stream, in_out_vrr->max_refresh_in_uhz); 1197 in_out_vrr->adjust.v_total_max = 1198 in_out_vrr->adjust.v_total_min; 1199 in_out_vrr->flip_interval.program_flip_interval_workaround = false; 1200 in_out_vrr->flip_interval.do_flip_interval_workaround_cleanup = true; 1201 return; 1202 } 1203 1204 if (in_out_vrr->state != VRR_STATE_ACTIVE_VARIABLE && 1205 in_out_vrr->flip_interval.do_flip_interval_workaround_cleanup) { 1206 in_out_vrr->flip_interval.do_flip_interval_workaround_cleanup = false; 1207 in_out_vrr->flip_interval.flip_interval_detect_counter = 0; 1208 in_out_vrr->flip_interval.vsyncs_between_flip = 0; 1209 in_out_vrr->flip_interval.vsync_to_flip_in_us = 0; 1210 } 1211 1212 /* Below the Range Logic */ 1213 1214 /* Only execute if in fullscreen mode */ 1215 if (in_out_vrr->state == VRR_STATE_ACTIVE_VARIABLE && 1216 in_out_vrr->btr.btr_active) { 1217 /* TODO: pass in flag for Pre-DCE12 ASIC 1218 * in order for frame variable duration to take affect, 1219 * it needs to be done one VSYNC early, which is at 1220 * frameCounter == 1. 1221 * For DCE12 and newer updates to V_TOTAL_MIN/MAX 1222 * will take affect on current frame 1223 */ 1224 if (in_out_vrr->btr.frames_to_insert == 1225 in_out_vrr->btr.frame_counter) { 1226 in_out_vrr->adjust.v_total_min = 1227 calc_v_total_from_duration(stream, 1228 in_out_vrr, 1229 in_out_vrr->btr.inserted_duration_in_us); 1230 in_out_vrr->adjust.v_total_max = 1231 in_out_vrr->adjust.v_total_min; 1232 } 1233 1234 if (in_out_vrr->btr.frame_counter > 0) 1235 in_out_vrr->btr.frame_counter--; 1236 1237 /* Restore FreeSync */ 1238 if (in_out_vrr->btr.frame_counter == 0) { 1239 in_out_vrr->adjust.v_total_min = 1240 mod_freesync_calc_v_total_from_refresh(stream, 1241 in_out_vrr->max_refresh_in_uhz); 1242 in_out_vrr->adjust.v_total_max = 1243 mod_freesync_calc_v_total_from_refresh(stream, 1244 in_out_vrr->min_refresh_in_uhz); 1245 } 1246 } 1247 1248 /* If in fullscreen freesync mode or in video, do not program 1249 * static screen ramp values 1250 */ 1251 if (in_out_vrr->state == VRR_STATE_ACTIVE_VARIABLE) 1252 in_out_vrr->fixed.ramping_active = false; 1253 1254 /* Gradual Static Screen Ramping Logic 1255 * Execute if ramp is active and user enabled freesync static screen 1256 */ 1257 if (in_out_vrr->state == VRR_STATE_ACTIVE_FIXED && 1258 in_out_vrr->fixed.ramping_active) { 1259 update_v_total_for_static_ramp( 1260 core_freesync, stream, in_out_vrr); 1261 } 1262 } 1263 1264 void mod_freesync_get_settings(struct mod_freesync *mod_freesync, 1265 const struct mod_vrr_params *vrr, 1266 unsigned int *v_total_min, unsigned int *v_total_max, 1267 unsigned int *event_triggers, 1268 unsigned int *window_min, unsigned int *window_max, 1269 unsigned int *lfc_mid_point_in_us, 1270 unsigned int *inserted_frames, 1271 unsigned int *inserted_duration_in_us) 1272 { 1273 if (mod_freesync == NULL) 1274 return; 1275 1276 if (vrr->supported) { 1277 *v_total_min = vrr->adjust.v_total_min; 1278 *v_total_max = vrr->adjust.v_total_max; 1279 *event_triggers = 0; 1280 *lfc_mid_point_in_us = vrr->btr.mid_point_in_us; 1281 *inserted_frames = vrr->btr.frames_to_insert; 1282 *inserted_duration_in_us = vrr->btr.inserted_duration_in_us; 1283 } 1284 } 1285 1286 unsigned long long mod_freesync_calc_nominal_field_rate( 1287 const struct dc_stream_state *stream) 1288 { 1289 unsigned long long nominal_field_rate_in_uhz = 0; 1290 unsigned int total = stream->timing.h_total * stream->timing.v_total; 1291 1292 /* Calculate nominal field rate for stream, rounded up to nearest integer */ 1293 nominal_field_rate_in_uhz = stream->timing.pix_clk_100hz; 1294 nominal_field_rate_in_uhz *= 100000000ULL; 1295 1296 nominal_field_rate_in_uhz = div_u64(nominal_field_rate_in_uhz, total); 1297 1298 return nominal_field_rate_in_uhz; 1299 } 1300 1301 unsigned long long mod_freesync_calc_field_rate_from_timing( 1302 unsigned int vtotal, unsigned int htotal, unsigned int pix_clk) 1303 { 1304 unsigned long long field_rate_in_uhz = 0; 1305 unsigned int total = htotal * vtotal; 1306 1307 /* Calculate nominal field rate for stream, rounded up to nearest integer */ 1308 field_rate_in_uhz = pix_clk; 1309 field_rate_in_uhz *= 1000000ULL; 1310 1311 field_rate_in_uhz = div_u64(field_rate_in_uhz, total); 1312 1313 return field_rate_in_uhz; 1314 } 1315 1316 bool mod_freesync_get_freesync_enabled(struct mod_vrr_params *pVrr) 1317 { 1318 return (pVrr->state != VRR_STATE_UNSUPPORTED) && (pVrr->state != VRR_STATE_DISABLED); 1319 } 1320 1321 bool mod_freesync_is_valid_range(uint32_t min_refresh_cap_in_uhz, 1322 uint32_t max_refresh_cap_in_uhz, 1323 uint32_t nominal_field_rate_in_uhz) 1324 { 1325 1326 /* Typically nominal refresh calculated can have some fractional part. 1327 * Allow for some rounding error of actual video timing by taking floor 1328 * of caps and request. Round the nominal refresh rate. 1329 * 1330 * Dividing will convert everything to units in Hz although input 1331 * variable name is in uHz! 1332 * 1333 * Also note, this takes care of rounding error on the nominal refresh 1334 * so by rounding error we only expect it to be off by a small amount, 1335 * such as < 0.1 Hz. i.e. 143.9xxx or 144.1xxx. 1336 * 1337 * Example 1. Caps Min = 40 Hz, Max = 144 Hz 1338 * Request Min = 40 Hz, Max = 144 Hz 1339 * Nominal = 143.5x Hz rounded to 144 Hz 1340 * This function should allow this as valid request 1341 * 1342 * Example 2. Caps Min = 40 Hz, Max = 144 Hz 1343 * Request Min = 40 Hz, Max = 144 Hz 1344 * Nominal = 144.4x Hz rounded to 144 Hz 1345 * This function should allow this as valid request 1346 * 1347 * Example 3. Caps Min = 40 Hz, Max = 144 Hz 1348 * Request Min = 40 Hz, Max = 144 Hz 1349 * Nominal = 120.xx Hz rounded to 120 Hz 1350 * This function should return NOT valid since the requested 1351 * max is greater than current timing's nominal 1352 * 1353 * Example 4. Caps Min = 40 Hz, Max = 120 Hz 1354 * Request Min = 40 Hz, Max = 120 Hz 1355 * Nominal = 144.xx Hz rounded to 144 Hz 1356 * This function should return NOT valid since the nominal 1357 * is greater than the capability's max refresh 1358 */ 1359 nominal_field_rate_in_uhz = 1360 div_u64(nominal_field_rate_in_uhz + 500000, 1000000); 1361 min_refresh_cap_in_uhz /= 1000000; 1362 max_refresh_cap_in_uhz /= 1000000; 1363 1364 /* Check nominal is within range */ 1365 if (nominal_field_rate_in_uhz > max_refresh_cap_in_uhz || 1366 nominal_field_rate_in_uhz < min_refresh_cap_in_uhz) 1367 return false; 1368 1369 /* If nominal is less than max, limit the max allowed refresh rate */ 1370 if (nominal_field_rate_in_uhz < max_refresh_cap_in_uhz) 1371 max_refresh_cap_in_uhz = nominal_field_rate_in_uhz; 1372 1373 /* Check min is within range */ 1374 if (min_refresh_cap_in_uhz > max_refresh_cap_in_uhz) 1375 return false; 1376 1377 /* For variable range, check for at least 10 Hz range */ 1378 if (nominal_field_rate_in_uhz - min_refresh_cap_in_uhz < 10) 1379 return false; 1380 1381 return true; 1382 } 1383