1 /* 2 * Copyright 2019 Advanced Micro Devices, Inc. 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice shall be included in 12 * all copies or substantial portions of the Software. 13 * 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 20 * OTHER DEALINGS IN THE SOFTWARE. 21 * 22 * Authors: AMD 23 * 24 */ 25 26 #ifndef _DMUB_REG_H_ 27 #define _DMUB_REG_H_ 28 29 #include "../inc/dmub_types.h" 30 31 struct dmub_srv; 32 33 /* Register offset and field lookup. */ 34 35 #define BASE(seg) BASE_INNER(seg) 36 37 #define REG_OFFSET(base_index, addr) (BASE(base_index) + addr) 38 39 #define REG(reg_name) REG_OFFSET(mm ## reg_name ## _BASE_IDX, mm ## reg_name) 40 41 #define FD(reg_field) reg_field ## __SHIFT, reg_field ## _MASK 42 43 #define FN(reg_name, field) FD(reg_name##__##field) 44 45 /* Register reads and writes. */ 46 47 #define REG_READ(reg) ((CTX)->funcs.reg_read((CTX)->user_ctx, REG(reg))) 48 49 #define REG_WRITE(reg, val) \ 50 ((CTX)->funcs.reg_write((CTX)->user_ctx, REG(reg), (val))) 51 52 /* Register field setting. */ 53 54 #define REG_SET_N(reg_name, n, initial_val, ...) \ 55 dmub_reg_set(CTX, REG(reg_name), initial_val, n, __VA_ARGS__) 56 57 #define REG_SET(reg_name, initial_val, field, val) \ 58 REG_SET_N(reg_name, 1, initial_val, \ 59 FN(reg_name, field), val) 60 61 #define REG_SET_2(reg, init_value, f1, v1, f2, v2) \ 62 REG_SET_N(reg, 2, init_value, \ 63 FN(reg, f1), v1, \ 64 FN(reg, f2), v2) 65 66 #define REG_SET_3(reg, init_value, f1, v1, f2, v2, f3, v3) \ 67 REG_SET_N(reg, 3, init_value, \ 68 FN(reg, f1), v1, \ 69 FN(reg, f2), v2, \ 70 FN(reg, f3), v3) 71 72 #define REG_SET_4(reg, init_value, f1, v1, f2, v2, f3, v3, f4, v4) \ 73 REG_SET_N(reg, 4, init_value, \ 74 FN(reg, f1), v1, \ 75 FN(reg, f2), v2, \ 76 FN(reg, f3), v3, \ 77 FN(reg, f4), v4) 78 79 /* Register field updating. */ 80 81 #define REG_UPDATE_N(reg_name, n, ...)\ 82 dmub_reg_update(CTX, REG(reg_name), n, __VA_ARGS__) 83 84 #define REG_UPDATE(reg_name, field, val) \ 85 REG_UPDATE_N(reg_name, 1, \ 86 FN(reg_name, field), val) 87 88 #define REG_UPDATE_2(reg, f1, v1, f2, v2) \ 89 REG_UPDATE_N(reg, 2,\ 90 FN(reg, f1), v1,\ 91 FN(reg, f2), v2) 92 93 #define REG_UPDATE_3(reg, f1, v1, f2, v2, f3, v3) \ 94 REG_UPDATE_N(reg, 3, \ 95 FN(reg, f1), v1, \ 96 FN(reg, f2), v2, \ 97 FN(reg, f3), v3) 98 99 #define REG_UPDATE_4(reg, f1, v1, f2, v2, f3, v3, f4, v4) \ 100 REG_UPDATE_N(reg, 4, \ 101 FN(reg, f1), v1, \ 102 FN(reg, f2), v2, \ 103 FN(reg, f3), v3, \ 104 FN(reg, f4), v4) 105 106 /* Register field getting. */ 107 108 #define REG_GET(reg_name, field, val) \ 109 dmub_reg_get(CTX, REG(reg_name), FN(reg_name, field), val) 110 111 void dmub_reg_set(struct dmub_srv *srv, uint32_t addr, uint32_t reg_val, int n, 112 uint8_t shift1, uint32_t mask1, uint32_t field_value1, ...); 113 114 void dmub_reg_update(struct dmub_srv *srv, uint32_t addr, int n, uint8_t shift1, 115 uint32_t mask1, uint32_t field_value1, ...); 116 117 void dmub_reg_get(struct dmub_srv *srv, uint32_t addr, uint8_t shift, 118 uint32_t mask, uint32_t *field_value); 119 120 #endif /* _DMUB_REG_H_ */ 121