14562236bSHarry Wentland /* 24562236bSHarry Wentland * Copyright 2012-15 Advanced Micro Devices, Inc. 34562236bSHarry Wentland * 44562236bSHarry Wentland * Permission is hereby granted, free of charge, to any person obtaining a 54562236bSHarry Wentland * copy of this software and associated documentation files (the "Software"), 64562236bSHarry Wentland * to deal in the Software without restriction, including without limitation 74562236bSHarry Wentland * the rights to use, copy, modify, merge, publish, distribute, sublicense, 84562236bSHarry Wentland * and/or sell copies of the Software, and to permit persons to whom the 94562236bSHarry Wentland * Software is furnished to do so, subject to the following conditions: 104562236bSHarry Wentland * 114562236bSHarry Wentland * The above copyright notice and this permission notice shall be included in 124562236bSHarry Wentland * all copies or substantial portions of the Software. 134562236bSHarry Wentland * 144562236bSHarry Wentland * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 154562236bSHarry Wentland * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 164562236bSHarry Wentland * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 174562236bSHarry Wentland * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 184562236bSHarry Wentland * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 194562236bSHarry Wentland * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 204562236bSHarry Wentland * OTHER DEALINGS IN THE SOFTWARE. 214562236bSHarry Wentland * 224562236bSHarry Wentland * Authors: AMD 234562236bSHarry Wentland * 244562236bSHarry Wentland */ 254562236bSHarry Wentland 264562236bSHarry Wentland #ifndef __DAL_IRQ_TYPES_H__ 274562236bSHarry Wentland #define __DAL_IRQ_TYPES_H__ 284562236bSHarry Wentland 294562236bSHarry Wentland struct dc_context; 304562236bSHarry Wentland 314562236bSHarry Wentland typedef void (*interrupt_handler)(void *); 324562236bSHarry Wentland 334562236bSHarry Wentland typedef void *irq_handler_idx; 344562236bSHarry Wentland #define DAL_INVALID_IRQ_HANDLER_IDX NULL 354562236bSHarry Wentland 364562236bSHarry Wentland /* The order of the IRQ sources is important and MUST match the one's 374562236bSHarry Wentland of base driver */ 384562236bSHarry Wentland enum dc_irq_source { 394562236bSHarry Wentland /* Use as mask to specify invalid irq source */ 404562236bSHarry Wentland DC_IRQ_SOURCE_INVALID = 0, 414562236bSHarry Wentland 424562236bSHarry Wentland DC_IRQ_SOURCE_HPD1, 434562236bSHarry Wentland DC_IRQ_SOURCE_HPD2, 444562236bSHarry Wentland DC_IRQ_SOURCE_HPD3, 454562236bSHarry Wentland DC_IRQ_SOURCE_HPD4, 464562236bSHarry Wentland DC_IRQ_SOURCE_HPD5, 474562236bSHarry Wentland DC_IRQ_SOURCE_HPD6, 484562236bSHarry Wentland 494562236bSHarry Wentland DC_IRQ_SOURCE_HPD1RX, 504562236bSHarry Wentland DC_IRQ_SOURCE_HPD2RX, 514562236bSHarry Wentland DC_IRQ_SOURCE_HPD3RX, 524562236bSHarry Wentland DC_IRQ_SOURCE_HPD4RX, 534562236bSHarry Wentland DC_IRQ_SOURCE_HPD5RX, 544562236bSHarry Wentland DC_IRQ_SOURCE_HPD6RX, 554562236bSHarry Wentland 564562236bSHarry Wentland DC_IRQ_SOURCE_I2C_DDC1, 574562236bSHarry Wentland DC_IRQ_SOURCE_I2C_DDC2, 584562236bSHarry Wentland DC_IRQ_SOURCE_I2C_DDC3, 594562236bSHarry Wentland DC_IRQ_SOURCE_I2C_DDC4, 604562236bSHarry Wentland DC_IRQ_SOURCE_I2C_DDC5, 614562236bSHarry Wentland DC_IRQ_SOURCE_I2C_DDC6, 624562236bSHarry Wentland 634562236bSHarry Wentland DC_IRQ_SOURCE_DPSINK1, 644562236bSHarry Wentland DC_IRQ_SOURCE_DPSINK2, 654562236bSHarry Wentland DC_IRQ_SOURCE_DPSINK3, 664562236bSHarry Wentland DC_IRQ_SOURCE_DPSINK4, 674562236bSHarry Wentland DC_IRQ_SOURCE_DPSINK5, 684562236bSHarry Wentland DC_IRQ_SOURCE_DPSINK6, 694562236bSHarry Wentland 704562236bSHarry Wentland DC_IRQ_SOURCE_TIMER, 714562236bSHarry Wentland 724562236bSHarry Wentland DC_IRQ_SOURCE_PFLIP_FIRST, 734562236bSHarry Wentland DC_IRQ_SOURCE_PFLIP1 = DC_IRQ_SOURCE_PFLIP_FIRST, 744562236bSHarry Wentland DC_IRQ_SOURCE_PFLIP2, 754562236bSHarry Wentland DC_IRQ_SOURCE_PFLIP3, 764562236bSHarry Wentland DC_IRQ_SOURCE_PFLIP4, 774562236bSHarry Wentland DC_IRQ_SOURCE_PFLIP5, 784562236bSHarry Wentland DC_IRQ_SOURCE_PFLIP6, 794562236bSHarry Wentland DC_IRQ_SOURCE_PFLIP_UNDERLAY0, 804562236bSHarry Wentland DC_IRQ_SOURCE_PFLIP_LAST = DC_IRQ_SOURCE_PFLIP_UNDERLAY0, 814562236bSHarry Wentland 824562236bSHarry Wentland DC_IRQ_SOURCE_GPIOPAD0, 834562236bSHarry Wentland DC_IRQ_SOURCE_GPIOPAD1, 844562236bSHarry Wentland DC_IRQ_SOURCE_GPIOPAD2, 854562236bSHarry Wentland DC_IRQ_SOURCE_GPIOPAD3, 864562236bSHarry Wentland DC_IRQ_SOURCE_GPIOPAD4, 874562236bSHarry Wentland DC_IRQ_SOURCE_GPIOPAD5, 884562236bSHarry Wentland DC_IRQ_SOURCE_GPIOPAD6, 894562236bSHarry Wentland DC_IRQ_SOURCE_GPIOPAD7, 904562236bSHarry Wentland DC_IRQ_SOURCE_GPIOPAD8, 914562236bSHarry Wentland DC_IRQ_SOURCE_GPIOPAD9, 924562236bSHarry Wentland DC_IRQ_SOURCE_GPIOPAD10, 934562236bSHarry Wentland DC_IRQ_SOURCE_GPIOPAD11, 944562236bSHarry Wentland DC_IRQ_SOURCE_GPIOPAD12, 954562236bSHarry Wentland DC_IRQ_SOURCE_GPIOPAD13, 964562236bSHarry Wentland DC_IRQ_SOURCE_GPIOPAD14, 974562236bSHarry Wentland DC_IRQ_SOURCE_GPIOPAD15, 984562236bSHarry Wentland DC_IRQ_SOURCE_GPIOPAD16, 994562236bSHarry Wentland DC_IRQ_SOURCE_GPIOPAD17, 1004562236bSHarry Wentland DC_IRQ_SOURCE_GPIOPAD18, 1014562236bSHarry Wentland DC_IRQ_SOURCE_GPIOPAD19, 1024562236bSHarry Wentland DC_IRQ_SOURCE_GPIOPAD20, 1034562236bSHarry Wentland DC_IRQ_SOURCE_GPIOPAD21, 1044562236bSHarry Wentland DC_IRQ_SOURCE_GPIOPAD22, 1054562236bSHarry Wentland DC_IRQ_SOURCE_GPIOPAD23, 1064562236bSHarry Wentland DC_IRQ_SOURCE_GPIOPAD24, 1074562236bSHarry Wentland DC_IRQ_SOURCE_GPIOPAD25, 1084562236bSHarry Wentland DC_IRQ_SOURCE_GPIOPAD26, 1094562236bSHarry Wentland DC_IRQ_SOURCE_GPIOPAD27, 1104562236bSHarry Wentland DC_IRQ_SOURCE_GPIOPAD28, 1114562236bSHarry Wentland DC_IRQ_SOURCE_GPIOPAD29, 1124562236bSHarry Wentland DC_IRQ_SOURCE_GPIOPAD30, 1134562236bSHarry Wentland 1144562236bSHarry Wentland DC_IRQ_SOURCE_DC1UNDERFLOW, 1154562236bSHarry Wentland DC_IRQ_SOURCE_DC2UNDERFLOW, 1164562236bSHarry Wentland DC_IRQ_SOURCE_DC3UNDERFLOW, 1174562236bSHarry Wentland DC_IRQ_SOURCE_DC4UNDERFLOW, 1184562236bSHarry Wentland DC_IRQ_SOURCE_DC5UNDERFLOW, 1194562236bSHarry Wentland DC_IRQ_SOURCE_DC6UNDERFLOW, 1204562236bSHarry Wentland 1214562236bSHarry Wentland DC_IRQ_SOURCE_DMCU_SCP, 1224562236bSHarry Wentland DC_IRQ_SOURCE_VBIOS_SW, 1234562236bSHarry Wentland 1244562236bSHarry Wentland DC_IRQ_SOURCE_VUPDATE1, 1254562236bSHarry Wentland DC_IRQ_SOURCE_VUPDATE2, 1264562236bSHarry Wentland DC_IRQ_SOURCE_VUPDATE3, 1274562236bSHarry Wentland DC_IRQ_SOURCE_VUPDATE4, 1284562236bSHarry Wentland DC_IRQ_SOURCE_VUPDATE5, 1294562236bSHarry Wentland DC_IRQ_SOURCE_VUPDATE6, 1304562236bSHarry Wentland 1314562236bSHarry Wentland DAL_IRQ_SOURCES_NUMBER 1324562236bSHarry Wentland }; 1334562236bSHarry Wentland 1344562236bSHarry Wentland enum irq_type 1354562236bSHarry Wentland { 1364562236bSHarry Wentland IRQ_TYPE_PFLIP = DC_IRQ_SOURCE_PFLIP1, 1374562236bSHarry Wentland IRQ_TYPE_VUPDATE = DC_IRQ_SOURCE_VUPDATE1, 1384562236bSHarry Wentland }; 1394562236bSHarry Wentland 1404562236bSHarry Wentland #define DAL_VALID_IRQ_SRC_NUM(src) \ 1414562236bSHarry Wentland ((src) <= DAL_IRQ_SOURCES_NUMBER && (src) > DC_IRQ_SOURCE_INVALID) 1424562236bSHarry Wentland 1434562236bSHarry Wentland /* Number of Page Flip IRQ Sources. */ 1444562236bSHarry Wentland #define DAL_PFLIP_IRQ_SRC_NUM \ 1454562236bSHarry Wentland (DC_IRQ_SOURCE_PFLIP_LAST - DC_IRQ_SOURCE_PFLIP_FIRST + 1) 1464562236bSHarry Wentland 1474562236bSHarry Wentland /* the number of contexts may be expanded in the future based on needs */ 1484562236bSHarry Wentland enum dc_interrupt_context { 1494562236bSHarry Wentland INTERRUPT_LOW_IRQ_CONTEXT = 0, 1504562236bSHarry Wentland INTERRUPT_HIGH_IRQ_CONTEXT, 1514562236bSHarry Wentland INTERRUPT_CONTEXT_NUMBER 1524562236bSHarry Wentland }; 1534562236bSHarry Wentland 1544562236bSHarry Wentland enum dc_interrupt_porlarity { 1554562236bSHarry Wentland INTERRUPT_POLARITY_DEFAULT = 0, 1564562236bSHarry Wentland INTERRUPT_POLARITY_LOW = INTERRUPT_POLARITY_DEFAULT, 1574562236bSHarry Wentland INTERRUPT_POLARITY_HIGH, 1584562236bSHarry Wentland INTERRUPT_POLARITY_BOTH 1594562236bSHarry Wentland }; 1604562236bSHarry Wentland 1614562236bSHarry Wentland #define DC_DECODE_INTERRUPT_POLARITY(int_polarity) \ 1624562236bSHarry Wentland (int_polarity == INTERRUPT_POLARITY_LOW) ? "Low" : \ 1634562236bSHarry Wentland (int_polarity == INTERRUPT_POLARITY_HIGH) ? "High" : \ 1644562236bSHarry Wentland (int_polarity == INTERRUPT_POLARITY_BOTH) ? "Both" : "Invalid" 1654562236bSHarry Wentland 1664562236bSHarry Wentland struct dc_timer_interrupt_params { 1674562236bSHarry Wentland uint32_t micro_sec_interval; 1684562236bSHarry Wentland enum dc_interrupt_context int_context; 1694562236bSHarry Wentland }; 1704562236bSHarry Wentland 1714562236bSHarry Wentland struct dc_interrupt_params { 1724562236bSHarry Wentland /* The polarity *change* which will trigger an interrupt. 1734562236bSHarry Wentland * If 'requested_polarity == INTERRUPT_POLARITY_BOTH', then 1744562236bSHarry Wentland * 'current_polarity' must be initialised. */ 1754562236bSHarry Wentland enum dc_interrupt_porlarity requested_polarity; 1764562236bSHarry Wentland /* If 'requested_polarity == INTERRUPT_POLARITY_BOTH', 1774562236bSHarry Wentland * 'current_polarity' should contain the current state, which means 1784562236bSHarry Wentland * the interrupt will be triggered when state changes from what is, 1794562236bSHarry Wentland * in 'current_polarity'. */ 1804562236bSHarry Wentland enum dc_interrupt_porlarity current_polarity; 1814562236bSHarry Wentland enum dc_irq_source irq_source; 1824562236bSHarry Wentland enum dc_interrupt_context int_context; 1834562236bSHarry Wentland }; 1844562236bSHarry Wentland 1854562236bSHarry Wentland #endif 186