1 /*
2  * Copyright 2015 Advanced Micro Devices, Inc.
3  *
4  * Permission is hereby granted, free of charge, to any person obtaining a
5  * copy of this software and associated documentation files (the "Software"),
6  * to deal in the Software without restriction, including without limitation
7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8  * and/or sell copies of the Software, and to permit persons to whom the
9  * Software is furnished to do so, subject to the following conditions:
10  *
11  * The above copyright notice and this permission notice shall be included in
12  * all copies or substantial portions of the Software.
13  *
14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
17  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20  * OTHER DEALINGS IN THE SOFTWARE.
21  *
22  * Authors: AMD
23  */
24 
25 #ifndef DRIVERS_GPU_DRM_AMD_DC_DEV_DC_INC_RESOURCE_H_
26 #define DRIVERS_GPU_DRM_AMD_DC_DEV_DC_INC_RESOURCE_H_
27 
28 #include "core_types.h"
29 #include "core_status.h"
30 #include "dal_asic_id.h"
31 #include "dm_pp_smu.h"
32 
33 #define MEMORY_TYPE_MULTIPLIER_CZ 4
34 
35 enum dce_version resource_parse_asic_id(
36 		struct hw_asic_id asic_id);
37 
38 struct resource_caps {
39 	int num_timing_generator;
40 	int num_opp;
41 	int num_video_plane;
42 	int num_audio;
43 	int num_stream_encoder;
44 	int num_pll;
45 	int num_dwb;
46 	int num_ddc;
47 #ifdef CONFIG_DRM_AMD_DC_DCN2_0
48 	int num_vmid;
49 #ifdef CONFIG_DRM_AMD_DC_DSC_SUPPORT
50 	int num_dsc;
51 #endif
52 #endif
53 };
54 
55 struct resource_straps {
56 	uint32_t hdmi_disable;
57 	uint32_t dc_pinstraps_audio;
58 	uint32_t audio_stream_number;
59 };
60 
61 struct resource_create_funcs {
62 	void (*read_dce_straps)(
63 			struct dc_context *ctx, struct resource_straps *straps);
64 
65 	struct audio *(*create_audio)(
66 			struct dc_context *ctx, unsigned int inst);
67 
68 	struct stream_encoder *(*create_stream_encoder)(
69 			enum engine_id eng_id, struct dc_context *ctx);
70 
71 	struct dce_hwseq *(*create_hwseq)(
72 			struct dc_context *ctx);
73 };
74 
75 bool resource_construct(
76 	unsigned int num_virtual_links,
77 	struct dc *dc,
78 	struct resource_pool *pool,
79 	const struct resource_create_funcs *create_funcs);
80 
81 struct resource_pool *dc_create_resource_pool(struct dc  *dc,
82 					      const struct dc_init_data *init_data,
83 					      enum dce_version dc_version);
84 
85 void dc_destroy_resource_pool(struct dc *dc);
86 
87 enum dc_status resource_map_pool_resources(
88 		const struct dc *dc,
89 		struct dc_state *context,
90 		struct dc_stream_state *stream);
91 
92 bool resource_build_scaling_params(struct pipe_ctx *pipe_ctx);
93 
94 enum dc_status resource_build_scaling_params_for_context(
95 		const struct dc *dc,
96 		struct dc_state *context);
97 
98 void resource_build_info_frame(struct pipe_ctx *pipe_ctx);
99 
100 void resource_unreference_clock_source(
101 		struct resource_context *res_ctx,
102 		const struct resource_pool *pool,
103 		struct clock_source *clock_source);
104 
105 void resource_reference_clock_source(
106 		struct resource_context *res_ctx,
107 		const struct resource_pool *pool,
108 		struct clock_source *clock_source);
109 
110 int resource_get_clock_source_reference(
111 		struct resource_context *res_ctx,
112 		const struct resource_pool *pool,
113 		struct clock_source *clock_source);
114 
115 bool resource_are_streams_timing_synchronizable(
116 		struct dc_stream_state *stream1,
117 		struct dc_stream_state *stream2);
118 
119 struct clock_source *resource_find_used_clk_src_for_sharing(
120 		struct resource_context *res_ctx,
121 		struct pipe_ctx *pipe_ctx);
122 
123 struct clock_source *dc_resource_find_first_free_pll(
124 		struct resource_context *res_ctx,
125 		const struct resource_pool *pool);
126 
127 struct pipe_ctx *resource_get_head_pipe_for_stream(
128 		struct resource_context *res_ctx,
129 		struct dc_stream_state *stream);
130 
131 bool resource_attach_surfaces_to_context(
132 		struct dc_plane_state *const *plane_state,
133 		int surface_count,
134 		struct dc_stream_state *dc_stream,
135 		struct dc_state *context,
136 		const struct resource_pool *pool);
137 
138 struct pipe_ctx *find_idle_secondary_pipe(
139 		struct resource_context *res_ctx,
140 		const struct resource_pool *pool,
141 		const struct pipe_ctx *primary_pipe);
142 
143 bool resource_is_stream_unchanged(
144 	struct dc_state *old_context, struct dc_stream_state *stream);
145 
146 bool resource_validate_attach_surfaces(
147 		const struct dc_validation_set set[],
148 		int set_count,
149 		const struct dc_state *old_context,
150 		struct dc_state *context,
151 		const struct resource_pool *pool);
152 
153 void resource_validate_ctx_update_pointer_after_copy(
154 		const struct dc_state *src_ctx,
155 		struct dc_state *dst_ctx);
156 
157 enum dc_status resource_map_clock_resources(
158 		const struct dc *dc,
159 		struct dc_state *context,
160 		struct dc_stream_state *stream);
161 
162 enum dc_status resource_map_phy_clock_resources(
163 		const struct dc *dc,
164 		struct dc_state *context,
165 		struct dc_stream_state *stream);
166 
167 bool pipe_need_reprogram(
168 		struct pipe_ctx *pipe_ctx_old,
169 		struct pipe_ctx *pipe_ctx);
170 
171 void resource_build_bit_depth_reduction_params(struct dc_stream_state *stream,
172 		struct bit_depth_reduction_params *fmt_bit_depth);
173 
174 void update_audio_usage(
175 		struct resource_context *res_ctx,
176 		const struct resource_pool *pool,
177 		struct audio *audio,
178 		bool acquired);
179 
180 unsigned int resource_pixel_format_to_bpp(enum surface_pixel_format format);
181 
182 struct pipe_ctx *dc_res_get_odm_bottom_pipe(struct pipe_ctx *pipe_ctx);
183 bool dc_res_is_odm_head_pipe(struct pipe_ctx *pipe_ctx);
184 
185 #endif /* DRIVERS_GPU_DRM_AMD_DC_DEV_DC_INC_RESOURCE_H_ */
186