1 /* 2 * Copyright 2015 Advanced Micro Devices, Inc. 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice shall be included in 12 * all copies or substantial portions of the Software. 13 * 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 20 * OTHER DEALINGS IN THE SOFTWARE. 21 * 22 * Authors: AMD 23 */ 24 25 #ifndef DRIVERS_GPU_DRM_AMD_DC_DEV_DC_INC_RESOURCE_H_ 26 #define DRIVERS_GPU_DRM_AMD_DC_DEV_DC_INC_RESOURCE_H_ 27 28 #include "core_types.h" 29 #include "core_status.h" 30 #include "dal_asic_id.h" 31 #include "dm_pp_smu.h" 32 33 #define MEMORY_TYPE_MULTIPLIER_CZ 4 34 35 enum dce_version resource_parse_asic_id( 36 struct hw_asic_id asic_id); 37 38 struct resource_caps { 39 int num_timing_generator; 40 int num_opp; 41 int num_video_plane; 42 int num_audio; 43 int num_stream_encoder; 44 int num_pll; 45 int num_dwb; 46 int num_ddc; 47 }; 48 49 struct resource_straps { 50 uint32_t hdmi_disable; 51 uint32_t dc_pinstraps_audio; 52 uint32_t audio_stream_number; 53 }; 54 55 struct resource_create_funcs { 56 void (*read_dce_straps)( 57 struct dc_context *ctx, struct resource_straps *straps); 58 59 struct audio *(*create_audio)( 60 struct dc_context *ctx, unsigned int inst); 61 62 struct stream_encoder *(*create_stream_encoder)( 63 enum engine_id eng_id, struct dc_context *ctx); 64 65 struct dce_hwseq *(*create_hwseq)( 66 struct dc_context *ctx); 67 }; 68 69 bool resource_construct( 70 unsigned int num_virtual_links, 71 struct dc *dc, 72 struct resource_pool *pool, 73 const struct resource_create_funcs *create_funcs); 74 75 struct resource_pool *dc_create_resource_pool(struct dc *dc, 76 const struct dc_init_data *init_data, 77 enum dce_version dc_version); 78 79 void dc_destroy_resource_pool(struct dc *dc); 80 81 enum dc_status resource_map_pool_resources( 82 const struct dc *dc, 83 struct dc_state *context, 84 struct dc_stream_state *stream); 85 86 bool resource_build_scaling_params(struct pipe_ctx *pipe_ctx); 87 88 enum dc_status resource_build_scaling_params_for_context( 89 const struct dc *dc, 90 struct dc_state *context); 91 92 void resource_build_info_frame(struct pipe_ctx *pipe_ctx); 93 94 void resource_unreference_clock_source( 95 struct resource_context *res_ctx, 96 const struct resource_pool *pool, 97 struct clock_source *clock_source); 98 99 void resource_reference_clock_source( 100 struct resource_context *res_ctx, 101 const struct resource_pool *pool, 102 struct clock_source *clock_source); 103 104 int resource_get_clock_source_reference( 105 struct resource_context *res_ctx, 106 const struct resource_pool *pool, 107 struct clock_source *clock_source); 108 109 bool resource_are_streams_timing_synchronizable( 110 struct dc_stream_state *stream1, 111 struct dc_stream_state *stream2); 112 113 struct clock_source *resource_find_used_clk_src_for_sharing( 114 struct resource_context *res_ctx, 115 struct pipe_ctx *pipe_ctx); 116 117 struct clock_source *dc_resource_find_first_free_pll( 118 struct resource_context *res_ctx, 119 const struct resource_pool *pool); 120 121 struct pipe_ctx *resource_get_head_pipe_for_stream( 122 struct resource_context *res_ctx, 123 struct dc_stream_state *stream); 124 125 bool resource_attach_surfaces_to_context( 126 struct dc_plane_state *const *plane_state, 127 int surface_count, 128 struct dc_stream_state *dc_stream, 129 struct dc_state *context, 130 const struct resource_pool *pool); 131 132 struct pipe_ctx *find_idle_secondary_pipe( 133 struct resource_context *res_ctx, 134 const struct resource_pool *pool, 135 const struct pipe_ctx *primary_pipe); 136 137 bool resource_is_stream_unchanged( 138 struct dc_state *old_context, struct dc_stream_state *stream); 139 140 bool resource_validate_attach_surfaces( 141 const struct dc_validation_set set[], 142 int set_count, 143 const struct dc_state *old_context, 144 struct dc_state *context, 145 const struct resource_pool *pool); 146 147 void resource_validate_ctx_update_pointer_after_copy( 148 const struct dc_state *src_ctx, 149 struct dc_state *dst_ctx); 150 151 enum dc_status resource_map_clock_resources( 152 const struct dc *dc, 153 struct dc_state *context, 154 struct dc_stream_state *stream); 155 156 enum dc_status resource_map_phy_clock_resources( 157 const struct dc *dc, 158 struct dc_state *context, 159 struct dc_stream_state *stream); 160 161 bool pipe_need_reprogram( 162 struct pipe_ctx *pipe_ctx_old, 163 struct pipe_ctx *pipe_ctx); 164 165 void resource_build_bit_depth_reduction_params(struct dc_stream_state *stream, 166 struct bit_depth_reduction_params *fmt_bit_depth); 167 168 void update_audio_usage( 169 struct resource_context *res_ctx, 170 const struct resource_pool *pool, 171 struct audio *audio, 172 bool acquired); 173 174 unsigned int resource_pixel_format_to_bpp(enum surface_pixel_format format); 175 176 struct pipe_ctx *dc_res_get_odm_bottom_pipe(struct pipe_ctx *pipe_ctx); 177 bool dc_res_is_odm_head_pipe(struct pipe_ctx *pipe_ctx); 178 179 #endif /* DRIVERS_GPU_DRM_AMD_DC_DEV_DC_INC_RESOURCE_H_ */ 180