xref: /openbmc/linux/drivers/gpu/drm/amd/display/dc/inc/resource.h (revision aa298b30ce566bb7fe0d5967d3d864cf636d8e4f)
1 /*
2  * Copyright 2015 Advanced Micro Devices, Inc.
3  *
4  * Permission is hereby granted, free of charge, to any person obtaining a
5  * copy of this software and associated documentation files (the "Software"),
6  * to deal in the Software without restriction, including without limitation
7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8  * and/or sell copies of the Software, and to permit persons to whom the
9  * Software is furnished to do so, subject to the following conditions:
10  *
11  * The above copyright notice and this permission notice shall be included in
12  * all copies or substantial portions of the Software.
13  *
14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
17  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20  * OTHER DEALINGS IN THE SOFTWARE.
21  *
22  * Authors: AMD
23  */
24 
25 #ifndef DRIVERS_GPU_DRM_AMD_DC_DEV_DC_INC_RESOURCE_H_
26 #define DRIVERS_GPU_DRM_AMD_DC_DEV_DC_INC_RESOURCE_H_
27 
28 #include "core_types.h"
29 #include "core_status.h"
30 #include "dal_asic_id.h"
31 #include "dm_pp_smu.h"
32 
33 #define MEMORY_TYPE_MULTIPLIER_CZ 4
34 #define MEMORY_TYPE_HBM 2
35 
36 
37 #define IS_PIPE_SYNCD_VALID(pipe) ((((pipe)->pipe_idx_syncd) & 0x80)?1:0)
38 #define GET_PIPE_SYNCD_FROM_PIPE(pipe) ((pipe)->pipe_idx_syncd & 0x7F)
39 #define SET_PIPE_SYNCD_TO_PIPE(pipe, pipe_syncd) ((pipe)->pipe_idx_syncd = (0x80 | pipe_syncd))
40 #define FREE_PIPE_INDEX_NOT_FOUND -1
41 
42 enum dce_version resource_parse_asic_id(
43 		struct hw_asic_id asic_id);
44 
45 struct resource_caps {
46 	int num_timing_generator;
47 	int num_opp;
48 	int num_video_plane;
49 	int num_audio;
50 	int num_stream_encoder;
51 	int num_pll;
52 	int num_dwb;
53 	int num_ddc;
54 	int num_vmid;
55 	int num_dsc;
56 	unsigned int num_dig_link_enc; // Total number of DIGs (digital encoders) in DIO (Display Input/Output).
57 	unsigned int num_usb4_dpia; // Total number of USB4 DPIA (DisplayPort Input Adapters).
58 	int num_hpo_dp_stream_encoder;
59 	int num_hpo_dp_link_encoder;
60 	int num_mpc_3dlut;
61 };
62 
63 struct resource_straps {
64 	uint32_t hdmi_disable;
65 	uint32_t dc_pinstraps_audio;
66 	uint32_t audio_stream_number;
67 };
68 
69 struct resource_create_funcs {
70 	void (*read_dce_straps)(
71 			struct dc_context *ctx, struct resource_straps *straps);
72 
73 	struct audio *(*create_audio)(
74 			struct dc_context *ctx, unsigned int inst);
75 
76 	struct stream_encoder *(*create_stream_encoder)(
77 			enum engine_id eng_id, struct dc_context *ctx);
78 
79 	struct hpo_dp_stream_encoder *(*create_hpo_dp_stream_encoder)(
80 			enum engine_id eng_id, struct dc_context *ctx);
81 
82 	struct hpo_dp_link_encoder *(*create_hpo_dp_link_encoder)(
83 			uint8_t inst,
84 			struct dc_context *ctx);
85 
86 	struct dce_hwseq *(*create_hwseq)(
87 			struct dc_context *ctx);
88 };
89 
90 bool resource_construct(
91 	unsigned int num_virtual_links,
92 	struct dc *dc,
93 	struct resource_pool *pool,
94 	const struct resource_create_funcs *create_funcs);
95 
96 struct resource_pool *dc_create_resource_pool(struct dc  *dc,
97 					      const struct dc_init_data *init_data,
98 					      enum dce_version dc_version);
99 
100 void dc_destroy_resource_pool(struct dc *dc);
101 
102 enum dc_status resource_map_pool_resources(
103 		const struct dc *dc,
104 		struct dc_state *context,
105 		struct dc_stream_state *stream);
106 
107 bool resource_build_scaling_params(struct pipe_ctx *pipe_ctx);
108 
109 enum dc_status resource_build_scaling_params_for_context(
110 		const struct dc *dc,
111 		struct dc_state *context);
112 
113 void resource_build_info_frame(struct pipe_ctx *pipe_ctx);
114 
115 void resource_unreference_clock_source(
116 		struct resource_context *res_ctx,
117 		const struct resource_pool *pool,
118 		struct clock_source *clock_source);
119 
120 void resource_reference_clock_source(
121 		struct resource_context *res_ctx,
122 		const struct resource_pool *pool,
123 		struct clock_source *clock_source);
124 
125 int resource_get_clock_source_reference(
126 		struct resource_context *res_ctx,
127 		const struct resource_pool *pool,
128 		struct clock_source *clock_source);
129 
130 bool resource_are_streams_timing_synchronizable(
131 		struct dc_stream_state *stream1,
132 		struct dc_stream_state *stream2);
133 
134 bool resource_are_vblanks_synchronizable(
135 		struct dc_stream_state *stream1,
136 		struct dc_stream_state *stream2);
137 
138 struct clock_source *resource_find_used_clk_src_for_sharing(
139 		struct resource_context *res_ctx,
140 		struct pipe_ctx *pipe_ctx);
141 
142 struct clock_source *dc_resource_find_first_free_pll(
143 		struct resource_context *res_ctx,
144 		const struct resource_pool *pool);
145 
146 struct pipe_ctx *resource_get_head_pipe_for_stream(
147 		struct resource_context *res_ctx,
148 		struct dc_stream_state *stream);
149 
150 bool resource_attach_surfaces_to_context(
151 		struct dc_plane_state *const *plane_state,
152 		int surface_count,
153 		struct dc_stream_state *dc_stream,
154 		struct dc_state *context,
155 		const struct resource_pool *pool);
156 
157 struct pipe_ctx *find_free_secondary_pipe_legacy(
158 		struct resource_context *res_ctx,
159 		const struct resource_pool *pool,
160 		const struct pipe_ctx *primary_pipe);
161 
162 int resource_find_free_pipe_used_in_cur_mpc_blending_tree(
163 		const struct resource_context *cur_res_ctx,
164 		struct resource_context *new_res_ctx,
165 		const struct pipe_ctx *cur_opp_head);
166 
167 int recource_find_free_pipe_not_used_in_cur_res_ctx(
168 		const struct resource_context *cur_res_ctx,
169 		struct resource_context *new_res_ctx,
170 		const struct resource_pool *pool);
171 
172 int resource_find_free_pipe_used_as_cur_sec_dpp_in_mpcc_combine(
173 		const struct resource_context *cur_res_ctx,
174 		struct resource_context *new_res_ctx,
175 		const struct resource_pool *pool);
176 
177 int resource_find_any_free_pipe(struct resource_context *new_res_ctx,
178 		const struct resource_pool *pool);
179 
180 bool resource_validate_attach_surfaces(
181 		const struct dc_validation_set set[],
182 		int set_count,
183 		const struct dc_state *old_context,
184 		struct dc_state *context,
185 		const struct resource_pool *pool);
186 
187 enum dc_status resource_map_clock_resources(
188 		const struct dc *dc,
189 		struct dc_state *context,
190 		struct dc_stream_state *stream);
191 
192 enum dc_status resource_map_phy_clock_resources(
193 		const struct dc *dc,
194 		struct dc_state *context,
195 		struct dc_stream_state *stream);
196 
197 bool pipe_need_reprogram(
198 		struct pipe_ctx *pipe_ctx_old,
199 		struct pipe_ctx *pipe_ctx);
200 
201 void resource_build_bit_depth_reduction_params(struct dc_stream_state *stream,
202 		struct bit_depth_reduction_params *fmt_bit_depth);
203 
204 void update_audio_usage(
205 		struct resource_context *res_ctx,
206 		const struct resource_pool *pool,
207 		struct audio *audio,
208 		bool acquired);
209 
210 unsigned int resource_pixel_format_to_bpp(enum surface_pixel_format format);
211 
212 void get_audio_check(struct audio_info *aud_modes,
213 	struct audio_check *aud_chk);
214 
215 int get_num_mpc_splits(struct pipe_ctx *pipe);
216 
217 int get_num_odm_splits(struct pipe_ctx *pipe);
218 
219 bool get_temp_dp_link_res(struct dc_link *link,
220 		struct link_resource *link_res,
221 		struct dc_link_settings *link_settings);
222 
223 #if defined(CONFIG_DRM_AMD_DC_FP)
224 struct hpo_dp_link_encoder *resource_get_hpo_dp_link_enc_for_det_lt(
225 		const struct resource_context *res_ctx,
226 		const struct resource_pool *pool,
227 		const struct dc_link *link);
228 #endif
229 
230 void reset_syncd_pipes_from_disabled_pipes(struct dc *dc,
231 	struct dc_state *context);
232 
233 void check_syncd_pipes_for_disabled_master_pipe(struct dc *dc,
234 	struct dc_state *context,
235 	uint8_t disabled_master_pipe_idx);
236 
237 void reset_sync_context_for_pipe(const struct dc *dc,
238 	struct dc_state *context,
239 	uint8_t pipe_idx);
240 
241 uint8_t resource_transmitter_to_phy_idx(const struct dc *dc, enum transmitter transmitter);
242 
243 const struct link_hwss *get_link_hwss(const struct dc_link *link,
244 		const struct link_resource *link_res);
245 
246 bool is_h_timing_divisible_by_2(struct dc_stream_state *stream);
247 
248 bool dc_resource_acquire_secondary_pipe_for_mpc_odm(
249 		const struct dc *dc,
250 		struct dc_state *state,
251 		struct pipe_ctx *pri_pipe,
252 		struct pipe_ctx *sec_pipe,
253 		bool odm);
254 
255 /* A test harness interface that modifies dp encoder resources in the given dc
256  * state and bypasses the need to revalidate. The interface assumes that the
257  * test harness interface is called with pre-validated link config stored in the
258  * pipe_ctx and updates dp encoder resources according to the link config.
259  */
260 enum dc_status update_dp_encoder_resources_for_test_harness(const struct dc *dc,
261 		struct dc_state *context,
262 		struct pipe_ctx *pipe_ctx);
263 #endif /* DRIVERS_GPU_DRM_AMD_DC_DEV_DC_INC_RESOURCE_H_ */
264