1 /*
2  * Copyright 2015 Advanced Micro Devices, Inc.
3  *
4  * Permission is hereby granted, free of charge, to any person obtaining a
5  * copy of this software and associated documentation files (the "Software"),
6  * to deal in the Software without restriction, including without limitation
7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8  * and/or sell copies of the Software, and to permit persons to whom the
9  * Software is furnished to do so, subject to the following conditions:
10  *
11  * The above copyright notice and this permission notice shall be included in
12  * all copies or substantial portions of the Software.
13  *
14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
17  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20  * OTHER DEALINGS IN THE SOFTWARE.
21  *
22  * Authors: AMD
23  */
24 
25 #ifndef DRIVERS_GPU_DRM_AMD_DC_DEV_DC_INC_RESOURCE_H_
26 #define DRIVERS_GPU_DRM_AMD_DC_DEV_DC_INC_RESOURCE_H_
27 
28 #include "core_types.h"
29 #include "core_status.h"
30 #include "dal_asic_id.h"
31 #include "dm_pp_smu.h"
32 
33 enum dce_version resource_parse_asic_id(
34 		struct hw_asic_id asic_id);
35 
36 struct resource_caps {
37 	int num_timing_generator;
38 	int num_opp;
39 	int num_video_plane;
40 	int num_audio;
41 	int num_stream_encoder;
42 	int num_pll;
43 	int num_dwb;
44 	int num_ddc;
45 };
46 
47 struct resource_straps {
48 	uint32_t hdmi_disable;
49 	uint32_t dc_pinstraps_audio;
50 	uint32_t audio_stream_number;
51 };
52 
53 struct resource_create_funcs {
54 	void (*read_dce_straps)(
55 			struct dc_context *ctx, struct resource_straps *straps);
56 
57 	struct audio *(*create_audio)(
58 			struct dc_context *ctx, unsigned int inst);
59 
60 	struct stream_encoder *(*create_stream_encoder)(
61 			enum engine_id eng_id, struct dc_context *ctx);
62 
63 	struct dce_hwseq *(*create_hwseq)(
64 			struct dc_context *ctx);
65 };
66 
67 bool resource_construct(
68 	unsigned int num_virtual_links,
69 	struct dc *dc,
70 	struct resource_pool *pool,
71 	const struct resource_create_funcs *create_funcs);
72 
73 struct resource_pool *dc_create_resource_pool(struct dc  *dc,
74 					      const struct dc_init_data *init_data,
75 					      enum dce_version dc_version);
76 
77 void dc_destroy_resource_pool(struct dc *dc);
78 
79 enum dc_status resource_map_pool_resources(
80 		const struct dc *dc,
81 		struct dc_state *context,
82 		struct dc_stream_state *stream);
83 
84 bool resource_build_scaling_params(struct pipe_ctx *pipe_ctx);
85 
86 enum dc_status resource_build_scaling_params_for_context(
87 		const struct dc *dc,
88 		struct dc_state *context);
89 
90 void resource_build_info_frame(struct pipe_ctx *pipe_ctx);
91 
92 void resource_unreference_clock_source(
93 		struct resource_context *res_ctx,
94 		const struct resource_pool *pool,
95 		struct clock_source *clock_source);
96 
97 void resource_reference_clock_source(
98 		struct resource_context *res_ctx,
99 		const struct resource_pool *pool,
100 		struct clock_source *clock_source);
101 
102 int resource_get_clock_source_reference(
103 		struct resource_context *res_ctx,
104 		const struct resource_pool *pool,
105 		struct clock_source *clock_source);
106 
107 bool resource_are_streams_timing_synchronizable(
108 		struct dc_stream_state *stream1,
109 		struct dc_stream_state *stream2);
110 
111 struct clock_source *resource_find_used_clk_src_for_sharing(
112 		struct resource_context *res_ctx,
113 		struct pipe_ctx *pipe_ctx);
114 
115 struct clock_source *dc_resource_find_first_free_pll(
116 		struct resource_context *res_ctx,
117 		const struct resource_pool *pool);
118 
119 struct pipe_ctx *resource_get_head_pipe_for_stream(
120 		struct resource_context *res_ctx,
121 		struct dc_stream_state *stream);
122 
123 bool resource_attach_surfaces_to_context(
124 		struct dc_plane_state *const *plane_state,
125 		int surface_count,
126 		struct dc_stream_state *dc_stream,
127 		struct dc_state *context,
128 		const struct resource_pool *pool);
129 
130 struct pipe_ctx *find_idle_secondary_pipe(
131 		struct resource_context *res_ctx,
132 		const struct resource_pool *pool,
133 		const struct pipe_ctx *primary_pipe);
134 
135 bool resource_is_stream_unchanged(
136 	struct dc_state *old_context, struct dc_stream_state *stream);
137 
138 bool resource_validate_attach_surfaces(
139 		const struct dc_validation_set set[],
140 		int set_count,
141 		const struct dc_state *old_context,
142 		struct dc_state *context,
143 		const struct resource_pool *pool);
144 
145 void resource_validate_ctx_update_pointer_after_copy(
146 		const struct dc_state *src_ctx,
147 		struct dc_state *dst_ctx);
148 
149 enum dc_status resource_map_clock_resources(
150 		const struct dc *dc,
151 		struct dc_state *context,
152 		struct dc_stream_state *stream);
153 
154 enum dc_status resource_map_phy_clock_resources(
155 		const struct dc *dc,
156 		struct dc_state *context,
157 		struct dc_stream_state *stream);
158 
159 bool pipe_need_reprogram(
160 		struct pipe_ctx *pipe_ctx_old,
161 		struct pipe_ctx *pipe_ctx);
162 
163 void resource_build_bit_depth_reduction_params(struct dc_stream_state *stream,
164 		struct bit_depth_reduction_params *fmt_bit_depth);
165 
166 void update_audio_usage(
167 		struct resource_context *res_ctx,
168 		const struct resource_pool *pool,
169 		struct audio *audio,
170 		bool acquired);
171 
172 unsigned int resource_pixel_format_to_bpp(enum surface_pixel_format format);
173 
174 struct pipe_ctx *dc_res_get_odm_bottom_pipe(struct pipe_ctx *pipe_ctx);
175 bool dc_res_is_odm_head_pipe(struct pipe_ctx *pipe_ctx);
176 
177 #endif /* DRIVERS_GPU_DRM_AMD_DC_DEV_DC_INC_RESOURCE_H_ */
178