1 /* 2 * Copyright 2015 Advanced Micro Devices, Inc. 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice shall be included in 12 * all copies or substantial portions of the Software. 13 * 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 20 * OTHER DEALINGS IN THE SOFTWARE. 21 * 22 * Authors: AMD 23 * 24 */ 25 26 #ifndef __DC_HW_SEQUENCER_H__ 27 #define __DC_HW_SEQUENCER_H__ 28 #include "dc_types.h" 29 #include "clock_source.h" 30 #include "inc/hw/timing_generator.h" 31 #include "inc/hw/opp.h" 32 #include "inc/hw/link_encoder.h" 33 #include "core_status.h" 34 35 enum pipe_gating_control { 36 PIPE_GATING_CONTROL_DISABLE = 0, 37 PIPE_GATING_CONTROL_ENABLE, 38 PIPE_GATING_CONTROL_INIT 39 }; 40 41 struct dce_hwseq_wa { 42 bool blnd_crtc_trigger; 43 bool DEGVIDCN10_253; 44 bool false_optc_underflow; 45 }; 46 47 struct hwseq_wa_state { 48 bool DEGVIDCN10_253_applied; 49 }; 50 51 struct dce_hwseq { 52 struct dc_context *ctx; 53 const struct dce_hwseq_registers *regs; 54 const struct dce_hwseq_shift *shifts; 55 const struct dce_hwseq_mask *masks; 56 struct dce_hwseq_wa wa; 57 struct hwseq_wa_state wa_state; 58 }; 59 60 struct pipe_ctx; 61 struct dc_state; 62 struct dchub_init_data; 63 struct dc_static_screen_events; 64 struct resource_pool; 65 struct resource_context; 66 67 struct hw_sequencer_funcs { 68 69 void (*init_hw)(struct dc *dc); 70 71 enum dc_status (*apply_ctx_to_hw)( 72 struct dc *dc, struct dc_state *context); 73 74 void (*reset_hw_ctx_wrap)( 75 struct dc *dc, struct dc_state *context); 76 77 void (*apply_ctx_for_surface)( 78 struct dc *dc, 79 const struct dc_stream_state *stream, 80 int num_planes, 81 struct dc_state *context); 82 83 void (*set_plane_config)( 84 const struct dc *dc, 85 struct pipe_ctx *pipe_ctx, 86 struct resource_context *res_ctx); 87 88 void (*program_gamut_remap)( 89 struct pipe_ctx *pipe_ctx); 90 91 void (*program_csc_matrix)( 92 struct pipe_ctx *pipe_ctx, 93 enum dc_color_space colorspace, 94 uint16_t *matrix); 95 96 void (*update_plane_addr)( 97 const struct dc *dc, 98 struct pipe_ctx *pipe_ctx); 99 100 void (*update_dchub)( 101 struct dce_hwseq *hws, 102 struct dchub_init_data *dh_data); 103 104 void (*update_pending_status)( 105 struct pipe_ctx *pipe_ctx); 106 107 bool (*set_input_transfer_func)( 108 struct pipe_ctx *pipe_ctx, 109 const struct dc_plane_state *plane_state); 110 111 bool (*set_output_transfer_func)( 112 struct pipe_ctx *pipe_ctx, 113 const struct dc_stream_state *stream); 114 115 void (*power_down)(struct dc *dc); 116 117 void (*enable_accelerated_mode)(struct dc *dc); 118 119 void (*enable_timing_synchronization)( 120 struct dc *dc, 121 int group_index, 122 int group_size, 123 struct pipe_ctx *grouped_pipes[]); 124 125 void (*enable_per_frame_crtc_position_reset)( 126 struct dc *dc, 127 int group_size, 128 struct pipe_ctx *grouped_pipes[]); 129 130 void (*enable_display_pipe_clock_gating)( 131 struct dc_context *ctx, 132 bool clock_gating); 133 134 bool (*enable_display_power_gating)( 135 struct dc *dc, 136 uint8_t controller_id, 137 struct dc_bios *dcb, 138 enum pipe_gating_control power_gating); 139 140 void (*disable_plane)(struct dc *dc, struct pipe_ctx *pipe_ctx); 141 142 void (*update_info_frame)(struct pipe_ctx *pipe_ctx); 143 144 void (*enable_stream)(struct pipe_ctx *pipe_ctx); 145 146 void (*disable_stream)(struct pipe_ctx *pipe_ctx, 147 int option); 148 149 void (*unblank_stream)(struct pipe_ctx *pipe_ctx, 150 struct dc_link_settings *link_settings); 151 152 void (*pipe_control_lock)( 153 struct dc *dc, 154 struct pipe_ctx *pipe, 155 bool lock); 156 157 void (*set_bandwidth)( 158 struct dc *dc, 159 struct dc_state *context, 160 bool decrease_allowed); 161 162 void (*set_drr)(struct pipe_ctx **pipe_ctx, int num_pipes, 163 int vmin, int vmax); 164 165 void (*get_position)(struct pipe_ctx **pipe_ctx, int num_pipes, 166 struct crtc_position *position); 167 168 void (*set_static_screen_control)(struct pipe_ctx **pipe_ctx, 169 int num_pipes, const struct dc_static_screen_events *events); 170 171 enum dc_status (*prog_pixclk_crtc_otg)( 172 struct pipe_ctx *pipe_ctx, 173 struct dc_state *context, 174 struct dc *dc); 175 176 void (*setup_stereo)( 177 struct pipe_ctx *pipe_ctx, 178 struct dc *dc); 179 180 void (*set_avmute)(struct pipe_ctx *pipe_ctx, bool enable); 181 182 void (*log_hw_state)(struct dc *dc); 183 184 void (*wait_for_mpcc_disconnect)(struct dc *dc, 185 struct resource_pool *res_pool, 186 struct pipe_ctx *pipe_ctx); 187 188 void (*ready_shared_resources)(struct dc *dc, struct dc_state *context); 189 void (*optimize_shared_resources)(struct dc *dc); 190 void (*pplib_apply_display_requirements)( 191 struct dc *dc, 192 struct dc_state *context); 193 void (*edp_power_control)( 194 struct dc_link *link, 195 bool enable); 196 void (*edp_backlight_control)( 197 struct dc_link *link, 198 bool enable); 199 void (*edp_wait_for_hpd_ready)(struct dc_link *link, bool power_up); 200 201 void (*set_cursor_position)(struct pipe_ctx *pipe); 202 void (*set_cursor_attribute)(struct pipe_ctx *pipe); 203 204 }; 205 206 void color_space_to_black_color( 207 const struct dc *dc, 208 enum dc_color_space colorspace, 209 struct tg_color *black_color); 210 211 bool hwss_wait_for_blank_complete( 212 struct timing_generator *tg); 213 214 const uint16_t *find_color_matrix( 215 enum dc_color_space color_space, 216 uint32_t *array_size); 217 218 #endif /* __DC_HW_SEQUENCER_H__ */ 219